18 #include "../benode_t.h"
19 #include "bearch_ia32_t.h"
21 #include "ia32_nodes_attr.h"
22 #include "../arch/archop.h" /* we need this for Min and Max nodes */
23 #include "ia32_transform.h"
24 #include "ia32_new_nodes.h"
26 #include "gen_ia32_regalloc_if.h"
28 #define SFP_SIGN "0x80000000"
29 #define DFP_SIGN "0x8000000000000000"
30 #define SFP_ABS "0x7FFFFFFF"
31 #define DFP_ABS "0x7FFFFFFFFFFFFFFF"
33 #define TP_SFP_SIGN "ia32_sfp_sign"
34 #define TP_DFP_SIGN "ia32_dfp_sign"
35 #define TP_SFP_ABS "ia32_sfp_abs"
36 #define TP_DFP_ABS "ia32_dfp_abs"
38 #define ENT_SFP_SIGN "IA32_SFP_SIGN"
39 #define ENT_DFP_SIGN "IA32_DFP_SIGN"
40 #define ENT_SFP_ABS "IA32_SFP_ABS"
41 #define ENT_DFP_ABS "IA32_DFP_ABS"
43 extern ir_op *get_op_Mulh(void);
45 typedef ir_node *construct_binop_func(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *base, ir_node *index, \
46 ir_node *op1, ir_node *op2, ir_node *mem, ir_mode *mode);
48 typedef ir_node *construct_unop_func(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *base, ir_node *index, \
49 ir_node *op, ir_node *mem, ir_mode *mode);
52 ia32_SSIGN, ia32_DSIGN, ia32_SABS, ia32_DABS
55 /****************************************************************************************************
57 * | | | | / _| | | (_)
58 * _ __ ___ __| | ___ | |_ _ __ __ _ _ __ ___| |_ ___ _ __ _ __ ___ __ _| |_ _ ___ _ __
59 * | '_ \ / _ \ / _` |/ _ \ | __| '__/ _` | '_ \/ __| _/ _ \| '__| '_ ` _ \ / _` | __| |/ _ \| '_ \
60 * | | | | (_) | (_| | __/ | |_| | | (_| | | | \__ \ || (_) | | | | | | | | (_| | |_| | (_) | | | |
61 * |_| |_|\___/ \__,_|\___| \__|_| \__,_|_| |_|___/_| \___/|_| |_| |_| |_|\__,_|\__|_|\___/|_| |_|
63 ****************************************************************************************************/
70 /* Compares two (entity, tarval) combinations */
71 static int cmp_tv_ent(const void *a, const void *b, size_t len) {
72 const struct tv_ent *e1 = a;
73 const struct tv_ent *e2 = b;
75 return !(e1->tv == e2->tv);
78 /* Generates an entity for a known FP const (used for FP Neg + Abs) */
79 static char *gen_fp_known_const(ir_mode *mode, ia32_known_const_t kct) {
80 static set *const_set = NULL;
92 const_set = new_set(cmp_tv_ent, 10);
97 tp_name = TP_SFP_SIGN;
98 ent_name = ENT_SFP_SIGN;
102 tp_name = TP_DFP_SIGN;
103 ent_name = ENT_DFP_SIGN;
107 tp_name = TP_SFP_ABS;
108 ent_name = ENT_SFP_ABS;
112 tp_name = TP_DFP_ABS;
113 ent_name = ENT_DFP_ABS;
119 key.tv = new_tarval_from_str(cnst_str, strlen(cnst_str), mode);
122 entry = set_insert(const_set, &key, sizeof(key), HASH_PTR(key.tv));
125 tp = new_type_primitive(new_id_from_str(tp_name), mode);
126 ent = new_entity(get_glob_type(), new_id_from_str(ent_name), tp);
128 set_entity_ld_ident(ent, get_entity_ident(ent));
129 set_entity_visibility(ent, visibility_local);
130 set_entity_variability(ent, variability_constant);
131 set_entity_allocation(ent, allocation_static);
133 /* we create a new entity here: It's initialization must resist on the
135 rem = current_ir_graph;
136 current_ir_graph = get_const_code_irg();
137 cnst = new_Const(mode, key.tv);
138 current_ir_graph = rem;
140 set_atomic_ent_value(ent, cnst);
142 /* set the entry for hashmap */
151 /* determine if one operator is an Imm */
152 static ir_node *get_immediate_op(ir_node *op1, ir_node *op2) {
154 return is_ia32_Cnst(op1) ? op1 : (is_ia32_Cnst(op2) ? op2 : NULL);
155 else return is_ia32_Cnst(op2) ? op2 : NULL;
158 /* determine if one operator is not an Imm */
159 static ir_node *get_expr_op(ir_node *op1, ir_node *op2) {
160 return !is_ia32_Cnst(op1) ? op1 : (!is_ia32_Cnst(op2) ? op2 : NULL);
165 * Construct a standard binary operation, set AM and immediate if required.
167 * @param env The transformation environment
168 * @param op1 The first operand
169 * @param op2 The second operand
170 * @param func The node constructor function
171 * @return The constructed ia32 node.
173 static ir_node *gen_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2, construct_binop_func *func) {
174 ir_node *new_op = NULL;
175 ir_mode *mode = env->mode;
176 dbg_info *dbg = env->dbg;
177 ir_graph *irg = env->irg;
178 ir_node *block = env->block;
179 firm_dbg_module_t *mod = env->mod;
180 ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
181 ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
182 ir_node *nomem = new_NoMem();
183 ir_node *expr_op, *imm_op;
186 /* check if it's an operation with immediate */
187 if (is_op_commutative(get_irn_op(env->irn))) {
188 imm_op = get_immediate_op(op1, op2);
189 expr_op = get_expr_op(op1, op2);
192 imm_op = get_immediate_op(NULL, op2);
193 expr_op = get_expr_op(op1, op2);
196 assert((expr_op || imm_op) && "invalid operands");
199 /* We have two consts here: not yet supported */
203 if (mode_is_float(mode)) {
204 /* floating point operations */
206 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, expr_op, noreg_fp, nomem, mode_T);
207 set_ia32_Immop_attr(new_op, imm_op);
208 set_ia32_am_support(new_op, ia32_am_None);
211 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, op1, op2, nomem, mode_T);
212 set_ia32_am_support(new_op, ia32_am_Source);
216 /* integer operations */
218 /* This is expr + const */
219 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, expr_op, noreg_gp, nomem, mode_T);
220 set_ia32_Immop_attr(new_op, imm_op);
223 set_ia32_am_support(new_op, ia32_am_Dest);
226 /* This is a normal operation */
227 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, op1, op2, nomem, mode_T);
230 set_ia32_am_support(new_op, ia32_am_Full);
234 if (is_op_commutative(get_irn_op(env->irn))) {
235 set_ia32_commutative(new_op);
238 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
244 * Construct a shift/rotate binary operation, sets AM and immediate if required.
246 * @param env The transformation environment
247 * @param op1 The first operand
248 * @param op2 The second operand
249 * @param func The node constructor function
250 * @return The constructed ia32 node.
252 static ir_node *gen_shift_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2, construct_binop_func *func) {
253 ir_node *new_op = NULL;
254 ir_mode *mode = env->mode;
255 dbg_info *dbg = env->dbg;
256 ir_graph *irg = env->irg;
257 ir_node *block = env->block;
258 firm_dbg_module_t *mod = env->mod;
259 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
260 ir_node *nomem = new_NoMem();
261 ir_node *expr_op, *imm_op;
264 assert(! mode_is_float(mode) && "Shift/Rotate with float not supported");
266 imm_op = get_immediate_op(NULL, op2);
267 expr_op = get_expr_op(op1, op2);
269 assert((expr_op || imm_op) && "invalid operands");
272 /* We have two consts here: not yet supported */
276 /* Limit imm_op within range imm8 */
278 tv = get_ia32_Immop_tarval(imm_op);
281 tv = tarval_mod(tv, new_tarval_from_long(32, mode_Iu));
288 /* integer operations */
290 /* This is shift/rot with const */
292 new_op = func(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
293 set_ia32_Immop_attr(new_op, imm_op);
296 /* This is a normal shift/rot */
297 new_op = func(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
301 set_ia32_am_support(new_op, ia32_am_Dest);
303 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
308 * Construct a standard unary operation, set AM and immediate if required.
310 * @param env The transformation environment
311 * @param op The operand
312 * @param func The node constructor function
313 * @return The constructed ia32 node.
315 static ir_node *gen_unop(ia32_transform_env_t *env, ir_node *op, construct_unop_func *func) {
316 ir_node *new_op = NULL;
317 ir_mode *mode = env->mode;
318 dbg_info *dbg = env->dbg;
319 ir_graph *irg = env->irg;
320 ir_node *block = env->block;
321 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
322 ir_node *nomem = new_NoMem();
324 new_op = func(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
326 if (mode_is_float(mode)) {
327 /* floating point operations don't support implicit store */
328 set_ia32_am_support(new_op, ia32_am_None);
331 set_ia32_am_support(new_op, ia32_am_Dest);
334 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
340 * Creates an ia32 Add with immediate.
342 * @param env The transformation environment
343 * @param expr_op The expression operator
344 * @param const_op The constant
345 * @return the created ia32 Add node
347 static ir_node *gen_imm_Add(ia32_transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
348 ir_node *new_op = NULL;
349 tarval *tv = get_ia32_Immop_tarval(const_op);
350 firm_dbg_module_t *mod = env->mod;
351 dbg_info *dbg = env->dbg;
352 ir_mode *mode = env->mode;
353 ir_graph *irg = env->irg;
354 ir_node *block = env->block;
355 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
356 ir_node *nomem = new_NoMem();
358 tarval_classification_t class_tv, class_negtv;
360 /* const_op: tarval or SymConst? */
362 /* optimize tarvals */
363 class_tv = classify_tarval(tv);
364 class_negtv = classify_tarval(tarval_neg(tv));
366 if (class_tv == TV_CLASSIFY_ONE) { /* + 1 == INC */
367 DB((env->mod, LEVEL_2, "Add(1) to Inc ... "));
368 new_op = new_rd_ia32_Inc(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
371 else if (class_tv == TV_CLASSIFY_ALL_ONE || class_negtv == TV_CLASSIFY_ONE) { /* + (-1) == DEC */
372 DB((mod, LEVEL_2, "Add(-1) to Dec ... "));
373 new_op = new_rd_ia32_Dec(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
379 new_op = new_rd_ia32_Add(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
380 set_ia32_Immop_attr(new_op, const_op);
387 * Creates an ia32 Add.
389 * @param dbg firm node dbg
390 * @param block the block the new node should belong to
391 * @param op1 first operator
392 * @param op2 second operator
393 * @param mode node mode
394 * @return the created ia32 Add node
396 static ir_node *gen_Add(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
397 ir_node *new_op = NULL;
398 dbg_info *dbg = env->dbg;
399 ir_mode *mode = env->mode;
400 ir_graph *irg = env->irg;
401 ir_node *block = env->block;
402 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
403 ir_node *nomem = new_NoMem();
404 ir_node *expr_op, *imm_op;
406 imm_op = get_immediate_op(op1, op2);
407 expr_op = get_expr_op(op1, op2);
409 assert((expr_op || imm_op) && "invalid operands");
411 if (mode_is_float(mode)) {
412 return gen_binop(env, op1, op2, new_rd_ia32_fAdd);
417 /* No expr_op means, that we have two const - one symconst and */
418 /* one tarval or another symconst - because this case is not */
419 /* covered by constant folding */
421 new_op = new_rd_ia32_Lea(dbg, irg, block, noreg, noreg, mode);
422 add_ia32_am_offs(new_op, get_ia32_cnst(op1));
423 add_ia32_am_offs(new_op, get_ia32_cnst(op2));
426 set_ia32_am_support(new_op, ia32_am_Source);
427 set_ia32_op_type(new_op, ia32_AddrModeS);
428 set_ia32_am_flavour(new_op, ia32_am_O);
430 /* Lea doesn't need a Proj */
434 /* This is expr + const */
435 new_op = gen_imm_Add(env, expr_op, imm_op);
438 set_ia32_am_support(new_op, ia32_am_Dest);
441 /* This is a normal add */
442 new_op = new_rd_ia32_Add(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
445 set_ia32_am_support(new_op, ia32_am_Full);
449 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
455 * Creates an ia32 Mul.
457 * @param dbg firm node dbg
458 * @param block the block the new node should belong to
459 * @param op1 first operator
460 * @param op2 second operator
461 * @param mode node mode
462 * @return the created ia32 Mul node
464 static ir_node *gen_Mul(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
467 if (mode_is_float(env->mode)) {
468 new_op = gen_binop(env, op1, op2, new_rd_ia32_fMul);
471 new_op = gen_binop(env, op1, op2, new_rd_ia32_Mul);
480 * Creates an ia32 Mulh.
481 * Note: Mul produces a 64Bit result and Mulh returns the upper 32 bit of
482 * this result while Mul returns the lower 32 bit.
484 * @param env The transformation environment
485 * @param op1 The first operator
486 * @param op2 The second operator
487 * @return the created ia32 Mulh node
489 static ir_node *gen_Mulh(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
490 ir_node *proj_EAX, *proj_EDX, *mulh;
493 assert(mode_is_float(env->mode) && "Mulh with float not supported");
494 proj_EAX = gen_binop(env, op1, op2, new_rd_ia32_Mulh);
495 mulh = get_Proj_pred(proj_EAX);
496 proj_EDX = new_rd_Proj(env->dbg, env->irg, env->block, mulh, env->mode, pn_EDX);
498 /* to be on the save side */
499 set_Proj_proj(proj_EAX, pn_EAX);
501 if (get_ia32_cnst(mulh)) {
502 /* Mulh with const cannot have AM */
503 set_ia32_am_support(mulh, ia32_am_None);
506 /* Mulh cannot have AM for destination */
507 set_ia32_am_support(mulh, ia32_am_Source);
513 be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], env->irg, env->block, 1, in);
521 * Creates an ia32 And.
523 * @param env The transformation environment
524 * @param op1 The first operator
525 * @param op2 The second operator
526 * @return The created ia32 And node
528 static ir_node *gen_And(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
529 if (mode_is_float(env->mode)) {
530 return gen_binop(env, op1, op2, new_rd_ia32_fAnd);
533 return gen_binop(env, op1, op2, new_rd_ia32_And);
540 * Creates an ia32 Or.
542 * @param env The transformation environment
543 * @param op1 The first operator
544 * @param op2 The second operator
545 * @return The created ia32 Or node
547 static ir_node *gen_Or(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
548 if (mode_is_float(env->mode)) {
549 return gen_binop(env, op1, op2, new_rd_ia32_fOr);
552 return gen_binop(env, op1, op2, new_rd_ia32_Or);
559 * Creates an ia32 Eor.
561 * @param env The transformation environment
562 * @param op1 The first operator
563 * @param op2 The second operator
564 * @return The created ia32 Eor node
566 static ir_node *gen_Eor(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
567 if (mode_is_float(env->mode)) {
568 return gen_binop(env, op1, op2, new_rd_ia32_fEor);
571 return gen_binop(env, op1, op2, new_rd_ia32_Eor);
578 * Creates an ia32 Max.
580 * @param env The transformation environment
581 * @param op1 The first operator
582 * @param op2 The second operator
583 * @return the created ia32 Max node
585 static ir_node *gen_Max(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
588 if (mode_is_float(env->mode)) {
589 new_op = gen_binop(env, op1, op2, new_rd_ia32_fMax);
592 new_op = new_rd_ia32_Max(env->dbg, env->irg, env->block, op1, op2, env->mode);
593 set_ia32_am_support(new_op, ia32_am_None);
602 * Creates an ia32 Min.
604 * @param env The transformation environment
605 * @param op1 The first operator
606 * @param op2 The second operator
607 * @return the created ia32 Min node
609 static ir_node *gen_Min(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
612 if (mode_is_float(env->mode)) {
613 new_op = gen_binop(env, op1, op2, new_rd_ia32_fMin);
616 new_op = new_rd_ia32_Min(env->dbg, env->irg, env->block, op1, op2, env->mode);
617 set_ia32_am_support(new_op, ia32_am_None);
626 * Creates an ia32 Sub with immediate.
628 * @param env The transformation environment
629 * @param op1 The first operator
630 * @param op2 The second operator
631 * @return The created ia32 Sub node
633 static ir_node *gen_imm_Sub(ia32_transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
634 ir_node *new_op = NULL;
635 tarval *tv = get_ia32_Immop_tarval(const_op);
636 firm_dbg_module_t *mod = env->mod;
637 dbg_info *dbg = env->dbg;
638 ir_mode *mode = env->mode;
639 ir_graph *irg = env->irg;
640 ir_node *block = env->block;
641 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
642 ir_node *nomem = new_NoMem();
644 tarval_classification_t class_tv, class_negtv;
646 /* const_op: tarval or SymConst? */
648 /* optimize tarvals */
649 class_tv = classify_tarval(tv);
650 class_negtv = classify_tarval(tarval_neg(tv));
652 if (class_tv == TV_CLASSIFY_ONE) { /* - 1 == DEC */
653 DB((mod, LEVEL_2, "Sub(1) to Dec ... "));
654 new_op = new_rd_ia32_Dec(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
657 else if (class_negtv == TV_CLASSIFY_ONE) { /* - (-1) == Sub */
658 DB((mod, LEVEL_2, "Sub(-1) to Inc ... "));
659 new_op = new_rd_ia32_Inc(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
665 new_op = new_rd_ia32_Sub(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
666 set_ia32_Immop_attr(new_op, const_op);
673 * Creates an ia32 Sub.
675 * @param env The transformation environment
676 * @param op1 The first operator
677 * @param op2 The second operator
678 * @return The created ia32 Sub node
680 static ir_node *gen_Sub(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
681 ir_node *new_op = NULL;
682 dbg_info *dbg = env->dbg;
683 ir_mode *mode = env->mode;
684 ir_graph *irg = env->irg;
685 ir_node *block = env->block;
686 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
687 ir_node *nomem = new_NoMem();
688 ir_node *expr_op, *imm_op;
690 imm_op = get_immediate_op(NULL, op2);
691 expr_op = get_expr_op(op1, op2);
693 assert((expr_op || imm_op) && "invalid operands");
695 if (mode_is_float(mode)) {
696 return gen_binop(env, op1, op2, new_rd_ia32_fSub);
701 /* No expr_op means, that we have two const - one symconst and */
702 /* one tarval or another symconst - because this case is not */
703 /* covered by constant folding */
705 new_op = new_rd_ia32_Lea(dbg, irg, block, noreg, noreg, mode);
706 add_ia32_am_offs(new_op, get_ia32_cnst(op1));
707 sub_ia32_am_offs(new_op, get_ia32_cnst(op2));
710 set_ia32_am_support(new_op, ia32_am_Source);
711 set_ia32_op_type(new_op, ia32_AddrModeS);
712 set_ia32_am_flavour(new_op, ia32_am_O);
714 /* Lea doesn't need a Proj */
718 /* This is expr - const */
719 new_op = gen_imm_Sub(env, expr_op, imm_op);
722 set_ia32_am_support(new_op, ia32_am_Dest);
725 /* This is a normal sub */
726 new_op = new_rd_ia32_Sub(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
729 set_ia32_am_support(new_op, ia32_am_Full);
733 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
739 * Generates an ia32 DivMod with additional infrastructure for the
740 * register allocator if needed.
742 * @param env The transformation environment
743 * @param dividend -no comment- :)
744 * @param divisor -no comment- :)
745 * @param dm_flav flavour_Div/Mod/DivMod
746 * @return The created ia32 DivMod node
748 static ir_node *generate_DivMod(ia32_transform_env_t *env, ir_node *dividend, ir_node *divisor, ia32_op_flavour_t dm_flav) {
750 ir_node *edx_node, *cltd;
752 dbg_info *dbg = env->dbg;
753 ir_graph *irg = env->irg;
754 ir_node *block = env->block;
755 ir_mode *mode = env->mode;
756 ir_node *irn = env->irn;
761 mem = get_Div_mem(irn);
764 mem = get_Mod_mem(irn);
767 mem = get_DivMod_mem(irn);
773 if (mode_is_signed(mode)) {
774 /* in signed mode, we need to sign extend the dividend */
775 cltd = new_rd_ia32_Cdq(dbg, irg, block, dividend, mode_T);
776 dividend = new_rd_Proj(dbg, irg, block, cltd, mode_Is, pn_EAX);
777 edx_node = new_rd_Proj(dbg, irg, block, cltd, mode_Is, pn_EDX);
780 edx_node = new_rd_ia32_Const(dbg, irg, block, mode_Iu);
781 set_ia32_Const_type(edx_node, ia32_Const);
782 set_ia32_Immop_tarval(edx_node, get_tarval_null(mode_Iu));
785 res = new_rd_ia32_DivMod(dbg, irg, block, dividend, divisor, edx_node, mem, mode);
787 set_ia32_flavour(res, dm_flav);
788 set_ia32_n_res(res, 2);
790 /* Only one proj is used -> We must add a second proj and */
791 /* connect this one to a Keep node to eat up the second */
792 /* destroyed register. */
793 if (get_irn_n_edges(irn) == 1) {
794 proj = get_edge_src_irn(get_irn_out_edge_first(irn));
795 assert(is_Proj(proj) && "non-Proj to Div/Mod node");
797 if (get_Proj_proj(proj) == pn_DivMod_res_div) {
798 in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode_Is, pn_DivMod_res_mod);
801 in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode_Is, pn_DivMod_res_div);
804 be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 1, in_keep);
812 * Wrapper for generate_DivMod. Sets flavour_Mod.
814 static ir_node *gen_Mod(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
815 return generate_DivMod(env, op1, op2, flavour_Mod);
821 * Wrapper for generate_DivMod. Sets flavour_Div.
823 static ir_node *gen_Div(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
824 return generate_DivMod(env, op1, op2, flavour_Div);
830 * Wrapper for generate_DivMod. Sets flavour_DivMod.
832 static ir_node *gen_DivMod(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
833 return generate_DivMod(env, op1, op2, flavour_DivMod);
839 * Creates an ia32 floating Div.
841 * @param env The transformation environment
842 * @param op1 The first operator
843 * @param op2 The second operator
844 * @return The created ia32 fDiv node
846 static ir_node *gen_Quot(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
847 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
848 ir_node *nomem = new_rd_NoMem(env->irg);
851 new_op = new_rd_ia32_fDiv(env->dbg, env->irg, env->block, noreg, noreg, op1, op2, nomem, env->mode);
852 set_ia32_am_support(new_op, ia32_am_Source);
860 * Creates an ia32 Shl.
862 * @param env The transformation environment
863 * @param op1 The first operator
864 * @param op2 The second operator
865 * @return The created ia32 Shl node
867 static ir_node *gen_Shl(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
868 return gen_shift_binop(env, op1, op2, new_rd_ia32_Shl);
874 * Creates an ia32 Shr.
876 * @param env The transformation environment
877 * @param op1 The first operator
878 * @param op2 The second operator
879 * @return The created ia32 Shr node
881 static ir_node *gen_Shr(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
882 return gen_shift_binop(env, op1, op2, new_rd_ia32_Shr);
888 * Creates an ia32 Shrs.
890 * @param env The transformation environment
891 * @param op1 The first operator
892 * @param op2 The second operator
893 * @return The created ia32 Shrs node
895 static ir_node *gen_Shrs(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
896 return gen_shift_binop(env, op1, op2, new_rd_ia32_Shrs);
902 * Creates an ia32 RotL.
904 * @param env The transformation environment
905 * @param op1 The first operator
906 * @param op2 The second operator
907 * @return The created ia32 RotL node
909 static ir_node *gen_RotL(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
910 return gen_shift_binop(env, op1, op2, new_rd_ia32_RotL);
916 * Creates an ia32 RotR.
917 * NOTE: There is no RotR with immediate because this would always be a RotL
918 * "imm-mode_size_bits" which can be pre-calculated.
920 * @param env The transformation environment
921 * @param op1 The first operator
922 * @param op2 The second operator
923 * @return The created ia32 RotR node
925 static ir_node *gen_RotR(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
926 return gen_shift_binop(env, op1, op2, new_rd_ia32_RotR);
932 * Creates an ia32 RotR or RotL (depending on the found pattern).
934 * @param env The transformation environment
935 * @param op1 The first operator
936 * @param op2 The second operator
937 * @return The created ia32 RotL or RotR node
939 static ir_node *gen_Rot(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
940 ir_node *rotate = NULL;
942 /* Firm has only Rot (which is a RotL), so we are looking for a right (op2)
943 operand "-e+mode_size_bits" (it's an already modified "mode_size_bits-e",
944 that means we can create a RotR instead of an Add and a RotL */
947 ir_node *pred = get_Proj_pred(op2);
949 if (is_ia32_Add(pred)) {
950 ir_node *pred_pred = get_irn_n(pred, 2);
951 tarval *tv = get_ia32_Immop_tarval(pred);
952 long bits = get_mode_size_bits(env->mode);
954 if (is_Proj(pred_pred)) {
955 pred_pred = get_Proj_pred(pred_pred);
958 if (is_ia32_Minus(pred_pred) &&
959 tarval_is_long(tv) &&
960 get_tarval_long(tv) == bits)
962 DB((env->mod, LEVEL_1, "RotL into RotR ... "));
963 rotate = gen_RotR(env, op1, get_irn_n(pred_pred, 2));
970 rotate = gen_RotL(env, op1, op2);
979 * Transforms a Conv node.
981 * @param env The transformation environment
982 * @param op The operator
983 * @return The created ia32 Conv node
985 static ir_node *gen_Conv(ia32_transform_env_t *env, ir_node *op) {
986 return new_rd_ia32_Conv(env->dbg, env->irg, env->block, op, env->mode);
992 * Transforms a Minus node.
994 * @param env The transformation environment
995 * @param op The operator
996 * @return The created ia32 Minus node
998 static ir_node *gen_Minus(ia32_transform_env_t *env, ir_node *op) {
1001 ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
1002 ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
1003 ir_node *nomem = new_rd_NoMem(env->irg);
1006 if (mode_is_float(env->mode)) {
1007 new_op = new_rd_ia32_fEor(env->dbg, env->irg, env->block, noreg_gp, noreg_gp, op, noreg_fp, nomem, mode_T);
1009 size = get_mode_size_bits(env->mode);
1010 name = gen_fp_known_const(env->mode, size == 32 ? ia32_SSIGN : ia32_DSIGN);
1012 set_ia32_sc(new_op, name);
1014 new_op = new_rd_Proj(env->dbg, env->irg, env->block, new_op, env->mode, 0);
1017 new_op = gen_unop(env, op, new_rd_ia32_Minus);
1026 * Transforms a Not node.
1028 * @param env The transformation environment
1029 * @param op The operator
1030 * @return The created ia32 Not node
1032 static ir_node *gen_Not(ia32_transform_env_t *env, ir_node *op) {
1035 if (mode_is_float(env->mode)) {
1039 new_op = gen_unop(env, op, new_rd_ia32_Not);
1048 * Transforms an Abs node.
1050 * @param env The transformation environment
1051 * @param op The operator
1052 * @return The created ia32 Abs node
1054 static ir_node *gen_Abs(ia32_transform_env_t *env, ir_node *op) {
1055 ir_node *res, *p_eax, *p_edx;
1056 dbg_info *dbg = env->dbg;
1057 ir_mode *mode = env->mode;
1058 ir_graph *irg = env->irg;
1059 ir_node *block = env->block;
1060 ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
1061 ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
1062 ir_node *nomem = new_NoMem();
1066 if (mode_is_float(mode)) {
1067 res = new_rd_ia32_fAnd(dbg,irg, block, noreg_gp, noreg_gp, op, noreg_fp, nomem, mode_T);
1069 size = get_mode_size_bits(mode);
1070 name = gen_fp_known_const(mode, size == 32 ? ia32_SABS : ia32_DABS);
1072 set_ia32_sc(res, name);
1074 res = new_rd_Proj(dbg, irg, block, res, mode, 0);
1077 res = new_rd_ia32_Cdq(dbg, irg, block, op, mode_T);
1078 p_eax = new_rd_Proj(dbg, irg, block, res, mode, pn_EAX);
1079 p_edx = new_rd_Proj(dbg, irg, block, res, mode, pn_EDX);
1080 res = new_rd_ia32_Eor(dbg, irg, block, noreg_gp, noreg_gp, p_eax, p_edx, nomem, mode_T);
1081 res = new_rd_Proj(dbg, irg, block, res, mode, 0);
1082 res = new_rd_ia32_Sub(dbg, irg, block, noreg_gp, noreg_gp, res, p_edx, nomem, mode_T);
1083 res = new_rd_Proj(dbg, irg, block, res, mode, 0);
1092 * Transforms a Load.
1094 * @param mod the debug module
1095 * @param block the block the new node should belong to
1096 * @param node the ir Load node
1097 * @param mode node mode
1098 * @return the created ia32 Load node
1100 static ir_node *gen_Load(ia32_transform_env_t *env) {
1101 ir_node *node = env->irn;
1102 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1105 if (mode_is_float(env->mode)) {
1106 new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, get_Load_ptr(node), noreg, get_Load_mem(node), env->mode);
1109 new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, get_Load_ptr(node), noreg, get_Load_mem(node), env->mode);
1112 set_ia32_am_support(new_op, ia32_am_Source);
1113 set_ia32_op_type(new_op, ia32_AddrModeS);
1114 set_ia32_am_flavour(new_op, ia32_B);
1115 set_ia32_ls_mode(new_op, get_Load_mode(node));
1123 * Transforms a Store.
1125 * @param mod the debug module
1126 * @param block the block the new node should belong to
1127 * @param node the ir Store node
1128 * @param mode node mode
1129 * @return the created ia32 Store node
1131 static ir_node *gen_Store(ia32_transform_env_t *env) {
1132 ir_node *node = env->irn;
1133 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1134 ir_node *val = get_Store_value(node);
1135 ir_node *ptr = get_Store_ptr(node);
1136 ir_node *mem = get_Store_mem(node);
1137 ir_node *sval = val;
1140 /* in case of storing a const -> make it an attribute */
1141 if (is_ia32_Cnst(val)) {
1145 if (mode_is_float(env->mode)) {
1146 new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, env->mode);
1149 new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, env->mode);
1152 /* stored const is an attribute (saves a register) */
1153 if (is_ia32_Cnst(val)) {
1154 set_ia32_Immop_attr(new_op, val);
1157 set_ia32_am_support(new_op, ia32_am_Dest);
1158 set_ia32_op_type(new_op, ia32_AddrModeD);
1159 set_ia32_am_flavour(new_op, ia32_B);
1160 set_ia32_ls_mode(new_op, get_irn_mode(val));
1167 * Transforms a Call and its arguments corresponding to the calling convention.
1169 * @param env The transformation environment
1170 * @return The created ia32 Call node
1172 static ir_node *gen_Call(ia32_transform_env_t *env) {
1178 * Transforms a Cond -> Proj[b] -> Cmp into a CondJmp or CondJmp_i
1180 * @param env The transformation environment
1181 * @return The transformed node.
1183 static ir_node *gen_Cond(ia32_transform_env_t *env) {
1184 dbg_info *dbg = env->dbg;
1185 ir_graph *irg = env->irg;
1186 ir_node *block = env->block;
1187 ir_node *node = env->irn;
1188 ir_node *sel = get_Cond_selector(node);
1189 ir_mode *sel_mode = get_irn_mode(sel);
1190 ir_node *res = NULL;
1191 ir_node *pred = NULL;
1192 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1193 ir_node *nomem = new_NoMem();
1194 ir_node *cmp_a, *cmp_b, *cnst, *expr;
1196 if (is_Proj(sel) && sel_mode == mode_b) {
1197 pred = get_Proj_pred(sel);
1199 /* get both compare operators */
1200 cmp_a = get_Cmp_left(pred);
1201 cmp_b = get_Cmp_right(pred);
1203 /* check if we can use a CondJmp with immediate */
1204 cnst = get_immediate_op(cmp_a, cmp_b);
1205 expr = get_expr_op(cmp_a, cmp_b);
1208 res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, expr, noreg, nomem, mode_T);
1209 set_ia32_Immop_attr(res, cnst);
1212 res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem, mode_T);
1215 set_ia32_pncode(res, get_Proj_proj(sel));
1218 res = new_rd_ia32_SwitchJmp(dbg, irg, block, noreg, noreg, sel, nomem, mode_T);
1219 set_ia32_pncode(res, get_Cond_defaultProj(node));
1228 * Transforms a CopyB node.
1230 * @param env The transformation environment
1231 * @return The transformed node.
1233 static ir_node *gen_CopyB(ia32_transform_env_t *env) {
1234 ir_node *res = NULL;
1235 dbg_info *dbg = env->dbg;
1236 ir_graph *irg = env->irg;
1237 ir_mode *mode = env->mode;
1238 ir_node *block = env->block;
1239 ir_node *node = env->irn;
1240 ir_node *src = get_CopyB_src(node);
1241 ir_node *dst = get_CopyB_dst(node);
1242 ir_node *mem = get_CopyB_mem(node);
1243 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1244 int size = get_type_size_bytes(get_CopyB_type(node));
1247 /* If we have to copy more than 16 bytes, we use REP MOVSx and */
1248 /* then we need the size explicitly in ECX. */
1250 rem = size & 0x3; /* size % 4 */
1253 res = new_rd_ia32_Const(dbg, irg, block, mode_Is);
1254 set_ia32_op_type(res, ia32_Const);
1255 set_ia32_Immop_tarval(res, new_tarval_from_long(size, mode_Is));
1257 res = new_rd_ia32_CopyB(dbg, irg, block, dst, src, res, mem, mode);
1258 set_ia32_Immop_tarval(res, new_tarval_from_long(rem, mode_Is));
1261 res = new_rd_ia32_CopyB_i(dbg, irg, block, dst, src, mem, mode);
1262 set_ia32_Immop_tarval(res, new_tarval_from_long(size, mode_Is));
1271 * Transforms a Mux node into CMov.
1273 * @param env The transformation environment
1274 * @return The transformed node.
1276 static ir_node *gen_Mux(ia32_transform_env_t *env) {
1277 ir_node *node = env->irn;
1279 return new_rd_ia32_CMov(env->dbg, env->irg, env->block,
1280 get_Mux_sel(node), get_Mux_false(node), get_Mux_true(node), env->mode);
1285 /********************************************
1288 * | |__ ___ _ __ ___ __| | ___ ___
1289 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1290 * | |_) | __/ | | | (_) | (_| | __/\__ \
1291 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1293 ********************************************/
1295 static ir_node *gen_FrameAddr(ia32_transform_env_t *tenv) {
1296 ir_node *new_op = NULL;
1301 static ir_node *gen_FrameLoad(ia32_transform_env_t *tenv) {
1302 ir_node *new_op = NULL;
1307 static ir_node *gen_FrameStore(ia32_transform_env_t *tenv) {
1308 ir_node *new_op = NULL;
1315 /*********************************************************
1318 * _ __ ___ __ _ _ _ __ __| |_ __ ___ _____ _ __
1319 * | '_ ` _ \ / _` | | '_ \ / _` | '__| \ \ / / _ \ '__|
1320 * | | | | | | (_| | | | | | | (_| | | | |\ V / __/ |
1321 * |_| |_| |_|\__,_|_|_| |_| \__,_|_| |_| \_/ \___|_|
1323 *********************************************************/
1326 * Transforms the given firm node (and maybe some other related nodes)
1327 * into one or more assembler nodes.
1329 * @param node the firm node
1330 * @param env the debug module
1332 void ia32_transform_node(ir_node *node, void *env) {
1333 ia32_code_gen_t *cgenv = (ia32_code_gen_t *)env;
1334 opcode code = get_irn_opcode(node);
1335 ir_node *asm_node = NULL;
1336 ia32_transform_env_t tenv;
1341 tenv.block = get_nodes_block(node);
1342 tenv.dbg = get_irn_dbg_info(node);
1343 tenv.irg = current_ir_graph;
1345 tenv.mod = cgenv->mod;
1346 tenv.mode = get_irn_mode(node);
1349 #define UNOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_op(node)); break
1350 #define BINOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_left(node), get_##a##_right(node)); break
1351 #define GEN(a) case iro_##a: asm_node = gen_##a(&tenv); break
1352 #define IGN(a) case iro_##a: break
1353 #define BAD(a) case iro_##a: goto bad
1354 #define OTHER_BIN(a) \
1355 if (get_irn_op(node) == get_op_##a()) { \
1356 asm_node = gen_##a(&tenv, get_irn_n(node, 0), get_irn_n(node, 1)); \
1360 if (be_is_##a(node)) { \
1361 asm_node = gen_##a(&tenv); \
1365 DBG((tenv.mod, LEVEL_1, "check %+F ... ", node));
1411 /* constant transformation happens earlier */
1440 fprintf(stderr, "Not implemented: %s\n", get_irn_opname(node));
1444 /* exchange nodes if a new one was generated */
1446 exchange(node, asm_node);
1447 DB((tenv.mod, LEVEL_1, "created node %+F[%p]\n", asm_node, asm_node));
1450 DB((tenv.mod, LEVEL_1, "ignored\n"));