16 #include "../benode_t.h"
17 #include "bearch_ia32_t.h"
19 #include "ia32_nodes_attr.h"
20 #include "../arch/archop.h" /* we need this for Min and Max nodes */
21 #include "ia32_transform.h"
22 #include "ia32_new_nodes.h"
23 #include "ia32_map_regs.h"
25 #include "gen_ia32_regalloc_if.h"
27 #define SFP_SIGN "0x80000000"
28 #define DFP_SIGN "0x8000000000000000"
29 #define SFP_ABS "0x7FFFFFFF"
30 #define DFP_ABS "0x7FFFFFFFFFFFFFFF"
32 #define TP_SFP_SIGN "ia32_sfp_sign"
33 #define TP_DFP_SIGN "ia32_dfp_sign"
34 #define TP_SFP_ABS "ia32_sfp_abs"
35 #define TP_DFP_ABS "ia32_dfp_abs"
37 #define ENT_SFP_SIGN "IA32_SFP_SIGN"
38 #define ENT_DFP_SIGN "IA32_DFP_SIGN"
39 #define ENT_SFP_ABS "IA32_SFP_ABS"
40 #define ENT_DFP_ABS "IA32_DFP_ABS"
42 extern ir_op *get_op_Mulh(void);
44 typedef ir_node *construct_binop_func(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *base, ir_node *index, \
45 ir_node *op1, ir_node *op2, ir_node *mem, ir_mode *mode);
47 typedef ir_node *construct_unop_func(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *base, ir_node *index, \
48 ir_node *op, ir_node *mem, ir_mode *mode);
51 ia32_SSIGN, ia32_DSIGN, ia32_SABS, ia32_DABS
54 /****************************************************************************************************
56 * | | | | / _| | | (_)
57 * _ __ ___ __| | ___ | |_ _ __ __ _ _ __ ___| |_ ___ _ __ _ __ ___ __ _| |_ _ ___ _ __
58 * | '_ \ / _ \ / _` |/ _ \ | __| '__/ _` | '_ \/ __| _/ _ \| '__| '_ ` _ \ / _` | __| |/ _ \| '_ \
59 * | | | | (_) | (_| | __/ | |_| | | (_| | | | \__ \ || (_) | | | | | | | | (_| | |_| | (_) | | | |
60 * |_| |_|\___/ \__,_|\___| \__|_| \__,_|_| |_|___/_| \___/|_| |_| |_| |_|\__,_|\__|_|\___/|_| |_|
62 ****************************************************************************************************/
69 /* Compares two (entity, tarval) combinations */
70 static int cmp_tv_ent(const void *a, const void *b, size_t len) {
71 const struct tv_ent *e1 = a;
72 const struct tv_ent *e2 = b;
74 return !(e1->tv == e2->tv);
77 /* Generates an entity for a known FP const (used for FP Neg + Abs) */
78 static char *gen_fp_known_const(ir_mode *mode, ia32_known_const_t kct) {
79 static set *const_set = NULL;
91 const_set = new_set(cmp_tv_ent, 10);
96 tp_name = TP_SFP_SIGN;
97 ent_name = ENT_SFP_SIGN;
101 tp_name = TP_DFP_SIGN;
102 ent_name = ENT_DFP_SIGN;
106 tp_name = TP_SFP_ABS;
107 ent_name = ENT_SFP_ABS;
111 tp_name = TP_DFP_ABS;
112 ent_name = ENT_DFP_ABS;
118 key.tv = new_tarval_from_str(cnst_str, strlen(cnst_str), mode);
121 entry = set_insert(const_set, &key, sizeof(key), HASH_PTR(key.tv));
124 tp = new_type_primitive(new_id_from_str(tp_name), mode);
125 ent = new_entity(get_glob_type(), new_id_from_str(ent_name), tp);
127 set_entity_ld_ident(ent, get_entity_ident(ent));
128 set_entity_visibility(ent, visibility_local);
129 set_entity_variability(ent, variability_constant);
130 set_entity_allocation(ent, allocation_static);
132 /* we create a new entity here: It's initialization must resist on the
134 rem = current_ir_graph;
135 current_ir_graph = get_const_code_irg();
136 cnst = new_Const(mode, key.tv);
137 current_ir_graph = rem;
139 set_atomic_ent_value(ent, cnst);
141 /* set the entry for hashmap */
150 #define is_cnst(op) (is_ia32_Const(op) || is_ia32_fConst(op))
152 /* determine if one operator is an Imm */
153 static ir_node *get_immediate_op(ir_node *op1, ir_node *op2) {
155 return is_cnst(op1) ? op1 : (is_cnst(op2) ? op2 : NULL);
156 else return is_cnst(op2) ? op2 : NULL;
159 /* determine if one operator is not an Imm */
160 static ir_node *get_expr_op(ir_node *op1, ir_node *op2) {
161 return !is_cnst(op1) ? op1 : (!is_cnst(op2) ? op2 : NULL);
166 * Construct a standard binary operation, set AM and immediate if required.
168 * @param env The transformation environment
169 * @param op1 The first operand
170 * @param op2 The second operand
171 * @param func The node constructor function
172 * @return The constructed ia32 node.
174 static ir_node *gen_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2, construct_binop_func *func) {
175 ir_node *new_op = NULL;
176 ir_mode *mode = env->mode;
177 dbg_info *dbg = env->dbg;
178 ir_graph *irg = env->irg;
179 ir_node *block = env->block;
180 firm_dbg_module_t *mod = env->mod;
181 ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
182 ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
183 ir_node *nomem = new_NoMem();
184 ir_node *expr_op, *imm_op;
187 /* check if it's an operation with immediate */
188 if (is_op_commutative(get_irn_op(env->irn))) {
189 imm_op = get_immediate_op(op1, op2);
190 expr_op = get_expr_op(op1, op2);
193 imm_op = get_immediate_op(NULL, op2);
194 expr_op = get_expr_op(op1, op2);
197 assert((expr_op || imm_op) && "invalid operands");
200 /* We have two consts here: not yet supported */
204 if (mode_is_float(mode)) {
205 /* floating point operations */
207 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, expr_op, noreg_fp, nomem, mode_T);
208 set_ia32_Immop_attr(new_op, imm_op);
209 set_ia32_am_support(new_op, ia32_am_None);
212 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, op1, op2, nomem, mode_T);
213 set_ia32_am_support(new_op, ia32_am_Source);
217 /* integer operations */
219 /* This is expr + const */
220 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, expr_op, noreg_gp, nomem, mode_T);
221 set_ia32_Immop_attr(new_op, imm_op);
224 set_ia32_am_support(new_op, ia32_am_Dest);
227 /* This is a normal operation */
228 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, op1, op2, nomem, mode_T);
231 set_ia32_am_support(new_op, ia32_am_Full);
235 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
241 * Construct a shift/rotate binary operation, sets AM and immediate if required.
243 * @param env The transformation environment
244 * @param op1 The first operand
245 * @param op2 The second operand
246 * @param func The node constructor function
247 * @return The constructed ia32 node.
249 static ir_node *gen_shift_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2, construct_binop_func *func) {
250 ir_node *new_op = NULL;
251 ir_mode *mode = env->mode;
252 dbg_info *dbg = env->dbg;
253 ir_graph *irg = env->irg;
254 ir_node *block = env->block;
255 firm_dbg_module_t *mod = env->mod;
256 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
257 ir_node *nomem = new_NoMem();
258 ir_node *expr_op, *imm_op;
261 assert(! mode_is_float(mode) && "Shift/Rotate with float not supported");
263 imm_op = get_immediate_op(NULL, op2);
264 expr_op = get_expr_op(op1, op2);
266 assert((expr_op || imm_op) && "invalid operands");
269 /* We have two consts here: not yet supported */
273 /* Limit imm_op within range imm8 */
275 tv = get_ia32_Immop_tarval(imm_op);
278 tv = tarval_mod(tv, new_tarval_from_long(32, mode_Iu));
285 /* integer operations */
287 /* This is shift/rot with const */
289 new_op = func(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
290 set_ia32_Immop_attr(new_op, imm_op);
293 /* This is a normal shift/rot */
294 new_op = func(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
298 set_ia32_am_support(new_op, ia32_am_Dest);
300 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
305 * Construct a standard unary operation, set AM and immediate if required.
307 * @param env The transformation environment
308 * @param op The operand
309 * @param func The node constructor function
310 * @return The constructed ia32 node.
312 static ir_node *gen_unop(ia32_transform_env_t *env, ir_node *op, construct_unop_func *func) {
313 ir_node *new_op = NULL;
314 ir_mode *mode = env->mode;
315 dbg_info *dbg = env->dbg;
316 ir_graph *irg = env->irg;
317 ir_node *block = env->block;
318 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
319 ir_node *nomem = new_NoMem();
321 new_op = func(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
323 if (mode_is_float(mode)) {
324 /* floating point operations don't support implicit store */
325 set_ia32_am_support(new_op, ia32_am_None);
328 set_ia32_am_support(new_op, ia32_am_Dest);
331 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
337 * Creates an ia32 Add with immediate.
339 * @param env The transformation environment
340 * @param expr_op The expression operator
341 * @param const_op The constant
342 * @return the created ia32 Add node
344 static ir_node *gen_imm_Add(ia32_transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
345 ir_node *new_op = NULL;
346 tarval *tv = get_ia32_Immop_tarval(const_op);
347 firm_dbg_module_t *mod = env->mod;
348 dbg_info *dbg = env->dbg;
349 ir_mode *mode = env->mode;
350 ir_graph *irg = env->irg;
351 ir_node *block = env->block;
352 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
353 ir_node *nomem = new_NoMem();
355 tarval_classification_t class_tv, class_negtv;
357 /* const_op: tarval or SymConst? */
359 /* optimize tarvals */
360 class_tv = classify_tarval(tv);
361 class_negtv = classify_tarval(tarval_neg(tv));
363 if (class_tv == TV_CLASSIFY_ONE) { /* + 1 == INC */
364 DB((env->mod, LEVEL_2, "Add(1) to Inc ... "));
365 new_op = new_rd_ia32_Inc(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
368 else if (class_tv == TV_CLASSIFY_ALL_ONE || class_negtv == TV_CLASSIFY_ONE) { /* + (-1) == DEC */
369 DB((mod, LEVEL_2, "Add(-1) to Dec ... "));
370 new_op = new_rd_ia32_Dec(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
376 new_op = new_rd_ia32_Add(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
377 set_ia32_Immop_attr(new_op, const_op);
384 * Creates an ia32 Add.
386 * @param dbg firm node dbg
387 * @param block the block the new node should belong to
388 * @param op1 first operator
389 * @param op2 second operator
390 * @param mode node mode
391 * @return the created ia32 Add node
393 static ir_node *gen_Add(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
394 ir_node *new_op = NULL;
395 dbg_info *dbg = env->dbg;
396 ir_mode *mode = env->mode;
397 ir_graph *irg = env->irg;
398 ir_node *block = env->block;
399 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
400 ir_node *nomem = new_NoMem();
401 ir_node *expr_op, *imm_op;
403 imm_op = get_immediate_op(op1, op2);
404 expr_op = get_expr_op(op1, op2);
406 assert((expr_op || imm_op) && "invalid operands");
408 if (mode_is_float(mode)) {
409 return gen_binop(env, op1, op2, new_rd_ia32_fAdd);
414 /* No expr_op means, that we have two const - one symconst and */
415 /* one tarval or another symconst - because this case is not */
416 /* covered by constant folding */
418 new_op = new_rd_ia32_Lea(dbg, irg, block, noreg, noreg, mode);
419 add_ia32_am_offs(new_op, get_ia32_cnst(op1));
420 add_ia32_am_offs(new_op, get_ia32_cnst(op2));
423 set_ia32_am_support(new_op, ia32_am_Source);
424 set_ia32_op_type(new_op, ia32_AddrModeS);
425 set_ia32_am_flavour(new_op, ia32_am_O);
427 /* Lea doesn't need a Proj */
431 /* This is expr + const */
432 new_op = gen_imm_Add(env, expr_op, imm_op);
435 set_ia32_am_support(new_op, ia32_am_Dest);
438 /* This is a normal add */
439 new_op = new_rd_ia32_Add(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
442 set_ia32_am_support(new_op, ia32_am_Full);
446 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
452 * Creates an ia32 Mul.
454 * @param dbg firm node dbg
455 * @param block the block the new node should belong to
456 * @param op1 first operator
457 * @param op2 second operator
458 * @param mode node mode
459 * @return the created ia32 Mul node
461 ir_node *gen_Mul(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
464 if (mode_is_float(env->mode)) {
465 new_op = gen_binop(env, op1, op2, new_rd_ia32_fMul);
468 new_op = gen_binop(env, op1, op2, new_rd_ia32_Mul);
477 * Creates an ia32 Mulh.
478 * Note: Mul produces a 64Bit result and Mulh returns the upper 32 bit of
479 * this result while Mul returns the lower 32 bit.
481 * @param env The transformation environment
482 * @param op1 The first operator
483 * @param op2 The second operator
484 * @return the created ia32 Mulh node
486 static ir_node *gen_Mulh(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
487 ir_node *proj_EAX, *proj_EDX, *mulh;
490 assert(mode_is_float(env->mode) && "Mulh with float not supported");
491 proj_EAX = gen_binop(env, op1, op2, new_rd_ia32_Mulh);
492 mulh = get_Proj_pred(proj_EAX);
493 proj_EDX = new_rd_Proj(env->dbg, env->irg, env->block, mulh, env->mode, pn_EDX);
495 /* to be on the save side */
496 set_Proj_proj(proj_EAX, pn_EAX);
498 if (get_ia32_cnst(mulh)) {
499 /* Mulh with const cannot have AM */
500 set_ia32_am_support(mulh, ia32_am_None);
503 /* Mulh cannot have AM for destination */
504 set_ia32_am_support(mulh, ia32_am_Source);
510 be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], env->irg, env->block, 1, in);
518 * Creates an ia32 And.
520 * @param env The transformation environment
521 * @param op1 The first operator
522 * @param op2 The second operator
523 * @return The created ia32 And node
525 static ir_node *gen_And(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
526 if (mode_is_float(env->mode)) {
527 return gen_binop(env, op1, op2, new_rd_ia32_fAnd);
530 return gen_binop(env, op1, op2, new_rd_ia32_And);
537 * Creates an ia32 Or.
539 * @param env The transformation environment
540 * @param op1 The first operator
541 * @param op2 The second operator
542 * @return The created ia32 Or node
544 static ir_node *gen_Or(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
545 if (mode_is_float(env->mode)) {
546 return gen_binop(env, op1, op2, new_rd_ia32_fOr);
549 return gen_binop(env, op1, op2, new_rd_ia32_Or);
556 * Creates an ia32 Eor.
558 * @param env The transformation environment
559 * @param op1 The first operator
560 * @param op2 The second operator
561 * @return The created ia32 Eor node
563 static ir_node *gen_Eor(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
564 if (mode_is_float(env->mode)) {
565 return gen_binop(env, op1, op2, new_rd_ia32_fEor);
568 return gen_binop(env, op1, op2, new_rd_ia32_Eor);
575 * Creates an ia32 Max.
577 * @param env The transformation environment
578 * @param op1 The first operator
579 * @param op2 The second operator
580 * @return the created ia32 Max node
582 static ir_node *gen_Max(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
585 if (mode_is_float(env->mode)) {
586 new_op = gen_binop(env, op1, op2, new_rd_ia32_fMax);
589 new_op = new_rd_ia32_Max(env->dbg, env->irg, env->block, op1, op2, env->mode);
590 set_ia32_am_support(new_op, ia32_am_None);
599 * Creates an ia32 Min.
601 * @param env The transformation environment
602 * @param op1 The first operator
603 * @param op2 The second operator
604 * @return the created ia32 Min node
606 static ir_node *gen_Min(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
609 if (mode_is_float(env->mode)) {
610 new_op = gen_binop(env, op1, op2, new_rd_ia32_fMin);
613 new_op = new_rd_ia32_Min(env->dbg, env->irg, env->block, op1, op2, env->mode);
614 set_ia32_am_support(new_op, ia32_am_None);
623 * Creates an ia32 Sub with immediate.
625 * @param env The transformation environment
626 * @param op1 The first operator
627 * @param op2 The second operator
628 * @return The created ia32 Sub node
630 static ir_node *gen_imm_Sub(ia32_transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
631 ir_node *new_op = NULL;
632 tarval *tv = get_ia32_Immop_tarval(const_op);
633 firm_dbg_module_t *mod = env->mod;
634 dbg_info *dbg = env->dbg;
635 ir_mode *mode = env->mode;
636 ir_graph *irg = env->irg;
637 ir_node *block = env->block;
638 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
639 ir_node *nomem = new_NoMem();
641 tarval_classification_t class_tv, class_negtv;
643 /* const_op: tarval or SymConst? */
645 /* optimize tarvals */
646 class_tv = classify_tarval(tv);
647 class_negtv = classify_tarval(tarval_neg(tv));
649 if (class_tv == TV_CLASSIFY_ONE) { /* - 1 == DEC */
650 DB((mod, LEVEL_2, "Sub(1) to Dec ... "));
651 new_op = new_rd_ia32_Dec(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
654 else if (class_negtv == TV_CLASSIFY_ONE) { /* - (-1) == Sub */
655 DB((mod, LEVEL_2, "Sub(-1) to Inc ... "));
656 new_op = new_rd_ia32_Inc(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
662 new_op = new_rd_ia32_Sub(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
663 set_ia32_Immop_attr(new_op, const_op);
670 * Creates an ia32 Sub.
672 * @param env The transformation environment
673 * @param op1 The first operator
674 * @param op2 The second operator
675 * @return The created ia32 Sub node
677 static ir_node *gen_Sub(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
678 ir_node *new_op = NULL;
679 dbg_info *dbg = env->dbg;
680 ir_mode *mode = env->mode;
681 ir_graph *irg = env->irg;
682 ir_node *block = env->block;
683 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
684 ir_node *nomem = new_NoMem();
685 ir_node *expr_op, *imm_op;
687 imm_op = get_immediate_op(NULL, op2);
688 expr_op = get_expr_op(op1, op2);
690 assert((expr_op || imm_op) && "invalid operands");
692 if (mode_is_float(mode)) {
693 return gen_binop(env, op1, op2, new_rd_ia32_fSub);
698 /* No expr_op means, that we have two const - one symconst and */
699 /* one tarval or another symconst - because this case is not */
700 /* covered by constant folding */
702 new_op = new_rd_ia32_Lea(dbg, irg, block, noreg, noreg, mode);
703 add_ia32_am_offs(new_op, get_ia32_cnst(op1));
704 sub_ia32_am_offs(new_op, get_ia32_cnst(op2));
707 set_ia32_am_support(new_op, ia32_am_Source);
708 set_ia32_op_type(new_op, ia32_AddrModeS);
709 set_ia32_am_flavour(new_op, ia32_am_O);
711 /* Lea doesn't need a Proj */
715 /* This is expr - const */
716 new_op = gen_imm_Sub(env, expr_op, imm_op);
719 set_ia32_am_support(new_op, ia32_am_Dest);
722 /* This is a normal sub */
723 new_op = new_rd_ia32_Sub(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
726 set_ia32_am_support(new_op, ia32_am_Full);
730 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
736 * Generates an ia32 DivMod with additional infrastructure for the
737 * register allocator if needed.
739 * @param env The transformation environment
740 * @param dividend -no comment- :)
741 * @param divisor -no comment- :)
742 * @param dm_flav flavour_Div/Mod/DivMod
743 * @return The created ia32 DivMod node
745 static ir_node *generate_DivMod(ia32_transform_env_t *env, ir_node *dividend, ir_node *divisor, ia32_op_flavour_t dm_flav) {
747 ir_node *edx_node, *cltd;
749 dbg_info *dbg = env->dbg;
750 ir_graph *irg = env->irg;
751 ir_node *block = env->block;
752 ir_mode *mode = env->mode;
753 ir_node *irn = env->irn;
758 mem = get_Div_mem(irn);
761 mem = get_Mod_mem(irn);
764 mem = get_DivMod_mem(irn);
770 if (mode_is_signed(mode)) {
771 /* in signed mode, we need to sign extend the dividend */
772 cltd = new_rd_ia32_Cdq(dbg, irg, block, dividend, mode_T);
773 dividend = new_rd_Proj(dbg, irg, block, cltd, mode_Is, pn_EAX);
774 edx_node = new_rd_Proj(dbg, irg, block, cltd, mode_Is, pn_EDX);
777 edx_node = new_rd_ia32_Const(dbg, irg, block, mode_Iu);
778 set_ia32_Const_type(edx_node, ia32_Const);
779 set_ia32_Immop_tarval(edx_node, get_tarval_null(mode_Iu));
782 res = new_rd_ia32_DivMod(dbg, irg, block, dividend, divisor, edx_node, mem, mode);
784 set_ia32_flavour(res, dm_flav);
785 set_ia32_n_res(res, 2);
787 /* Only one proj is used -> We must add a second proj and */
788 /* connect this one to a Keep node to eat up the second */
789 /* destroyed register. */
790 if (get_irn_n_edges(irn) == 1) {
791 proj = get_edge_src_irn(get_irn_out_edge_first(irn));
792 assert(is_Proj(proj) && "non-Proj to Div/Mod node");
794 if (get_Proj_proj(proj) == pn_DivMod_res_div) {
795 in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode_Is, pn_DivMod_res_mod);
798 in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode_Is, pn_DivMod_res_div);
801 be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 1, in_keep);
809 * Wrapper for generate_DivMod. Sets flavour_Mod.
811 static ir_node *gen_Mod(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
812 return generate_DivMod(env, op1, op2, flavour_Mod);
818 * Wrapper for generate_DivMod. Sets flavour_Div.
820 static ir_node *gen_Div(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
821 return generate_DivMod(env, op1, op2, flavour_Div);
827 * Wrapper for generate_DivMod. Sets flavour_DivMod.
829 static ir_node *gen_DivMod(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
830 return generate_DivMod(env, op1, op2, flavour_DivMod);
836 * Creates an ia32 floating Div.
838 * @param env The transformation environment
839 * @param op1 The first operator
840 * @param op2 The second operator
841 * @return The created ia32 fDiv node
843 static ir_node *gen_Quot(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
844 return gen_binop(env, op1, op2, new_rd_ia32_fDiv);
850 * Creates an ia32 Shl.
852 * @param env The transformation environment
853 * @param op1 The first operator
854 * @param op2 The second operator
855 * @return The created ia32 Shl node
857 static ir_node *gen_Shl(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
858 return gen_shift_binop(env, op1, op2, new_rd_ia32_Shl);
864 * Creates an ia32 Shr.
866 * @param env The transformation environment
867 * @param op1 The first operator
868 * @param op2 The second operator
869 * @return The created ia32 Shr node
871 static ir_node *gen_Shr(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
872 return gen_shift_binop(env, op1, op2, new_rd_ia32_Shr);
878 * Creates an ia32 Shrs.
880 * @param env The transformation environment
881 * @param op1 The first operator
882 * @param op2 The second operator
883 * @return The created ia32 Shrs node
885 static ir_node *gen_Shrs(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
886 return gen_shift_binop(env, op1, op2, new_rd_ia32_Shrs);
892 * Creates an ia32 RotL.
894 * @param env The transformation environment
895 * @param op1 The first operator
896 * @param op2 The second operator
897 * @return The created ia32 RotL node
899 static ir_node *gen_RotL(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
900 return gen_shift_binop(env, op1, op2, new_rd_ia32_RotL);
906 * Creates an ia32 RotR.
907 * NOTE: There is no RotR with immediate because this would always be a RotL
908 * "imm-mode_size_bits" which can be pre-calculated.
910 * @param env The transformation environment
911 * @param op1 The first operator
912 * @param op2 The second operator
913 * @return The created ia32 RotR node
915 static ir_node *gen_RotR(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
916 return gen_shift_binop(env, op1, op2, new_rd_ia32_RotR);
922 * Creates an ia32 RotR or RotL (depending on the found pattern).
924 * @param env The transformation environment
925 * @param op1 The first operator
926 * @param op2 The second operator
927 * @return The created ia32 RotL or RotR node
929 static ir_node *gen_Rot(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
930 ir_node *rotate = NULL;
932 /* Firm has only Rot (which is a RotL), so we are looking for a right (op2)
933 operand "-e+mode_size_bits" (it's an already modified "mode_size_bits-e",
934 that means we can create a RotR instead of an Add and a RotL */
937 ir_node *pred = get_Proj_pred(op2);
939 if (is_ia32_Add(pred)) {
940 ir_node *pred_pred = get_irn_n(pred, 2);
941 tarval *tv = get_ia32_Immop_tarval(pred);
942 long bits = get_mode_size_bits(env->mode);
944 if (is_Proj(pred_pred)) {
945 pred_pred = get_Proj_pred(pred_pred);
948 if (is_ia32_Minus(pred_pred) &&
949 tarval_is_long(tv) &&
950 get_tarval_long(tv) == bits)
952 DB((env->mod, LEVEL_1, "RotL into RotR ... "));
953 rotate = gen_RotR(env, op1, get_irn_n(pred_pred, 2));
960 rotate = gen_RotL(env, op1, op2);
969 * Transforms a Conv node.
971 * @param env The transformation environment
972 * @param op The operator
973 * @return The created ia32 Conv node
975 static ir_node *gen_Conv(ia32_transform_env_t *env, ir_node *op) {
976 return new_rd_ia32_Conv(env->dbg, env->irg, env->block, op, env->mode);
982 * Transforms a Minus node.
984 * @param env The transformation environment
985 * @param op The operator
986 * @return The created ia32 Minus node
988 static ir_node *gen_Minus(ia32_transform_env_t *env, ir_node *op) {
991 ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
992 ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
993 ir_node *nomem = new_rd_NoMem(env->irg);
996 if (mode_is_float(env->mode)) {
997 new_op = new_rd_ia32_fEor(env->dbg, env->irg, env->block, noreg_gp, noreg_gp, op, noreg_fp, nomem, mode_T);
999 size = get_mode_size_bits(env->mode);
1000 name = gen_fp_known_const(env->mode, size == 32 ? ia32_SSIGN : ia32_DSIGN);
1002 set_ia32_sc(new_op, name);
1004 new_op = new_rd_Proj(env->dbg, env->irg, env->block, new_op, env->mode, 0);
1007 new_op = gen_unop(env, op, new_rd_ia32_Minus);
1016 * Transforms a Not node.
1018 * @param env The transformation environment
1019 * @param op The operator
1020 * @return The created ia32 Not node
1022 static ir_node *gen_Not(ia32_transform_env_t *env, ir_node *op) {
1025 if (mode_is_float(env->mode)) {
1029 new_op = gen_unop(env, op, new_rd_ia32_Not);
1038 * Transforms an Abs node.
1040 * @param env The transformation environment
1041 * @param op The operator
1042 * @return The created ia32 Abs node
1044 static ir_node *gen_Abs(ia32_transform_env_t *env, ir_node *op) {
1045 ir_node *res, *p_eax, *p_edx;
1046 dbg_info *dbg = env->dbg;
1047 ir_mode *mode = env->mode;
1048 ir_graph *irg = env->irg;
1049 ir_node *block = env->block;
1050 ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
1051 ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
1052 ir_node *nomem = new_NoMem();
1056 if (mode_is_float(mode)) {
1057 res = new_rd_ia32_fAnd(dbg,irg, block, noreg_gp, noreg_gp, op, noreg_fp, nomem, mode_T);
1059 size = get_mode_size_bits(mode);
1060 name = gen_fp_known_const(mode, size == 32 ? ia32_SABS : ia32_DABS);
1062 set_ia32_sc(res, name);
1064 res = new_rd_Proj(dbg, irg, block, res, mode, 0);
1067 res = new_rd_ia32_Cdq(dbg, irg, block, op, mode_T);
1068 p_eax = new_rd_Proj(dbg, irg, block, res, mode, pn_EAX);
1069 p_edx = new_rd_Proj(dbg, irg, block, res, mode, pn_EDX);
1070 res = new_rd_ia32_Eor(dbg, irg, block, noreg_gp, noreg_gp, p_eax, p_edx, nomem, mode_T);
1071 res = new_rd_Proj(dbg, irg, block, res, mode, 0);
1072 res = new_rd_ia32_Sub(dbg, irg, block, noreg_gp, noreg_gp, res, p_edx, nomem, mode_T);
1073 res = new_rd_Proj(dbg, irg, block, res, mode, 0);
1082 * Transforms a Load.
1084 * @param mod the debug module
1085 * @param block the block the new node should belong to
1086 * @param node the ir Load node
1087 * @param mode node mode
1088 * @return the created ia32 Load node
1090 static ir_node *gen_Load(ia32_transform_env_t *env) {
1091 ir_node *node = env->irn;
1092 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1094 if (mode_is_float(env->mode)) {
1095 return new_rd_ia32_fLoad(env->dbg, env->irg, env->block, get_Load_ptr(node), noreg, get_Load_mem(node), env->mode);
1097 return new_rd_ia32_Load(env->dbg, env->irg, env->block, get_Load_ptr(node), noreg, get_Load_mem(node), env->mode);
1103 * Transforms a Store.
1105 * @param mod the debug module
1106 * @param block the block the new node should belong to
1107 * @param node the ir Store node
1108 * @param mode node mode
1109 * @return the created ia32 Store node
1111 ir_node *gen_Store(ia32_transform_env_t *env) {
1112 ir_node *node = env->irn;
1113 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1115 if (mode_is_float(env->mode)) {
1116 return new_rd_ia32_fStore(env->dbg, env->irg, env->block, get_Store_ptr(node), noreg, get_Store_value(node), get_Store_mem(node), env->mode);
1118 return new_rd_ia32_Store(env->dbg, env->irg, env->block, get_Store_ptr(node), noreg, get_Store_value(node), get_Store_mem(node), env->mode);
1124 * Transforms a Call and its arguments corresponding to the calling convention.
1126 * @param mod the debug module
1127 * @param block the block the new node should belong to
1128 * @param node the ir Call node
1129 * @param dummy mode doesn't matter
1130 * @return the created ia32 Call node
1132 static ir_node *gen_Call(ia32_transform_env_t *env) {
1134 const ia32_register_req_t **in_req;
1136 ir_node *new_call, *sync;
1137 int i, j, n_new_call_in, ignore = 0;
1139 dbg_info *dbg = env->dbg;
1140 ir_graph *irg = env->irg;
1141 ir_node *block = env->block;
1142 ir_node *call = env->irn;
1143 ir_node **stack_param = NULL;
1144 ir_node **param = get_Call_param_arr(call);
1145 ir_node *call_Mem = get_Call_mem(call);
1146 unsigned cc = get_method_calling_convention(get_Call_type(call));
1147 int n = get_Call_n_params(call);
1150 int n_res = get_method_n_ress(get_Call_type(call));
1152 assert(n_res <= 2 && "method with more than two results not supported");
1154 if (cc & cc_reg_param)
1155 biggest_n = ia32_get_n_regparam_class(n, param, &ignore, &ignore);
1157 /* remember: biggest_n = x means we can pass (x + 1) parameters in register */
1159 /* do we need to pass arguments on stack? */
1160 if (biggest_n + 1 < n)
1161 stack_param = xcalloc(n - biggest_n - 1, sizeof(ir_node *));
1163 /* we need at least one in, either for the stack params or the call_Mem */
1164 n_new_call_in = biggest_n + 2;
1166 /* the call has one IN for all stack parameter and one IN for each reg param */
1167 in = xcalloc(n_new_call_in, sizeof(ir_node *));
1168 in_req = xcalloc(n_new_call_in, sizeof(arch_register_req_t *));
1170 /* loop over all parameters and set the register requirements */
1171 for (i = 0; i <= biggest_n && (cc & cc_reg_param); i++) {
1172 in_req[i] = ia32_get_RegParam_req(n, param, i, cc);
1176 /* create remaining stack parameters */
1177 if (cc & cc_last_on_top) {
1178 for (i = stack_idx; i < n; i++) {
1179 /* pass it on stack */
1180 if (mode_is_float(get_irn_mode(param[i]))) {
1181 stack_param[i - stack_idx] = new_rd_ia32_fStackArg(get_irn_dbg_info(param[i]), irg,
1182 block, call_Mem, param[i], mode_M);
1185 stack_param[i - stack_idx] = new_rd_ia32_StackArg(get_irn_dbg_info(param[i]), irg,
1186 block, call_Mem, param[i], mode_M);
1188 /* set the argument number for later lowering */
1189 set_ia32_pncode(stack_param[i - stack_idx], i - stack_idx);
1193 for (i = n - 1, j = 0; i >= stack_idx; i--, j++) {
1194 /* pass it on stack */
1195 if (mode_is_float(get_irn_mode(param[i]))) {
1196 stack_param[j] = new_rd_ia32_fStackArg(get_irn_dbg_info(param[i]), irg,
1197 block, call_Mem, param[i], mode_M);
1200 stack_param[j] = new_rd_ia32_StackArg(get_irn_dbg_info(param[i]), irg,
1201 block, call_Mem, param[i], mode_M);
1203 /* set the argument number for later lowering */
1204 set_ia32_pncode(stack_param[j], j);
1209 sync = new_r_Sync(irg, block, n - biggest_n - 1, stack_param);
1210 in[n_new_call_in - 1] = sync;
1213 in[n_new_call_in - 1] = call_Mem;
1216 /* create the new node */
1217 new_call = new_rd_ia32_Call(dbg, irg, block, n_new_call_in, in);
1218 set_ia32_Immop_attr(new_call, get_Call_ptr(call));
1220 /* set register requirements for in and out */
1221 attr = get_ia32_attr(new_call);
1222 attr->in_req = in_req;
1224 set_ia32_n_res(new_call, n_res);
1227 attr->out_req = xcalloc(n_res, sizeof(ia32_register_req_t *));
1228 attr->slots = xcalloc(n_res, sizeof(arch_register_t *));
1231 /* two results only appear when a 64bit int result is broken up into two 32bit results */
1233 if (mode_is_float(get_type_mode(get_method_res_type(get_Call_type(call), 0))))
1234 attr->out_req[0] = &ia32_default_req_ia32_fp_xmm0;
1236 attr->out_req[0] = &ia32_default_req_ia32_gp_eax;
1238 else if (n_res == 2) {
1239 attr->out_req[0] = &ia32_default_req_ia32_gp_eax;
1240 attr->out_req[1] = &ia32_default_req_ia32_gp_edx;
1243 /* stack parameter has no OUT register */
1244 attr->in_req[n_new_call_in - 1] = &ia32_default_req_none;
1253 * Transforms a Cond -> Proj[b] -> Cmp into a CondJmp or CondJmp_i
1255 * @param env The transformation environment
1256 * @return The transformed node.
1258 static ir_node *gen_Cond(ia32_transform_env_t *env) {
1259 dbg_info *dbg = env->dbg;
1260 ir_graph *irg = env->irg;
1261 ir_node *block = env->block;
1262 ir_node *node = env->irn;
1263 ir_node *sel = get_Cond_selector(node);
1264 ir_mode *sel_mode = get_irn_mode(sel);
1265 ir_node *res = NULL;
1266 ir_node *pred = NULL;
1267 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1268 ir_node *nomem = new_NoMem();
1269 ir_node *cmp_a, *cmp_b, *cnst, *expr;
1271 if (is_Proj(sel) && sel_mode == mode_b) {
1272 pred = get_Proj_pred(sel);
1274 /* get both compare operators */
1275 cmp_a = get_Cmp_left(pred);
1276 cmp_b = get_Cmp_right(pred);
1278 /* check if we can use a CondJmp with immediate */
1279 cnst = get_immediate_op(cmp_a, cmp_b);
1280 expr = get_expr_op(cmp_a, cmp_b);
1283 res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, expr, noreg, nomem, mode_T);
1284 set_ia32_Immop_attr(res, cnst);
1287 res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem, mode_T);
1290 set_ia32_pncode(res, get_Proj_proj(sel));
1293 res = new_rd_ia32_SwitchJmp(dbg, irg, block, noreg, noreg, sel, nomem, mode_T);
1294 set_ia32_pncode(res, get_Cond_defaultProj(node));
1303 * Transform the argument projs from a start node corresponding to the
1304 * calling convention.
1305 * It transforms "Proj Arg x -> ProjT -> Start <- ProjM" into
1306 * "RegParam x -> ProjT -> Start" OR
1307 * "StackParam x -> ProjM -> Start"
1308 * whether parameter is passed in register or on stack.
1310 * @param mod the debug module
1311 * @param block the block the nodes should belong to
1312 * @param proj the ProjT node which points to Start
1313 * @param start the Start node
1314 * @return Should be always NULL
1316 static ir_node *gen_Proj_Start(ia32_transform_env_t *env, ir_node *proj, ir_node *start) {
1318 const ia32_register_req_t *temp_req;
1319 const ir_edge_t *edge;
1320 ir_node *succ, *irn;
1325 ir_node *proj_M = get_irg_initial_mem(current_ir_graph);
1326 entity *irg_ent = get_irg_entity(current_ir_graph);
1327 ir_type *tp = get_entity_type(irg_ent);
1329 ir_graph *irg = env->irg;
1330 ir_node *block = env->block;
1332 assert(is_Method_type(tp) && "irg type is not a method");
1334 switch(get_Proj_proj(proj)) {
1335 case pn_Start_T_args:
1336 /* We cannot use get_method_n_params here as the function might
1337 be variadic or one argument is not used. */
1338 n = get_irn_n_edges(proj);
1340 /* Allocate memory for all non variadic parameters in advance to be on the save side */
1341 env->cg->reg_param_req = xcalloc(get_method_n_params(tp), sizeof(ia32_register_req_t *));
1343 /* we are done here when there are no parameters */
1347 /* temporary remember all proj arg x */
1348 projargs = xcalloc(n, sizeof(ir_node *));
1351 foreach_out_edge((const ir_node *)proj, edge) {
1352 succ = get_edge_src_irn(edge);
1353 assert(is_Proj(succ) && "non-Proj from a Proj_T (pn_Start_T_args).");
1354 projargs[i++] = succ;
1357 cc = get_method_calling_convention(tp);
1359 /* loop over all parameters and check whether its a int or float */
1360 for (i = 0; i < n; i++) {
1361 mode = get_irn_mode(projargs[i]);
1362 cur_pn = get_Proj_proj(projargs[i]);
1364 if (cc & cc_reg_param) {
1365 temp_req = ia32_get_RegParam_req(n, projargs, cur_pn, cc);
1372 /* passed in register */
1373 env->cg->reg_param_req[cur_pn] = temp_req;
1376 /* passed on stack */
1377 if (mode_is_float(mode))
1378 irn = new_rd_ia32_fStackParam(get_irn_dbg_info(projargs[i]), irg, block, proj_M, mode);
1380 irn = new_rd_ia32_StackParam(get_irn_dbg_info(projargs[i]), irg, block, proj_M, mode);
1382 set_ia32_pncode(irn, cur_pn);
1384 /* kill the old "Proj Arg" and replace with the new stack param */
1385 exchange(projargs[i], irn);
1392 case pn_Start_P_frame_base:
1393 case pn_Start_X_initial_exec:
1395 case pn_Start_P_globals:
1396 case pn_Start_P_value_arg_base:
1399 assert(0 && "unsupported Proj(Start)");
1407 * Transform some Proj's (Proj_Proj, Proj_Start, Proj_Cmp, Proj_Cond, Proj_Call).
1408 * All others are ignored.
1410 * @param mod the debug module
1411 * @param block the block the new node should belong to
1412 * @param node the ir Proj node
1413 * @param mode mode of the Proj
1414 * @return The transformed node.
1416 static ir_node *gen_Proj(ia32_transform_env_t *env) {
1417 ir_node *new_node = NULL;
1418 ir_node *pred = get_Proj_pred(env->irn);
1420 if (env->mode == mode_M)
1423 if (get_irn_op(pred) == op_Start) {
1424 new_node = gen_Proj_Start(env, env->irn, pred);
1432 /*********************************************************
1435 * _ __ ___ __ _ _ _ __ __| |_ __ ___ _____ _ __
1436 * | '_ ` _ \ / _` | | '_ \ / _` | '__| \ \ / / _ \ '__|
1437 * | | | | | | (_| | | | | | | (_| | | | |\ V / __/ |
1438 * |_| |_| |_|\__,_|_|_| |_| \__,_|_| |_| \_/ \___|_|
1440 *********************************************************/
1445 * Transforms the given firm node (and maybe some other related nodes)
1446 * into one or more assembler nodes.
1448 * @param node the firm node
1449 * @param env the debug module
1451 void ia32_transform_node(ir_node *node, void *env) {
1452 ia32_code_gen_t *cgenv = (ia32_code_gen_t *)env;
1453 opcode code = get_irn_opcode(node);
1454 ir_node *asm_node = NULL;
1455 ia32_transform_env_t tenv;
1460 tenv.arch_env = cgenv->arch_env;
1461 tenv.block = get_nodes_block(node);
1462 tenv.dbg = get_irn_dbg_info(node);
1463 tenv.irg = current_ir_graph;
1465 tenv.mod = cgenv->mod;
1466 tenv.mode = get_irn_mode(node);
1469 #define UNOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_op(node)); break
1470 #define BINOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_left(node), get_##a##_right(node)); break
1471 #define GEN(a) case iro_##a: asm_node = gen_##a(&tenv); break
1472 #define IGN(a) case iro_##a: break
1473 #define BAD(a) case iro_##a: goto bad
1475 DBG((tenv.mod, LEVEL_1, "check %+F ... ", node));
1517 /* constant transformation happens earlier */
1539 if (get_irn_op(node) == get_op_Max()) {
1540 asm_node = gen_Max(&tenv, get_irn_n(node, 0), get_irn_n(node, 1));
1542 else if (get_irn_op(node) == get_op_Min()) {
1543 asm_node = gen_Min(&tenv, get_irn_n(node, 0), get_irn_n(node, 1));
1545 else if (get_irn_op(node) == get_op_Mulh()) {
1546 asm_node = gen_Mulh(&tenv, get_irn_n(node, 0), get_irn_n(node, 1));
1550 fprintf(stderr, "Not implemented: %s\n", get_irn_opname(node));
1555 exchange(node, asm_node);
1556 DB((tenv.mod, LEVEL_1, "created node %+F[%p]\n", asm_node, asm_node));
1559 DB((tenv.mod, LEVEL_1, "ignored\n"));