16 #include "../benode_t.h"
17 #include "bearch_ia32_t.h"
19 #include "ia32_nodes_attr.h"
20 #include "../arch/archop.h" /* we need this for Min and Max nodes */
21 #include "ia32_transform.h"
22 #include "ia32_new_nodes.h"
24 #include "gen_ia32_regalloc_if.h"
26 #define SFP_SIGN "0x80000000"
27 #define DFP_SIGN "0x8000000000000000"
28 #define SFP_ABS "0x7FFFFFFF"
29 #define DFP_ABS "0x7FFFFFFFFFFFFFFF"
31 #define TP_SFP_SIGN "ia32_sfp_sign"
32 #define TP_DFP_SIGN "ia32_dfp_sign"
33 #define TP_SFP_ABS "ia32_sfp_abs"
34 #define TP_DFP_ABS "ia32_dfp_abs"
36 #define ENT_SFP_SIGN "IA32_SFP_SIGN"
37 #define ENT_DFP_SIGN "IA32_DFP_SIGN"
38 #define ENT_SFP_ABS "IA32_SFP_ABS"
39 #define ENT_DFP_ABS "IA32_DFP_ABS"
41 extern ir_op *get_op_Mulh(void);
43 typedef ir_node *construct_binop_func(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *base, ir_node *index, \
44 ir_node *op1, ir_node *op2, ir_node *mem, ir_mode *mode);
46 typedef ir_node *construct_unop_func(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *base, ir_node *index, \
47 ir_node *op, ir_node *mem, ir_mode *mode);
50 ia32_SSIGN, ia32_DSIGN, ia32_SABS, ia32_DABS
53 /****************************************************************************************************
55 * | | | | / _| | | (_)
56 * _ __ ___ __| | ___ | |_ _ __ __ _ _ __ ___| |_ ___ _ __ _ __ ___ __ _| |_ _ ___ _ __
57 * | '_ \ / _ \ / _` |/ _ \ | __| '__/ _` | '_ \/ __| _/ _ \| '__| '_ ` _ \ / _` | __| |/ _ \| '_ \
58 * | | | | (_) | (_| | __/ | |_| | | (_| | | | \__ \ || (_) | | | | | | | | (_| | |_| | (_) | | | |
59 * |_| |_|\___/ \__,_|\___| \__|_| \__,_|_| |_|___/_| \___/|_| |_| |_| |_|\__,_|\__|_|\___/|_| |_|
61 ****************************************************************************************************/
68 /* Compares two (entity, tarval) combinations */
69 static int cmp_tv_ent(const void *a, const void *b, size_t len) {
70 const struct tv_ent *e1 = a;
71 const struct tv_ent *e2 = b;
73 return !(e1->tv == e2->tv);
76 /* Generates an entity for a known FP const (used for FP Neg + Abs) */
77 static char *gen_fp_known_const(ir_mode *mode, ia32_known_const_t kct) {
78 static set *const_set = NULL;
90 const_set = new_set(cmp_tv_ent, 10);
95 tp_name = TP_SFP_SIGN;
96 ent_name = ENT_SFP_SIGN;
100 tp_name = TP_DFP_SIGN;
101 ent_name = ENT_DFP_SIGN;
105 tp_name = TP_SFP_ABS;
106 ent_name = ENT_SFP_ABS;
110 tp_name = TP_DFP_ABS;
111 ent_name = ENT_DFP_ABS;
117 key.tv = new_tarval_from_str(cnst_str, strlen(cnst_str), mode);
120 entry = set_insert(const_set, &key, sizeof(key), HASH_PTR(key.tv));
123 tp = new_type_primitive(new_id_from_str(tp_name), mode);
124 ent = new_entity(get_glob_type(), new_id_from_str(ent_name), tp);
126 set_entity_ld_ident(ent, get_entity_ident(ent));
127 set_entity_visibility(ent, visibility_local);
128 set_entity_variability(ent, variability_constant);
129 set_entity_allocation(ent, allocation_static);
131 /* we create a new entity here: It's initialization must resist on the
133 rem = current_ir_graph;
134 current_ir_graph = get_const_code_irg();
135 cnst = new_Const(mode, key.tv);
136 current_ir_graph = rem;
138 set_atomic_ent_value(ent, cnst);
140 /* set the entry for hashmap */
149 #define is_cnst(op) (is_ia32_Const(op) || is_ia32_fConst(op))
151 /* determine if one operator is an Imm */
152 static ir_node *get_immediate_op(ir_node *op1, ir_node *op2) {
154 return is_cnst(op1) ? op1 : (is_cnst(op2) ? op2 : NULL);
155 else return is_cnst(op2) ? op2 : NULL;
158 /* determine if one operator is not an Imm */
159 static ir_node *get_expr_op(ir_node *op1, ir_node *op2) {
160 return !is_cnst(op1) ? op1 : (!is_cnst(op2) ? op2 : NULL);
165 * Construct a standard binary operation, set AM and immediate if required.
167 * @param env The transformation environment
168 * @param op1 The first operand
169 * @param op2 The second operand
170 * @param func The node constructor function
171 * @return The constructed ia32 node.
173 static ir_node *gen_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2, construct_binop_func *func) {
174 ir_node *new_op = NULL;
175 ir_mode *mode = env->mode;
176 dbg_info *dbg = env->dbg;
177 ir_graph *irg = env->irg;
178 ir_node *block = env->block;
179 firm_dbg_module_t *mod = env->mod;
180 ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
181 ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
182 ir_node *nomem = new_NoMem();
183 ir_node *expr_op, *imm_op;
186 /* check if it's an operation with immediate */
187 if (is_op_commutative(get_irn_op(env->irn))) {
188 imm_op = get_immediate_op(op1, op2);
189 expr_op = get_expr_op(op1, op2);
192 imm_op = get_immediate_op(NULL, op2);
193 expr_op = get_expr_op(op1, op2);
196 assert((expr_op || imm_op) && "invalid operands");
199 /* We have two consts here: not yet supported */
203 if (mode_is_float(mode)) {
204 /* floating point operations */
206 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, expr_op, noreg_fp, nomem, mode_T);
207 set_ia32_Immop_attr(new_op, imm_op);
208 set_ia32_am_support(new_op, ia32_am_None);
211 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, op1, op2, nomem, mode_T);
212 set_ia32_am_support(new_op, ia32_am_Source);
216 /* integer operations */
218 /* This is expr + const */
219 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, expr_op, noreg_gp, nomem, mode_T);
220 set_ia32_Immop_attr(new_op, imm_op);
223 set_ia32_am_support(new_op, ia32_am_Dest);
226 /* This is a normal operation */
227 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, op1, op2, nomem, mode_T);
230 set_ia32_am_support(new_op, ia32_am_Full);
234 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
240 * Construct a shift/rotate binary operation, sets AM and immediate if required.
242 * @param env The transformation environment
243 * @param op1 The first operand
244 * @param op2 The second operand
245 * @param func The node constructor function
246 * @return The constructed ia32 node.
248 static ir_node *gen_shift_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2, construct_binop_func *func) {
249 ir_node *new_op = NULL;
250 ir_mode *mode = env->mode;
251 dbg_info *dbg = env->dbg;
252 ir_graph *irg = env->irg;
253 ir_node *block = env->block;
254 firm_dbg_module_t *mod = env->mod;
255 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
256 ir_node *nomem = new_NoMem();
257 ir_node *expr_op, *imm_op;
260 assert(! mode_is_float(mode) && "Shift/Rotate with float not supported");
262 imm_op = get_immediate_op(NULL, op2);
263 expr_op = get_expr_op(op1, op2);
265 assert((expr_op || imm_op) && "invalid operands");
268 /* We have two consts here: not yet supported */
272 /* Limit imm_op within range imm8 */
274 tv = get_ia32_Immop_tarval(imm_op);
277 tv = tarval_mod(tv, new_tarval_from_long(32, mode_Iu));
284 /* integer operations */
286 /* This is shift/rot with const */
288 new_op = func(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
289 set_ia32_Immop_attr(new_op, imm_op);
292 /* This is a normal shift/rot */
293 new_op = func(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
297 set_ia32_am_support(new_op, ia32_am_Dest);
299 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
304 * Construct a standard unary operation, set AM and immediate if required.
306 * @param env The transformation environment
307 * @param op The operand
308 * @param func The node constructor function
309 * @return The constructed ia32 node.
311 static ir_node *gen_unop(ia32_transform_env_t *env, ir_node *op, construct_unop_func *func) {
312 ir_node *new_op = NULL;
313 ir_mode *mode = env->mode;
314 dbg_info *dbg = env->dbg;
315 ir_graph *irg = env->irg;
316 ir_node *block = env->block;
317 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
318 ir_node *nomem = new_NoMem();
320 new_op = func(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
322 if (mode_is_float(mode)) {
323 /* floating point operations don't support implicit store */
324 set_ia32_am_support(new_op, ia32_am_None);
327 set_ia32_am_support(new_op, ia32_am_Dest);
330 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
336 * Creates an ia32 Add with immediate.
338 * @param env The transformation environment
339 * @param expr_op The expression operator
340 * @param const_op The constant
341 * @return the created ia32 Add node
343 static ir_node *gen_imm_Add(ia32_transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
344 ir_node *new_op = NULL;
345 tarval *tv = get_ia32_Immop_tarval(const_op);
346 firm_dbg_module_t *mod = env->mod;
347 dbg_info *dbg = env->dbg;
348 ir_mode *mode = env->mode;
349 ir_graph *irg = env->irg;
350 ir_node *block = env->block;
351 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
352 ir_node *nomem = new_NoMem();
354 tarval_classification_t class_tv, class_negtv;
356 /* const_op: tarval or SymConst? */
358 /* optimize tarvals */
359 class_tv = classify_tarval(tv);
360 class_negtv = classify_tarval(tarval_neg(tv));
362 if (class_tv == TV_CLASSIFY_ONE) { /* + 1 == INC */
363 DB((env->mod, LEVEL_2, "Add(1) to Inc ... "));
364 new_op = new_rd_ia32_Inc(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
367 else if (class_tv == TV_CLASSIFY_ALL_ONE || class_negtv == TV_CLASSIFY_ONE) { /* + (-1) == DEC */
368 DB((mod, LEVEL_2, "Add(-1) to Dec ... "));
369 new_op = new_rd_ia32_Dec(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
375 new_op = new_rd_ia32_Add(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
376 set_ia32_Immop_attr(new_op, const_op);
383 * Creates an ia32 Add.
385 * @param dbg firm node dbg
386 * @param block the block the new node should belong to
387 * @param op1 first operator
388 * @param op2 second operator
389 * @param mode node mode
390 * @return the created ia32 Add node
392 static ir_node *gen_Add(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
393 ir_node *new_op = NULL;
394 dbg_info *dbg = env->dbg;
395 ir_mode *mode = env->mode;
396 ir_graph *irg = env->irg;
397 ir_node *block = env->block;
398 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
399 ir_node *nomem = new_NoMem();
400 ir_node *expr_op, *imm_op;
402 imm_op = get_immediate_op(op1, op2);
403 expr_op = get_expr_op(op1, op2);
405 assert((expr_op || imm_op) && "invalid operands");
407 if (mode_is_float(mode)) {
408 return gen_binop(env, op1, op2, new_rd_ia32_fAdd);
413 /* No expr_op means, that we have two const - one symconst and */
414 /* one tarval or another symconst - because this case is not */
415 /* covered by constant folding */
417 new_op = new_rd_ia32_Lea(dbg, irg, block, noreg, noreg, mode);
418 add_ia32_am_offs(new_op, get_ia32_cnst(op1));
419 add_ia32_am_offs(new_op, get_ia32_cnst(op2));
422 set_ia32_am_support(new_op, ia32_am_Source);
423 set_ia32_op_type(new_op, ia32_AddrModeS);
424 set_ia32_am_flavour(new_op, ia32_am_O);
426 /* Lea doesn't need a Proj */
430 /* This is expr + const */
431 new_op = gen_imm_Add(env, expr_op, imm_op);
434 set_ia32_am_support(new_op, ia32_am_Dest);
437 /* This is a normal add */
438 new_op = new_rd_ia32_Add(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
441 set_ia32_am_support(new_op, ia32_am_Full);
445 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
451 * Creates an ia32 Mul.
453 * @param dbg firm node dbg
454 * @param block the block the new node should belong to
455 * @param op1 first operator
456 * @param op2 second operator
457 * @param mode node mode
458 * @return the created ia32 Mul node
460 ir_node *gen_Mul(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
463 if (mode_is_float(env->mode)) {
464 new_op = gen_binop(env, op1, op2, new_rd_ia32_fMul);
467 new_op = gen_binop(env, op1, op2, new_rd_ia32_Mul);
476 * Creates an ia32 Mulh.
477 * Note: Mul produces a 64Bit result and Mulh returns the upper 32 bit of
478 * this result while Mul returns the lower 32 bit.
480 * @param env The transformation environment
481 * @param op1 The first operator
482 * @param op2 The second operator
483 * @return the created ia32 Mulh node
485 static ir_node *gen_Mulh(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
486 ir_node *proj_EAX, *proj_EDX, *mulh;
489 assert(mode_is_float(env->mode) && "Mulh with float not supported");
490 proj_EAX = gen_binop(env, op1, op2, new_rd_ia32_Mulh);
491 mulh = get_Proj_pred(proj_EAX);
492 proj_EDX = new_rd_Proj(env->dbg, env->irg, env->block, mulh, env->mode, pn_EDX);
494 /* to be on the save side */
495 set_Proj_proj(proj_EAX, pn_EAX);
497 if (get_ia32_cnst(mulh)) {
498 /* Mulh with const cannot have AM */
499 set_ia32_am_support(mulh, ia32_am_None);
502 /* Mulh cannot have AM for destination */
503 set_ia32_am_support(mulh, ia32_am_Source);
509 be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], env->irg, env->block, 1, in);
517 * Creates an ia32 And.
519 * @param env The transformation environment
520 * @param op1 The first operator
521 * @param op2 The second operator
522 * @return The created ia32 And node
524 static ir_node *gen_And(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
525 if (mode_is_float(env->mode)) {
526 return gen_binop(env, op1, op2, new_rd_ia32_fAnd);
529 return gen_binop(env, op1, op2, new_rd_ia32_And);
536 * Creates an ia32 Or.
538 * @param env The transformation environment
539 * @param op1 The first operator
540 * @param op2 The second operator
541 * @return The created ia32 Or node
543 static ir_node *gen_Or(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
544 if (mode_is_float(env->mode)) {
545 return gen_binop(env, op1, op2, new_rd_ia32_fOr);
548 return gen_binop(env, op1, op2, new_rd_ia32_Or);
555 * Creates an ia32 Eor.
557 * @param env The transformation environment
558 * @param op1 The first operator
559 * @param op2 The second operator
560 * @return The created ia32 Eor node
562 static ir_node *gen_Eor(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
563 if (mode_is_float(env->mode)) {
564 return gen_binop(env, op1, op2, new_rd_ia32_fEor);
567 return gen_binop(env, op1, op2, new_rd_ia32_Eor);
574 * Creates an ia32 Max.
576 * @param env The transformation environment
577 * @param op1 The first operator
578 * @param op2 The second operator
579 * @return the created ia32 Max node
581 static ir_node *gen_Max(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
584 if (mode_is_float(env->mode)) {
585 new_op = gen_binop(env, op1, op2, new_rd_ia32_fMax);
588 new_op = new_rd_ia32_Max(env->dbg, env->irg, env->block, op1, op2, env->mode);
589 set_ia32_am_support(new_op, ia32_am_None);
598 * Creates an ia32 Min.
600 * @param env The transformation environment
601 * @param op1 The first operator
602 * @param op2 The second operator
603 * @return the created ia32 Min node
605 static ir_node *gen_Min(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
608 if (mode_is_float(env->mode)) {
609 new_op = gen_binop(env, op1, op2, new_rd_ia32_fMin);
612 new_op = new_rd_ia32_Min(env->dbg, env->irg, env->block, op1, op2, env->mode);
613 set_ia32_am_support(new_op, ia32_am_None);
622 * Creates an ia32 Sub with immediate.
624 * @param env The transformation environment
625 * @param op1 The first operator
626 * @param op2 The second operator
627 * @return The created ia32 Sub node
629 static ir_node *gen_imm_Sub(ia32_transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
630 ir_node *new_op = NULL;
631 tarval *tv = get_ia32_Immop_tarval(const_op);
632 firm_dbg_module_t *mod = env->mod;
633 dbg_info *dbg = env->dbg;
634 ir_mode *mode = env->mode;
635 ir_graph *irg = env->irg;
636 ir_node *block = env->block;
637 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
638 ir_node *nomem = new_NoMem();
640 tarval_classification_t class_tv, class_negtv;
642 /* const_op: tarval or SymConst? */
644 /* optimize tarvals */
645 class_tv = classify_tarval(tv);
646 class_negtv = classify_tarval(tarval_neg(tv));
648 if (class_tv == TV_CLASSIFY_ONE) { /* - 1 == DEC */
649 DB((mod, LEVEL_2, "Sub(1) to Dec ... "));
650 new_op = new_rd_ia32_Dec(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
653 else if (class_negtv == TV_CLASSIFY_ONE) { /* - (-1) == Sub */
654 DB((mod, LEVEL_2, "Sub(-1) to Inc ... "));
655 new_op = new_rd_ia32_Inc(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
661 new_op = new_rd_ia32_Sub(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
662 set_ia32_Immop_attr(new_op, const_op);
669 * Creates an ia32 Sub.
671 * @param env The transformation environment
672 * @param op1 The first operator
673 * @param op2 The second operator
674 * @return The created ia32 Sub node
676 static ir_node *gen_Sub(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
677 ir_node *new_op = NULL;
678 dbg_info *dbg = env->dbg;
679 ir_mode *mode = env->mode;
680 ir_graph *irg = env->irg;
681 ir_node *block = env->block;
682 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
683 ir_node *nomem = new_NoMem();
684 ir_node *expr_op, *imm_op;
686 imm_op = get_immediate_op(NULL, op2);
687 expr_op = get_expr_op(op1, op2);
689 assert((expr_op || imm_op) && "invalid operands");
691 if (mode_is_float(mode)) {
692 return gen_binop(env, op1, op2, new_rd_ia32_fSub);
697 /* No expr_op means, that we have two const - one symconst and */
698 /* one tarval or another symconst - because this case is not */
699 /* covered by constant folding */
701 new_op = new_rd_ia32_Lea(dbg, irg, block, noreg, noreg, mode);
702 add_ia32_am_offs(new_op, get_ia32_cnst(op1));
703 sub_ia32_am_offs(new_op, get_ia32_cnst(op2));
706 set_ia32_am_support(new_op, ia32_am_Source);
707 set_ia32_op_type(new_op, ia32_AddrModeS);
708 set_ia32_am_flavour(new_op, ia32_am_O);
710 /* Lea doesn't need a Proj */
714 /* This is expr - const */
715 new_op = gen_imm_Sub(env, expr_op, imm_op);
718 set_ia32_am_support(new_op, ia32_am_Dest);
721 /* This is a normal sub */
722 new_op = new_rd_ia32_Sub(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
725 set_ia32_am_support(new_op, ia32_am_Full);
729 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
735 * Generates an ia32 DivMod with additional infrastructure for the
736 * register allocator if needed.
738 * @param env The transformation environment
739 * @param dividend -no comment- :)
740 * @param divisor -no comment- :)
741 * @param dm_flav flavour_Div/Mod/DivMod
742 * @return The created ia32 DivMod node
744 static ir_node *generate_DivMod(ia32_transform_env_t *env, ir_node *dividend, ir_node *divisor, ia32_op_flavour_t dm_flav) {
746 ir_node *edx_node, *cltd;
748 dbg_info *dbg = env->dbg;
749 ir_graph *irg = env->irg;
750 ir_node *block = env->block;
751 ir_mode *mode = env->mode;
752 ir_node *irn = env->irn;
757 mem = get_Div_mem(irn);
760 mem = get_Mod_mem(irn);
763 mem = get_DivMod_mem(irn);
769 if (mode_is_signed(mode)) {
770 /* in signed mode, we need to sign extend the dividend */
771 cltd = new_rd_ia32_Cdq(dbg, irg, block, dividend, mode_T);
772 dividend = new_rd_Proj(dbg, irg, block, cltd, mode_Is, pn_EAX);
773 edx_node = new_rd_Proj(dbg, irg, block, cltd, mode_Is, pn_EDX);
776 edx_node = new_rd_ia32_Const(dbg, irg, block, mode_Iu);
777 set_ia32_Const_type(edx_node, ia32_Const);
778 set_ia32_Immop_tarval(edx_node, get_tarval_null(mode_Iu));
781 res = new_rd_ia32_DivMod(dbg, irg, block, dividend, divisor, edx_node, mem, mode);
783 set_ia32_flavour(res, dm_flav);
784 set_ia32_n_res(res, 2);
786 /* Only one proj is used -> We must add a second proj and */
787 /* connect this one to a Keep node to eat up the second */
788 /* destroyed register. */
789 if (get_irn_n_edges(irn) == 1) {
790 proj = get_edge_src_irn(get_irn_out_edge_first(irn));
791 assert(is_Proj(proj) && "non-Proj to Div/Mod node");
793 if (get_Proj_proj(proj) == pn_DivMod_res_div) {
794 in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode_Is, pn_DivMod_res_mod);
797 in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode_Is, pn_DivMod_res_div);
800 be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 1, in_keep);
808 * Wrapper for generate_DivMod. Sets flavour_Mod.
810 static ir_node *gen_Mod(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
811 return generate_DivMod(env, op1, op2, flavour_Mod);
817 * Wrapper for generate_DivMod. Sets flavour_Div.
819 static ir_node *gen_Div(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
820 return generate_DivMod(env, op1, op2, flavour_Div);
826 * Wrapper for generate_DivMod. Sets flavour_DivMod.
828 static ir_node *gen_DivMod(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
829 return generate_DivMod(env, op1, op2, flavour_DivMod);
835 * Creates an ia32 floating Div.
837 * @param env The transformation environment
838 * @param op1 The first operator
839 * @param op2 The second operator
840 * @return The created ia32 fDiv node
842 static ir_node *gen_Quot(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
843 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
844 ir_node *nomem = new_rd_NoMem(env->irg);
847 new_op = new_rd_ia32_fDiv(env->dbg, env->irg, env->block, noreg, noreg, op1, op2, nomem, env->mode);
848 set_ia32_am_support(new_op, ia32_am_Source);
856 * Creates an ia32 Shl.
858 * @param env The transformation environment
859 * @param op1 The first operator
860 * @param op2 The second operator
861 * @return The created ia32 Shl node
863 static ir_node *gen_Shl(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
864 return gen_shift_binop(env, op1, op2, new_rd_ia32_Shl);
870 * Creates an ia32 Shr.
872 * @param env The transformation environment
873 * @param op1 The first operator
874 * @param op2 The second operator
875 * @return The created ia32 Shr node
877 static ir_node *gen_Shr(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
878 return gen_shift_binop(env, op1, op2, new_rd_ia32_Shr);
884 * Creates an ia32 Shrs.
886 * @param env The transformation environment
887 * @param op1 The first operator
888 * @param op2 The second operator
889 * @return The created ia32 Shrs node
891 static ir_node *gen_Shrs(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
892 return gen_shift_binop(env, op1, op2, new_rd_ia32_Shrs);
898 * Creates an ia32 RotL.
900 * @param env The transformation environment
901 * @param op1 The first operator
902 * @param op2 The second operator
903 * @return The created ia32 RotL node
905 static ir_node *gen_RotL(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
906 return gen_shift_binop(env, op1, op2, new_rd_ia32_RotL);
912 * Creates an ia32 RotR.
913 * NOTE: There is no RotR with immediate because this would always be a RotL
914 * "imm-mode_size_bits" which can be pre-calculated.
916 * @param env The transformation environment
917 * @param op1 The first operator
918 * @param op2 The second operator
919 * @return The created ia32 RotR node
921 static ir_node *gen_RotR(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
922 return gen_shift_binop(env, op1, op2, new_rd_ia32_RotR);
928 * Creates an ia32 RotR or RotL (depending on the found pattern).
930 * @param env The transformation environment
931 * @param op1 The first operator
932 * @param op2 The second operator
933 * @return The created ia32 RotL or RotR node
935 static ir_node *gen_Rot(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
936 ir_node *rotate = NULL;
938 /* Firm has only Rot (which is a RotL), so we are looking for a right (op2)
939 operand "-e+mode_size_bits" (it's an already modified "mode_size_bits-e",
940 that means we can create a RotR instead of an Add and a RotL */
943 ir_node *pred = get_Proj_pred(op2);
945 if (is_ia32_Add(pred)) {
946 ir_node *pred_pred = get_irn_n(pred, 2);
947 tarval *tv = get_ia32_Immop_tarval(pred);
948 long bits = get_mode_size_bits(env->mode);
950 if (is_Proj(pred_pred)) {
951 pred_pred = get_Proj_pred(pred_pred);
954 if (is_ia32_Minus(pred_pred) &&
955 tarval_is_long(tv) &&
956 get_tarval_long(tv) == bits)
958 DB((env->mod, LEVEL_1, "RotL into RotR ... "));
959 rotate = gen_RotR(env, op1, get_irn_n(pred_pred, 2));
966 rotate = gen_RotL(env, op1, op2);
975 * Transforms a Conv node.
977 * @param env The transformation environment
978 * @param op The operator
979 * @return The created ia32 Conv node
981 static ir_node *gen_Conv(ia32_transform_env_t *env, ir_node *op) {
982 return new_rd_ia32_Conv(env->dbg, env->irg, env->block, op, env->mode);
988 * Transforms a Minus node.
990 * @param env The transformation environment
991 * @param op The operator
992 * @return The created ia32 Minus node
994 static ir_node *gen_Minus(ia32_transform_env_t *env, ir_node *op) {
997 ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
998 ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
999 ir_node *nomem = new_rd_NoMem(env->irg);
1002 if (mode_is_float(env->mode)) {
1003 new_op = new_rd_ia32_fEor(env->dbg, env->irg, env->block, noreg_gp, noreg_gp, op, noreg_fp, nomem, mode_T);
1005 size = get_mode_size_bits(env->mode);
1006 name = gen_fp_known_const(env->mode, size == 32 ? ia32_SSIGN : ia32_DSIGN);
1008 set_ia32_sc(new_op, name);
1010 new_op = new_rd_Proj(env->dbg, env->irg, env->block, new_op, env->mode, 0);
1013 new_op = gen_unop(env, op, new_rd_ia32_Minus);
1022 * Transforms a Not node.
1024 * @param env The transformation environment
1025 * @param op The operator
1026 * @return The created ia32 Not node
1028 static ir_node *gen_Not(ia32_transform_env_t *env, ir_node *op) {
1031 if (mode_is_float(env->mode)) {
1035 new_op = gen_unop(env, op, new_rd_ia32_Not);
1044 * Transforms an Abs node.
1046 * @param env The transformation environment
1047 * @param op The operator
1048 * @return The created ia32 Abs node
1050 static ir_node *gen_Abs(ia32_transform_env_t *env, ir_node *op) {
1051 ir_node *res, *p_eax, *p_edx;
1052 dbg_info *dbg = env->dbg;
1053 ir_mode *mode = env->mode;
1054 ir_graph *irg = env->irg;
1055 ir_node *block = env->block;
1056 ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
1057 ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
1058 ir_node *nomem = new_NoMem();
1062 if (mode_is_float(mode)) {
1063 res = new_rd_ia32_fAnd(dbg,irg, block, noreg_gp, noreg_gp, op, noreg_fp, nomem, mode_T);
1065 size = get_mode_size_bits(mode);
1066 name = gen_fp_known_const(mode, size == 32 ? ia32_SABS : ia32_DABS);
1068 set_ia32_sc(res, name);
1070 res = new_rd_Proj(dbg, irg, block, res, mode, 0);
1073 res = new_rd_ia32_Cdq(dbg, irg, block, op, mode_T);
1074 p_eax = new_rd_Proj(dbg, irg, block, res, mode, pn_EAX);
1075 p_edx = new_rd_Proj(dbg, irg, block, res, mode, pn_EDX);
1076 res = new_rd_ia32_Eor(dbg, irg, block, noreg_gp, noreg_gp, p_eax, p_edx, nomem, mode_T);
1077 res = new_rd_Proj(dbg, irg, block, res, mode, 0);
1078 res = new_rd_ia32_Sub(dbg, irg, block, noreg_gp, noreg_gp, res, p_edx, nomem, mode_T);
1079 res = new_rd_Proj(dbg, irg, block, res, mode, 0);
1088 * Transforms a Load.
1090 * @param mod the debug module
1091 * @param block the block the new node should belong to
1092 * @param node the ir Load node
1093 * @param mode node mode
1094 * @return the created ia32 Load node
1096 static ir_node *gen_Load(ia32_transform_env_t *env) {
1097 ir_node *node = env->irn;
1098 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1101 if (mode_is_float(env->mode)) {
1102 new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, get_Load_ptr(node), noreg, get_Load_mem(node), env->mode);
1105 new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, get_Load_ptr(node), noreg, get_Load_mem(node), env->mode);
1108 set_ia32_am_support(new_op, ia32_am_Source);
1109 set_ia32_ls_mode(new_op, get_Load_mode(node));
1117 * Transforms a Store.
1119 * @param mod the debug module
1120 * @param block the block the new node should belong to
1121 * @param node the ir Store node
1122 * @param mode node mode
1123 * @return the created ia32 Store node
1125 ir_node *gen_Store(ia32_transform_env_t *env) {
1126 ir_node *node = env->irn;
1127 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1130 if (mode_is_float(env->mode)) {
1131 new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, get_Store_ptr(node), noreg, get_Store_value(node), get_Store_mem(node), env->mode);
1134 new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, get_Store_ptr(node), noreg, get_Store_value(node), get_Store_mem(node), env->mode);
1137 set_ia32_am_support(new_op, ia32_am_Dest);
1138 set_ia32_ls_mode(new_op, get_irn_mode(get_Store_value(node)));
1145 * Transforms a Call and its arguments corresponding to the calling convention.
1147 * @param env The transformation environment
1148 * @return The created ia32 Call node
1150 static ir_node *gen_Call(ia32_transform_env_t *env) {
1156 * Transforms a Cond -> Proj[b] -> Cmp into a CondJmp or CondJmp_i
1158 * @param env The transformation environment
1159 * @return The transformed node.
1161 static ir_node *gen_Cond(ia32_transform_env_t *env) {
1162 dbg_info *dbg = env->dbg;
1163 ir_graph *irg = env->irg;
1164 ir_node *block = env->block;
1165 ir_node *node = env->irn;
1166 ir_node *sel = get_Cond_selector(node);
1167 ir_mode *sel_mode = get_irn_mode(sel);
1168 ir_node *res = NULL;
1169 ir_node *pred = NULL;
1170 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1171 ir_node *nomem = new_NoMem();
1172 ir_node *cmp_a, *cmp_b, *cnst, *expr;
1174 if (is_Proj(sel) && sel_mode == mode_b) {
1175 pred = get_Proj_pred(sel);
1177 /* get both compare operators */
1178 cmp_a = get_Cmp_left(pred);
1179 cmp_b = get_Cmp_right(pred);
1181 /* check if we can use a CondJmp with immediate */
1182 cnst = get_immediate_op(cmp_a, cmp_b);
1183 expr = get_expr_op(cmp_a, cmp_b);
1186 res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, expr, noreg, nomem, mode_T);
1187 set_ia32_Immop_attr(res, cnst);
1190 res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem, mode_T);
1193 set_ia32_pncode(res, get_Proj_proj(sel));
1196 res = new_rd_ia32_SwitchJmp(dbg, irg, block, noreg, noreg, sel, nomem, mode_T);
1197 set_ia32_pncode(res, get_Cond_defaultProj(node));
1206 * Transforms a CopyB node.
1208 * @param env The transformation environment
1209 * @return The transformed node.
1211 static ir_node *gen_CopyB(ia32_transform_env_t *env) {
1212 ir_node *res = NULL;
1213 dbg_info *dbg = env->dbg;
1214 ir_graph *irg = env->irg;
1215 ir_mode *mode = env->mode;
1216 ir_node *block = env->block;
1217 ir_node *node = env->irn;
1218 ir_node *src = get_CopyB_src(node);
1219 ir_node *dst = get_CopyB_dst(node);
1220 ir_node *mem = get_CopyB_mem(node);
1221 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1222 int size = get_type_size_bytes(get_CopyB_type(node));
1225 /* If we have to copy more than 16 bytes, we use REP MOVSx and */
1226 /* then we need the size explicitly in ECX. */
1228 rem = size & 0x3; /* size % 4 */
1231 res = new_rd_ia32_Const(dbg, irg, block, mode_Is);
1232 set_ia32_op_type(res, ia32_Const);
1233 set_ia32_Immop_tarval(res, new_tarval_from_long(size, mode_Is));
1235 res = new_rd_ia32_CopyB(dbg, irg, block, dst, src, res, mem, mode);
1236 set_ia32_Immop_tarval(res, new_tarval_from_long(rem, mode_Is));
1239 res = new_rd_ia32_CopyB_i(dbg, irg, block, dst, src, mem, mode);
1240 set_ia32_Immop_tarval(res, new_tarval_from_long(size, mode_Is));
1249 * Transforms a Mux node into CMov.
1251 * @param env The transformation environment
1252 * @return The transformed node.
1254 static ir_node *gen_Mux(ia32_transform_env_t *env) {
1255 ir_node *node = env->irn;
1257 return new_rd_ia32_CMov(env->dbg, env->irg, env->block,
1258 get_Mux_sel(node), get_Mux_false(node), get_Mux_true(node), env->mode);
1263 /*********************************************************
1266 * _ __ ___ __ _ _ _ __ __| |_ __ ___ _____ _ __
1267 * | '_ ` _ \ / _` | | '_ \ / _` | '__| \ \ / / _ \ '__|
1268 * | | | | | | (_| | | | | | | (_| | | | |\ V / __/ |
1269 * |_| |_| |_|\__,_|_|_| |_| \__,_|_| |_| \_/ \___|_|
1271 *********************************************************/
1276 * Transforms the given firm node (and maybe some other related nodes)
1277 * into one or more assembler nodes.
1279 * @param node the firm node
1280 * @param env the debug module
1282 void ia32_transform_node(ir_node *node, void *env) {
1283 ia32_code_gen_t *cgenv = (ia32_code_gen_t *)env;
1284 opcode code = get_irn_opcode(node);
1285 ir_node *asm_node = NULL;
1286 ia32_transform_env_t tenv;
1291 tenv.arch_env = cgenv->arch_env;
1292 tenv.block = get_nodes_block(node);
1293 tenv.dbg = get_irn_dbg_info(node);
1294 tenv.irg = current_ir_graph;
1296 tenv.mod = cgenv->mod;
1297 tenv.mode = get_irn_mode(node);
1300 #define UNOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_op(node)); break
1301 #define BINOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_left(node), get_##a##_right(node)); break
1302 #define GEN(a) case iro_##a: asm_node = gen_##a(&tenv); break
1303 #define IGN(a) case iro_##a: break
1304 #define BAD(a) case iro_##a: goto bad
1306 DBG((tenv.mod, LEVEL_1, "check %+F ... ", node));
1351 /* constant transformation happens earlier */
1371 if (get_irn_op(node) == get_op_Max()) {
1372 asm_node = gen_Max(&tenv, get_irn_n(node, 0), get_irn_n(node, 1));
1374 else if (get_irn_op(node) == get_op_Min()) {
1375 asm_node = gen_Min(&tenv, get_irn_n(node, 0), get_irn_n(node, 1));
1377 else if (get_irn_op(node) == get_op_Mulh()) {
1378 asm_node = gen_Mulh(&tenv, get_irn_n(node, 0), get_irn_n(node, 1));
1382 fprintf(stderr, "Not implemented: %s\n", get_irn_opname(node));
1387 exchange(node, asm_node);
1388 DB((tenv.mod, LEVEL_1, "created node %+F[%p]\n", asm_node, asm_node));
1391 DB((tenv.mod, LEVEL_1, "ignored\n"));