2 * This file implements the IR transformation from firm into
14 #include "irgraph_t.h"
19 #include "iredges_t.h"
26 #include "../benode_t.h"
27 #include "bearch_ia32_t.h"
29 #include "ia32_nodes_attr.h"
30 #include "../arch/archop.h" /* we need this for Min and Max nodes */
31 #include "ia32_transform.h"
32 #include "ia32_new_nodes.h"
34 #include "gen_ia32_regalloc_if.h"
36 #define SFP_SIGN "0x80000000"
37 #define DFP_SIGN "0x8000000000000000"
38 #define SFP_ABS "0x7FFFFFFF"
39 #define DFP_ABS "0x7FFFFFFFFFFFFFFF"
41 #define TP_SFP_SIGN "ia32_sfp_sign"
42 #define TP_DFP_SIGN "ia32_dfp_sign"
43 #define TP_SFP_ABS "ia32_sfp_abs"
44 #define TP_DFP_ABS "ia32_dfp_abs"
46 #define ENT_SFP_SIGN "IA32_SFP_SIGN"
47 #define ENT_DFP_SIGN "IA32_DFP_SIGN"
48 #define ENT_SFP_ABS "IA32_SFP_ABS"
49 #define ENT_DFP_ABS "IA32_DFP_ABS"
51 extern ir_op *get_op_Mulh(void);
53 typedef ir_node *construct_binop_func(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *base, ir_node *index, \
54 ir_node *op1, ir_node *op2, ir_node *mem, ir_mode *mode);
56 typedef ir_node *construct_unop_func(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *base, ir_node *index, \
57 ir_node *op, ir_node *mem, ir_mode *mode);
60 ia32_SSIGN, ia32_DSIGN, ia32_SABS, ia32_DABS
63 /****************************************************************************************************
65 * | | | | / _| | | (_)
66 * _ __ ___ __| | ___ | |_ _ __ __ _ _ __ ___| |_ ___ _ __ _ __ ___ __ _| |_ _ ___ _ __
67 * | '_ \ / _ \ / _` |/ _ \ | __| '__/ _` | '_ \/ __| _/ _ \| '__| '_ ` _ \ / _` | __| |/ _ \| '_ \
68 * | | | | (_) | (_| | __/ | |_| | | (_| | | | \__ \ || (_) | | | | | | | | (_| | |_| | (_) | | | |
69 * |_| |_|\___/ \__,_|\___| \__|_| \__,_|_| |_|___/_| \___/|_| |_| |_| |_|\__,_|\__|_|\___/|_| |_|
71 ****************************************************************************************************/
78 /* Compares two (entity, tarval) combinations */
79 static int cmp_tv_ent(const void *a, const void *b, size_t len) {
80 const struct tv_ent *e1 = a;
81 const struct tv_ent *e2 = b;
83 return !(e1->tv == e2->tv);
86 /* Generates an entity for a known FP const (used for FP Neg + Abs) */
87 static char *gen_fp_known_const(ir_mode *mode, ia32_known_const_t kct) {
88 static set *const_set = NULL;
100 const_set = new_set(cmp_tv_ent, 10);
105 tp_name = TP_SFP_SIGN;
106 ent_name = ENT_SFP_SIGN;
110 tp_name = TP_DFP_SIGN;
111 ent_name = ENT_DFP_SIGN;
115 tp_name = TP_SFP_ABS;
116 ent_name = ENT_SFP_ABS;
120 tp_name = TP_DFP_ABS;
121 ent_name = ENT_DFP_ABS;
127 key.tv = new_tarval_from_str(cnst_str, strlen(cnst_str), mode);
130 entry = set_insert(const_set, &key, sizeof(key), HASH_PTR(key.tv));
133 tp = new_type_primitive(new_id_from_str(tp_name), mode);
134 ent = new_entity(get_glob_type(), new_id_from_str(ent_name), tp);
136 set_entity_ld_ident(ent, get_entity_ident(ent));
137 set_entity_visibility(ent, visibility_local);
138 set_entity_variability(ent, variability_constant);
139 set_entity_allocation(ent, allocation_static);
141 /* we create a new entity here: It's initialization must resist on the
143 rem = current_ir_graph;
144 current_ir_graph = get_const_code_irg();
145 cnst = new_Const(mode, key.tv);
146 current_ir_graph = rem;
148 set_atomic_ent_value(ent, cnst);
150 /* set the entry for hashmap */
159 * Prints the old node name on cg obst and returns a pointer to it.
161 const char *get_old_node_name(ia32_transform_env_t *env) {
162 static int name_cnt = 0;
163 ia32_isa_t *isa = (ia32_isa_t *)env->cg->arch_env->isa;
165 lc_eoprintf(firm_get_arg_env(), isa->name_obst, "%+F", env->irn);
166 obstack_1grow(isa->name_obst, 0);
167 isa->name_obst_size += obstack_object_size(isa->name_obst);
169 if (name_cnt % 1024 == 0) {
170 printf("name obst size reached %d bytes after %d nodes\n", isa->name_obst_size, name_cnt);
172 return obstack_finish(isa->name_obst);
176 /* determine if one operator is an Imm */
177 static ir_node *get_immediate_op(ir_node *op1, ir_node *op2) {
179 return is_ia32_Cnst(op1) ? op1 : (is_ia32_Cnst(op2) ? op2 : NULL);
180 else return is_ia32_Cnst(op2) ? op2 : NULL;
183 /* determine if one operator is not an Imm */
184 static ir_node *get_expr_op(ir_node *op1, ir_node *op2) {
185 return !is_ia32_Cnst(op1) ? op1 : (!is_ia32_Cnst(op2) ? op2 : NULL);
190 * Construct a standard binary operation, set AM and immediate if required.
192 * @param env The transformation environment
193 * @param op1 The first operand
194 * @param op2 The second operand
195 * @param func The node constructor function
196 * @return The constructed ia32 node.
198 static ir_node *gen_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2, construct_binop_func *func) {
199 ir_node *new_op = NULL;
200 ir_mode *mode = env->mode;
201 dbg_info *dbg = env->dbg;
202 ir_graph *irg = env->irg;
203 ir_node *block = env->block;
204 firm_dbg_module_t *mod = env->mod;
205 ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
206 ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
207 ir_node *nomem = new_NoMem();
208 ir_node *expr_op, *imm_op;
210 /* Check if immediate optimization is on and */
211 /* if it's an operation with immediate. */
212 if (! env->cg->opt.immops) {
216 else if (is_op_commutative(get_irn_op(env->irn))) {
217 imm_op = get_immediate_op(op1, op2);
218 expr_op = get_expr_op(op1, op2);
221 imm_op = get_immediate_op(NULL, op2);
222 expr_op = get_expr_op(op1, op2);
225 assert((expr_op || imm_op) && "invalid operands");
228 /* We have two consts here: not yet supported */
232 if (mode_is_float(mode)) {
233 /* floating point operations */
235 DB((mod, LEVEL_1, "FP with immediate ..."));
236 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, expr_op, noreg_fp, nomem, mode_T);
237 set_ia32_Immop_attr(new_op, imm_op);
238 set_ia32_am_support(new_op, ia32_am_None);
241 DB((mod, LEVEL_1, "FP binop ..."));
242 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, op1, op2, nomem, mode_T);
243 set_ia32_am_support(new_op, ia32_am_Source);
247 /* integer operations */
249 /* This is expr + const */
250 DB((mod, LEVEL_1, "INT with immediate ..."));
251 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, expr_op, noreg_gp, nomem, mode_T);
252 set_ia32_Immop_attr(new_op, imm_op);
255 set_ia32_am_support(new_op, ia32_am_Dest);
258 DB((mod, LEVEL_1, "INT binop ..."));
259 /* This is a normal operation */
260 new_op = func(dbg, irg, block, noreg_gp, noreg_gp, op1, op2, nomem, mode_T);
263 set_ia32_am_support(new_op, ia32_am_Full);
268 set_ia32_orig_node(new_op, get_old_node_name(env));
271 if (is_op_commutative(get_irn_op(env->irn))) {
272 set_ia32_commutative(new_op);
275 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
281 * Construct a shift/rotate binary operation, sets AM and immediate if required.
283 * @param env The transformation environment
284 * @param op1 The first operand
285 * @param op2 The second operand
286 * @param func The node constructor function
287 * @return The constructed ia32 node.
289 static ir_node *gen_shift_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2, construct_binop_func *func) {
290 ir_node *new_op = NULL;
291 ir_mode *mode = env->mode;
292 dbg_info *dbg = env->dbg;
293 ir_graph *irg = env->irg;
294 ir_node *block = env->block;
295 firm_dbg_module_t *mod = env->mod;
296 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
297 ir_node *nomem = new_NoMem();
298 ir_node *expr_op, *imm_op;
301 assert(! mode_is_float(mode) && "Shift/Rotate with float not supported");
303 /* Check if immediate optimization is on and */
304 /* if it's an operation with immediate. */
305 imm_op = env->cg->opt.immops ? get_immediate_op(NULL, op2) : NULL;
306 expr_op = get_expr_op(op1, op2);
308 assert((expr_op || imm_op) && "invalid operands");
311 /* We have two consts here: not yet supported */
315 /* Limit imm_op within range imm8 */
317 tv = get_ia32_Immop_tarval(imm_op);
320 tv = tarval_mod(tv, new_tarval_from_long(32, mode_Iu));
327 /* integer operations */
329 /* This is shift/rot with const */
330 DB((mod, LEVEL_1, "Shift/Rot with immediate ..."));
332 new_op = func(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
333 set_ia32_Immop_attr(new_op, imm_op);
336 /* This is a normal shift/rot */
337 DB((mod, LEVEL_1, "Shift/Rot binop ..."));
338 new_op = func(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
342 set_ia32_am_support(new_op, ia32_am_Dest);
345 set_ia32_orig_node(new_op, get_old_node_name(env));
348 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
353 * Construct a standard unary operation, set AM and immediate if required.
355 * @param env The transformation environment
356 * @param op The operand
357 * @param func The node constructor function
358 * @return The constructed ia32 node.
360 static ir_node *gen_unop(ia32_transform_env_t *env, ir_node *op, construct_unop_func *func) {
361 ir_node *new_op = NULL;
362 ir_mode *mode = env->mode;
363 dbg_info *dbg = env->dbg;
364 firm_dbg_module_t *mod = env->mod;
365 ir_graph *irg = env->irg;
366 ir_node *block = env->block;
367 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
368 ir_node *nomem = new_NoMem();
370 new_op = func(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
372 if (mode_is_float(mode)) {
373 DB((mod, LEVEL_1, "FP unop ..."));
374 /* floating point operations don't support implicit store */
375 set_ia32_am_support(new_op, ia32_am_None);
378 DB((mod, LEVEL_1, "INT unop ..."));
379 set_ia32_am_support(new_op, ia32_am_Dest);
383 set_ia32_orig_node(new_op, get_old_node_name(env));
386 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
392 * Creates an ia32 Add with immediate.
394 * @param env The transformation environment
395 * @param expr_op The expression operator
396 * @param const_op The constant
397 * @return the created ia32 Add node
399 static ir_node *gen_imm_Add(ia32_transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
400 ir_node *new_op = NULL;
401 tarval *tv = get_ia32_Immop_tarval(const_op);
402 firm_dbg_module_t *mod = env->mod;
403 dbg_info *dbg = env->dbg;
404 ir_graph *irg = env->irg;
405 ir_node *block = env->block;
406 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
407 ir_node *nomem = new_NoMem();
409 tarval_classification_t class_tv, class_negtv;
411 /* try to optimize to inc/dec */
412 if (env->cg->opt.incdec && tv) {
413 /* optimize tarvals */
414 class_tv = classify_tarval(tv);
415 class_negtv = classify_tarval(tarval_neg(tv));
417 if (class_tv == TV_CLASSIFY_ONE) { /* + 1 == INC */
418 DB((env->mod, LEVEL_2, "Add(1) to Inc ... "));
419 new_op = new_rd_ia32_Inc(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
422 else if (class_tv == TV_CLASSIFY_ALL_ONE || class_negtv == TV_CLASSIFY_ONE) { /* + (-1) == DEC */
423 DB((mod, LEVEL_2, "Add(-1) to Dec ... "));
424 new_op = new_rd_ia32_Dec(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
430 new_op = new_rd_ia32_Add(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
431 set_ia32_Immop_attr(new_op, const_op);
438 * Creates an ia32 Add.
440 * @param dbg firm node dbg
441 * @param block the block the new node should belong to
442 * @param op1 first operator
443 * @param op2 second operator
444 * @param mode node mode
445 * @return the created ia32 Add node
447 static ir_node *gen_Add(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
448 ir_node *new_op = NULL;
449 dbg_info *dbg = env->dbg;
450 ir_mode *mode = env->mode;
451 ir_graph *irg = env->irg;
452 ir_node *block = env->block;
453 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
454 ir_node *nomem = new_NoMem();
455 ir_node *expr_op, *imm_op;
457 /* Check if immediate optimization is on and */
458 /* if it's an operation with immediate. */
459 imm_op = env->cg->opt.immops ? get_immediate_op(op1, op2) : NULL;
460 expr_op = get_expr_op(op1, op2);
462 assert((expr_op || imm_op) && "invalid operands");
464 if (mode_is_float(mode)) {
465 return gen_binop(env, op1, op2, new_rd_ia32_fAdd);
470 /* No expr_op means, that we have two const - one symconst and */
471 /* one tarval or another symconst - because this case is not */
472 /* covered by constant folding */
474 new_op = new_rd_ia32_Lea(dbg, irg, block, noreg, noreg, mode);
475 add_ia32_am_offs(new_op, get_ia32_cnst(op1));
476 add_ia32_am_offs(new_op, get_ia32_cnst(op2));
479 set_ia32_am_support(new_op, ia32_am_Source);
480 set_ia32_op_type(new_op, ia32_AddrModeS);
481 set_ia32_am_flavour(new_op, ia32_am_O);
483 /* Lea doesn't need a Proj */
487 /* This is expr + const */
488 new_op = gen_imm_Add(env, expr_op, imm_op);
491 set_ia32_am_support(new_op, ia32_am_Dest);
494 /* This is a normal add */
495 new_op = new_rd_ia32_Add(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
498 set_ia32_am_support(new_op, ia32_am_Full);
503 set_ia32_orig_node(new_op, get_old_node_name(env));
506 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
512 * Creates an ia32 Mul.
514 * @param dbg firm node dbg
515 * @param block the block the new node should belong to
516 * @param op1 first operator
517 * @param op2 second operator
518 * @param mode node mode
519 * @return the created ia32 Mul node
521 static ir_node *gen_Mul(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
524 if (mode_is_float(env->mode)) {
525 new_op = gen_binop(env, op1, op2, new_rd_ia32_fMul);
528 new_op = gen_binop(env, op1, op2, new_rd_ia32_Mul);
537 * Creates an ia32 Mulh.
538 * Note: Mul produces a 64Bit result and Mulh returns the upper 32 bit of
539 * this result while Mul returns the lower 32 bit.
541 * @param env The transformation environment
542 * @param op1 The first operator
543 * @param op2 The second operator
544 * @return the created ia32 Mulh node
546 static ir_node *gen_Mulh(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
547 ir_node *proj_EAX, *proj_EDX, *mulh;
550 assert(mode_is_float(env->mode) && "Mulh with float not supported");
551 proj_EAX = gen_binop(env, op1, op2, new_rd_ia32_Mulh);
552 mulh = get_Proj_pred(proj_EAX);
553 proj_EDX = new_rd_Proj(env->dbg, env->irg, env->block, mulh, env->mode, pn_EDX);
555 /* to be on the save side */
556 set_Proj_proj(proj_EAX, pn_EAX);
558 if (get_ia32_cnst(mulh)) {
559 /* Mulh with const cannot have AM */
560 set_ia32_am_support(mulh, ia32_am_None);
563 /* Mulh cannot have AM for destination */
564 set_ia32_am_support(mulh, ia32_am_Source);
570 be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], env->irg, env->block, 1, in);
578 * Creates an ia32 And.
580 * @param env The transformation environment
581 * @param op1 The first operator
582 * @param op2 The second operator
583 * @return The created ia32 And node
585 static ir_node *gen_And(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
586 if (mode_is_float(env->mode)) {
587 return gen_binop(env, op1, op2, new_rd_ia32_fAnd);
590 return gen_binop(env, op1, op2, new_rd_ia32_And);
597 * Creates an ia32 Or.
599 * @param env The transformation environment
600 * @param op1 The first operator
601 * @param op2 The second operator
602 * @return The created ia32 Or node
604 static ir_node *gen_Or(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
605 if (mode_is_float(env->mode)) {
606 return gen_binop(env, op1, op2, new_rd_ia32_fOr);
609 return gen_binop(env, op1, op2, new_rd_ia32_Or);
616 * Creates an ia32 Eor.
618 * @param env The transformation environment
619 * @param op1 The first operator
620 * @param op2 The second operator
621 * @return The created ia32 Eor node
623 static ir_node *gen_Eor(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
624 if (mode_is_float(env->mode)) {
625 return gen_binop(env, op1, op2, new_rd_ia32_fEor);
628 return gen_binop(env, op1, op2, new_rd_ia32_Eor);
635 * Creates an ia32 Max.
637 * @param env The transformation environment
638 * @param op1 The first operator
639 * @param op2 The second operator
640 * @return the created ia32 Max node
642 static ir_node *gen_Max(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
645 if (mode_is_float(env->mode)) {
646 new_op = gen_binop(env, op1, op2, new_rd_ia32_fMax);
649 new_op = new_rd_ia32_Max(env->dbg, env->irg, env->block, op1, op2, env->mode);
650 set_ia32_am_support(new_op, ia32_am_None);
659 * Creates an ia32 Min.
661 * @param env The transformation environment
662 * @param op1 The first operator
663 * @param op2 The second operator
664 * @return the created ia32 Min node
666 static ir_node *gen_Min(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
669 if (mode_is_float(env->mode)) {
670 new_op = gen_binop(env, op1, op2, new_rd_ia32_fMin);
673 new_op = new_rd_ia32_Min(env->dbg, env->irg, env->block, op1, op2, env->mode);
674 set_ia32_am_support(new_op, ia32_am_None);
676 set_ia32_orig_node(new_op, get_old_node_name(env));
686 * Creates an ia32 Sub with immediate.
688 * @param env The transformation environment
689 * @param op1 The first operator
690 * @param op2 The second operator
691 * @return The created ia32 Sub node
693 static ir_node *gen_imm_Sub(ia32_transform_env_t *env, ir_node *expr_op, ir_node *const_op) {
694 ir_node *new_op = NULL;
695 tarval *tv = get_ia32_Immop_tarval(const_op);
696 firm_dbg_module_t *mod = env->mod;
697 dbg_info *dbg = env->dbg;
698 ir_graph *irg = env->irg;
699 ir_node *block = env->block;
700 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
701 ir_node *nomem = new_NoMem();
703 tarval_classification_t class_tv, class_negtv;
705 /* try to optimize to inc/dec */
706 if (env->cg->opt.incdec && tv) {
707 /* optimize tarvals */
708 class_tv = classify_tarval(tv);
709 class_negtv = classify_tarval(tarval_neg(tv));
711 if (class_tv == TV_CLASSIFY_ONE) { /* - 1 == DEC */
712 DB((mod, LEVEL_2, "Sub(1) to Dec ... "));
713 new_op = new_rd_ia32_Dec(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
716 else if (class_negtv == TV_CLASSIFY_ONE) { /* - (-1) == Sub */
717 DB((mod, LEVEL_2, "Sub(-1) to Inc ... "));
718 new_op = new_rd_ia32_Inc(dbg, irg, block, noreg, noreg, expr_op, nomem, mode_T);
724 new_op = new_rd_ia32_Sub(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
725 set_ia32_Immop_attr(new_op, const_op);
732 * Creates an ia32 Sub.
734 * @param env The transformation environment
735 * @param op1 The first operator
736 * @param op2 The second operator
737 * @return The created ia32 Sub node
739 static ir_node *gen_Sub(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
740 ir_node *new_op = NULL;
741 dbg_info *dbg = env->dbg;
742 ir_mode *mode = env->mode;
743 ir_graph *irg = env->irg;
744 ir_node *block = env->block;
745 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
746 ir_node *nomem = new_NoMem();
747 ir_node *expr_op, *imm_op;
749 /* Check if immediate optimization is on and */
750 /* if it's an operation with immediate. */
751 imm_op = env->cg->opt.immops ? get_immediate_op(NULL, op2) : NULL;
752 expr_op = get_expr_op(op1, op2);
754 assert((expr_op || imm_op) && "invalid operands");
756 if (mode_is_float(mode)) {
757 return gen_binop(env, op1, op2, new_rd_ia32_fSub);
762 /* No expr_op means, that we have two const - one symconst and */
763 /* one tarval or another symconst - because this case is not */
764 /* covered by constant folding */
766 new_op = new_rd_ia32_Lea(dbg, irg, block, noreg, noreg, mode);
767 add_ia32_am_offs(new_op, get_ia32_cnst(op1));
768 sub_ia32_am_offs(new_op, get_ia32_cnst(op2));
771 set_ia32_am_support(new_op, ia32_am_Source);
772 set_ia32_op_type(new_op, ia32_AddrModeS);
773 set_ia32_am_flavour(new_op, ia32_am_O);
775 /* Lea doesn't need a Proj */
779 /* This is expr - const */
780 new_op = gen_imm_Sub(env, expr_op, imm_op);
783 set_ia32_am_support(new_op, ia32_am_Dest);
786 /* This is a normal sub */
787 new_op = new_rd_ia32_Sub(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
790 set_ia32_am_support(new_op, ia32_am_Full);
795 set_ia32_orig_node(new_op, get_old_node_name(env));
798 return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
804 * Generates an ia32 DivMod with additional infrastructure for the
805 * register allocator if needed.
807 * @param env The transformation environment
808 * @param dividend -no comment- :)
809 * @param divisor -no comment- :)
810 * @param dm_flav flavour_Div/Mod/DivMod
811 * @return The created ia32 DivMod node
813 static ir_node *generate_DivMod(ia32_transform_env_t *env, ir_node *dividend, ir_node *divisor, ia32_op_flavour_t dm_flav) {
815 ir_node *edx_node, *cltd;
817 dbg_info *dbg = env->dbg;
818 ir_graph *irg = env->irg;
819 ir_node *block = env->block;
820 ir_mode *mode = env->mode;
821 ir_node *irn = env->irn;
826 mem = get_Div_mem(irn);
829 mem = get_Mod_mem(irn);
832 mem = get_DivMod_mem(irn);
838 if (mode_is_signed(mode)) {
839 /* in signed mode, we need to sign extend the dividend */
840 cltd = new_rd_ia32_Cdq(dbg, irg, block, dividend, mode_T);
841 dividend = new_rd_Proj(dbg, irg, block, cltd, mode_Is, pn_EAX);
842 edx_node = new_rd_Proj(dbg, irg, block, cltd, mode_Is, pn_EDX);
845 edx_node = new_rd_ia32_Const(dbg, irg, block, mode_Iu);
846 set_ia32_Const_type(edx_node, ia32_Const);
847 set_ia32_Immop_tarval(edx_node, get_tarval_null(mode_Iu));
850 res = new_rd_ia32_DivMod(dbg, irg, block, dividend, divisor, edx_node, mem, mode);
852 set_ia32_flavour(res, dm_flav);
853 set_ia32_n_res(res, 2);
855 /* Only one proj is used -> We must add a second proj and */
856 /* connect this one to a Keep node to eat up the second */
857 /* destroyed register. */
858 if (get_irn_n_edges(irn) == 1) {
859 proj = get_edge_src_irn(get_irn_out_edge_first(irn));
860 assert(is_Proj(proj) && "non-Proj to Div/Mod node");
862 if (get_Proj_proj(proj) == pn_DivMod_res_div) {
863 in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode_Is, pn_DivMod_res_mod);
866 in_keep[0] = new_rd_Proj(dbg, irg, block, res, mode_Is, pn_DivMod_res_div);
869 be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 1, in_keep);
873 set_ia32_orig_node(res, get_old_node_name(env));
881 * Wrapper for generate_DivMod. Sets flavour_Mod.
883 static ir_node *gen_Mod(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
884 return generate_DivMod(env, op1, op2, flavour_Mod);
890 * Wrapper for generate_DivMod. Sets flavour_Div.
892 static ir_node *gen_Div(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
893 return generate_DivMod(env, op1, op2, flavour_Div);
899 * Wrapper for generate_DivMod. Sets flavour_DivMod.
901 static ir_node *gen_DivMod(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
902 return generate_DivMod(env, op1, op2, flavour_DivMod);
908 * Creates an ia32 floating Div.
910 * @param env The transformation environment
911 * @param op1 The first operator
912 * @param op2 The second operator
913 * @return The created ia32 fDiv node
915 static ir_node *gen_Quot(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
916 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
917 ir_node *nomem = new_rd_NoMem(env->irg);
920 new_op = new_rd_ia32_fDiv(env->dbg, env->irg, env->block, noreg, noreg, op1, op2, nomem, env->mode);
921 set_ia32_am_support(new_op, ia32_am_Source);
924 set_ia32_orig_node(new_op, get_old_node_name(env));
933 * Creates an ia32 Shl.
935 * @param env The transformation environment
936 * @param op1 The first operator
937 * @param op2 The second operator
938 * @return The created ia32 Shl node
940 static ir_node *gen_Shl(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
941 return gen_shift_binop(env, op1, op2, new_rd_ia32_Shl);
947 * Creates an ia32 Shr.
949 * @param env The transformation environment
950 * @param op1 The first operator
951 * @param op2 The second operator
952 * @return The created ia32 Shr node
954 static ir_node *gen_Shr(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
955 return gen_shift_binop(env, op1, op2, new_rd_ia32_Shr);
961 * Creates an ia32 Shrs.
963 * @param env The transformation environment
964 * @param op1 The first operator
965 * @param op2 The second operator
966 * @return The created ia32 Shrs node
968 static ir_node *gen_Shrs(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
969 return gen_shift_binop(env, op1, op2, new_rd_ia32_Shrs);
975 * Creates an ia32 RotL.
977 * @param env The transformation environment
978 * @param op1 The first operator
979 * @param op2 The second operator
980 * @return The created ia32 RotL node
982 static ir_node *gen_RotL(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
983 return gen_shift_binop(env, op1, op2, new_rd_ia32_RotL);
989 * Creates an ia32 RotR.
990 * NOTE: There is no RotR with immediate because this would always be a RotL
991 * "imm-mode_size_bits" which can be pre-calculated.
993 * @param env The transformation environment
994 * @param op1 The first operator
995 * @param op2 The second operator
996 * @return The created ia32 RotR node
998 static ir_node *gen_RotR(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
999 return gen_shift_binop(env, op1, op2, new_rd_ia32_RotR);
1005 * Creates an ia32 RotR or RotL (depending on the found pattern).
1007 * @param env The transformation environment
1008 * @param op1 The first operator
1009 * @param op2 The second operator
1010 * @return The created ia32 RotL or RotR node
1012 static ir_node *gen_Rot(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
1013 ir_node *rotate = NULL;
1015 /* Firm has only Rot (which is a RotL), so we are looking for a right (op2)
1016 operand "-e+mode_size_bits" (it's an already modified "mode_size_bits-e",
1017 that means we can create a RotR instead of an Add and a RotL */
1020 ir_node *pred = get_Proj_pred(op2);
1022 if (is_ia32_Add(pred)) {
1023 ir_node *pred_pred = get_irn_n(pred, 2);
1024 tarval *tv = get_ia32_Immop_tarval(pred);
1025 long bits = get_mode_size_bits(env->mode);
1027 if (is_Proj(pred_pred)) {
1028 pred_pred = get_Proj_pred(pred_pred);
1031 if (is_ia32_Minus(pred_pred) &&
1032 tarval_is_long(tv) &&
1033 get_tarval_long(tv) == bits)
1035 DB((env->mod, LEVEL_1, "RotL into RotR ... "));
1036 rotate = gen_RotR(env, op1, get_irn_n(pred_pred, 2));
1043 rotate = gen_RotL(env, op1, op2);
1052 * Transforms a Minus node.
1054 * @param env The transformation environment
1055 * @param op The operator
1056 * @return The created ia32 Minus node
1058 static ir_node *gen_Minus(ia32_transform_env_t *env, ir_node *op) {
1061 ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
1062 ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
1063 ir_node *nomem = new_rd_NoMem(env->irg);
1066 if (mode_is_float(env->mode)) {
1067 new_op = new_rd_ia32_fEor(env->dbg, env->irg, env->block, noreg_gp, noreg_gp, op, noreg_fp, nomem, mode_T);
1069 size = get_mode_size_bits(env->mode);
1070 name = gen_fp_known_const(env->mode, size == 32 ? ia32_SSIGN : ia32_DSIGN);
1072 set_ia32_sc(new_op, name);
1075 set_ia32_orig_node(new_op, get_old_node_name(env));
1078 new_op = new_rd_Proj(env->dbg, env->irg, env->block, new_op, env->mode, 0);
1081 new_op = gen_unop(env, op, new_rd_ia32_Minus);
1090 * Transforms a Not node.
1092 * @param env The transformation environment
1093 * @param op The operator
1094 * @return The created ia32 Not node
1096 static ir_node *gen_Not(ia32_transform_env_t *env, ir_node *op) {
1099 if (mode_is_float(env->mode)) {
1103 new_op = gen_unop(env, op, new_rd_ia32_Not);
1112 * Transforms an Abs node.
1114 * @param env The transformation environment
1115 * @param op The operator
1116 * @return The created ia32 Abs node
1118 static ir_node *gen_Abs(ia32_transform_env_t *env, ir_node *op) {
1119 ir_node *res, *p_eax, *p_edx;
1120 dbg_info *dbg = env->dbg;
1121 ir_mode *mode = env->mode;
1122 ir_graph *irg = env->irg;
1123 ir_node *block = env->block;
1124 ir_node *noreg_gp = ia32_new_NoReg_gp(env->cg);
1125 ir_node *noreg_fp = ia32_new_NoReg_fp(env->cg);
1126 ir_node *nomem = new_NoMem();
1130 if (mode_is_float(mode)) {
1131 res = new_rd_ia32_fAnd(dbg,irg, block, noreg_gp, noreg_gp, op, noreg_fp, nomem, mode_T);
1133 size = get_mode_size_bits(mode);
1134 name = gen_fp_known_const(mode, size == 32 ? ia32_SABS : ia32_DABS);
1136 set_ia32_sc(res, name);
1139 set_ia32_orig_node(res, get_old_node_name(env));
1142 res = new_rd_Proj(dbg, irg, block, res, mode, 0);
1145 res = new_rd_ia32_Cdq(dbg, irg, block, op, mode_T);
1147 set_ia32_orig_node(res, get_old_node_name(env));
1150 p_eax = new_rd_Proj(dbg, irg, block, res, mode, pn_EAX);
1151 p_edx = new_rd_Proj(dbg, irg, block, res, mode, pn_EDX);
1153 res = new_rd_ia32_Eor(dbg, irg, block, noreg_gp, noreg_gp, p_eax, p_edx, nomem, mode_T);
1155 set_ia32_orig_node(res, get_old_node_name(env));
1158 res = new_rd_Proj(dbg, irg, block, res, mode, 0);
1160 res = new_rd_ia32_Sub(dbg, irg, block, noreg_gp, noreg_gp, res, p_edx, nomem, mode_T);
1162 set_ia32_orig_node(res, get_old_node_name(env));
1165 res = new_rd_Proj(dbg, irg, block, res, mode, 0);
1174 * Transforms a Load.
1176 * @param mod the debug module
1177 * @param block the block the new node should belong to
1178 * @param node the ir Load node
1179 * @param mode node mode
1180 * @return the created ia32 Load node
1182 static ir_node *gen_Load(ia32_transform_env_t *env) {
1183 ir_node *node = env->irn;
1184 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1187 if (mode_is_float(env->mode)) {
1188 new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, get_Load_ptr(node), noreg, get_Load_mem(node), env->mode);
1191 new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, get_Load_ptr(node), noreg, get_Load_mem(node), env->mode);
1194 set_ia32_am_support(new_op, ia32_am_Source);
1195 set_ia32_op_type(new_op, ia32_AddrModeS);
1196 set_ia32_am_flavour(new_op, ia32_B);
1197 set_ia32_ls_mode(new_op, get_Load_mode(node));
1200 set_ia32_orig_node(new_op, get_old_node_name(env));
1209 * Transforms a Store.
1211 * @param mod the debug module
1212 * @param block the block the new node should belong to
1213 * @param node the ir Store node
1214 * @param mode node mode
1215 * @return the created ia32 Store node
1217 static ir_node *gen_Store(ia32_transform_env_t *env) {
1218 ir_node *node = env->irn;
1219 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1220 ir_node *val = get_Store_value(node);
1221 ir_node *ptr = get_Store_ptr(node);
1222 ir_node *mem = get_Store_mem(node);
1223 ir_node *sval = val;
1226 /* in case of storing a const -> make it an attribute */
1227 if (is_ia32_Cnst(val)) {
1231 if (mode_is_float(env->mode)) {
1232 new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, env->mode);
1235 new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, env->mode);
1238 /* stored const is an attribute (saves a register) */
1239 if (is_ia32_Cnst(val)) {
1240 set_ia32_Immop_attr(new_op, val);
1243 set_ia32_am_support(new_op, ia32_am_Dest);
1244 set_ia32_op_type(new_op, ia32_AddrModeD);
1245 set_ia32_am_flavour(new_op, ia32_B);
1246 set_ia32_ls_mode(new_op, get_irn_mode(val));
1249 set_ia32_orig_node(new_op, get_old_node_name(env));
1258 * Transforms a Cond -> Proj[b] -> Cmp into a CondJmp or CondJmp_i
1260 * @param env The transformation environment
1261 * @return The transformed node.
1263 static ir_node *gen_Cond(ia32_transform_env_t *env) {
1264 dbg_info *dbg = env->dbg;
1265 ir_graph *irg = env->irg;
1266 ir_node *block = env->block;
1267 ir_node *node = env->irn;
1268 ir_node *sel = get_Cond_selector(node);
1269 ir_mode *sel_mode = get_irn_mode(sel);
1270 ir_node *res = NULL;
1271 ir_node *pred = NULL;
1272 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1273 ir_node *nomem = new_NoMem();
1274 ir_node *cmp_a, *cmp_b, *cnst, *expr;
1276 if (is_Proj(sel) && sel_mode == mode_b) {
1277 pred = get_Proj_pred(sel);
1279 /* get both compare operators */
1280 cmp_a = get_Cmp_left(pred);
1281 cmp_b = get_Cmp_right(pred);
1283 /* check if we can use a CondJmp with immediate */
1284 cnst = env->cg->opt.immops ? get_immediate_op(cmp_a, cmp_b) : NULL;
1285 expr = get_expr_op(cmp_a, cmp_b);
1288 res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, expr, noreg, nomem, mode_T);
1289 set_ia32_Immop_attr(res, cnst);
1292 res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem, mode_T);
1295 set_ia32_pncode(res, get_Proj_proj(sel));
1296 set_ia32_am_support(res, ia32_am_Source);
1299 res = new_rd_ia32_SwitchJmp(dbg, irg, block, sel, mode_T);
1300 set_ia32_pncode(res, get_Cond_defaultProj(node));
1304 set_ia32_orig_node(res, get_old_node_name(env));
1313 * Transforms a CopyB node.
1315 * @param env The transformation environment
1316 * @return The transformed node.
1318 static ir_node *gen_CopyB(ia32_transform_env_t *env) {
1319 ir_node *res = NULL;
1320 dbg_info *dbg = env->dbg;
1321 ir_graph *irg = env->irg;
1322 ir_mode *mode = env->mode;
1323 ir_node *block = env->block;
1324 ir_node *node = env->irn;
1325 ir_node *src = get_CopyB_src(node);
1326 ir_node *dst = get_CopyB_dst(node);
1327 ir_node *mem = get_CopyB_mem(node);
1328 int size = get_type_size_bytes(get_CopyB_type(node));
1331 /* If we have to copy more than 16 bytes, we use REP MOVSx and */
1332 /* then we need the size explicitly in ECX. */
1333 if (size >= 16 * 4) {
1334 rem = size & 0x3; /* size % 4 */
1337 res = new_rd_ia32_Const(dbg, irg, block, mode_Is);
1338 set_ia32_op_type(res, ia32_Const);
1339 set_ia32_Immop_tarval(res, new_tarval_from_long(size, mode_Is));
1341 res = new_rd_ia32_CopyB(dbg, irg, block, dst, src, res, mem, mode);
1342 set_ia32_Immop_tarval(res, new_tarval_from_long(rem, mode_Is));
1345 res = new_rd_ia32_CopyB_i(dbg, irg, block, dst, src, mem, mode);
1346 set_ia32_Immop_tarval(res, new_tarval_from_long(size, mode_Is));
1350 set_ia32_orig_node(res, get_old_node_name(env));
1359 * Transforms a Mux node into CMov.
1361 * @param env The transformation environment
1362 * @return The transformed node.
1364 static ir_node *gen_Mux(ia32_transform_env_t *env) {
1365 ir_node *node = env->irn;
1366 ir_node *new_op = new_rd_ia32_CMov(env->dbg, env->irg, env->block, \
1367 get_Mux_sel(node), get_Mux_false(node), get_Mux_true(node), env->mode);
1370 set_ia32_orig_node(new_op, get_old_node_name(env));
1379 * Checks of we can omit the Int -> Int Conv
1381 static int ignore_int_conv(ir_mode *src_mode, ir_mode *tgt_mode) {
1383 int src_sign = mode_is_signed(src_mode);
1384 int tgt_sign = mode_is_signed(tgt_mode);
1385 int src_bits = get_mode_size_bits(src_mode);
1386 int tgt_bits = get_mode_size_bits(tgt_mode);
1388 /* ignore Convs small -> big if same signedness */
1389 ignore = (src_sign == tgt_sign) && (src_bits < tgt_bits) ? 1 : ignore;
1391 /* ignore Bool -> Int Conv */
1392 ignore = (src_mode == mode_b) ? 1 : ignore;
1394 /* ignore Int -> Int Convs if same bitsize */
1395 ignore = (src_bits == tgt_bits) ? 1 : ignore;
1402 * Transforms a Conv node.
1404 * @param env The transformation environment
1405 * @param op The operator
1406 * @return The created ia32 Conv node
1408 static ir_node *gen_Conv(ia32_transform_env_t *env, ir_node *op) {
1409 dbg_info *dbg = env->dbg;
1410 ir_graph *irg = env->irg;
1411 ir_mode *src_mode = get_irn_mode(op);
1412 ir_mode *tgt_mode = env->mode;
1413 ir_node *block = env->block;
1414 ir_node *new_op = NULL;
1415 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1416 ir_node *nomem = new_rd_NoMem(irg);
1417 firm_dbg_module_t *mod = env->mod;
1419 if (src_mode == tgt_mode) {
1420 /* this can happen when changing mode_P to mode_Is */
1421 DB((mod, LEVEL_1, "killed Conv(mode, mode) ..."));
1422 edges_reroute(env->irn, op, irg);
1424 else if (mode_is_float(src_mode)) {
1425 /* we convert from float ... */
1426 if (mode_is_float(tgt_mode)) {
1428 DB((mod, LEVEL_1, "create Conv(float, float) ..."));
1429 new_op = new_rd_ia32_Conv_FP2FP(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
1433 DB((mod, LEVEL_1, "create Conv(float, int) ..."));
1434 new_op = new_rd_ia32_Conv_FP2I(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
1438 /* we convert from int ... */
1439 if (mode_is_float(tgt_mode)) {
1441 DB((mod, LEVEL_1, "create Conv(int, float) ..."));
1442 new_op = new_rd_ia32_Conv_I2FP(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
1446 DB((mod, LEVEL_1, "omitting Conv(Int, Int) ..."));
1447 edges_reroute(env->irn, op, irg);
1453 set_ia32_orig_node(new_op, get_old_node_name(env));
1456 new_op = new_rd_Proj(dbg, irg, block, new_op, tgt_mode, 0);
1464 /********************************************
1467 * | |__ ___ _ __ ___ __| | ___ ___
1468 * | '_ \ / _ \ '_ \ / _ \ / _` |/ _ \/ __|
1469 * | |_) | __/ | | | (_) | (_| | __/\__ \
1470 * |_.__/ \___|_| |_|\___/ \__,_|\___||___/
1472 ********************************************/
1475 * Transforms a FrameAddr into an ia32 Add.
1477 static ir_node *gen_FrameAddr(ia32_transform_env_t *env) {
1478 ir_node *new_op = NULL;
1479 ir_node *node = env->irn;
1480 ir_node *op = get_irn_n(node, 0);
1481 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1482 ir_node *nomem = new_rd_NoMem(env->irg);
1484 new_op = new_rd_ia32_Add(env->dbg, env->irg, env->block, noreg, noreg, op, noreg, nomem, mode_T);
1485 set_ia32_frame_ent(new_op, be_get_frame_entity(node));
1486 set_ia32_am_support(new_op, ia32_am_Full);
1487 set_ia32_use_frame(new_op);
1490 set_ia32_orig_node(new_op, get_old_node_name(env));
1493 return new_rd_Proj(env->dbg, env->irg, env->block, new_op, env->mode, 0);
1497 * Transforms a FrameLoad into an ia32 Load.
1499 static ir_node *gen_FrameLoad(ia32_transform_env_t *env) {
1500 ir_node *new_op = NULL;
1501 ir_node *node = env->irn;
1502 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1503 ir_node *mem = get_irn_n(node, 0);
1504 ir_node *ptr = get_irn_n(node, 1);
1505 entity *ent = be_get_frame_entity(node);
1506 ir_mode *mode = get_type_mode(get_entity_type(ent));
1508 if (mode_is_float(mode)) {
1509 new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
1512 new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
1515 set_ia32_frame_ent(new_op, ent);
1517 set_ia32_am_support(new_op, ia32_am_Source);
1518 set_ia32_op_type(new_op, ia32_AddrModeS);
1519 set_ia32_am_flavour(new_op, ia32_B);
1520 set_ia32_ls_mode(new_op, mode);
1523 set_ia32_orig_node(new_op, get_old_node_name(env));
1531 * Transforms a FrameStore into an ia32 Store.
1533 static ir_node *gen_FrameStore(ia32_transform_env_t *env) {
1534 ir_node *new_op = NULL;
1535 ir_node *node = env->irn;
1536 ir_node *noreg = ia32_new_NoReg_gp(env->cg);
1537 ir_node *mem = get_irn_n(node, 0);
1538 ir_node *ptr = get_irn_n(node, 1);
1539 ir_node *val = get_irn_n(node, 2);
1540 entity *ent = be_get_frame_entity(node);
1541 ir_mode *mode = get_irn_mode(val);
1543 if (mode_is_float(mode)) {
1544 new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, val, mem, mode_T);
1547 new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, ptr, noreg, val, mem, mode_T);
1549 set_ia32_frame_ent(new_op, ent);
1551 set_ia32_am_support(new_op, ia32_am_Dest);
1552 set_ia32_op_type(new_op, ia32_AddrModeD);
1553 set_ia32_am_flavour(new_op, ia32_B);
1554 set_ia32_ls_mode(new_op, mode);
1557 set_ia32_orig_node(new_op, get_old_node_name(env));
1565 /*********************************************************
1568 * _ __ ___ __ _ _ _ __ __| |_ __ ___ _____ _ __
1569 * | '_ ` _ \ / _` | | '_ \ / _` | '__| \ \ / / _ \ '__|
1570 * | | | | | | (_| | | | | | | (_| | | | |\ V / __/ |
1571 * |_| |_| |_|\__,_|_|_| |_| \__,_|_| |_| \_/ \___|_|
1573 *********************************************************/
1576 * Transforms the given firm node (and maybe some other related nodes)
1577 * into one or more assembler nodes.
1579 * @param node the firm node
1580 * @param env the debug module
1582 void ia32_transform_node(ir_node *node, void *env) {
1583 ia32_code_gen_t *cgenv = (ia32_code_gen_t *)env;
1584 opcode code = get_irn_opcode(node);
1585 ir_node *asm_node = NULL;
1586 ia32_transform_env_t tenv;
1591 tenv.block = get_nodes_block(node);
1592 tenv.dbg = get_irn_dbg_info(node);
1593 tenv.irg = current_ir_graph;
1595 tenv.mod = cgenv->mod;
1596 tenv.mode = get_irn_mode(node);
1599 #define UNOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_op(node)); break
1600 #define BINOP(a) case iro_##a: asm_node = gen_##a(&tenv, get_##a##_left(node), get_##a##_right(node)); break
1601 #define GEN(a) case iro_##a: asm_node = gen_##a(&tenv); break
1602 #define IGN(a) case iro_##a: break
1603 #define BAD(a) case iro_##a: goto bad
1604 #define OTHER_BIN(a) \
1605 if (get_irn_op(node) == get_op_##a()) { \
1606 asm_node = gen_##a(&tenv, get_irn_n(node, 0), get_irn_n(node, 1)); \
1610 if (be_is_##a(node)) { \
1611 asm_node = gen_##a(&tenv); \
1615 DBG((tenv.mod, LEVEL_1, "check %+F ... ", node));
1662 /* constant transformation happens earlier */
1691 fprintf(stderr, "Not implemented: %s\n", get_irn_opname(node));
1695 /* exchange nodes if a new one was generated */
1697 exchange(node, asm_node);
1698 DB((tenv.mod, LEVEL_1, "created node %+F[%p]\n", asm_node, asm_node));
1701 DB((tenv.mod, LEVEL_1, "ignored\n"));