3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 D0 => "${arch}_emit_dest_register(env, node, 0);",
257 D1 => "${arch}_emit_dest_register(env, node, 1);",
258 D2 => "${arch}_emit_dest_register(env, node, 2);",
259 D3 => "${arch}_emit_dest_register(env, node, 3);",
260 D4 => "${arch}_emit_dest_register(env, node, 4);",
261 D5 => "${arch}_emit_dest_register(env, node, 5);",
262 X0 => "${arch}_emit_x87_name(env, node, 0);",
263 X1 => "${arch}_emit_x87_name(env, node, 1);",
264 X2 => "${arch}_emit_x87_name(env, node, 2);",
265 C => "${arch}_emit_immediate(env, node);",
266 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
267 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
268 ia32_emit_mode_suffix(env, node);",
269 M => "${arch}_emit_mode_suffix(env, node);",
270 XM => "${arch}_emit_x87_mode_suffix(env, node);",
271 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
272 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
273 AM => "${arch}_emit_am(env, node);",
274 unop0 => "${arch}_emit_unop(env, node, 0);",
275 unop1 => "${arch}_emit_unop(env, node, 1);",
276 unop2 => "${arch}_emit_unop(env, node, 2);",
277 unop3 => "${arch}_emit_unop(env, node, 3);",
278 unop4 => "${arch}_emit_unop(env, node, 4);",
279 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
280 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 0);",
281 binop => "${arch}_emit_binop(env, node);",
282 x87_binop => "${arch}_emit_x87_binop(env, node);",
285 #--------------------------------------------------#
288 # _ __ _____ __ _ _ __ ___ _ __ ___ #
289 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
290 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
291 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
294 #--------------------------------------------------#
296 $default_attr_type = "ia32_attr_t";
297 $default_copy_attr = "ia32_copy_attr";
300 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
302 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
303 "\tinit_ia32_x87_attributes(res);",
305 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
306 "\tinit_ia32_x87_attributes(res);".
307 "\tinit_ia32_asm_attributes(res);",
308 ia32_immediate_attr_t =>
309 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
310 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
314 ia32_attr_t => "ia32_compare_nodes_attr",
315 ia32_x87_attr_t => "ia32_compare_x87_attr",
316 ia32_asm_attr_t => "ia32_compare_asm_attr",
317 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
323 $mode_xmm = "mode_E";
324 $mode_gp = "mode_Iu";
325 $mode_fpcw = "mode_fpcw";
326 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
327 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
328 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
336 reg_req => { out => [ "gp_NOREG" ] },
337 attr => "ir_entity *symconst, int symconst_sign, long offset",
338 attr_type => "ia32_immediate_attr_t",
346 out_arity => "variable",
347 attr_type => "ia32_asm_attr_t",
354 reg_req => { out => [ "gp" ] },
361 #-----------------------------------------------------------------#
364 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
365 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
366 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
367 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
370 #-----------------------------------------------------------------#
372 # commutative operations
375 # All nodes supporting Addressmode have 5 INs:
376 # 1 - base r1 == NoReg in case of no AM or no base
377 # 2 - index r2 == NoReg in case of no AM or no index
378 # 3 - op1 r3 == always present
379 # 4 - op2 r4 == NoReg in case of immediate operation
380 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
384 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
385 ins => [ "base", "index", "left", "right", "mem" ],
386 emit => '. add%M %binop',
389 modified_flags => $status_flags
393 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
394 emit => '. adc%M %binop',
397 modified_flags => $status_flags
403 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
410 outs => [ "low_res", "high_res" ],
412 modified_flags => $status_flags
418 cmp_attr => "return 1;",
424 cmp_attr => "return 1;",
429 # we should not rematrialize this node. It produces 2 results and has
430 # very strict constrains
431 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
432 emit => '. mul%M %unop3',
433 outs => [ "EAX", "EDX", "M" ],
434 ins => [ "base", "index", "val_high", "val_low", "mem" ],
437 modified_flags => $status_flags
441 # we should not rematrialize this node. It produces 2 results and has
442 # very strict constrains
444 cmp_attr => "return 1;",
445 outs => [ "EAX", "EDX", "M" ],
451 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
452 emit => '. imul%M %binop',
456 modified_flags => $status_flags
461 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
462 emit => '. imul%M %unop3',
463 outs => [ "EAX", "EDX", "M" ],
464 ins => [ "base", "index", "val_high", "val_low", "mem" ],
467 modified_flags => $status_flags
472 cmp_attr => "return 1;",
478 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
479 emit => '. and%M %binop',
482 modified_flags => $status_flags
487 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
488 emit => '. or%M %binop',
491 modified_flags => $status_flags
496 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
497 emit => '. xor%M %binop',
500 modified_flags => $status_flags
505 cmp_attr => "return 1;",
507 modified_flags => $status_flags
510 # not commutative operations
514 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
515 emit => '. sub%M %binop',
518 modified_flags => $status_flags
522 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
523 emit => '. sbb%M %binop',
526 modified_flags => $status_flags
532 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
539 outs => [ "low_res", "high_res" ],
541 modified_flags => $status_flags
546 cmp_attr => "return 1;",
551 cmp_attr => "return 1;",
557 state => "exc_pinned",
558 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
559 attr => "ia32_op_flavour_t dm_flav",
560 init_attr => "attr->data.op_flav = dm_flav;",
561 emit => ". idiv%M %unop4",
562 outs => [ "div_res", "mod_res", "M" ],
565 modified_flags => $status_flags
570 state => "exc_pinned",
571 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
572 attr => "ia32_op_flavour_t dm_flav",
573 init_attr => "attr->data.op_flav = dm_flav;",
574 emit => ". div%M %unop4",
575 outs => [ "div_res", "mod_res", "M" ],
578 modified_flags => $status_flags
583 # "in_r3" would be enough as out requirement, but the register allocator
584 # does strange things then and doesn't respect the constraint for in4
585 # if the same value is attached to in3 and in4 (if you have "i << i" in C)
586 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
587 ins => [ "base", "index", "left", "right", "mem" ],
588 emit => '. shl%M %binop',
591 modified_flags => $status_flags
595 cmp_attr => "return 1;",
601 # Out requirements is: different from all in
602 # This is because, out must be different from LowPart and ShiftCount.
603 # We could say "!ecx !in_r4" but it can occur, that all values live through
604 # this Shift and the only value dying is the ShiftCount. Then there would be
605 # a register missing, as result must not be ecx and all other registers are
606 # occupied. What we should write is "!in_r4 !in_r5", but this is not
607 # supported (and probably never will). So we create artificial interferences
608 # of the result with all inputs, so the spiller can always assure a free
610 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
613 if (get_ia32_immop_type(node) == ia32_ImmNone) {
614 if (get_ia32_op_type(node) == ia32_AddrModeD) {
615 . shld%M %%cl, %S3, %AM
617 . shld%M %%cl, %S3, %S2
620 if (get_ia32_op_type(node) == ia32_AddrModeD) {
621 . shld%M %C, %S3, %AM
623 . shld%M %C, %S3, %S2
630 modified_flags => $status_flags
634 cmp_attr => "return 1;",
640 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
641 emit => '. shr%M %binop',
644 modified_flags => $status_flags
648 cmp_attr => "return 1;",
654 # Out requirements is: different from all in
655 # This is because, out must be different from LowPart and ShiftCount.
656 # We could say "!ecx !in_r4" but it can occur, that all values live through
657 # this Shift and the only value dying is the ShiftCount. Then there would be a
658 # register missing, as result must not be ecx and all other registers are
659 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
660 # (and probably never will). So we create artificial interferences of the result
661 # with all inputs, so the spiller can always assure a free register.
662 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
664 if (get_ia32_immop_type(node) == ia32_ImmNone) {
665 if (get_ia32_op_type(node) == ia32_AddrModeD) {
666 . shrd%M %%cl, %S3, %AM
668 . shrd%M %%cl, %S3, %S2
671 if (get_ia32_op_type(node) == ia32_AddrModeD) {
672 . shrd%M %C, %S3, %AM
674 . shrd%M %C, %S3, %S2
681 modified_flags => $status_flags
685 cmp_attr => "return 1;",
691 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
692 emit => '. sar%M %binop',
695 modified_flags => $status_flags
699 cmp_attr => "return 1;",
705 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
706 emit => '. ror%M %binop',
709 modified_flags => $status_flags
714 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
715 emit => '. rol%M %binop',
718 modified_flags => $status_flags
725 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
726 emit => '. neg%M %unop2',
727 ins => [ "base", "index", "val", "mem" ],
730 modified_flags => $status_flags
735 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
742 outs => [ "low_res", "high_res" ],
744 modified_flags => $status_flags
749 cmp_attr => "return 1;",
755 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
756 emit => '. inc%M %unop2',
759 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
764 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
765 emit => '. dec%M %unop2',
768 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
773 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
774 ins => [ "base", "index", "val", "mem" ],
775 emit => '. not%M %unop2',
786 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
787 out => [ "none", "none"] },
788 ins => [ "base", "index", "left", "right", "mem" ],
789 outs => [ "false", "true" ],
791 init_attr => "attr->pn_code = pnc;",
793 units => [ "BRANCH" ],
799 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
800 out => [ "none", "none" ] },
801 ins => [ "base", "index", "left", "right", "mem" ],
802 outs => [ "false", "true" ],
804 init_attr => "attr->pn_code = pnc;",
806 units => [ "BRANCH" ],
812 reg_req => { in => [ "gp" ], out => [ "none" ] },
814 units => [ "BRANCH" ],
821 reg_req => { out => [ "gp" ] },
830 reg_req => { out => [ "gp_UKNWN" ] },
840 reg_req => { out => [ "vfp_UKNWN" ] },
844 attr_type => "ia32_x87_attr_t",
851 reg_req => { out => [ "xmm_UKNWN" ] },
861 reg_req => { out => [ "gp_NOREG" ] },
871 reg_req => { out => [ "vfp_NOREG" ] },
875 attr_type => "ia32_x87_attr_t",
882 reg_req => { out => [ "xmm_NOREG" ] },
892 reg_req => { out => [ "fp_cw" ] },
896 modified_flags => $fpcw_flags
902 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
904 emit => ". fldcw %AM",
907 modified_flags => $fpcw_flags
913 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
915 emit => ". fnstcw %AM",
921 # we should not rematrialize this node. It produces 2 results and has
922 # very strict constrains
923 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
924 ins => [ "val", "globbered" ],
932 # Note that we add additional latency values depending on address mode, so a
933 # lateny of 0 for load is correct
937 state => "exc_pinned",
938 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
939 ins => [ "base", "index", "mem" ],
940 outs => [ "res", "M" ],
942 emit => ". mov%SE%ME%.l %AM, %D0",
948 cmp_attr => "return 1;",
949 outs => [ "res", "M" ],
955 cmp_attr => "return 1;",
956 state => "exc_pinned",
963 state => "exc_pinned",
964 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
965 ins => [ "base", "index", "val", "mem" ],
966 emit => '. mov%M %binop',
974 state => "exc_pinned",
975 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
976 emit => '. mov%M %binop',
984 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
985 emit => '. leal %AM, %D0',
989 modified_flags => [],
993 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
994 emit => '. push%M %unop2',
995 ins => [ "base", "index", "val", "stack", "mem" ],
996 outs => [ "stack:I|S", "M" ],
999 modified_flags => [],
1003 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
1004 emit => '. pop%M %DAM1',
1005 outs => [ "stack:I|S", "res", "M" ],
1006 ins => [ "base", "index", "stack", "mem" ],
1007 latency => 3, # Pop is more expensive than Push on Athlon
1009 modified_flags => [],
1013 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1015 outs => [ "frame:I", "stack:I|S", "M" ],
1021 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1023 outs => [ "frame:I", "stack:I|S" ],
1030 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1031 emit => '. addl %binop',
1032 outs => [ "stack:S", "M" ],
1034 modified_flags => $status_flags
1039 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "gp", "none" ] },
1040 emit => ". subl %binop\n".
1041 ". movl %%esp, %D1",
1042 outs => [ "stack:I|S", "addr", "M" ],
1044 modified_flags => $status_flags
1049 reg_req => { out => [ "gp" ] },
1053 # the int instruction
1055 reg_req => { in => [ "none" ], out => [ "none" ] },
1057 attr => "tarval *tv",
1058 init_attr => "\tset_ia32_Immop_tarval(res, tv);",
1061 cmp_attr => "return 1;",
1065 #-----------------------------------------------------------------------------#
1066 # _____ _____ ______ __ _ _ _ #
1067 # / ____/ ____| ____| / _| | | | | | #
1068 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1069 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1070 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1071 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1072 #-----------------------------------------------------------------------------#
1074 # commutative operations
1078 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1079 emit => '. add%XXM %binop',
1087 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1088 emit => '. mul%XXM %binop',
1096 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1097 emit => '. max%XXM %binop',
1105 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1106 emit => '. min%XXM %binop',
1114 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1115 emit => '. andp%XSD %binop',
1123 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1124 emit => '. orp%XSD %binop',
1131 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1132 emit => '. xorp%XSD %binop',
1138 # not commutative operations
1142 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1143 emit => '. andnp%XSD %binop',
1151 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1152 emit => '. sub%XXM %binop',
1160 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1161 outs => [ "res", "M" ],
1162 emit => '. div%XXM %binop',
1171 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1179 op_flags => "L|X|Y",
1180 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1181 ins => [ "base", "index", "left", "right", "mem" ],
1182 outs => [ "false", "true" ],
1184 init_attr => "attr->pn_code = pnc;",
1192 reg_req => { out => [ "xmm" ] },
1193 emit => '. mov%XXM %C, %D0',
1203 state => "exc_pinned",
1204 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1205 emit => '. mov%XXM %AM, %D0',
1206 outs => [ "res", "M" ],
1213 state => "exc_pinned",
1214 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1215 emit => '. mov%XXM %binop',
1223 state => "exc_pinned",
1224 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1225 ins => [ "base", "index", "val", "mem" ],
1226 emit => '. mov%XXM %S2, %AM',
1234 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1235 emit => '. cvtsi2ss %D0, %AM',
1243 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1244 emit => '. cvtsi2sd %unop2',
1253 cmp_attr => "return 1;",
1259 cmp_attr => "return 1;",
1268 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1269 outs => [ "DST", "SRC", "CNT", "M" ],
1271 modified_flags => [ "DF" ]
1277 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1278 outs => [ "DST", "SRC", "M" ],
1280 modified_flags => [ "DF" ]
1286 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1288 ins => [ "base", "index", "val", "mem" ],
1290 modified_flags => $status_flags
1294 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1295 ins => [ "base", "index", "val", "mem" ],
1298 modified_flags => $status_flags
1302 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1309 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1316 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1324 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1325 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1326 attr => "pn_Cmp pn_code",
1327 init_attr => "attr->pn_code = pn_code;",
1335 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1336 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1337 attr => "pn_Cmp pn_code",
1338 init_attr => "attr->pn_code = pn_code;",
1346 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1354 reg_req => { in => [ "vfp", "vfp", "gp", "gp" ], out => [ "in_r4" ] },
1358 attr_type => "ia32_x87_attr_t",
1363 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1364 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1365 attr => "pn_Cmp pn_code",
1366 init_attr => "attr->pn_code = pn_code;",
1374 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1375 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1376 attr => "pn_Cmp pn_code",
1377 init_attr => "attr->pn_code = pn_code;",
1385 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1393 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1397 attr_type => "ia32_x87_attr_t",
1402 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1406 attr_type => "ia32_x87_attr_t",
1409 #----------------------------------------------------------#
1411 # (_) | | | | / _| | | | #
1412 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1413 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1414 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1415 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1417 # _ __ ___ __| | ___ ___ #
1418 # | '_ \ / _ \ / _` |/ _ \/ __| #
1419 # | | | | (_) | (_| | __/\__ \ #
1420 # |_| |_|\___/ \__,_|\___||___/ #
1421 #----------------------------------------------------------#
1425 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1426 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1430 attr_type => "ia32_x87_attr_t",
1435 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1436 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1440 attr_type => "ia32_x87_attr_t",
1445 cmp_attr => "return 1;",
1451 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1452 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1456 attr_type => "ia32_x87_attr_t",
1460 cmp_attr => "return 1;",
1465 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
1466 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1467 outs => [ "res", "M" ],
1470 attr_type => "ia32_x87_attr_t",
1474 cmp_attr => "return 1;",
1475 outs => [ "res", "M" ],
1480 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1481 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1485 attr_type => "ia32_x87_attr_t",
1489 cmp_attr => "return 1;",
1495 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1500 attr_type => "ia32_x87_attr_t",
1505 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1510 attr_type => "ia32_x87_attr_t",
1513 # virtual Load and Store
1517 state => "exc_pinned",
1518 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1519 ins => [ "base", "index", "mem" ],
1520 outs => [ "res", "M" ],
1521 attr => "ir_mode *store_mode",
1522 init_attr => "attr->attr.ls_mode = store_mode;",
1525 attr_type => "ia32_x87_attr_t",
1530 state => "exc_pinned",
1531 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1532 ins => [ "base", "index", "val", "mem" ],
1533 attr => "ir_mode *store_mode",
1534 init_attr => "attr->attr.ls_mode = store_mode;",
1538 attr_type => "ia32_x87_attr_t",
1544 state => "exc_pinned",
1545 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1546 outs => [ "res", "M" ],
1547 ins => [ "base", "index", "mem" ],
1550 attr_type => "ia32_x87_attr_t",
1554 cmp_attr => "return 1;",
1555 outs => [ "res", "M" ],
1560 state => "exc_pinned",
1561 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1562 ins => [ "base", "index", "val", "fpcw", "mem" ],
1566 attr_type => "ia32_x87_attr_t",
1570 cmp_attr => "return 1;",
1571 state => "exc_pinned",
1581 reg_req => { out => [ "vfp" ] },
1585 attr_type => "ia32_x87_attr_t",
1590 reg_req => { out => [ "vfp" ] },
1594 attr_type => "ia32_x87_attr_t",
1599 reg_req => { out => [ "vfp" ] },
1603 attr_type => "ia32_x87_attr_t",
1608 reg_req => { out => [ "vfp" ] },
1612 attr_type => "ia32_x87_attr_t",
1617 reg_req => { out => [ "vfp" ] },
1621 attr_type => "ia32_x87_attr_t",
1626 reg_req => { out => [ "vfp" ] },
1630 attr_type => "ia32_x87_attr_t",
1635 reg_req => { out => [ "vfp" ] },
1639 attr_type => "ia32_x87_attr_t",
1645 reg_req => { out => [ "vfp" ] },
1649 attr_type => "ia32_x87_attr_t",
1656 op_flags => "L|X|Y",
1657 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1658 ins => [ "left", "right" ],
1659 outs => [ "false", "true", "temp_reg_eax" ],
1661 init_attr => "attr->attr.pn_code = pnc;",
1664 attr_type => "ia32_x87_attr_t",
1667 #------------------------------------------------------------------------#
1668 # ___ _____ __ _ _ _ #
1669 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1670 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1671 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1672 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1673 #------------------------------------------------------------------------#
1675 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1676 # are swapped, we work this around in the emitter...
1680 rd_constructor => "NONE",
1682 emit => '. fadd%XM %x87_binop',
1683 attr_type => "ia32_x87_attr_t",
1688 rd_constructor => "NONE",
1690 emit => '. faddp%XM %x87_binop',
1691 attr_type => "ia32_x87_attr_t",
1696 rd_constructor => "NONE",
1698 emit => '. fmul%XM %x87_binop',
1699 attr_type => "ia32_x87_attr_t",
1704 rd_constructor => "NONE",
1706 emit => '. fmulp%XM %x87_binop',,
1707 attr_type => "ia32_x87_attr_t",
1712 rd_constructor => "NONE",
1714 emit => '. fsub%XM %x87_binop',
1715 attr_type => "ia32_x87_attr_t",
1720 rd_constructor => "NONE",
1722 # see note about gas bugs
1723 emit => '. fsubrp%XM %x87_binop',
1724 attr_type => "ia32_x87_attr_t",
1729 rd_constructor => "NONE",
1732 emit => '. fsubr%XM %x87_binop',
1733 attr_type => "ia32_x87_attr_t",
1738 rd_constructor => "NONE",
1741 # see note about gas bugs
1742 emit => '. fsubp%XM %x87_binop',
1743 attr_type => "ia32_x87_attr_t",
1748 rd_constructor => "NONE",
1751 attr_type => "ia32_x87_attr_t",
1754 # this node is just here, to keep the simulator running
1755 # we can omit this when a fprem simulation function exists
1758 rd_constructor => "NONE",
1761 attr_type => "ia32_x87_attr_t",
1766 rd_constructor => "NONE",
1768 emit => '. fdiv%XM %x87_binop',
1769 attr_type => "ia32_x87_attr_t",
1774 rd_constructor => "NONE",
1776 # see note about gas bugs
1777 emit => '. fdivrp%XM %x87_binop',
1778 attr_type => "ia32_x87_attr_t",
1783 rd_constructor => "NONE",
1785 emit => '. fdivr%XM %x87_binop',
1786 attr_type => "ia32_x87_attr_t",
1791 rd_constructor => "NONE",
1793 # see note about gas bugs
1794 emit => '. fdivp%XM %x87_binop',
1795 attr_type => "ia32_x87_attr_t",
1800 rd_constructor => "NONE",
1803 attr_type => "ia32_x87_attr_t",
1808 rd_constructor => "NONE",
1811 attr_type => "ia32_x87_attr_t",
1814 # x87 Load and Store
1817 rd_constructor => "NONE",
1818 op_flags => "R|L|F",
1819 state => "exc_pinned",
1821 emit => '. fld%XM %AM',
1822 attr_type => "ia32_x87_attr_t",
1826 rd_constructor => "NONE",
1827 op_flags => "R|L|F",
1828 state => "exc_pinned",
1830 emit => '. fst%XM %AM',
1832 attr_type => "ia32_x87_attr_t",
1836 rd_constructor => "NONE",
1837 op_flags => "R|L|F",
1838 state => "exc_pinned",
1840 emit => '. fstp%XM %AM',
1842 attr_type => "ia32_x87_attr_t",
1849 rd_constructor => "NONE",
1851 emit => '. fild%XM %AM',
1852 attr_type => "ia32_x87_attr_t",
1857 state => "exc_pinned",
1858 rd_constructor => "NONE",
1860 emit => '. fist%XM %AM',
1862 attr_type => "ia32_x87_attr_t",
1867 state => "exc_pinned",
1868 rd_constructor => "NONE",
1870 emit => '. fistp%XM %AM',
1872 attr_type => "ia32_x87_attr_t",
1878 op_flags => "R|c|K",
1882 attr_type => "ia32_x87_attr_t",
1886 op_flags => "R|c|K",
1890 attr_type => "ia32_x87_attr_t",
1894 op_flags => "R|c|K",
1898 attr_type => "ia32_x87_attr_t",
1902 op_flags => "R|c|K",
1906 attr_type => "ia32_x87_attr_t",
1910 op_flags => "R|c|K",
1914 attr_type => "ia32_x87_attr_t",
1918 op_flags => "R|c|K",
1921 emit => '. fldll2t',
1922 attr_type => "ia32_x87_attr_t",
1926 op_flags => "R|c|K",
1930 attr_type => "ia32_x87_attr_t",
1934 # Note that it is NEVER allowed to do CSE on these nodes
1935 # Moreover, note the virtual register requierements!
1940 cmp_attr => "return 1;",
1941 emit => '. fxch %X0',
1942 attr_type => "ia32_x87_attr_t",
1948 cmp_attr => "return 1;",
1949 emit => '. fld %X0',
1950 attr_type => "ia32_x87_attr_t",
1955 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1956 cmp_attr => "return 1;",
1957 emit => '. fld %X0',
1958 attr_type => "ia32_x87_attr_t",
1964 cmp_attr => "return 1;",
1965 emit => '. fstp %X0',
1966 attr_type => "ia32_x87_attr_t",
1972 op_flags => "L|X|Y",
1974 attr_type => "ia32_x87_attr_t",
1978 op_flags => "L|X|Y",
1980 attr_type => "ia32_x87_attr_t",
1984 op_flags => "L|X|Y",
1986 attr_type => "ia32_x87_attr_t",
1990 op_flags => "L|X|Y",
1992 attr_type => "ia32_x87_attr_t",
1996 op_flags => "L|X|Y",
1998 attr_type => "ia32_x87_attr_t",
2002 op_flags => "L|X|Y",
2004 attr_type => "ia32_x87_attr_t",
2008 # -------------------------------------------------------------------------------- #
2009 # ____ ____ _____ _ _ #
2010 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2011 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2012 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2013 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2015 # -------------------------------------------------------------------------------- #
2018 # Spilling and reloading of SSE registers, hardcoded, not generated #
2022 state => "exc_pinned",
2023 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2024 emit => '. movdqu %D0, %AM',
2025 outs => [ "res", "M" ],
2031 state => "exc_pinned",
2032 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2033 emit => '. movdqu %binop',
2040 # Include the generated SIMD node specification written by the SIMD optimization
2041 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2042 unless ($return = do $my_script_name) {
2043 warn "couldn't parse $my_script_name: $@" if $@;
2044 warn "couldn't do $my_script_name: $!" unless defined $return;
2045 warn "couldn't run $my_script_name" unless $return;