3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 SB1 => "${arch}_emit_8bit_source_register(env, node, 1);",
257 SB2 => "${arch}_emit_8bit_source_register(env, node, 2);",
258 SW0 => "${arch}_emit_16bit_source_register(env, node, 0);",
259 SI0 => "${arch}_emit_source_register_or_immediate(env, node, 0);",
260 SI1 => "${arch}_emit_source_register_or_immediate(env, node, 1);",
261 SI2 => "${arch}_emit_source_register_or_immediate(env, node, 2);",
262 SI3 => "${arch}_emit_source_register_or_immediate(env, node, 3);",
263 D0 => "${arch}_emit_dest_register(env, node, 0);",
264 D1 => "${arch}_emit_dest_register(env, node, 1);",
265 D2 => "${arch}_emit_dest_register(env, node, 2);",
266 D3 => "${arch}_emit_dest_register(env, node, 3);",
267 D4 => "${arch}_emit_dest_register(env, node, 4);",
268 D5 => "${arch}_emit_dest_register(env, node, 5);",
269 X0 => "${arch}_emit_x87_name(env, node, 0);",
270 X1 => "${arch}_emit_x87_name(env, node, 1);",
271 X2 => "${arch}_emit_x87_name(env, node, 2);",
272 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
273 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
274 ia32_emit_mode_suffix(env, node);",
275 M => "${arch}_emit_mode_suffix(env, node);",
276 XM => "${arch}_emit_x87_mode_suffix(env, node);",
277 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
278 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
279 AM => "${arch}_emit_am(env, node);",
280 unop0 => "${arch}_emit_unop(env, node, 0);",
281 unop1 => "${arch}_emit_unop(env, node, 1);",
282 unop2 => "${arch}_emit_unop(env, node, 2);",
283 unop3 => "${arch}_emit_unop(env, node, 3);",
284 unop4 => "${arch}_emit_unop(env, node, 4);",
285 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
286 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 0);",
287 binop => "${arch}_emit_binop(env, node);",
288 x87_binop => "${arch}_emit_x87_binop(env, node);",
291 #--------------------------------------------------#
294 # _ __ _____ __ _ _ __ ___ _ __ ___ #
295 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
296 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
297 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
300 #--------------------------------------------------#
302 $default_attr_type = "ia32_attr_t";
303 $default_copy_attr = "ia32_copy_attr";
306 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
308 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
309 "\tinit_ia32_x87_attributes(res);",
311 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
312 "\tinit_ia32_x87_attributes(res);".
313 "\tinit_ia32_asm_attributes(res);",
314 ia32_immediate_attr_t =>
315 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
316 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
320 ia32_attr_t => "ia32_compare_nodes_attr",
321 ia32_x87_attr_t => "ia32_compare_x87_attr",
322 ia32_asm_attr_t => "ia32_compare_asm_attr",
323 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
329 $mode_xmm = "mode_E";
330 $mode_gp = "mode_Iu";
331 $mode_fpcw = "mode_fpcw";
332 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
333 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
334 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
342 reg_req => { out => [ "gp_NOREG" ] },
343 attr => "ir_entity *symconst, int symconst_sign, long offset",
344 attr_type => "ia32_immediate_attr_t",
352 out_arity => "variable",
353 attr_type => "ia32_asm_attr_t",
360 reg_req => { out => [ "gp" ] },
365 cmp_attr => "return 1;",
368 #-----------------------------------------------------------------#
371 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
372 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
373 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
374 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
377 #-----------------------------------------------------------------#
379 # commutative operations
382 # All nodes supporting Addressmode have 5 INs:
383 # 1 - base r1 == NoReg in case of no AM or no base
384 # 2 - index r2 == NoReg in case of no AM or no index
385 # 3 - op1 r3 == always present
386 # 4 - op2 r4 == NoReg in case of immediate operation
387 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
391 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
392 ins => [ "base", "index", "left", "right", "mem" ],
393 emit => '. add%M %binop',
394 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
397 modified_flags => $status_flags
402 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
403 ins => [ "base", "index", "val", "mem" ],
404 emit => ". add%M %SI2, %AM",
407 modified_flags => $status_flags
411 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
412 emit => '. adc%M %binop',
413 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
416 modified_flags => $status_flags
422 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
429 outs => [ "low_res", "high_res" ],
431 modified_flags => $status_flags
437 cmp_attr => "return 1;",
443 cmp_attr => "return 1;",
448 # we should not rematrialize this node. It produces 2 results and has
449 # very strict constrains
450 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
451 emit => '. mul%M %unop3',
452 outs => [ "EAX", "EDX", "M" ],
453 ins => [ "base", "index", "val_high", "val_low", "mem" ],
454 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
457 modified_flags => $status_flags
461 # we should not rematrialize this node. It produces 2 results and has
462 # very strict constrains
464 cmp_attr => "return 1;",
465 outs => [ "EAX", "EDX", "M" ],
471 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
472 ins => [ "base", "index", "left", "right", "mem" ],
473 emit => '. imul%M %binop',
474 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
478 modified_flags => $status_flags
483 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
484 emit => '. imul%M %unop3',
485 outs => [ "EAX", "EDX", "M" ],
486 ins => [ "base", "index", "val_high", "val_low", "mem" ],
487 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
490 modified_flags => $status_flags
494 # we should not rematrialize this node. It produces 2 results and has
495 # very strict constrains
497 cmp_attr => "return 1;",
498 outs => [ "EAX", "EDX", "M" ],
504 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
505 ins => [ "base", "index", "left", "right", "mem" ],
506 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
507 emit => '. and%M %binop',
510 modified_flags => $status_flags
515 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
516 emit => '. and%M %SI2, %AM',
519 modified_flags => $status_flags
524 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
525 ins => [ "base", "index", "left", "right", "mem" ],
526 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
527 emit => '. or%M %binop',
530 modified_flags => $status_flags
535 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
536 ins => [ "base", "index", "val", "mem" ],
537 emit => '. or%M %SI2, %AM',
540 modified_flags => $status_flags
545 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
546 ins => [ "base", "index", "left", "right", "mem" ],
547 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
548 emit => '. xor%M %binop',
551 modified_flags => $status_flags
556 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
557 ins => [ "base", "index", "val", "mem" ],
558 emit => '. xor%M %SI2, %AM',
561 modified_flags => $status_flags
566 cmp_attr => "return 1;",
568 modified_flags => $status_flags
571 # not commutative operations
575 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
576 ins => [ "base", "index", "left", "right", "mem" ],
577 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
578 emit => '. sub%M %binop',
581 modified_flags => $status_flags
586 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
587 ins => [ "base", "index", "val", "mem" ],
588 emit => '. sub%M %SI2, %AM',
591 modified_flags => $status_flags
595 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
596 ins => [ "base", "index", "left", "right", "mem" ],
597 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
598 emit => '. sbb%M %binop',
601 modified_flags => $status_flags
607 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
614 outs => [ "low_res", "high_res" ],
616 modified_flags => $status_flags
621 cmp_attr => "return 1;",
626 cmp_attr => "return 1;",
632 state => "exc_pinned",
633 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ],
634 out => [ "eax", "edx", "none" ] },
635 ins => [ "base", "index", "left_low", "left_high", "right", "mem" ],
636 outs => [ "div_res", "mod_res", "M" ],
637 attr => "ia32_op_flavour_t dm_flav",
639 "attr->data.op_flav = dm_flav;".
640 "set_ia32_am_support(res, ia32_am_Full, ia32_am_ternary);",
641 emit => ". idiv%M %unop4",
644 modified_flags => $status_flags
649 state => "exc_pinned",
650 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ],
651 out => [ "eax", "edx", "none" ] },
652 ins => [ "base", "index", "left_low", "left_high", "right", "mem" ],
653 outs => [ "div_res", "mod_res", "M" ],
654 attr => "ia32_op_flavour_t dm_flav",
656 "attr->data.op_flav = dm_flav;".
657 "set_ia32_am_support(res, ia32_am_Full, ia32_am_ternary);",
658 emit => ". div%M %unop4",
661 modified_flags => $status_flags
666 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
667 ins => [ "left", "right" ],
668 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
669 emit => '. shl %SB1, %S0',
672 modified_flags => $status_flags
677 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
678 ins => [ "base", "index", "count", "mem" ],
679 emit => '. shl%M %SI2, %AM',
682 modified_flags => $status_flags
686 cmp_attr => "return 1;",
687 # value, cnt, dependency
692 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
694 # Out requirements is: different from all in
695 # This is because, out must be different from LowPart and ShiftCount.
696 # We could say "!ecx !in_r4" but it can occur, that all values live through
697 # this Shift and the only value dying is the ShiftCount. Then there would be a
698 # register missing, as result must not be ecx and all other registers are
699 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
700 # (and probably never will). So we create artificial interferences of the result
701 # with all inputs, so the spiller can always assure a free register.
702 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
705 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
706 ins => [ "left_high", "left_low", "right" ],
707 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);",
708 emit => '. shld%M %SB2, %S1, %S0',
712 modified_flags => $status_flags
716 cmp_attr => "return 1;",
722 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
723 ins => [ "val", "count" ],
724 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
725 emit => '. shr %SB1, %S0',
728 modified_flags => $status_flags
733 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
734 ins => [ "base", "index", "count", "mem" ],
735 emit => '. shr%M %SI2, %AM',
738 modified_flags => $status_flags
742 cmp_attr => "return 1;",
743 # value, cnt, dependency
748 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
750 # Out requirements is: different from all in
751 # This is because, out must be different from LowPart and ShiftCount.
752 # We could say "!ecx !in_r4" but it can occur, that all values live through
753 # this Shift and the only value dying is the ShiftCount. Then there would be a
754 # register missing, as result must not be ecx and all other registers are
755 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
756 # (and probably never will). So we create artificial interferences of the result
757 # with all inputs, so the spiller can always assure a free register.
758 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
761 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
762 ins => [ "left_high", "left_low", "right" ],
763 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);",
764 emit => '. shrd%M %SB2, %S1, %S0',
768 modified_flags => $status_flags
772 cmp_attr => "return 1;",
778 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
779 ins => [ "val", "count" ],
780 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
781 emit => '. sar %SB1, %S0',
784 modified_flags => $status_flags
789 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
790 ins => [ "base", "index", "count", "mem" ],
791 emit => '. sar%M %SI2, %AM',
794 modified_flags => $status_flags
798 cmp_attr => "return 1;",
804 cmp_attr => "return 1;",
805 # value, cnt, dependency
811 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
812 ins => [ "val", "count" ],
813 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
814 emit => '. ror %SB1, %S0',
817 modified_flags => $status_flags
822 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
823 ins => [ "base", "index", "count", "mem" ],
824 emit => '. ror%M %SI2, %AM',
827 modified_flags => $status_flags
832 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
833 ins => [ "val", "count" ],
834 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
835 emit => '. rol %SB1, %S0',
838 modified_flags => $status_flags
843 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
844 ins => [ "base", "index", "count", "mem" ],
845 emit => '. rol%M %SI2, %AM',
848 modified_flags => $status_flags
855 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
858 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
861 modified_flags => $status_flags
866 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
867 ins => [ "base", "index", "mem" ],
868 emit => '. neg%M %AM',
871 modified_flags => $status_flags
876 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
883 outs => [ "low_res", "high_res" ],
885 modified_flags => $status_flags
890 cmp_attr => "return 1;",
896 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
897 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
901 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
906 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
907 ins => [ "base", "index", "mem" ],
908 emit => '. inc%M %AM',
911 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
916 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
917 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
921 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
926 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
927 ins => [ "base", "index", "mem" ],
928 emit => '. dec%M %AM',
931 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
936 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
938 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
947 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
948 ins => [ "base", "index", "mem" ],
949 emit => '. not%M %AM',
952 modified_flags => [],
960 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
961 out => [ "none", "none"] },
962 ins => [ "base", "index", "left", "right", "mem" ],
963 outs => [ "false", "true" ],
966 "attr->pn_code = pnc;".
967 "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
969 units => [ "BRANCH" ],
975 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
977 out => [ "none", "none"] },
978 ins => [ "base", "index", "left", "right", "mem" ],
979 outs => [ "false", "true" ],
982 "attr->pn_code = pnc;".
983 "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
985 units => [ "BRANCH" ],
991 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
992 out => [ "none", "none" ] },
993 ins => [ "base", "index", "left", "right", "mem" ],
994 outs => [ "false", "true" ],
997 "attr->pn_code = pnc;".
998 "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1000 units => [ "BRANCH" ],
1005 op_flags => "L|X|Y",
1006 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1008 out => [ "none", "none" ] },
1009 ins => [ "base", "index", "left", "right", "mem" ],
1010 outs => [ "false", "true" ],
1013 "attr->pn_code = pnc;".
1014 "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1016 units => [ "BRANCH" ],
1021 op_flags => "L|X|Y",
1022 reg_req => { in => [ "gp" ], out => [ "none" ] },
1024 units => [ "BRANCH" ],
1031 reg_req => { in => [ "gp" ] },
1032 emit => '. jmp *%S0',
1033 units => [ "BRANCH" ],
1035 modified_flags => []
1041 reg_req => { out => [ "gp" ] },
1043 attr => "ir_entity *symconst, int symconst_sign, long offset",
1044 attr_type => "ia32_immediate_attr_t",
1052 reg_req => { out => [ "gp_UKNWN" ] },
1062 reg_req => { out => [ "vfp_UKNWN" ] },
1066 attr_type => "ia32_x87_attr_t",
1073 reg_req => { out => [ "xmm_UKNWN" ] },
1083 reg_req => { out => [ "gp_NOREG" ] },
1093 reg_req => { out => [ "vfp_NOREG" ] },
1097 attr_type => "ia32_x87_attr_t",
1104 reg_req => { out => [ "xmm_NOREG" ] },
1114 reg_req => { out => [ "fp_cw" ] },
1118 modified_flags => $fpcw_flags
1124 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
1125 ins => [ "base", "index", "mem" ],
1127 emit => ". fldcw %AM",
1130 modified_flags => $fpcw_flags
1136 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
1137 ins => [ "base", "index", "fpcw", "mem" ],
1139 emit => ". fnstcw %AM",
1145 # we should not rematrialize this node. It produces 2 results and has
1146 # very strict constrains
1147 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
1148 ins => [ "val", "globbered" ],
1156 # Note that we add additional latency values depending on address mode, so a
1157 # lateny of 0 for load is correct
1161 state => "exc_pinned",
1162 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
1163 ins => [ "base", "index", "mem" ],
1164 outs => [ "res", "M" ],
1166 emit => ". mov%SE%ME%.l %AM, %D0",
1172 cmp_attr => "return 1;",
1173 outs => [ "res", "M" ],
1179 cmp_attr => "return 1;",
1180 state => "exc_pinned",
1187 state => "exc_pinned",
1188 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
1189 ins => [ "base", "index", "val", "mem" ],
1190 emit => '. mov%M %SI2, %AM',
1198 state => "exc_pinned",
1199 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
1200 emit => '. mov%M %SB2, %AM',
1208 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1209 ins => [ "base", "index" ],
1210 emit => '. leal %AM, %D0',
1214 modified_flags => [],
1218 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
1219 emit => '. push%M %unop2',
1220 ins => [ "base", "index", "val", "stack", "mem" ],
1221 outs => [ "stack:I|S", "M" ],
1222 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1225 modified_flags => [],
1229 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
1230 emit => '. pop%M %DAM1',
1231 outs => [ "stack:I|S", "res", "M" ],
1232 ins => [ "base", "index", "stack", "mem" ],
1233 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
1234 latency => 3, # Pop is more expensive than Push on Athlon
1236 modified_flags => [],
1240 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1242 outs => [ "frame:I", "stack:I|S", "M" ],
1248 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1250 outs => [ "frame:I", "stack:I|S" ],
1258 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1259 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1260 emit => '. addl %binop',
1261 outs => [ "stack:S", "M" ],
1263 modified_flags => $status_flags
1269 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "gp", "none" ] },
1270 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1271 emit => ". subl %binop\n".
1272 ". movl %%esp, %D1",
1273 outs => [ "stack:I|S", "addr", "M" ],
1275 modified_flags => $status_flags
1280 reg_req => { out => [ "gp" ] },
1284 # the int instruction
1286 reg_req => { in => [ "gp" ], out => [ "none" ] },
1288 emit => '. int %SI0',
1290 cmp_attr => "return 1;",
1294 #-----------------------------------------------------------------------------#
1295 # _____ _____ ______ __ _ _ _ #
1296 # / ____/ ____| ____| / _| | | | | | #
1297 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1298 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1299 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1300 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1301 #-----------------------------------------------------------------------------#
1305 reg_req => { out => [ "xmm" ] },
1306 emit => '. xorp%XSD %D1, %D1',
1312 # commutative operations
1316 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1317 emit => '. add%XXM %binop',
1325 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1326 emit => '. mul%XXM %binop',
1334 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1335 emit => '. max%XXM %binop',
1343 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1344 emit => '. min%XXM %binop',
1352 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1353 emit => '. andp%XSD %binop',
1361 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1362 emit => '. orp%XSD %binop',
1369 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1370 emit => '. xorp%XSD %binop',
1376 # not commutative operations
1380 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1381 emit => '. andnp%XSD %binop',
1389 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1390 emit => '. sub%XXM %binop',
1398 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1399 outs => [ "res", "M" ],
1400 emit => '. div%XXM %binop',
1409 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1417 op_flags => "L|X|Y",
1418 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1419 ins => [ "base", "index", "left", "right", "mem" ],
1420 outs => [ "false", "true" ],
1422 init_attr => "attr->pn_code = pnc;",
1431 state => "exc_pinned",
1432 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1433 emit => '. mov%XXM %AM, %D0',
1434 attr => "ir_mode *load_mode",
1435 init_attr => "attr->ls_mode = load_mode;",
1436 outs => [ "res", "M" ],
1443 state => "exc_pinned",
1444 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1445 emit => '. mov%XXM %SI2, %AM',
1453 state => "exc_pinned",
1454 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1455 ins => [ "base", "index", "val", "mem" ],
1456 emit => '. mov%XXM %S2, %AM',
1464 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1465 emit => '. cvtsi2ss %D0, %AM',
1473 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1474 emit => '. cvtsi2sd %unop2',
1483 cmp_attr => "return 1;",
1489 cmp_attr => "return 1;",
1498 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1499 outs => [ "DST", "SRC", "CNT", "M" ],
1501 modified_flags => [ "DF" ]
1507 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1508 outs => [ "DST", "SRC", "M" ],
1510 modified_flags => [ "DF" ]
1516 state => "exc_pinned",
1517 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1519 ins => [ "base", "index", "val", "mem" ],
1520 attr => "ir_mode *smaller_mode",
1521 init_attr => "attr->ls_mode = smaller_mode;",
1523 modified_flags => $status_flags
1527 state => "exc_pinned",
1528 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1529 ins => [ "base", "index", "val", "mem" ],
1531 attr => "ir_mode *smaller_mode",
1532 init_attr => "attr->ls_mode = smaller_mode;",
1534 modified_flags => $status_flags
1538 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1545 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1552 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1560 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1561 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1562 attr => "pn_Cmp pn_code",
1563 init_attr => "attr->pn_code = pn_code;",
1571 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1572 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1573 attr => "pn_Cmp pn_code",
1574 init_attr => "attr->pn_code = pn_code;",
1582 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1583 out => [ "in_r7" ] },
1584 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1586 attr => "pn_Cmp pn_code",
1587 init_attr => "attr->pn_code = pn_code;",
1595 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1596 out => [ "in_r7" ] },
1597 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1599 attr => "pn_Cmp pn_code",
1600 init_attr => "attr->pn_code = pn_code;",
1608 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1616 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "gp", "gp" ],
1617 out => [ "in_r7" ] },
1618 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1621 units => [ "VFP", "GP" ],
1623 attr_type => "ia32_x87_attr_t",
1628 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1629 out => [ "eax ebx ecx edx" ] },
1630 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1631 attr => "pn_Cmp pn_code",
1632 init_attr => "attr->pn_code = pn_code;",
1640 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1642 out => [ "eax ebx ecx edx" ] },
1643 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1644 attr => "pn_Cmp pn_code",
1645 init_attr => "attr->pn_code = pn_code;",
1653 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1654 out => [ "eax ebx ecx edx" ] },
1655 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1656 attr => "pn_Cmp pn_code",
1657 init_attr => "attr->pn_code = pn_code;",
1665 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1667 out => [ "eax ebx ecx edx" ] },
1668 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1669 attr => "pn_Cmp pn_code",
1670 init_attr => "attr->pn_code = pn_code;",
1678 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1686 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1690 attr_type => "ia32_x87_attr_t",
1695 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1699 attr_type => "ia32_x87_attr_t",
1702 #----------------------------------------------------------#
1704 # (_) | | | | / _| | | | #
1705 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1706 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1707 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1708 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1710 # _ __ ___ __| | ___ ___ #
1711 # | '_ \ / _ \ / _` |/ _ \/ __| #
1712 # | | | | (_) | (_| | __/\__ \ #
1713 # |_| |_|\___/ \__,_|\___||___/ #
1714 #----------------------------------------------------------#
1718 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1719 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1723 attr_type => "ia32_x87_attr_t",
1728 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1729 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1733 attr_type => "ia32_x87_attr_t",
1738 cmp_attr => "return 1;",
1744 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1745 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1749 attr_type => "ia32_x87_attr_t",
1753 cmp_attr => "return 1;",
1758 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
1759 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1760 outs => [ "res", "M" ],
1763 attr_type => "ia32_x87_attr_t",
1767 cmp_attr => "return 1;",
1768 outs => [ "res", "M" ],
1773 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1774 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1778 attr_type => "ia32_x87_attr_t",
1782 cmp_attr => "return 1;",
1788 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1793 attr_type => "ia32_x87_attr_t",
1798 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1803 attr_type => "ia32_x87_attr_t",
1806 # virtual Load and Store
1810 state => "exc_pinned",
1811 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1812 ins => [ "base", "index", "mem" ],
1813 outs => [ "res", "M" ],
1814 attr => "ir_mode *load_mode",
1815 init_attr => "attr->attr.ls_mode = load_mode;",
1818 attr_type => "ia32_x87_attr_t",
1823 state => "exc_pinned",
1824 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1825 ins => [ "base", "index", "val", "mem" ],
1826 attr => "ir_mode *store_mode",
1827 init_attr => "attr->attr.ls_mode = store_mode;",
1831 attr_type => "ia32_x87_attr_t",
1837 state => "exc_pinned",
1838 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1839 outs => [ "res", "M" ],
1840 ins => [ "base", "index", "mem" ],
1843 attr_type => "ia32_x87_attr_t",
1847 cmp_attr => "return 1;",
1848 outs => [ "res", "M" ],
1853 state => "exc_pinned",
1854 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1855 ins => [ "base", "index", "val", "fpcw", "mem" ],
1859 attr_type => "ia32_x87_attr_t",
1863 cmp_attr => "return 1;",
1864 state => "exc_pinned",
1874 reg_req => { out => [ "vfp" ] },
1878 attr_type => "ia32_x87_attr_t",
1883 reg_req => { out => [ "vfp" ] },
1887 attr_type => "ia32_x87_attr_t",
1892 reg_req => { out => [ "vfp" ] },
1896 attr_type => "ia32_x87_attr_t",
1901 reg_req => { out => [ "vfp" ] },
1905 attr_type => "ia32_x87_attr_t",
1910 reg_req => { out => [ "vfp" ] },
1914 attr_type => "ia32_x87_attr_t",
1919 reg_req => { out => [ "vfp" ] },
1923 attr_type => "ia32_x87_attr_t",
1928 reg_req => { out => [ "vfp" ] },
1932 attr_type => "ia32_x87_attr_t",
1939 op_flags => "L|X|Y",
1940 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1941 ins => [ "left", "right" ],
1942 outs => [ "false", "true", "temp_reg_eax" ],
1944 init_attr => "attr->attr.pn_code = pnc;",
1947 attr_type => "ia32_x87_attr_t",
1950 #------------------------------------------------------------------------#
1951 # ___ _____ __ _ _ _ #
1952 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1953 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1954 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1955 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1956 #------------------------------------------------------------------------#
1958 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1959 # are swapped, we work this around in the emitter...
1963 rd_constructor => "NONE",
1965 emit => '. fadd%XM %x87_binop',
1966 attr_type => "ia32_x87_attr_t",
1971 rd_constructor => "NONE",
1973 emit => '. faddp%XM %x87_binop',
1974 attr_type => "ia32_x87_attr_t",
1979 rd_constructor => "NONE",
1981 emit => '. fmul%XM %x87_binop',
1982 attr_type => "ia32_x87_attr_t",
1987 rd_constructor => "NONE",
1989 emit => '. fmulp%XM %x87_binop',,
1990 attr_type => "ia32_x87_attr_t",
1995 rd_constructor => "NONE",
1997 emit => '. fsub%XM %x87_binop',
1998 attr_type => "ia32_x87_attr_t",
2003 rd_constructor => "NONE",
2005 # see note about gas bugs
2006 emit => '. fsubrp%XM %x87_binop',
2007 attr_type => "ia32_x87_attr_t",
2012 rd_constructor => "NONE",
2015 emit => '. fsubr%XM %x87_binop',
2016 attr_type => "ia32_x87_attr_t",
2021 rd_constructor => "NONE",
2024 # see note about gas bugs
2025 emit => '. fsubp%XM %x87_binop',
2026 attr_type => "ia32_x87_attr_t",
2031 rd_constructor => "NONE",
2034 attr_type => "ia32_x87_attr_t",
2037 # this node is just here, to keep the simulator running
2038 # we can omit this when a fprem simulation function exists
2041 rd_constructor => "NONE",
2044 attr_type => "ia32_x87_attr_t",
2049 rd_constructor => "NONE",
2051 emit => '. fdiv%XM %x87_binop',
2052 attr_type => "ia32_x87_attr_t",
2057 rd_constructor => "NONE",
2059 # see note about gas bugs
2060 emit => '. fdivrp%XM %x87_binop',
2061 attr_type => "ia32_x87_attr_t",
2066 rd_constructor => "NONE",
2068 emit => '. fdivr%XM %x87_binop',
2069 attr_type => "ia32_x87_attr_t",
2074 rd_constructor => "NONE",
2076 # see note about gas bugs
2077 emit => '. fdivp%XM %x87_binop',
2078 attr_type => "ia32_x87_attr_t",
2083 rd_constructor => "NONE",
2086 attr_type => "ia32_x87_attr_t",
2091 rd_constructor => "NONE",
2094 attr_type => "ia32_x87_attr_t",
2097 # x87 Load and Store
2100 rd_constructor => "NONE",
2101 op_flags => "R|L|F",
2102 state => "exc_pinned",
2104 emit => '. fld%XM %AM',
2105 attr_type => "ia32_x87_attr_t",
2109 rd_constructor => "NONE",
2110 op_flags => "R|L|F",
2111 state => "exc_pinned",
2113 emit => '. fst%XM %AM',
2115 attr_type => "ia32_x87_attr_t",
2119 rd_constructor => "NONE",
2120 op_flags => "R|L|F",
2121 state => "exc_pinned",
2123 emit => '. fstp%XM %AM',
2125 attr_type => "ia32_x87_attr_t",
2132 rd_constructor => "NONE",
2134 emit => '. fild%M %AM',
2135 attr_type => "ia32_x87_attr_t",
2140 state => "exc_pinned",
2141 rd_constructor => "NONE",
2143 emit => '. fist%M %AM',
2145 attr_type => "ia32_x87_attr_t",
2150 state => "exc_pinned",
2151 rd_constructor => "NONE",
2153 emit => '. fistp%M %AM',
2155 attr_type => "ia32_x87_attr_t",
2161 op_flags => "R|c|K",
2165 attr_type => "ia32_x87_attr_t",
2169 op_flags => "R|c|K",
2173 attr_type => "ia32_x87_attr_t",
2177 op_flags => "R|c|K",
2181 attr_type => "ia32_x87_attr_t",
2185 op_flags => "R|c|K",
2189 attr_type => "ia32_x87_attr_t",
2193 op_flags => "R|c|K",
2197 attr_type => "ia32_x87_attr_t",
2201 op_flags => "R|c|K",
2204 emit => '. fldll2t',
2205 attr_type => "ia32_x87_attr_t",
2209 op_flags => "R|c|K",
2213 attr_type => "ia32_x87_attr_t",
2217 # Note that it is NEVER allowed to do CSE on these nodes
2218 # Moreover, note the virtual register requierements!
2223 cmp_attr => "return 1;",
2224 emit => '. fxch %X0',
2225 attr_type => "ia32_x87_attr_t",
2231 cmp_attr => "return 1;",
2232 emit => '. fld %X0',
2233 attr_type => "ia32_x87_attr_t",
2238 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2239 cmp_attr => "return 1;",
2240 emit => '. fld %X0',
2241 attr_type => "ia32_x87_attr_t",
2247 cmp_attr => "return 1;",
2248 emit => '. fstp %X0',
2249 attr_type => "ia32_x87_attr_t",
2255 op_flags => "L|X|Y",
2257 attr_type => "ia32_x87_attr_t",
2261 op_flags => "L|X|Y",
2263 attr_type => "ia32_x87_attr_t",
2267 op_flags => "L|X|Y",
2269 attr_type => "ia32_x87_attr_t",
2273 op_flags => "L|X|Y",
2275 attr_type => "ia32_x87_attr_t",
2279 op_flags => "L|X|Y",
2281 attr_type => "ia32_x87_attr_t",
2285 op_flags => "L|X|Y",
2287 attr_type => "ia32_x87_attr_t",
2291 # -------------------------------------------------------------------------------- #
2292 # ____ ____ _____ _ _ #
2293 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2294 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2295 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2296 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2298 # -------------------------------------------------------------------------------- #
2301 # Spilling and reloading of SSE registers, hardcoded, not generated #
2305 state => "exc_pinned",
2306 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2307 emit => '. movdqu %D0, %AM',
2308 outs => [ "res", "M" ],
2314 state => "exc_pinned",
2315 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2316 emit => '. movdqu %binop',
2323 # Include the generated SIMD node specification written by the SIMD optimization
2324 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2325 unless ($return = do $my_script_name) {
2326 warn "couldn't parse $my_script_name: $@" if $@;
2327 warn "couldn't do $my_script_name: $!" unless defined $return;
2328 warn "couldn't run $my_script_name" unless $return;