3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
38 # ... # (all nodes you need to describe)
40 # ); # close the %nodes initializer
42 # op_flags: flags for the operation, OPTIONAL (default is "N")
43 # the op_flags correspond to the firm irop_flags:
46 # C irop_flag_commutative
47 # X irop_flag_cfopcode
48 # I irop_flag_ip_cfopcode
51 # H irop_flag_highlevel
52 # c irop_flag_constlike
55 # irn_flags: special node flags, OPTIONAL (default is 0)
56 # following irn_flags are supported:
59 # I ignore for register allocation
60 # S modifies stack pointer
62 # state: state of the operation, OPTIONAL (default is "floats")
64 # arity: arity of the operation, MUST NOT BE OMITTED
66 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
67 # are always the first 3 arguments and are always autmatically
69 # If this key is missing the following arguments will be created:
70 # for i = 1 .. arity: ir_node *op_i
73 # outs: if a node defines more than one output, the names of the projections
74 # nodes having outs having automatically the mode mode_T
75 # One can also annotate some flags for each out, additional to irn_flags.
76 # They are separated from name with a colon ':', and concatenated by pipe '|'
77 # Only I and S are available at the moment (same meaning as in irn_flags).
78 # example: [ "frame:I", "stack:I|S", "M" ]
80 # comment: OPTIONAL comment for the node constructor
82 # rd_constructor: for every operation there will be a
83 # new_rd_<arch>_<op-name> function with the arguments from above
84 # which creates the ir_node corresponding to the defined operation
85 # you can either put the complete source code of this function here
87 # This key is OPTIONAL. If omitted, the following constructor will
89 # if (!op_<arch>_<op-name>) assert(0);
93 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
96 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
98 # latency: the latency of the operation, default is 1
102 # 0 - no special type
103 # 1 - caller save (register must be saved by the caller of a function)
104 # 2 - callee save (register must be saved by the called function)
105 # 4 - ignore (do not assign this register)
106 # 8 - emitter can choose an arbitrary register of this class
107 # 16 - the register is a virtual one
108 # 32 - register represents a state
109 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
112 { name => "eax", type => 1 },
113 { name => "edx", type => 1 },
114 { name => "ebx", type => 2 },
115 { name => "ecx", type => 1 },
116 { name => "esi", type => 2 },
117 { name => "edi", type => 2 },
118 { name => "ebp", type => 2 },
119 { name => "esp", type => 4 },
120 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
121 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
122 { mode => "mode_Iu" }
125 { name => "mm0", type => 4 },
126 { name => "mm1", type => 4 },
127 { name => "mm2", type => 4 },
128 { name => "mm3", type => 4 },
129 { name => "mm4", type => 4 },
130 { name => "mm5", type => 4 },
131 { name => "mm6", type => 4 },
132 { name => "mm7", type => 4 },
136 { name => "xmm0", type => 1 },
137 { name => "xmm1", type => 1 },
138 { name => "xmm2", type => 1 },
139 { name => "xmm3", type => 1 },
140 { name => "xmm4", type => 1 },
141 { name => "xmm5", type => 1 },
142 { name => "xmm6", type => 1 },
143 { name => "xmm7", type => 1 },
144 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
145 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
149 { name => "vf0", type => 1 | 16 },
150 { name => "vf1", type => 1 | 16 },
151 { name => "vf2", type => 1 | 16 },
152 { name => "vf3", type => 1 | 16 },
153 { name => "vf4", type => 1 | 16 },
154 { name => "vf5", type => 1 | 16 },
155 { name => "vf6", type => 1 | 16 },
156 { name => "vf7", type => 1 | 16 },
157 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
158 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
162 { name => "st0", realname => "st", type => 4 },
163 { name => "st1", realname => "st(1)", type => 4 },
164 { name => "st2", realname => "st(2)", type => 4 },
165 { name => "st3", realname => "st(3)", type => 4 },
166 { name => "st4", realname => "st(4)", type => 4 },
167 { name => "st5", realname => "st(5)", type => 4 },
168 { name => "st6", realname => "st(6)", type => 4 },
169 { name => "st7", realname => "st(7)", type => 4 },
172 fp_cw => [ # the floating point control word
173 { name => "fpcw", type => 4 | 32},
174 { mode => "mode_fpcw" }
177 { name => "eflags", type => 4 },
178 { mode => "mode_Iu" }
181 { name => "fpsw", type => 4 },
182 { mode => "mode_Hu" }
187 CF => { reg => "eflags", bit => 0 },
188 PF => { reg => "eflags", bit => 2 },
189 AF => { reg => "eflags", bit => 4 },
190 ZF => { reg => "eflags", bit => 6 },
191 SF => { reg => "eflags", bit => 7 },
192 TF => { reg => "eflags", bit => 8 },
193 IF => { reg => "eflags", bit => 9 },
194 DF => { reg => "eflags", bit => 10 },
195 OF => { reg => "eflags", bit => 11 },
196 IOPL0 => { reg => "eflags", bit => 12 },
197 IOPL1 => { reg => "eflags", bit => 13 },
198 NT => { reg => "eflags", bit => 14 },
199 RF => { reg => "eflags", bit => 16 },
200 VM => { reg => "eflags", bit => 17 },
201 AC => { reg => "eflags", bit => 18 },
202 VIF => { reg => "eflags", bit => 19 },
203 VIP => { reg => "eflags", bit => 20 },
204 ID => { reg => "eflags", bit => 21 },
206 FP_IE => { reg => "fpsw", bit => 0 },
207 FP_DE => { reg => "fpsw", bit => 1 },
208 FP_ZE => { reg => "fpsw", bit => 2 },
209 FP_OE => { reg => "fpsw", bit => 3 },
210 FP_UE => { reg => "fpsw", bit => 4 },
211 FP_PE => { reg => "fpsw", bit => 5 },
212 FP_SF => { reg => "fpsw", bit => 6 },
213 FP_ES => { reg => "fpsw", bit => 7 },
214 FP_C0 => { reg => "fpsw", bit => 8 },
215 FP_C1 => { reg => "fpsw", bit => 9 },
216 FP_C2 => { reg => "fpsw", bit => 10 },
217 FP_TOP0 => { reg => "fpsw", bit => 11 },
218 FP_TOP1 => { reg => "fpsw", bit => 12 },
219 FP_TOP2 => { reg => "fpsw", bit => 13 },
220 FP_C3 => { reg => "fpsw", bit => 14 },
221 FP_B => { reg => "fpsw", bit => 15 },
223 FP_IM => { reg => "fpcw", bit => 0 },
224 FP_DM => { reg => "fpcw", bit => 1 },
225 FP_ZM => { reg => "fpcw", bit => 2 },
226 FP_OM => { reg => "fpcw", bit => 3 },
227 FP_UM => { reg => "fpcw", bit => 4 },
228 FP_PM => { reg => "fpcw", bit => 5 },
229 FP_PC0 => { reg => "fpcw", bit => 8 },
230 FP_PC1 => { reg => "fpcw", bit => 9 },
231 FP_RC0 => { reg => "fpcw", bit => 10 },
232 FP_RC1 => { reg => "fpcw", bit => 11 },
233 FP_X => { reg => "fpcw", bit => 12 }
237 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
238 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
239 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
240 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
245 bundels_per_cycle => 1
249 S0 => "${arch}_emit_source_register(env, node, 0);",
250 S1 => "${arch}_emit_source_register(env, node, 1);",
251 S2 => "${arch}_emit_source_register(env, node, 2);",
252 S3 => "${arch}_emit_source_register(env, node, 3);",
253 S4 => "${arch}_emit_source_register(env, node, 4);",
254 S5 => "${arch}_emit_source_register(env, node, 5);",
255 D0 => "${arch}_emit_dest_register(env, node, 0);",
256 D1 => "${arch}_emit_dest_register(env, node, 1);",
257 D2 => "${arch}_emit_dest_register(env, node, 2);",
258 D3 => "${arch}_emit_dest_register(env, node, 3);",
259 D4 => "${arch}_emit_dest_register(env, node, 4);",
260 D5 => "${arch}_emit_dest_register(env, node, 5);",
261 X0 => "${arch}_emit_x87_name(env, node, 0);",
262 X1 => "${arch}_emit_x87_name(env, node, 1);",
263 X2 => "${arch}_emit_x87_name(env, node, 2);",
264 C => "${arch}_emit_immediate(env, node);",
265 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
266 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
267 ia32_emit_mode_suffix(env, node);",
268 M => "${arch}_emit_mode_suffix(env, node);",
269 XM => "${arch}_emit_x87_mode_suffix(env, node);",
270 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
271 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
272 AM => "${arch}_emit_am(env, node);",
273 unop => "${arch}_emit_unop(env, node);",
274 binop => "${arch}_emit_binop(env, node);",
275 x87_binop => "${arch}_emit_x87_binop(env, node);",
278 #--------------------------------------------------#
281 # _ __ _____ __ _ _ __ ___ _ __ ___ #
282 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
283 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
284 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
287 #--------------------------------------------------#
289 $default_cmp_attr = "return ia32_compare_attr(attr_a, attr_b);";
290 $default_attr_type = "ia32_attr_t";
293 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
295 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
296 "\tinit_ia32_x87_attributes(res);",
302 $mode_xmm = "mode_E";
303 $mode_gp = "mode_Iu";
304 $mode_fpcw = "mode_fpcw";
305 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
306 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
307 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
315 reg_req => { out => [ "gp_NOREG" ] },
322 out_arity => "variable",
325 #-----------------------------------------------------------------#
328 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
329 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
330 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
331 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
334 #-----------------------------------------------------------------#
336 # commutative operations
339 # All nodes supporting Addressmode have 5 INs:
340 # 1 - base r1 == NoReg in case of no AM or no base
341 # 2 - index r2 == NoReg in case of no AM or no index
342 # 3 - op1 r3 == always present
343 # 4 - op2 r4 == NoReg in case of immediate operation
344 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
348 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
349 ins => [ "base", "index", "left", "right", "mem" ],
350 emit => '. add%M %binop',
353 modified_flags => $status_flags
357 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
358 emit => '. adc%M %binop',
361 modified_flags => $status_flags
367 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
374 outs => [ "low_res", "high_res" ],
376 modified_flags => $status_flags
382 cmp_attr => "return 1;",
388 cmp_attr => "return 1;",
393 # we should not rematrialize this node. It produces 2 results and has
394 # very strict constrains
395 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
396 emit => '. mul%M %unop',
397 outs => [ "EAX", "EDX", "M" ],
400 modified_flags => $status_flags
404 # we should not rematrialize this node. It produces 2 results and has
405 # very strict constrains
407 cmp_attr => "return 1;",
408 outs => [ "EAX", "EDX", "M" ],
414 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
415 emit => '. imul%M %binop',
419 modified_flags => $status_flags
424 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
425 emit => '. imul%M %unop',
426 outs => [ "EAX", "EDX", "M" ],
429 modified_flags => $status_flags
434 cmp_attr => "return 1;",
440 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
441 emit => '. and%M %binop',
444 modified_flags => $status_flags
449 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
450 emit => '. or%M %binop',
453 modified_flags => $status_flags
458 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
459 emit => '. xor%M %binop',
462 modified_flags => $status_flags
467 cmp_attr => "return 1;",
469 modified_flags => $status_flags
472 # not commutative operations
476 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
477 emit => '. sub%M %binop',
480 modified_flags => $status_flags
484 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
485 emit => '. sbb%M %binop',
488 modified_flags => $status_flags
494 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
501 outs => [ "low_res", "high_res" ],
503 modified_flags => $status_flags
508 cmp_attr => "return 1;",
513 cmp_attr => "return 1;",
519 state => "exc_pinned",
520 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
521 attr => "ia32_op_flavour_t dm_flav",
522 init_attr => "attr->data.op_flav = dm_flav;",
523 emit => ". idiv%M %unop",
524 outs => [ "div_res", "mod_res", "M" ],
527 modified_flags => $status_flags
532 state => "exc_pinned",
533 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
534 attr => "ia32_op_flavour_t dm_flav",
535 init_attr => "attr->data.op_flav = dm_flav;",
536 emit => ". div%M %unop",
537 outs => [ "div_res", "mod_res", "M" ],
540 modified_flags => $status_flags
545 # "in_r3" would be enough as out requirement, but the register allocator
546 # does strange things then and doesn't respect the constraint for in4
547 # if the same value is attached to in3 and in4 (if you have "i << i" in C)
548 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
549 ins => [ "base", "index", "left", "right", "mem" ],
550 emit => '. shl%M %binop',
553 modified_flags => $status_flags
557 cmp_attr => "return 1;",
563 # Out requirements is: different from all in
564 # This is because, out must be different from LowPart and ShiftCount.
565 # We could say "!ecx !in_r4" but it can occur, that all values live through
566 # this Shift and the only value dying is the ShiftCount. Then there would be
567 # a register missing, as result must not be ecx and all other registers are
568 # occupied. What we should write is "!in_r4 !in_r5", but this is not
569 # supported (and probably never will). So we create artificial interferences
570 # of the result with all inputs, so the spiller can always assure a free
572 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
575 if (get_ia32_immop_type(node) == ia32_ImmNone) {
576 if (get_ia32_op_type(node) == ia32_AddrModeD) {
577 . shld%M %%cl, %S3, %AM
579 . shld%M %%cl, %S3, %S2
582 if (get_ia32_op_type(node) == ia32_AddrModeD) {
583 . shld%M %C, %S3, %AM
585 . shld%M %C, %S3, %S2
592 modified_flags => $status_flags
596 cmp_attr => "return 1;",
602 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
603 emit => '. shr%M %binop',
606 modified_flags => $status_flags
610 cmp_attr => "return 1;",
616 # Out requirements is: different from all in
617 # This is because, out must be different from LowPart and ShiftCount.
618 # We could say "!ecx !in_r4" but it can occur, that all values live through
619 # this Shift and the only value dying is the ShiftCount. Then there would be a
620 # register missing, as result must not be ecx and all other registers are
621 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
622 # (and probably never will). So we create artificial interferences of the result
623 # with all inputs, so the spiller can always assure a free register.
624 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
626 if (get_ia32_immop_type(node) == ia32_ImmNone) {
627 if (get_ia32_op_type(node) == ia32_AddrModeD) {
628 . shrd%M %%cl, %S3, %AM
630 . shrd%M %%cl, %S3, %S2
633 if (get_ia32_op_type(node) == ia32_AddrModeD) {
634 . shrd%M %C, %S3, %AM
636 . shrd%M %C, %S3, %S2
643 modified_flags => $status_flags
647 cmp_attr => "return 1;",
653 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
654 emit => '. sar%M %binop',
657 modified_flags => $status_flags
661 cmp_attr => "return 1;",
667 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
668 emit => '. ror%M %binop',
671 modified_flags => $status_flags
676 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
677 emit => '. rol%M %binop',
680 modified_flags => $status_flags
687 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
688 emit => '. neg%M %unop',
691 modified_flags => $status_flags
696 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
703 outs => [ "low_res", "high_res" ],
705 modified_flags => $status_flags
710 cmp_attr => "return 1;",
716 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
717 emit => '. inc%M %unop',
720 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
725 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
726 emit => '. dec%M %unop',
729 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
734 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
735 emit => '. not%M %unop',
746 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none"] },
747 outs => [ "false", "true" ],
749 units => [ "BRANCH" ],
755 reg_req => { in => [ "gp", "gp" ], out => [ "none", "none" ] },
756 outs => [ "false", "true" ],
758 units => [ "BRANCH" ],
764 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none" ] },
765 outs => [ "false", "true" ],
766 units => [ "BRANCH" ],
772 reg_req => { in => [ "gp", "gp" ] },
773 units => [ "BRANCH" ],
779 reg_req => { in => [ "gp" ], out => [ "none" ] },
781 units => [ "BRANCH" ],
787 reg_req => { out => [ "gp" ] },
796 reg_req => { out => [ "gp_UKNWN" ] },
806 reg_req => { out => [ "vfp_UKNWN" ] },
810 attr_type => "ia32_x87_attr_t",
817 reg_req => { out => [ "xmm_UKNWN" ] },
827 reg_req => { out => [ "gp_NOREG" ] },
837 reg_req => { out => [ "vfp_NOREG" ] },
841 attr_type => "ia32_x87_attr_t",
848 reg_req => { out => [ "xmm_NOREG" ] },
858 reg_req => { out => [ "fp_cw" ] },
862 modified_flags => $fpcw_flags
867 state => "exc_pinned",
868 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
870 emit => ". fldcw %AM",
873 modified_flags => $fpcw_flags
878 state => "exc_pinned",
879 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
881 emit => ". fnstcw %AM",
887 # we should not rematrialize this node. It produces 2 results and has
888 # very strict constrains
889 reg_req => { in => [ "gp" ], out => [ "eax in_r1", "edx" ] },
891 outs => [ "EAX", "EDX" ],
899 state => "exc_pinned",
900 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
902 emit => ". mov%SE%ME%.l %AM, %D0",
903 outs => [ "res", "M" ],
909 cmp_attr => "return 1;",
910 outs => [ "res", "M" ],
916 cmp_attr => "return 1;",
917 state => "exc_pinned",
924 state => "exc_pinned",
925 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
926 emit => '. mov%M %binop',
934 state => "exc_pinned",
935 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
936 emit => '. mov%M %binop',
944 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1" ] },
945 emit => '. leal %AM, %D0',
949 modified_flags => [],
953 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
954 emit => '. push%M %unop',
955 outs => [ "stack:I|S", "M" ],
958 modified_flags => [],
962 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
963 emit => '. pop%M %unop',
964 outs => [ "stack:I|S", "res", "M" ],
967 modified_flags => [],
971 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
973 outs => [ "frame:I", "stack:I|S", "M" ],
979 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
981 outs => [ "frame:I", "stack:I|S" ],
988 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
989 emit => '. addl %binop',
990 outs => [ "stack:S", "M" ],
992 modified_flags => $status_flags
997 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
998 emit => '. subl %binop',
999 outs => [ "stack:S", "M" ],
1001 modified_flags => $status_flags
1006 reg_req => { out => [ "gp" ] },
1010 # the int instruction
1012 reg_req => { in => [ "none" ], out => [ "none" ] },
1014 attr => "tarval *tv",
1015 init_attr => "\tset_ia32_Immop_tarval(res, tv);",
1018 cmp_attr => "return 1;",
1022 #-----------------------------------------------------------------------------#
1023 # _____ _____ ______ __ _ _ _ #
1024 # / ____/ ____| ____| / _| | | | | | #
1025 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1026 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1027 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1028 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1029 #-----------------------------------------------------------------------------#
1031 # commutative operations
1035 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1036 emit => '. add%XXM %binop',
1044 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1045 emit => '. mul%XXM %binop',
1053 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1054 emit => '. max%XXM %binop',
1062 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1063 emit => '. min%XXM %binop',
1071 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1072 emit => '. andp%XSD %binop',
1080 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1081 emit => '. orp%XSD %binop',
1088 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1089 emit => '. xorp%XSD %binop',
1095 # not commutative operations
1099 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1100 emit => '. andnp%XSD %binop',
1108 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1109 emit => '. sub%XXM %binop',
1117 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1118 outs => [ "res", "M" ],
1119 emit => '. div%XXM %binop',
1128 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1136 op_flags => "L|X|Y",
1137 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1138 outs => [ "false", "true" ],
1146 reg_req => { out => [ "xmm" ] },
1147 emit => '. mov%XXM %C, %D0',
1157 state => "exc_pinned",
1158 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1159 emit => '. mov%XXM %AM, %D0',
1160 outs => [ "res", "M" ],
1167 state => "exc_pinned",
1168 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1169 emit => '. mov%XXM %binop',
1177 state => "exc_pinned",
1178 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1179 ins => [ "base", "index", "val", "mem" ],
1180 emit => '. mov%XXM %S2, %AM',
1188 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1189 emit => '. cvtsi2ss %D0, %AM',
1197 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1198 emit => '. cvtsi2sd %unop',
1207 cmp_attr => "return 1;",
1213 cmp_attr => "return 1;",
1220 state => "exc_pinned",
1221 reg_req => { in => [ "gp", "gp", "none" ] },
1222 emit => '. fstp%XM %AM',
1231 state => "exc_pinned",
1232 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vf0", "none" ] },
1233 ins => [ "base", "index", "mem" ],
1234 emit => '. fld%XM %AM',
1235 outs => [ "res", "M" ],
1245 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1246 outs => [ "DST", "SRC", "CNT", "M" ],
1248 modified_flags => [ "DF" ]
1254 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1255 outs => [ "DST", "SRC", "M" ],
1257 modified_flags => [ "DF" ]
1263 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1266 modified_flags => $status_flags
1270 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1273 modified_flags => $status_flags
1277 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1284 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1291 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1299 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "in_r4" ] },
1307 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "in_r3" ] },
1315 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1323 reg_req => { in => [ "vfp", "vfp", "gp", "gp" ], out => [ "in_r4" ] },
1327 attr_type => "ia32_x87_attr_t",
1332 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1340 reg_req => { in => [ "gp" ], out => [ "eax ebx ecx edx" ] },
1348 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1356 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1360 attr_type => "ia32_x87_attr_t",
1365 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1369 attr_type => "ia32_x87_attr_t",
1372 #----------------------------------------------------------#
1374 # (_) | | | | / _| | | | #
1375 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1376 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1377 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1378 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1380 # _ __ ___ __| | ___ ___ #
1381 # | '_ \ / _ \ / _` |/ _ \/ __| #
1382 # | | | | (_) | (_| | __/\__ \ #
1383 # |_| |_|\___/ \__,_|\___||___/ #
1384 #----------------------------------------------------------#
1388 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1392 attr_type => "ia32_x87_attr_t",
1397 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1401 attr_type => "ia32_x87_attr_t",
1406 cmp_attr => "return 1;",
1412 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1416 attr_type => "ia32_x87_attr_t",
1420 cmp_attr => "return 1;",
1425 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp", "none" ] },
1426 outs => [ "res", "M" ],
1429 attr_type => "ia32_x87_attr_t",
1433 cmp_attr => "return 1;",
1434 outs => [ "res", "M" ],
1439 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1443 attr_type => "ia32_x87_attr_t",
1447 cmp_attr => "return 1;",
1453 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1457 attr_type => "ia32_x87_attr_t",
1462 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1466 attr_type => "ia32_x87_attr_t",
1471 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1475 attr_type => "ia32_x87_attr_t",
1480 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1484 attr_type => "ia32_x87_attr_t",
1489 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1493 attr_type => "ia32_x87_attr_t",
1496 # virtual Load and Store
1500 state => "exc_pinned",
1501 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1502 outs => [ "res", "M" ],
1505 attr_type => "ia32_x87_attr_t",
1510 state => "exc_pinned",
1511 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1515 attr_type => "ia32_x87_attr_t",
1521 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1522 outs => [ "res", "M" ],
1525 attr_type => "ia32_x87_attr_t",
1529 cmp_attr => "return 1;",
1530 outs => [ "res", "M" ],
1535 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1539 attr_type => "ia32_x87_attr_t",
1543 cmp_attr => "return 1;",
1553 reg_req => { out => [ "vfp" ] },
1557 attr_type => "ia32_x87_attr_t",
1562 reg_req => { out => [ "vfp" ] },
1566 attr_type => "ia32_x87_attr_t",
1571 reg_req => { out => [ "vfp" ] },
1575 attr_type => "ia32_x87_attr_t",
1580 reg_req => { out => [ "vfp" ] },
1584 attr_type => "ia32_x87_attr_t",
1589 reg_req => { out => [ "vfp" ] },
1593 attr_type => "ia32_x87_attr_t",
1598 reg_req => { out => [ "vfp" ] },
1602 attr_type => "ia32_x87_attr_t",
1607 reg_req => { out => [ "vfp" ] },
1611 attr_type => "ia32_x87_attr_t",
1617 reg_req => { out => [ "vfp" ] },
1621 attr_type => "ia32_x87_attr_t",
1628 op_flags => "L|X|Y",
1629 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "none", "none", "eax" ] },
1630 outs => [ "false", "true", "temp_reg_eax" ],
1633 attr_type => "ia32_x87_attr_t",
1636 #------------------------------------------------------------------------#
1637 # ___ _____ __ _ _ _ #
1638 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1639 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1640 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1641 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1642 #------------------------------------------------------------------------#
1644 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1645 # are swapped, we work this around in the emitter...
1649 rd_constructor => "NONE",
1651 emit => '. fadd%XM %x87_binop',
1652 attr_type => "ia32_x87_attr_t",
1657 rd_constructor => "NONE",
1659 emit => '. faddp %x87_binop',
1660 attr_type => "ia32_x87_attr_t",
1665 rd_constructor => "NONE",
1667 emit => '. fmul%XM %x87_binop',
1668 attr_type => "ia32_x87_attr_t",
1673 rd_constructor => "NONE",
1675 emit => '. fmulp %x87_binop',,
1676 attr_type => "ia32_x87_attr_t",
1681 rd_constructor => "NONE",
1683 emit => '. fsub%XM %x87_binop',
1684 attr_type => "ia32_x87_attr_t",
1689 rd_constructor => "NONE",
1691 # see note about gas bugs
1692 emit => '. fsubrp %x87_binop',
1693 attr_type => "ia32_x87_attr_t",
1698 rd_constructor => "NONE",
1701 emit => '. fsubr%XM %x87_binop',
1702 attr_type => "ia32_x87_attr_t",
1707 rd_constructor => "NONE",
1710 # see note about gas bugs
1711 emit => '. fsubp %x87_binop',
1712 attr_type => "ia32_x87_attr_t",
1717 rd_constructor => "NONE",
1720 attr_type => "ia32_x87_attr_t",
1723 # this node is just here, to keep the simulator running
1724 # we can omit this when a fprem simulation function exists
1727 rd_constructor => "NONE",
1730 attr_type => "ia32_x87_attr_t",
1735 rd_constructor => "NONE",
1737 emit => '. fdiv%XM %x87_binop',
1738 attr_type => "ia32_x87_attr_t",
1743 rd_constructor => "NONE",
1745 # see note about gas bugs
1746 emit => '. fdivrp %x87_binop',
1747 attr_type => "ia32_x87_attr_t",
1752 rd_constructor => "NONE",
1754 emit => '. fdivr%XM %x87_binop',
1755 attr_type => "ia32_x87_attr_t",
1760 rd_constructor => "NONE",
1762 # see note about gas bugs
1763 emit => '. fdivp %x87_binop',
1764 attr_type => "ia32_x87_attr_t",
1769 rd_constructor => "NONE",
1772 attr_type => "ia32_x87_attr_t",
1777 rd_constructor => "NONE",
1780 attr_type => "ia32_x87_attr_t",
1785 rd_constructor => "NONE",
1788 attr_type => "ia32_x87_attr_t",
1793 rd_constructor => "NONE",
1796 attr_type => "ia32_x87_attr_t",
1801 rd_constructor => "NONE",
1803 emit => '. fsqrt $',
1804 attr_type => "ia32_x87_attr_t",
1807 # x87 Load and Store
1810 rd_constructor => "NONE",
1811 op_flags => "R|L|F",
1812 state => "exc_pinned",
1814 emit => '. fld%XM %AM',
1815 attr_type => "ia32_x87_attr_t",
1819 rd_constructor => "NONE",
1820 op_flags => "R|L|F",
1821 state => "exc_pinned",
1823 emit => '. fst%XM %AM',
1825 attr_type => "ia32_x87_attr_t",
1829 rd_constructor => "NONE",
1830 op_flags => "R|L|F",
1831 state => "exc_pinned",
1833 emit => '. fstp%XM %AM',
1835 attr_type => "ia32_x87_attr_t",
1842 rd_constructor => "NONE",
1844 emit => '. fild%XM %AM',
1845 attr_type => "ia32_x87_attr_t",
1850 rd_constructor => "NONE",
1852 emit => '. fist%XM %AM',
1854 attr_type => "ia32_x87_attr_t",
1859 rd_constructor => "NONE",
1861 emit => '. fistp%XM %AM',
1863 attr_type => "ia32_x87_attr_t",
1869 op_flags => "R|c|K",
1873 attr_type => "ia32_x87_attr_t",
1877 op_flags => "R|c|K",
1881 attr_type => "ia32_x87_attr_t",
1885 op_flags => "R|c|K",
1889 attr_type => "ia32_x87_attr_t",
1893 op_flags => "R|c|K",
1897 attr_type => "ia32_x87_attr_t",
1901 op_flags => "R|c|K",
1905 attr_type => "ia32_x87_attr_t",
1909 op_flags => "R|c|K",
1912 emit => '. fldll2t',
1913 attr_type => "ia32_x87_attr_t",
1917 op_flags => "R|c|K",
1921 attr_type => "ia32_x87_attr_t",
1925 # Note that it is NEVER allowed to do CSE on these nodes
1926 # Moreover, note the virtual register requierements!
1931 cmp_attr => "return 1;",
1932 emit => '. fxch %X0',
1933 attr_type => "ia32_x87_attr_t",
1939 cmp_attr => "return 1;",
1940 emit => '. fld %X0',
1941 attr_type => "ia32_x87_attr_t",
1946 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1947 cmp_attr => "return 1;",
1948 emit => '. fld %X0',
1949 attr_type => "ia32_x87_attr_t",
1955 cmp_attr => "return 1;",
1956 emit => '. fstp %X0',
1957 attr_type => "ia32_x87_attr_t",
1963 op_flags => "L|X|Y",
1965 attr_type => "ia32_x87_attr_t",
1969 op_flags => "L|X|Y",
1971 attr_type => "ia32_x87_attr_t",
1975 op_flags => "L|X|Y",
1977 attr_type => "ia32_x87_attr_t",
1981 op_flags => "L|X|Y",
1983 attr_type => "ia32_x87_attr_t",
1987 op_flags => "L|X|Y",
1989 attr_type => "ia32_x87_attr_t",
1993 op_flags => "L|X|Y",
1995 attr_type => "ia32_x87_attr_t",
1999 # -------------------------------------------------------------------------------- #
2000 # ____ ____ _____ _ _ #
2001 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2002 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2003 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2004 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2006 # -------------------------------------------------------------------------------- #
2009 # Spilling and reloading of SSE registers, hardcoded, not generated #
2013 state => "exc_pinned",
2014 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2015 emit => '. movdqu %D0, %AM',
2016 outs => [ "res", "M" ],
2022 state => "exc_pinned",
2023 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2024 emit => '. movdqu %binop',
2031 # Include the generated SIMD node specification written by the SIMD optimization
2032 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2033 unless ($return = do $my_script_name) {
2034 warn "couldn't parse $my_script_name: $@" if $@;
2035 warn "couldn't do $my_script_name: $!" unless defined $return;
2036 warn "couldn't run $my_script_name" unless $return;