3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
38 # ... # (all nodes you need to describe)
40 # ); # close the %nodes initializer
42 # op_flags: flags for the operation, OPTIONAL (default is "N")
43 # the op_flags correspond to the firm irop_flags:
46 # C irop_flag_commutative
47 # X irop_flag_cfopcode
48 # I irop_flag_ip_cfopcode
51 # H irop_flag_highlevel
52 # c irop_flag_constlike
55 # irn_flags: special node flags, OPTIONAL (default is 0)
56 # following irn_flags are supported:
59 # I ignore for register allocation
60 # S modifies stack pointer
62 # state: state of the operation, OPTIONAL (default is "floats")
64 # arity: arity of the operation, MUST NOT BE OMITTED
66 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
67 # are always the first 3 arguments and are always autmatically
69 # If this key is missing the following arguments will be created:
70 # for i = 1 .. arity: ir_node *op_i
73 # outs: if a node defines more than one output, the names of the projections
74 # nodes having outs having automatically the mode mode_T
75 # One can also annotate some flags for each out, additional to irn_flags.
76 # They are separated from name with a colon ':', and concatenated by pipe '|'
77 # Only I and S are available at the moment (same meaning as in irn_flags).
78 # example: [ "frame:I", "stack:I|S", "M" ]
80 # comment: OPTIONAL comment for the node constructor
82 # rd_constructor: for every operation there will be a
83 # new_rd_<arch>_<op-name> function with the arguments from above
84 # which creates the ir_node corresponding to the defined operation
85 # you can either put the complete source code of this function here
87 # This key is OPTIONAL. If omitted, the following constructor will
89 # if (!op_<arch>_<op-name>) assert(0);
93 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
96 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
98 # latency: the latency of the operation, default is 1
102 # 0 - no special type
103 # 1 - caller save (register must be saved by the caller of a function)
104 # 2 - callee save (register must be saved by the called function)
105 # 4 - ignore (do not assign this register)
106 # 8 - emitter can choose an arbitrary register of this class
107 # 16 - the register is a virtual one
108 # 32 - register represents a state
109 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
112 { name => "eax", type => 1 },
113 { name => "edx", type => 1 },
114 { name => "ebx", type => 2 },
115 { name => "ecx", type => 1 },
116 { name => "esi", type => 2 },
117 { name => "edi", type => 2 },
118 { name => "ebp", type => 2 },
119 { name => "esp", type => 4 },
120 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
121 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
122 { mode => "mode_Iu" }
125 { name => "xmm0", type => 1 },
126 { name => "xmm1", type => 1 },
127 { name => "xmm2", type => 1 },
128 { name => "xmm3", type => 1 },
129 { name => "xmm4", type => 1 },
130 { name => "xmm5", type => 1 },
131 { name => "xmm6", type => 1 },
132 { name => "xmm7", type => 1 },
133 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
134 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
138 { name => "vf0", type => 1 | 16 },
139 { name => "vf1", type => 1 | 16 },
140 { name => "vf2", type => 1 | 16 },
141 { name => "vf3", type => 1 | 16 },
142 { name => "vf4", type => 1 | 16 },
143 { name => "vf5", type => 1 | 16 },
144 { name => "vf6", type => 1 | 16 },
145 { name => "vf7", type => 1 | 16 },
146 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
147 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
151 { name => "st0", realname => "st", type => 4 },
152 { name => "st1", realname => "st(1)", type => 4 },
153 { name => "st2", realname => "st(2)", type => 4 },
154 { name => "st3", realname => "st(3)", type => 4 },
155 { name => "st4", realname => "st(4)", type => 4 },
156 { name => "st5", realname => "st(5)", type => 4 },
157 { name => "st6", realname => "st(6)", type => 4 },
158 { name => "st7", realname => "st(7)", type => 4 },
161 fp_cw => [ # the floating point control word
162 { name => "fpcw", type => 4 | 32},
163 { mode => "mode_fpcw" }
166 { name => "eflags", type => 4 },
167 { mode => "mode_Iu" }
170 { name => "fpsw", type => 4 },
171 { mode => "mode_Hu" }
176 CF => { reg => "eflags", bit => 0 },
177 PF => { reg => "eflags", bit => 2 },
178 AF => { reg => "eflags", bit => 4 },
179 ZF => { reg => "eflags", bit => 6 },
180 SF => { reg => "eflags", bit => 7 },
181 TF => { reg => "eflags", bit => 8 },
182 IF => { reg => "eflags", bit => 9 },
183 DF => { reg => "eflags", bit => 10 },
184 OF => { reg => "eflags", bit => 11 },
185 IOPL0 => { reg => "eflags", bit => 12 },
186 IOPL1 => { reg => "eflags", bit => 13 },
187 NT => { reg => "eflags", bit => 14 },
188 RF => { reg => "eflags", bit => 16 },
189 VM => { reg => "eflags", bit => 17 },
190 AC => { reg => "eflags", bit => 18 },
191 VIF => { reg => "eflags", bit => 19 },
192 VIP => { reg => "eflags", bit => 20 },
193 ID => { reg => "eflags", bit => 21 },
195 FP_IE => { reg => "fpsw", bit => 0 },
196 FP_DE => { reg => "fpsw", bit => 1 },
197 FP_ZE => { reg => "fpsw", bit => 2 },
198 FP_OE => { reg => "fpsw", bit => 3 },
199 FP_UE => { reg => "fpsw", bit => 4 },
200 FP_PE => { reg => "fpsw", bit => 5 },
201 FP_SF => { reg => "fpsw", bit => 6 },
202 FP_ES => { reg => "fpsw", bit => 7 },
203 FP_C0 => { reg => "fpsw", bit => 8 },
204 FP_C1 => { reg => "fpsw", bit => 9 },
205 FP_C2 => { reg => "fpsw", bit => 10 },
206 FP_TOP0 => { reg => "fpsw", bit => 11 },
207 FP_TOP1 => { reg => "fpsw", bit => 12 },
208 FP_TOP2 => { reg => "fpsw", bit => 13 },
209 FP_C3 => { reg => "fpsw", bit => 14 },
210 FP_B => { reg => "fpsw", bit => 15 },
212 FP_IM => { reg => "fpcw", bit => 0 },
213 FP_DM => { reg => "fpcw", bit => 1 },
214 FP_ZM => { reg => "fpcw", bit => 2 },
215 FP_OM => { reg => "fpcw", bit => 3 },
216 FP_UM => { reg => "fpcw", bit => 4 },
217 FP_PM => { reg => "fpcw", bit => 5 },
218 FP_PC0 => { reg => "fpcw", bit => 8 },
219 FP_PC1 => { reg => "fpcw", bit => 9 },
220 FP_RC0 => { reg => "fpcw", bit => 10 },
221 FP_RC1 => { reg => "fpcw", bit => 11 },
222 FP_X => { reg => "fpcw", bit => 12 }
226 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
227 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
228 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
229 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
234 bundels_per_cycle => 1
238 S0 => "${arch}_emit_source_register(env, node, 0);",
239 S1 => "${arch}_emit_source_register(env, node, 1);",
240 S2 => "${arch}_emit_source_register(env, node, 2);",
241 S3 => "${arch}_emit_source_register(env, node, 3);",
242 S4 => "${arch}_emit_source_register(env, node, 4);",
243 S5 => "${arch}_emit_source_register(env, node, 5);",
244 D0 => "${arch}_emit_dest_register(env, node, 0);",
245 D1 => "${arch}_emit_dest_register(env, node, 1);",
246 D2 => "${arch}_emit_dest_register(env, node, 2);",
247 D3 => "${arch}_emit_dest_register(env, node, 3);",
248 D4 => "${arch}_emit_dest_register(env, node, 4);",
249 D5 => "${arch}_emit_dest_register(env, node, 5);",
250 X0 => "${arch}_emit_x87_name(env, node, 0);",
251 X1 => "${arch}_emit_x87_name(env, node, 1);",
252 X2 => "${arch}_emit_x87_name(env, node, 2);",
253 C => "${arch}_emit_immediate(env, node);",
254 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
255 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
256 ia32_emit_mode_suffix(env, node);",
257 M => "${arch}_emit_mode_suffix(env, node);",
258 XM => "${arch}_emit_x87_mode_suffix(env, node);",
259 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
260 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
261 AM => "${arch}_emit_am(env, node);",
262 unop => "${arch}_emit_unop(env, node);",
263 binop => "${arch}_emit_binop(env, node);",
264 x87_binop => "${arch}_emit_x87_binop(env, node);",
267 #--------------------------------------------------#
270 # _ __ _____ __ _ _ __ ___ _ __ ___ #
271 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
272 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
273 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
276 #--------------------------------------------------#
278 $default_cmp_attr = "return ia32_compare_attr(attr_a, attr_b);";
279 $default_attr_type = "ia32_attr_t";
284 $mode_xmm = "mode_E";
285 $mode_gp = "mode_Iu";
286 $mode_fpcw = "mode_fpcw";
287 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
288 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
289 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
297 reg_req => { out => [ "gp_NOREG" ] },
304 out_arity => "variable",
307 #-----------------------------------------------------------------#
310 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
311 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
312 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
313 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
316 #-----------------------------------------------------------------#
318 # commutative operations
321 # All nodes supporting Addressmode have 5 INs:
322 # 1 - base r1 == NoReg in case of no AM or no base
323 # 2 - index r2 == NoReg in case of no AM or no index
324 # 3 - op1 r3 == always present
325 # 4 - op2 r4 == NoReg in case of immediate operation
326 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
330 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
331 ins => [ "base", "index", "left", "right", "mem" ],
332 emit => '. add%M %binop',
335 modified_flags => $status_flags
339 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
340 emit => '. adc%M %binop',
343 modified_flags => $status_flags
349 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
356 outs => [ "low_res", "high_res" ],
358 modified_flags => $status_flags
364 cmp_attr => "return 1;",
370 cmp_attr => "return 1;",
375 # we should not rematrialize this node. It produces 2 results and has
376 # very strict constrains
377 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
378 emit => '. mul%M %unop',
379 outs => [ "EAX", "EDX", "M" ],
382 modified_flags => $status_flags
386 # we should not rematrialize this node. It produces 2 results and has
387 # very strict constrains
389 cmp_attr => "return 1;",
390 outs => [ "EAX", "EDX", "M" ],
396 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
397 emit => '. imul%M %binop',
401 modified_flags => $status_flags
406 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
407 emit => '. imul%M %unop',
408 outs => [ "EAX", "EDX", "M" ],
411 modified_flags => $status_flags
416 cmp_attr => "return 1;",
422 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
423 emit => '. and%M %binop',
426 modified_flags => $status_flags
431 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
432 emit => '. or%M %binop',
435 modified_flags => $status_flags
440 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
441 emit => '. xor%M %binop',
444 modified_flags => $status_flags
449 cmp_attr => "return 1;",
451 modified_flags => $status_flags
454 # not commutative operations
458 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
459 emit => '. sub%M %binop',
462 modified_flags => $status_flags
466 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
467 emit => '. sbb%M %binop',
470 modified_flags => $status_flags
476 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
483 outs => [ "low_res", "high_res" ],
485 modified_flags => $status_flags
490 cmp_attr => "return 1;",
495 cmp_attr => "return 1;",
501 state => "exc_pinned",
502 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
503 attr => "ia32_op_flavour_t dm_flav",
504 init_attr => "attr->data.op_flav = dm_flav;",
505 emit => ". idiv%M %unop",
506 outs => [ "div_res", "mod_res", "M" ],
509 modified_flags => $status_flags
514 state => "exc_pinned",
515 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
516 attr => "ia32_op_flavour_t dm_flav",
517 init_attr => "attr->data.op_flav = dm_flav;",
518 emit => ". div%M %unop",
519 outs => [ "div_res", "mod_res", "M" ],
522 modified_flags => $status_flags
527 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
528 ins => [ "base", "index", "left", "right", "mem" ],
529 emit => '. shl%M %binop',
532 modified_flags => $status_flags
536 cmp_attr => "return 1;",
542 # Out requirements is: different from all in
543 # This is because, out must be different from LowPart and ShiftCount.
544 # We could say "!ecx !in_r4" but it can occur, that all values live through
545 # this Shift and the only value dying is the ShiftCount. Then there would be a
546 # register missing, as result must not be ecx and all other registers are
547 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
548 # (and probably never will). So we create artificial interferences of the result
549 # with all inputs, so the spiller can always assure a free register.
550 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
553 if (get_ia32_immop_type(node) == ia32_ImmNone) {
554 if (get_ia32_op_type(node) == ia32_AddrModeD) {
555 . shld%M %%cl, %S3, %AM
557 . shld%M %%cl, %S3, %S2
560 if (get_ia32_op_type(node) == ia32_AddrModeD) {
561 . shld%M %C, %S3, %AM
563 . shld%M %C, %S3, %S2
570 modified_flags => $status_flags
574 cmp_attr => "return 1;",
580 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
581 emit => '. shr%M %binop',
584 modified_flags => $status_flags
588 cmp_attr => "return 1;",
594 # Out requirements is: different from all in
595 # This is because, out must be different from LowPart and ShiftCount.
596 # We could say "!ecx !in_r4" but it can occur, that all values live through
597 # this Shift and the only value dying is the ShiftCount. Then there would be a
598 # register missing, as result must not be ecx and all other registers are
599 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
600 # (and probably never will). So we create artificial interferences of the result
601 # with all inputs, so the spiller can always assure a free register.
602 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
604 if (get_ia32_immop_type(node) == ia32_ImmNone) {
605 if (get_ia32_op_type(node) == ia32_AddrModeD) {
606 . shrd%M %%cl, %S3, %AM
608 . shrd%M %%cl, %S3, %S2
611 if (get_ia32_op_type(node) == ia32_AddrModeD) {
612 . shrd%M %C, %S3, %AM
614 . shrd%M %C, %S3, %S2
621 modified_flags => $status_flags
625 cmp_attr => "return 1;",
631 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
632 emit => '. sar%M %binop',
635 modified_flags => $status_flags
639 cmp_attr => "return 1;",
645 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
646 emit => '. ror%M %binop',
649 modified_flags => $status_flags
654 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
655 emit => '. rol%M %binop',
658 modified_flags => $status_flags
665 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
666 emit => '. neg%M %unop',
669 modified_flags => $status_flags
674 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
681 outs => [ "low_res", "high_res" ],
683 modified_flags => $status_flags
688 cmp_attr => "return 1;",
694 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
695 emit => '. inc%M %unop',
698 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
703 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
704 emit => '. dec%M %unop',
707 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
712 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
713 emit => '. not%M %unop',
724 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none"] },
725 outs => [ "false", "true" ],
727 units => [ "BRANCH" ],
733 reg_req => { in => [ "gp", "gp" ], out => [ "none", "none" ] },
734 outs => [ "false", "true" ],
736 units => [ "BRANCH" ],
742 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none" ] },
743 outs => [ "false", "true" ],
744 units => [ "BRANCH" ],
750 reg_req => { in => [ "gp", "gp" ] },
751 units => [ "BRANCH" ],
757 reg_req => { in => [ "gp" ], out => [ "none" ] },
759 units => [ "BRANCH" ],
765 reg_req => { out => [ "gp" ] },
774 reg_req => { out => [ "gp_UKNWN" ] },
784 reg_req => { out => [ "vfp_UKNWN" ] },
794 reg_req => { out => [ "xmm_UKNWN" ] },
804 reg_req => { out => [ "gp_NOREG" ] },
814 reg_req => { out => [ "vfp_NOREG" ] },
824 reg_req => { out => [ "xmm_NOREG" ] },
834 reg_req => { out => [ "fp_cw" ] },
838 modified_flags => $fpcw_flags
843 state => "exc_pinned",
844 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
846 emit => ". fldcw %AM",
849 modified_flags => $fpcw_flags
854 state => "exc_pinned",
855 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
857 emit => ". fnstcw %AM",
863 # we should not rematrialize this node. It produces 2 results and has
864 # very strict constrains
865 reg_req => { in => [ "gp" ], out => [ "eax in_r1", "edx" ] },
867 outs => [ "EAX", "EDX" ],
875 state => "exc_pinned",
876 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
878 emit => ". mov%SE%ME%.l %AM, %D0",
879 outs => [ "res", "M" ],
885 cmp_attr => "return 1;",
886 outs => [ "res", "M" ],
892 cmp_attr => "return 1;",
893 state => "exc_pinned",
900 state => "exc_pinned",
901 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
902 emit => '. mov%M %binop',
910 state => "exc_pinned",
911 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
912 emit => '. mov%M %binop',
920 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1" ] },
921 emit => '. leal %AM, %D0',
925 modified_flags => [],
929 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
930 emit => '. push%M %unop',
931 outs => [ "stack:I|S", "M" ],
934 modified_flags => [],
938 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
939 emit => '. pop%M %unop',
940 outs => [ "stack:I|S", "res", "M" ],
943 modified_flags => [],
947 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
949 outs => [ "frame:I", "stack:I|S", "M" ],
955 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
957 outs => [ "frame:I", "stack:I|S" ],
964 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
965 emit => '. addl %binop',
966 outs => [ "stack:S", "M" ],
968 modified_flags => $status_flags
973 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
974 emit => '. subl %binop',
975 outs => [ "stack:S", "M" ],
977 modified_flags => $status_flags
982 reg_req => { out => [ "gp" ] },
986 # the int instruction
988 reg_req => { in => [ "none" ], out => [ "none" ] },
990 attr => "tarval *tv",
991 init_attr => "\tset_ia32_Immop_tarval(res, tv);",
994 cmp_attr => "return 1;",
998 #-----------------------------------------------------------------------------#
999 # _____ _____ ______ __ _ _ _ #
1000 # / ____/ ____| ____| / _| | | | | | #
1001 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1002 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1003 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1004 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1005 #-----------------------------------------------------------------------------#
1007 # commutative operations
1011 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1012 emit => '. add%XXM %binop',
1020 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1021 emit => '. mul%XXM %binop',
1029 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1030 emit => '. max%XXM %binop',
1038 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1039 emit => '. min%XXM %binop',
1047 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1048 emit => '. andp%XSD %binop',
1056 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1057 emit => '. orp%XSD %binop',
1064 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1065 emit => '. xorp%XSD %binop',
1071 # not commutative operations
1075 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1076 emit => '. andnp%XSD %binop',
1084 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1085 emit => '. sub%XXM %binop',
1093 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1094 outs => [ "res", "M" ],
1095 emit => '. div%XXM %binop',
1104 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1112 op_flags => "L|X|Y",
1113 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1114 outs => [ "false", "true" ],
1122 reg_req => { out => [ "xmm" ] },
1123 emit => '. mov%XXM %C, %D0',
1133 state => "exc_pinned",
1134 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1135 emit => '. mov%XXM %AM, %D0',
1136 outs => [ "res", "M" ],
1143 state => "exc_pinned",
1144 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1145 emit => '. mov%XXM %binop',
1153 state => "exc_pinned",
1154 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1155 ins => [ "base", "index", "val", "mem" ],
1156 emit => '. mov%XXM %S2, %AM',
1164 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1165 emit => '. cvtsi2ss %D0, %AM',
1173 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1174 emit => '. cvtsi2sd %unop',
1183 cmp_attr => "return 1;",
1189 cmp_attr => "return 1;",
1196 state => "exc_pinned",
1197 reg_req => { in => [ "gp", "gp", "none" ] },
1198 emit => '. fstp%XM %AM',
1207 state => "exc_pinned",
1208 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vf0", "none" ] },
1209 ins => [ "base", "index", "mem" ],
1210 emit => '. fld%XM %AM',
1211 outs => [ "res", "M" ],
1221 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1222 outs => [ "DST", "SRC", "CNT", "M" ],
1224 modified_flags => [ "DF" ]
1230 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1231 outs => [ "DST", "SRC", "M" ],
1233 modified_flags => [ "DF" ]
1239 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1242 modified_flags => $status_flags
1246 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1249 modified_flags => $status_flags
1253 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1260 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1267 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1275 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "in_r4" ] },
1283 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "in_r3" ] },
1291 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1299 reg_req => { in => [ "vfp", "vfp", "gp", "gp" ], out => [ "in_r4" ] },
1307 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1315 reg_req => { in => [ "gp" ], out => [ "eax ebx ecx edx" ] },
1323 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1331 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1339 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1345 #----------------------------------------------------------#
1347 # (_) | | | | / _| | | | #
1348 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1349 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1350 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1351 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1353 # _ __ ___ __| | ___ ___ #
1354 # | '_ \ / _ \ / _` |/ _ \/ __| #
1355 # | | | | (_) | (_| | __/\__ \ #
1356 # |_| |_|\___/ \__,_|\___||___/ #
1357 #----------------------------------------------------------#
1361 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1369 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1377 cmp_attr => "return 1;",
1383 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1390 cmp_attr => "return 1;",
1395 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp", "none" ] },
1396 outs => [ "res", "M" ],
1402 cmp_attr => "return 1;",
1403 outs => [ "res", "M" ],
1408 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1415 cmp_attr => "return 1;",
1421 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1429 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1437 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1445 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1453 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1459 # virtual Load and Store
1463 state => "exc_pinned",
1464 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1465 outs => [ "res", "M" ],
1472 state => "exc_pinned",
1473 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1482 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1483 outs => [ "res", "M" ],
1489 cmp_attr => "return 1;",
1490 outs => [ "res", "M" ],
1495 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1502 cmp_attr => "return 1;",
1512 reg_req => { out => [ "vfp" ] },
1520 reg_req => { out => [ "vfp" ] },
1528 reg_req => { out => [ "vfp" ] },
1536 reg_req => { out => [ "vfp" ] },
1544 reg_req => { out => [ "vfp" ] },
1552 reg_req => { out => [ "vfp" ] },
1560 reg_req => { out => [ "vfp" ] },
1569 # init_attr => " set_ia32_ls_mode(res, mode);",
1570 reg_req => { out => [ "vfp" ] },
1580 op_flags => "L|X|Y",
1581 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "none", "none", "eax" ] },
1582 outs => [ "false", "true", "temp_reg_eax" ],
1587 #------------------------------------------------------------------------#
1588 # ___ _____ __ _ _ _ #
1589 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1590 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1591 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1592 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1593 #------------------------------------------------------------------------#
1595 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1596 # are swapped, we work this around in the emitter...
1600 rd_constructor => "NONE",
1602 emit => '. fadd%XM %x87_binop',
1607 rd_constructor => "NONE",
1609 emit => '. faddp %x87_binop',
1614 rd_constructor => "NONE",
1616 emit => '. fmul%XM %x87_binop',
1621 rd_constructor => "NONE",
1623 emit => '. fmulp %x87_binop',,
1628 rd_constructor => "NONE",
1630 emit => '. fsub%XM %x87_binop',
1635 rd_constructor => "NONE",
1637 # see note about gas bugs
1638 emit => '. fsubrp %x87_binop',
1643 rd_constructor => "NONE",
1646 emit => '. fsubr%XM %x87_binop',
1651 rd_constructor => "NONE",
1654 # see note about gas bugs
1655 emit => '. fsubp %x87_binop',
1660 rd_constructor => "NONE",
1665 # this node is just here, to keep the simulator running
1666 # we can omit this when a fprem simulation function exists
1669 rd_constructor => "NONE",
1676 rd_constructor => "NONE",
1678 emit => '. fdiv%XM %x87_binop',
1683 rd_constructor => "NONE",
1685 # see note about gas bugs
1686 emit => '. fdivrp %x87_binop',
1691 rd_constructor => "NONE",
1693 emit => '. fdivr%XM %x87_binop',
1698 rd_constructor => "NONE",
1700 # see note about gas bugs
1701 emit => '. fdivp %x87_binop',
1706 rd_constructor => "NONE",
1713 rd_constructor => "NONE",
1720 rd_constructor => "NONE",
1727 rd_constructor => "NONE",
1734 rd_constructor => "NONE",
1736 emit => '. fsqrt $',
1739 # x87 Load and Store
1742 rd_constructor => "NONE",
1743 op_flags => "R|L|F",
1744 state => "exc_pinned",
1746 emit => '. fld%XM %AM',
1750 rd_constructor => "NONE",
1751 op_flags => "R|L|F",
1752 state => "exc_pinned",
1754 emit => '. fst%XM %AM',
1759 rd_constructor => "NONE",
1760 op_flags => "R|L|F",
1761 state => "exc_pinned",
1763 emit => '. fstp%XM %AM',
1771 rd_constructor => "NONE",
1773 emit => '. fild%XM %AM',
1778 rd_constructor => "NONE",
1780 emit => '. fist%XM %AM',
1786 rd_constructor => "NONE",
1788 emit => '. fistp%XM %AM',
1795 op_flags => "R|c|K",
1802 op_flags => "R|c|K",
1809 op_flags => "R|c|K",
1816 op_flags => "R|c|K",
1823 op_flags => "R|c|K",
1830 op_flags => "R|c|K",
1833 emit => '. fldll2t',
1837 op_flags => "R|c|K",
1844 # Note that it is NEVER allowed to do CSE on these nodes
1845 # Moreover, note the virtual register requierements!
1850 cmp_attr => "return 1;",
1851 emit => '. fxch %X0',
1857 cmp_attr => "return 1;",
1858 emit => '. fld %X0',
1863 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1864 cmp_attr => "return 1;",
1865 emit => '. fld %X0',
1871 cmp_attr => "return 1;",
1872 emit => '. fstp %X0',
1878 op_flags => "L|X|Y",
1883 op_flags => "L|X|Y",
1888 op_flags => "L|X|Y",
1893 op_flags => "L|X|Y",
1898 op_flags => "L|X|Y",
1903 op_flags => "L|X|Y",
1908 # -------------------------------------------------------------------------------- #
1909 # ____ ____ _____ _ _ #
1910 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
1911 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
1912 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
1913 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
1915 # -------------------------------------------------------------------------------- #
1918 # Spilling and reloading of SSE registers, hardcoded, not generated #
1922 state => "exc_pinned",
1923 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1924 emit => '. movdqu %D0, %AM',
1925 outs => [ "res", "M" ],
1931 state => "exc_pinned",
1932 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1933 emit => '. movdqu %binop',
1940 # Include the generated SIMD node specification written by the SIMD optimization
1941 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
1942 unless ($return = do $my_script_name) {
1943 warn "couldn't parse $my_script_name: $@" if $@;
1944 warn "couldn't do $my_script_name: $!" unless defined $return;
1945 warn "couldn't run $my_script_name" unless $return;