3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
134 { mode => "mode_E", flags => "manual_ra" }
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
171 { mode => "mode_E", flags => "manual_ra" }
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw", flags => "manual_ra|state" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu", flags => "manual_ra" }
184 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
185 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
186 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
187 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
192 bundels_per_cycle => 1
196 S0 => "${arch}_emit_source_register(env, node, 0);",
197 S1 => "${arch}_emit_source_register(env, node, 1);",
198 S2 => "${arch}_emit_source_register(env, node, 2);",
199 S3 => "${arch}_emit_source_register(env, node, 3);",
200 S4 => "${arch}_emit_source_register(env, node, 4);",
201 S5 => "${arch}_emit_source_register(env, node, 5);",
202 SB1 => "${arch}_emit_8bit_source_register(env, node, 1);",
203 SB2 => "${arch}_emit_8bit_source_register(env, node, 2);",
204 SB3 => "${arch}_emit_8bit_source_register(env, node, 3);",
205 SW0 => "${arch}_emit_16bit_source_register(env, node, 0);",
206 SI0 => "${arch}_emit_source_register_or_immediate(env, node, 0);",
207 SI1 => "${arch}_emit_source_register_or_immediate(env, node, 1);",
208 SI2 => "${arch}_emit_source_register_or_immediate(env, node, 2);",
209 SI3 => "${arch}_emit_source_register_or_immediate(env, node, 3);",
210 D0 => "${arch}_emit_dest_register(env, node, 0);",
211 D1 => "${arch}_emit_dest_register(env, node, 1);",
212 D2 => "${arch}_emit_dest_register(env, node, 2);",
213 D3 => "${arch}_emit_dest_register(env, node, 3);",
214 D4 => "${arch}_emit_dest_register(env, node, 4);",
215 D5 => "${arch}_emit_dest_register(env, node, 5);",
216 X0 => "${arch}_emit_x87_name(env, node, 0);",
217 X1 => "${arch}_emit_x87_name(env, node, 1);",
218 X2 => "${arch}_emit_x87_name(env, node, 2);",
219 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
220 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
221 ia32_emit_mode_suffix(env, node);",
222 M => "${arch}_emit_mode_suffix(env, node);",
223 XM => "${arch}_emit_x87_mode_suffix(env, node);",
224 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
225 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
226 AM => "${arch}_emit_am(env, node);",
227 unop0 => "${arch}_emit_unop(env, node, 0);",
228 unop1 => "${arch}_emit_unop(env, node, 1);",
229 unop2 => "${arch}_emit_unop(env, node, 2);",
230 unop3 => "${arch}_emit_unop(env, node, 3);",
231 unop4 => "${arch}_emit_unop(env, node, 4);",
232 unop5 => "${arch}_emit_unop(env, node, 5);",
233 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
234 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 1);",
235 binop => "${arch}_emit_binop(env, node);",
236 x87_binop => "${arch}_emit_x87_binop(env, node);",
239 #--------------------------------------------------#
242 # _ __ _____ __ _ _ __ ___ _ __ ___ #
243 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
244 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
245 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
248 #--------------------------------------------------#
250 $default_attr_type = "ia32_attr_t";
251 $default_copy_attr = "ia32_copy_attr";
253 sub ia32_custom_init_attr {
257 if(defined($node->{modified_flags})) {
258 $res .= "\tset_ia32_flags(res, get_ia32_flags(res) | arch_irn_flags_modify_flags);\n";
260 if(defined($node->{am})) {
261 my $am = $node->{am};
262 if($am eq "full,binary") {
263 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_binary);";
264 } elsif($am eq "full,unary") {
265 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_unary);";
266 } elsif($am eq "source,binary") {
267 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_binary);";
268 } elsif($am eq "dest,unary") {
269 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);";
270 } elsif($am eq "dest,binary") {
271 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);";
272 } elsif($am eq "dest,ternary") {
273 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);";
274 } elsif($am eq "source,ternary") {
275 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_ternary);";
276 } elsif($am eq "none") {
279 die("Invalid address mode '$am' specified on op $name");
284 $custom_init_attr_func = \&ia32_custom_init_attr;
287 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
289 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
290 "\tinit_ia32_x87_attributes(res);",
292 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
293 "\tinit_ia32_x87_attributes(res);".
294 "\tinit_ia32_asm_attributes(res);",
295 ia32_immediate_attr_t =>
296 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
297 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
301 ia32_attr_t => "ia32_compare_nodes_attr",
302 ia32_x87_attr_t => "ia32_compare_x87_attr",
303 ia32_asm_attr_t => "ia32_compare_asm_attr",
304 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
310 $mode_xmm = "mode_E";
311 $mode_gp = "mode_Iu";
312 $mode_fpcw = "mode_fpcw";
313 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
314 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
315 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
323 reg_req => { out => [ "gp_NOREG" ] },
324 attr => "ir_entity *symconst, int symconst_sign, long offset",
325 attr_type => "ia32_immediate_attr_t",
333 out_arity => "variable",
334 attr_type => "ia32_asm_attr_t",
341 reg_req => { out => [ "gp" ] },
346 cmp_attr => "return 1;",
349 #-----------------------------------------------------------------#
352 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
353 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
354 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
355 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
358 #-----------------------------------------------------------------#
360 # commutative operations
364 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4", "none", "flags" ] },
365 ins => [ "base", "index", "mem", "left", "right" ],
366 emit => '. add%M %binop',
370 modified_flags => $status_flags
375 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
376 ins => [ "base", "index", "mem", "val" ],
377 emit => ". add%M %SI3, %AM",
380 modified_flags => $status_flags
384 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "flags" ], out => [ "in_r4" ] },
385 ins => [ "base", "index", "mem", "left", "right", "eflags" ],
386 emit => '. adc%M %binop',
390 modified_flags => $status_flags
395 reg_req => { in => [ "none", "none" ], out => [ "none" ] },
396 ins => [ "left", "right" ],
400 reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
401 ins => [ "left", "right", "eflags" ],
407 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
414 outs => [ "low_res", "high_res" ],
416 modified_flags => $status_flags
420 # we should not rematrialize this node. It produces 2 results and has
421 # very strict constrains
422 reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], out => [ "eax", "edx", "none" ] },
423 ins => [ "base", "index", "mem", "val_high", "val_low" ],
424 emit => '. mul%M %unop4',
425 outs => [ "EAX", "EDX", "M" ],
426 am => "source,binary",
429 modified_flags => $status_flags
433 # we should not rematrialize this node. It produces 2 results and has
434 # very strict constrains
436 cmp_attr => "return 1;",
437 outs => [ "EAX", "EDX", "M" ],
443 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
444 ins => [ "base", "index", "mem", "left", "right" ],
445 emit => '. imul%M %binop',
446 am => "source,binary",
450 modified_flags => $status_flags
455 reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], out => [ "eax", "edx", "none" ] },
456 ins => [ "base", "index", "mem", "val_high", "val_low" ],
457 emit => '. imul%M %unop4',
458 outs => [ "EAX", "EDX", "M" ],
459 am => "source,binary",
462 modified_flags => $status_flags
466 # we should not rematrialize this node. It produces 2 results and has
467 # very strict constrains
469 cmp_attr => "return 1;",
470 outs => [ "EAX", "EDX", "M" ],
476 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
477 ins => [ "base", "index", "mem", "left", "right" ],
479 emit => '. and%M %binop',
482 modified_flags => $status_flags
487 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
488 ins => [ "base", "index", "mem", "val" ],
489 emit => '. and%M %SI3, %AM',
492 modified_flags => $status_flags
497 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
498 ins => [ "base", "index", "mem", "left", "right" ],
500 emit => '. or%M %binop',
503 modified_flags => $status_flags
508 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
509 ins => [ "base", "index", "mem", "val" ],
510 emit => '. or%M %SI3, %AM',
513 modified_flags => $status_flags
518 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
519 ins => [ "base", "index", "mem", "left", "right" ],
521 emit => '. xor%M %binop',
524 modified_flags => $status_flags
529 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
530 ins => [ "base", "index", "mem", "val" ],
531 emit => '. xor%M %SI3, %AM',
534 modified_flags => $status_flags
537 # not commutative operations
541 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
542 ins => [ "base", "index", "mem", "left", "right" ],
544 emit => '. sub%M %binop',
547 modified_flags => $status_flags
552 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
553 ins => [ "base", "index", "mem", "val" ],
554 emit => '. sub%M %SI3, %AM',
557 modified_flags => $status_flags
561 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 !in_r5" ] },
562 ins => [ "base", "index", "mem", "left", "right" ],
564 emit => '. sbb%M %binop',
567 modified_flags => $status_flags
573 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
580 outs => [ "low_res", "high_res" ],
582 modified_flags => $status_flags
587 state => "exc_pinned",
588 reg_req => { in => [ "gp", "gp", "none", "eax", "edx", "gp" ], out => [ "eax", "edx", "none" ] },
589 ins => [ "base", "index", "mem", "left_low", "left_high", "right" ],
590 outs => [ "div_res", "mod_res", "M" ],
591 attr => "ia32_op_flavour_t dm_flav",
592 am => "source,ternary",
593 init_attr => "attr->data.op_flav = dm_flav;",
594 emit => ". idiv%M %unop5",
597 modified_flags => $status_flags
602 state => "exc_pinned",
603 reg_req => { in => [ "gp", "gp", "none", "eax", "edx", "gp" ], out => [ "eax", "edx", "none" ] },
604 ins => [ "base", "index", "mem", "left_low", "left_high", "right" ],
605 outs => [ "div_res", "mod_res", "M" ],
606 attr => "ia32_op_flavour_t dm_flav",
607 am => "source,ternary",
608 init_attr => "attr->data.op_flav = dm_flav;",
609 emit => ". div%M %unop5",
612 modified_flags => $status_flags
617 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
618 ins => [ "left", "right" ],
620 emit => '. shl %SB1, %S0',
623 modified_flags => $status_flags
628 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
629 ins => [ "base", "index", "mem", "count" ],
630 emit => '. shl%M %SB3, %AM',
633 modified_flags => $status_flags
637 cmp_attr => "return 1;",
638 # value, cnt, dependency
643 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
645 # Out requirements is: different from all in
646 # This is because, out must be different from LowPart and ShiftCount.
647 # We could say "!ecx !in_r4" but it can occur, that all values live through
648 # this Shift and the only value dying is the ShiftCount. Then there would be a
649 # register missing, as result must not be ecx and all other registers are
650 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
651 # (and probably never will). So we create artificial interferences of the result
652 # with all inputs, so the spiller can always assure a free register.
653 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
656 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
657 ins => [ "left_high", "left_low", "right" ],
658 am => "dest,ternary",
659 emit => '. shld%M %SB2, %S1, %S0',
663 modified_flags => $status_flags
667 cmp_attr => "return 1;",
673 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
674 ins => [ "val", "count" ],
676 emit => '. shr %SB1, %S0',
679 modified_flags => $status_flags
684 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
685 ins => [ "base", "index", "mem", "count" ],
686 emit => '. shr%M %SB3, %AM',
689 modified_flags => $status_flags
693 cmp_attr => "return 1;",
694 # value, cnt, dependency
699 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
701 # Out requirements is: different from all in
702 # This is because, out must be different from LowPart and ShiftCount.
703 # We could say "!ecx !in_r4" but it can occur, that all values live through
704 # this Shift and the only value dying is the ShiftCount. Then there would be a
705 # register missing, as result must not be ecx and all other registers are
706 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
707 # (and probably never will). So we create artificial interferences of the result
708 # with all inputs, so the spiller can always assure a free register.
709 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
712 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
713 ins => [ "left_high", "left_low", "right" ],
714 am => "dest,ternary",
715 emit => '. shrd%M %SB2, %S1, %S0',
719 modified_flags => $status_flags
723 cmp_attr => "return 1;",
729 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
730 ins => [ "val", "count" ],
732 emit => '. sar %SB1, %S0',
735 modified_flags => $status_flags
740 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
741 ins => [ "base", "index", "mem", "count" ],
742 emit => '. sar%M %SB3, %AM',
745 modified_flags => $status_flags
749 cmp_attr => "return 1;",
755 cmp_attr => "return 1;",
756 # value, cnt, dependency
762 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
763 ins => [ "val", "count" ],
765 emit => '. ror %SB1, %S0',
768 modified_flags => $status_flags
773 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
774 ins => [ "base", "index", "mem", "count" ],
775 emit => '. ror%M %SB3, %AM',
778 modified_flags => $status_flags
783 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
784 ins => [ "val", "count" ],
786 emit => '. rol %SB1, %S0',
789 modified_flags => $status_flags
794 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
795 ins => [ "base", "index", "mem", "count" ],
796 emit => '. rol%M %SB3, %AM',
799 modified_flags => $status_flags
806 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
812 modified_flags => $status_flags
817 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
818 ins => [ "base", "index", "mem" ],
819 emit => '. neg%M %AM',
822 modified_flags => $status_flags
827 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "gp" ] },
828 outs => [ "low_res", "high_res" ],
830 modified_flags => $status_flags
835 cmp_attr => "return 1;",
841 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
846 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
851 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
852 ins => [ "base", "index", "mem" ],
853 emit => '. inc%M %AM',
856 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
861 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
866 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
871 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
872 ins => [ "base", "index", "mem" ],
873 emit => '. dec%M %AM',
876 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
881 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
891 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
892 ins => [ "base", "index", "mem" ],
893 emit => '. not%M %AM',
903 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "none", "none"] },
904 ins => [ "base", "index", "mem", "left", "right" ],
905 outs => [ "false", "true" ],
907 am => "source,binary",
908 init_attr => "attr->pn_code = pnc;",
910 units => [ "BRANCH" ],
916 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ], out => [ "none", "none"] },
917 ins => [ "base", "index", "mem", "left", "right" ],
918 outs => [ "false", "true" ],
920 am => "source,binary",
921 init_attr => "attr->pn_code = pnc;",
923 units => [ "BRANCH" ],
929 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "none", "none" ] },
930 ins => [ "base", "index", "mem", "left", "right" ],
931 outs => [ "false", "true" ],
933 am => "source,binary",
934 init_attr => "attr->pn_code = pnc;",
936 units => [ "BRANCH" ],
942 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ], out => [ "none", "none" ] },
943 ins => [ "base", "index", "mem", "left", "right" ],
944 outs => [ "false", "true" ],
946 am => "source,binary",
947 init_attr => "attr->pn_code = pnc;",
949 units => [ "BRANCH" ],
955 reg_req => { in => [ "gp" ], out => [ "none" ] },
957 units => [ "BRANCH" ],
964 reg_req => { in => [ "gp" ] },
965 emit => '. jmp *%S0',
966 units => [ "BRANCH" ],
973 reg_req => { out => [ "gp" ] },
975 attr => "ir_entity *symconst, int symconst_sign, long offset",
976 attr_type => "ia32_immediate_attr_t",
984 reg_req => { out => [ "gp_UKNWN" ] },
994 reg_req => { out => [ "vfp_UKNWN" ] },
998 attr_type => "ia32_x87_attr_t",
1005 reg_req => { out => [ "xmm_UKNWN" ] },
1015 reg_req => { out => [ "gp_NOREG" ] },
1025 reg_req => { out => [ "vfp_NOREG" ] },
1029 attr_type => "ia32_x87_attr_t",
1036 reg_req => { out => [ "xmm_NOREG" ] },
1046 reg_req => { out => [ "fp_cw" ] },
1050 modified_flags => $fpcw_flags
1056 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
1057 ins => [ "base", "index", "mem" ],
1059 emit => ". fldcw %AM",
1062 modified_flags => $fpcw_flags
1068 reg_req => { in => [ "gp", "gp", "none", "fp_cw" ], out => [ "none" ] },
1069 ins => [ "base", "index", "mem", "fpcw" ],
1071 emit => ". fnstcw %AM",
1077 # we should not rematrialize this node. It produces 2 results and has
1078 # very strict constrains
1079 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
1080 ins => [ "val", "globbered" ],
1088 # Note that we add additional latency values depending on address mode, so a
1089 # lateny of 0 for load is correct
1093 state => "exc_pinned",
1094 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
1095 ins => [ "base", "index", "mem" ],
1096 outs => [ "res", "M" ],
1098 emit => ". mov%SE%ME%.l %AM, %D0",
1104 cmp_attr => "return 1;",
1105 outs => [ "res", "M" ],
1111 cmp_attr => "return 1;",
1112 state => "exc_pinned",
1119 state => "exc_pinned",
1120 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
1121 ins => [ "base", "index", "mem", "val" ],
1122 emit => '. mov%M %SI3, %AM',
1130 state => "exc_pinned",
1131 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => ["none" ] },
1132 ins => [ "base", "index", "mem", "val" ],
1133 emit => '. mov%M %SB3, %AM',
1141 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1142 ins => [ "base", "index" ],
1143 emit => '. leal %AM, %D0',
1150 reg_req => { in => [ "gp", "gp", "none", "gp", "esp" ], out => [ "esp", "none" ] },
1151 ins => [ "base", "index", "mem", "val", "stack" ],
1152 emit => '. push%M %unop3',
1153 outs => [ "stack:I|S", "M" ],
1154 am => "source,binary",
1160 reg_req => { in => [ "gp", "gp", "none", "esp" ], out => [ "esp", "gp", "none" ] },
1161 emit => '. pop%M %DAM1',
1162 outs => [ "stack:I|S", "res", "M" ],
1163 ins => [ "base", "index", "mem", "stack" ],
1165 latency => 3, # Pop is more expensive than Push on Athlon
1170 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1172 outs => [ "frame:I", "stack:I|S", "M" ],
1178 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1180 outs => [ "frame:I", "stack:I|S" ],
1188 reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "in_r4", "none" ] },
1189 ins => [ "base", "index", "mem", "stack", "size" ],
1190 am => "source,binary",
1191 emit => '. addl %binop',
1192 outs => [ "stack:S", "M" ],
1194 modified_flags => $status_flags
1200 reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "in_r4", "gp", "none" ] },
1201 ins => [ "base", "index", "mem", "stack", "size" ],
1202 am => "source,binary",
1203 emit => ". subl %binop\n".
1204 ". movl %%esp, %D1",
1205 outs => [ "stack:I|S", "addr", "M" ],
1207 modified_flags => $status_flags
1212 reg_req => { out => [ "gp" ] },
1216 # the int instruction
1218 reg_req => { in => [ "gp" ], out => [ "none" ] },
1220 emit => '. int %SI0',
1222 cmp_attr => "return 1;",
1226 #-----------------------------------------------------------------------------#
1227 # _____ _____ ______ __ _ _ _ #
1228 # / ____/ ____| ____| / _| | | | | | #
1229 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1230 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1231 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1232 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1233 #-----------------------------------------------------------------------------#
1237 reg_req => { out => [ "xmm" ] },
1238 emit => '. xorp%XSD %D1, %D1',
1244 # commutative operations
1248 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1249 ins => [ "base", "index", "mem", "left", "right" ],
1250 emit => '. add%XXM %binop',
1258 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1259 ins => [ "base", "index", "mem", "left", "right" ],
1260 emit => '. mul%XXM %binop',
1268 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1269 ins => [ "base", "index", "mem", "left", "right" ],
1270 emit => '. max%XXM %binop',
1278 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1279 ins => [ "base", "index", "mem", "left", "right" ],
1280 emit => '. min%XXM %binop',
1288 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1289 ins => [ "base", "index", "mem", "left", "right" ],
1290 emit => '. andp%XSD %binop',
1298 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1299 ins => [ "base", "index", "mem", "left", "right" ],
1300 emit => '. orp%XSD %binop',
1307 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1308 ins => [ "base", "index", "mem", "left", "right" ],
1309 emit => '. xorp%XSD %binop',
1315 # not commutative operations
1319 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5" ] },
1320 ins => [ "base", "index", "mem", "left", "right" ],
1321 emit => '. andnp%XSD %binop',
1329 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1330 ins => [ "base", "index", "mem", "left", "right" ],
1331 emit => '. sub%XXM %binop',
1339 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5", "none" ] },
1340 ins => [ "base", "index", "mem", "left", "right" ],
1341 outs => [ "res", "M" ],
1342 emit => '. div%XXM %binop',
1351 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5" ] },
1352 ins => [ "base", "index", "mem", "left", "right" ],
1360 op_flags => "L|X|Y",
1361 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "none", "none" ] },
1362 ins => [ "base", "index", "mem", "left", "right" ],
1363 outs => [ "false", "true" ],
1365 init_attr => "attr->pn_code = pnc;",
1374 state => "exc_pinned",
1375 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1376 ins => [ "base", "index", "mem" ],
1377 emit => '. mov%XXM %AM, %D0',
1378 attr => "ir_mode *load_mode",
1379 init_attr => "attr->ls_mode = load_mode;",
1380 outs => [ "res", "M" ],
1387 state => "exc_pinned",
1388 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
1389 ins => [ "base", "index", "mem", "val" ],
1390 emit => '. mov%XXM %S3, %AM',
1398 state => "exc_pinned",
1399 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
1400 ins => [ "base", "index", "mem", "val" ],
1401 emit => '. mov%XXM %S3, %AM',
1409 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
1410 ins => [ "base", "index", "mem", "val" ],
1411 emit => '. cvtsi2ss %D0, %AM',
1419 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
1420 ins => [ "base", "index", "mem", "val" ],
1421 emit => '. cvtsi2sd %unop3',
1430 cmp_attr => "return 1;",
1436 cmp_attr => "return 1;",
1445 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1446 outs => [ "DST", "SRC", "CNT", "M" ],
1448 # we don't care about this flag, so no need to mark this node
1449 # modified_flags => [ "DF" ]
1455 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1456 outs => [ "DST", "SRC", "M" ],
1458 # we don't care about this flag, so no need to mark this node
1459 # modified_flags => [ "DF" ]
1465 state => "exc_pinned",
1466 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "in_r4", "none" ] },
1467 ins => [ "base", "index", "mem", "val" ],
1469 attr => "ir_mode *smaller_mode",
1470 init_attr => "attr->ls_mode = smaller_mode;",
1472 modified_flags => $status_flags
1476 state => "exc_pinned",
1477 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "in_r4", "none" ] },
1478 ins => [ "base", "index", "mem", "val" ],
1480 attr => "ir_mode *smaller_mode",
1481 init_attr => "attr->ls_mode = smaller_mode;",
1483 modified_flags => $status_flags
1487 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm", "none" ] },
1488 ins => [ "base", "index", "mem", "val" ],
1495 reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "gp", "none" ] },
1496 ins => [ "base", "index", "mem", "val" ],
1503 reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "xmm", "none" ] },
1504 ins => [ "base", "index", "mem", "val" ],
1512 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "gp", "gp" ], out => [ "in_r7" ] },
1513 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1514 attr => "pn_Cmp pn_code",
1515 init_attr => "attr->pn_code = pn_code;",
1523 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "gp", "gp" ], out => [ "in_r7" ] },
1524 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1525 attr => "pn_Cmp pn_code",
1526 init_attr => "attr->pn_code = pn_code;",
1534 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "gp", "gp" ], out => [ "in_r7" ] },
1535 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1536 attr => "pn_Cmp pn_code",
1537 init_attr => "attr->pn_code = pn_code;",
1545 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "gp", "gp" ], out => [ "in_r7" ] },
1546 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1547 attr => "pn_Cmp pn_code",
1548 init_attr => "attr->pn_code = pn_code;",
1556 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1564 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "gp", "gp" ], out => [ "in_r7" ] },
1565 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1567 units => [ "VFP", "GP" ],
1569 attr_type => "ia32_x87_attr_t",
1574 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "eax ebx ecx edx" ] },
1575 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1576 attr => "pn_Cmp pn_code",
1577 init_attr => "attr->pn_code = pn_code;",
1585 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ], out => [ "eax ebx ecx edx" ] },
1586 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1587 attr => "pn_Cmp pn_code",
1588 init_attr => "attr->pn_code = pn_code;",
1596 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "eax ebx ecx edx" ] },
1597 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1598 attr => "pn_Cmp pn_code",
1599 init_attr => "attr->pn_code = pn_code;",
1607 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ], out => [ "eax ebx ecx edx" ] },
1608 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1609 attr => "pn_Cmp pn_code",
1610 init_attr => "attr->pn_code = pn_code;",
1618 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "eax ebx ecx edx" ] },
1619 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1627 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp" ], out => [ "eax ebx ecx edx" ] },
1628 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1632 attr_type => "ia32_x87_attr_t",
1637 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1641 attr_type => "ia32_x87_attr_t",
1644 #----------------------------------------------------------#
1646 # (_) | | | | / _| | | | #
1647 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1648 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1649 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1650 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1652 # _ __ ___ __| | ___ ___ #
1653 # | '_ \ / _ \ / _` |/ _ \/ __| #
1654 # | | | | (_) | (_| | __/\__ \ #
1655 # |_| |_|\___/ \__,_|\___||___/ #
1656 #----------------------------------------------------------#
1660 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1661 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1665 attr_type => "ia32_x87_attr_t",
1670 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1671 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1675 attr_type => "ia32_x87_attr_t",
1680 cmp_attr => "return 1;",
1686 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1687 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1691 attr_type => "ia32_x87_attr_t",
1695 cmp_attr => "return 1;",
1700 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp", "none" ] },
1701 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1702 outs => [ "res", "M" ],
1705 attr_type => "ia32_x87_attr_t",
1709 cmp_attr => "return 1;",
1710 outs => [ "res", "M" ],
1715 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1716 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1720 attr_type => "ia32_x87_attr_t",
1724 cmp_attr => "return 1;",
1730 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1735 attr_type => "ia32_x87_attr_t",
1740 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1745 attr_type => "ia32_x87_attr_t",
1748 # virtual Load and Store
1752 state => "exc_pinned",
1753 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1754 ins => [ "base", "index", "mem" ],
1755 outs => [ "res", "M" ],
1756 attr => "ir_mode *load_mode",
1757 init_attr => "attr->attr.ls_mode = load_mode;",
1760 attr_type => "ia32_x87_attr_t",
1765 state => "exc_pinned",
1766 reg_req => { in => [ "gp", "gp", "none", "vfp" ] },
1767 ins => [ "base", "index", "mem", "val" ],
1768 attr => "ir_mode *store_mode",
1769 init_attr => "attr->attr.ls_mode = store_mode;",
1773 attr_type => "ia32_x87_attr_t",
1779 state => "exc_pinned",
1780 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1781 outs => [ "res", "M" ],
1782 ins => [ "base", "index", "mem" ],
1785 attr_type => "ia32_x87_attr_t",
1789 cmp_attr => "return 1;",
1790 outs => [ "res", "M" ],
1795 state => "exc_pinned",
1796 reg_req => { in => [ "gp", "gp", "none", "vfp", "fpcw" ] },
1797 ins => [ "base", "index", "mem", "val", "fpcw" ],
1801 attr_type => "ia32_x87_attr_t",
1805 cmp_attr => "return 1;",
1806 state => "exc_pinned",
1816 reg_req => { out => [ "vfp" ] },
1820 attr_type => "ia32_x87_attr_t",
1825 reg_req => { out => [ "vfp" ] },
1829 attr_type => "ia32_x87_attr_t",
1834 reg_req => { out => [ "vfp" ] },
1838 attr_type => "ia32_x87_attr_t",
1843 reg_req => { out => [ "vfp" ] },
1847 attr_type => "ia32_x87_attr_t",
1852 reg_req => { out => [ "vfp" ] },
1856 attr_type => "ia32_x87_attr_t",
1861 reg_req => { out => [ "vfp" ] },
1865 attr_type => "ia32_x87_attr_t",
1870 reg_req => { out => [ "vfp" ] },
1874 attr_type => "ia32_x87_attr_t",
1881 op_flags => "L|X|Y",
1882 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1883 ins => [ "left", "right" ],
1884 outs => [ "false", "true", "temp_reg_eax" ],
1886 init_attr => "attr->attr.pn_code = pnc;",
1889 attr_type => "ia32_x87_attr_t",
1892 #------------------------------------------------------------------------#
1893 # ___ _____ __ _ _ _ #
1894 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1895 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1896 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1897 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1898 #------------------------------------------------------------------------#
1900 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1901 # are swapped, we work this around in the emitter...
1905 rd_constructor => "NONE",
1907 emit => '. fadd%XM %x87_binop',
1908 attr_type => "ia32_x87_attr_t",
1913 rd_constructor => "NONE",
1915 emit => '. faddp%XM %x87_binop',
1916 attr_type => "ia32_x87_attr_t",
1921 rd_constructor => "NONE",
1923 emit => '. fmul%XM %x87_binop',
1924 attr_type => "ia32_x87_attr_t",
1929 rd_constructor => "NONE",
1931 emit => '. fmulp%XM %x87_binop',,
1932 attr_type => "ia32_x87_attr_t",
1937 rd_constructor => "NONE",
1939 emit => '. fsub%XM %x87_binop',
1940 attr_type => "ia32_x87_attr_t",
1945 rd_constructor => "NONE",
1947 # see note about gas bugs
1948 emit => '. fsubrp%XM %x87_binop',
1949 attr_type => "ia32_x87_attr_t",
1954 rd_constructor => "NONE",
1957 emit => '. fsubr%XM %x87_binop',
1958 attr_type => "ia32_x87_attr_t",
1963 rd_constructor => "NONE",
1966 # see note about gas bugs
1967 emit => '. fsubp%XM %x87_binop',
1968 attr_type => "ia32_x87_attr_t",
1973 rd_constructor => "NONE",
1976 attr_type => "ia32_x87_attr_t",
1979 # this node is just here, to keep the simulator running
1980 # we can omit this when a fprem simulation function exists
1983 rd_constructor => "NONE",
1986 attr_type => "ia32_x87_attr_t",
1991 rd_constructor => "NONE",
1993 emit => '. fdiv%XM %x87_binop',
1994 attr_type => "ia32_x87_attr_t",
1999 rd_constructor => "NONE",
2001 # see note about gas bugs
2002 emit => '. fdivrp%XM %x87_binop',
2003 attr_type => "ia32_x87_attr_t",
2008 rd_constructor => "NONE",
2010 emit => '. fdivr%XM %x87_binop',
2011 attr_type => "ia32_x87_attr_t",
2016 rd_constructor => "NONE",
2018 # see note about gas bugs
2019 emit => '. fdivp%XM %x87_binop',
2020 attr_type => "ia32_x87_attr_t",
2025 rd_constructor => "NONE",
2028 attr_type => "ia32_x87_attr_t",
2033 rd_constructor => "NONE",
2036 attr_type => "ia32_x87_attr_t",
2039 # x87 Load and Store
2042 rd_constructor => "NONE",
2043 op_flags => "R|L|F",
2044 state => "exc_pinned",
2046 emit => '. fld%XM %AM',
2047 attr_type => "ia32_x87_attr_t",
2051 rd_constructor => "NONE",
2052 op_flags => "R|L|F",
2053 state => "exc_pinned",
2055 emit => '. fst%XM %AM',
2057 attr_type => "ia32_x87_attr_t",
2061 rd_constructor => "NONE",
2062 op_flags => "R|L|F",
2063 state => "exc_pinned",
2065 emit => '. fstp%XM %AM',
2067 attr_type => "ia32_x87_attr_t",
2074 rd_constructor => "NONE",
2076 emit => '. fild%M %AM',
2077 attr_type => "ia32_x87_attr_t",
2082 state => "exc_pinned",
2083 rd_constructor => "NONE",
2085 emit => '. fist%M %AM',
2087 attr_type => "ia32_x87_attr_t",
2092 state => "exc_pinned",
2093 rd_constructor => "NONE",
2095 emit => '. fistp%M %AM',
2097 attr_type => "ia32_x87_attr_t",
2103 op_flags => "R|c|K",
2107 attr_type => "ia32_x87_attr_t",
2111 op_flags => "R|c|K",
2115 attr_type => "ia32_x87_attr_t",
2119 op_flags => "R|c|K",
2123 attr_type => "ia32_x87_attr_t",
2127 op_flags => "R|c|K",
2131 attr_type => "ia32_x87_attr_t",
2135 op_flags => "R|c|K",
2139 attr_type => "ia32_x87_attr_t",
2143 op_flags => "R|c|K",
2146 emit => '. fldll2t',
2147 attr_type => "ia32_x87_attr_t",
2151 op_flags => "R|c|K",
2155 attr_type => "ia32_x87_attr_t",
2159 # Note that it is NEVER allowed to do CSE on these nodes
2160 # Moreover, note the virtual register requierements!
2165 cmp_attr => "return 1;",
2166 emit => '. fxch %X0',
2167 attr_type => "ia32_x87_attr_t",
2173 cmp_attr => "return 1;",
2174 emit => '. fld %X0',
2175 attr_type => "ia32_x87_attr_t",
2180 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2181 cmp_attr => "return 1;",
2182 emit => '. fld %X0',
2183 attr_type => "ia32_x87_attr_t",
2189 cmp_attr => "return 1;",
2190 emit => '. fstp %X0',
2191 attr_type => "ia32_x87_attr_t",
2197 cmp_attr => "return 1;",
2198 emit => '. ffreep %X0',
2199 attr_type => "ia32_x87_attr_t",
2205 cmp_attr => "return 1;",
2207 attr_type => "ia32_x87_attr_t",
2213 cmp_attr => "return 1;",
2215 attr_type => "ia32_x87_attr_t",
2221 op_flags => "L|X|Y",
2223 attr_type => "ia32_x87_attr_t",
2227 op_flags => "L|X|Y",
2229 attr_type => "ia32_x87_attr_t",
2233 op_flags => "L|X|Y",
2235 attr_type => "ia32_x87_attr_t",
2239 op_flags => "L|X|Y",
2241 attr_type => "ia32_x87_attr_t",
2245 op_flags => "L|X|Y",
2247 attr_type => "ia32_x87_attr_t",
2251 op_flags => "L|X|Y",
2253 attr_type => "ia32_x87_attr_t",
2257 # -------------------------------------------------------------------------------- #
2258 # ____ ____ _____ _ _ #
2259 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2260 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2261 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2262 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2264 # -------------------------------------------------------------------------------- #
2267 # Spilling and reloading of SSE registers, hardcoded, not generated #
2271 state => "exc_pinned",
2272 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2273 emit => '. movdqu %D0, %AM',
2274 outs => [ "res", "M" ],
2280 state => "exc_pinned",
2281 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
2282 ins => [ "base", "index", "mem", "val" ],
2283 emit => '. movdqu %binop',
2290 # Include the generated SIMD node specification written by the SIMD optimization
2291 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2292 unless ($return = do $my_script_name) {
2293 warn "couldn't parse $my_script_name: $@" if $@;
2294 warn "couldn't do $my_script_name: $!" unless defined $return;
2295 warn "couldn't run $my_script_name" unless $return;