3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 D0 => "${arch}_emit_dest_register(env, node, 0);",
257 D1 => "${arch}_emit_dest_register(env, node, 1);",
258 D2 => "${arch}_emit_dest_register(env, node, 2);",
259 D3 => "${arch}_emit_dest_register(env, node, 3);",
260 D4 => "${arch}_emit_dest_register(env, node, 4);",
261 D5 => "${arch}_emit_dest_register(env, node, 5);",
262 X0 => "${arch}_emit_x87_name(env, node, 0);",
263 X1 => "${arch}_emit_x87_name(env, node, 1);",
264 X2 => "${arch}_emit_x87_name(env, node, 2);",
265 C => "${arch}_emit_immediate(env, node);",
266 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
267 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
268 ia32_emit_mode_suffix(env, node);",
269 M => "${arch}_emit_mode_suffix(env, node);",
270 XM => "${arch}_emit_x87_mode_suffix(env, node);",
271 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
272 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
273 AM => "${arch}_emit_am(env, node);",
274 unop0 => "${arch}_emit_unop(env, node, 0);",
275 unop1 => "${arch}_emit_unop(env, node, 1);",
276 unop2 => "${arch}_emit_unop(env, node, 2);",
277 unop3 => "${arch}_emit_unop(env, node, 3);",
278 unop4 => "${arch}_emit_unop(env, node, 4);",
279 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
280 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 0);",
281 binop => "${arch}_emit_binop(env, node);",
282 x87_binop => "${arch}_emit_x87_binop(env, node);",
285 #--------------------------------------------------#
288 # _ __ _____ __ _ _ __ ___ _ __ ___ #
289 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
290 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
291 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
294 #--------------------------------------------------#
296 $default_attr_type = "ia32_attr_t";
297 $default_copy_attr = "ia32_copy_attr";
300 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
302 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
303 "\tinit_ia32_x87_attributes(res);",
305 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
306 "\tinit_ia32_x87_attributes(res);".
307 "\tinit_ia32_asm_attributes(res);",
308 ia32_immediate_attr_t =>
309 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
310 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
314 ia32_attr_t => "ia32_compare_nodes_attr",
315 ia32_x87_attr_t => "ia32_compare_x87_attr",
316 ia32_asm_attr_t => "ia32_compare_asm_attr",
317 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
323 $mode_xmm = "mode_E";
324 $mode_gp = "mode_Iu";
325 $mode_fpcw = "mode_fpcw";
326 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
327 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
328 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
336 reg_req => { out => [ "gp_NOREG" ] },
337 attr => "ir_entity *symconst, int symconst_sign, long offset",
338 attr_type => "ia32_immediate_attr_t",
346 out_arity => "variable",
347 attr_type => "ia32_asm_attr_t",
354 reg_req => { out => [ "gp" ] },
359 cmp_attr => "return 1;",
362 #-----------------------------------------------------------------#
365 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
366 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
367 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
368 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
371 #-----------------------------------------------------------------#
373 # commutative operations
376 # All nodes supporting Addressmode have 5 INs:
377 # 1 - base r1 == NoReg in case of no AM or no base
378 # 2 - index r2 == NoReg in case of no AM or no index
379 # 3 - op1 r3 == always present
380 # 4 - op2 r4 == NoReg in case of immediate operation
381 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
385 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
386 ins => [ "base", "index", "left", "right", "mem" ],
387 emit => '. add%M %binop',
390 modified_flags => $status_flags
394 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
395 emit => '. adc%M %binop',
398 modified_flags => $status_flags
404 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
411 outs => [ "low_res", "high_res" ],
413 modified_flags => $status_flags
419 cmp_attr => "return 1;",
425 cmp_attr => "return 1;",
430 # we should not rematrialize this node. It produces 2 results and has
431 # very strict constrains
432 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
433 emit => '. mul%M %unop3',
434 outs => [ "EAX", "EDX", "M" ],
435 ins => [ "base", "index", "val_high", "val_low", "mem" ],
438 modified_flags => $status_flags
442 # we should not rematrialize this node. It produces 2 results and has
443 # very strict constrains
445 cmp_attr => "return 1;",
446 outs => [ "EAX", "EDX", "M" ],
452 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
453 emit => '. imul%M %binop',
457 modified_flags => $status_flags
462 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
463 emit => '. imul%M %unop3',
464 outs => [ "EAX", "EDX", "M" ],
465 ins => [ "base", "index", "val_high", "val_low", "mem" ],
468 modified_flags => $status_flags
473 cmp_attr => "return 1;",
479 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
480 emit => '. and%M %binop',
483 modified_flags => $status_flags
488 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
489 emit => '. or%M %binop',
492 modified_flags => $status_flags
497 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
498 emit => '. xor%M %binop',
501 modified_flags => $status_flags
506 cmp_attr => "return 1;",
508 modified_flags => $status_flags
511 # not commutative operations
515 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
516 emit => '. sub%M %binop',
519 modified_flags => $status_flags
523 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
524 emit => '. sbb%M %binop',
527 modified_flags => $status_flags
533 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
540 outs => [ "low_res", "high_res" ],
542 modified_flags => $status_flags
547 cmp_attr => "return 1;",
552 cmp_attr => "return 1;",
558 state => "exc_pinned",
559 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
560 attr => "ia32_op_flavour_t dm_flav",
561 init_attr => "attr->data.op_flav = dm_flav;",
562 emit => ". idiv%M %unop4",
563 outs => [ "div_res", "mod_res", "M" ],
566 modified_flags => $status_flags
571 state => "exc_pinned",
572 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
573 attr => "ia32_op_flavour_t dm_flav",
574 init_attr => "attr->data.op_flav = dm_flav;",
575 emit => ". div%M %unop4",
576 outs => [ "div_res", "mod_res", "M" ],
579 modified_flags => $status_flags
584 # "in_r3" would be enough as out requirement, but the register allocator
585 # does strange things then and doesn't respect the constraint for in4
586 # if the same value is attached to in3 and in4 (if you have "i << i" in C)
587 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
588 ins => [ "base", "index", "left", "right", "mem" ],
589 emit => '. shl%M %binop',
592 modified_flags => $status_flags
596 cmp_attr => "return 1;",
602 # Out requirements is: different from all in
603 # This is because, out must be different from LowPart and ShiftCount.
604 # We could say "!ecx !in_r4" but it can occur, that all values live through
605 # this Shift and the only value dying is the ShiftCount. Then there would be
606 # a register missing, as result must not be ecx and all other registers are
607 # occupied. What we should write is "!in_r4 !in_r5", but this is not
608 # supported (and probably never will). So we create artificial interferences
609 # of the result with all inputs, so the spiller can always assure a free
611 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
614 if (get_ia32_immop_type(node) == ia32_ImmNone) {
615 if (get_ia32_op_type(node) == ia32_AddrModeD) {
616 . shld%M %%cl, %S3, %AM
618 . shld%M %%cl, %S3, %S2
621 if (get_ia32_op_type(node) == ia32_AddrModeD) {
622 . shld%M %C, %S3, %AM
624 . shld%M %C, %S3, %S2
631 modified_flags => $status_flags
635 cmp_attr => "return 1;",
641 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
642 emit => '. shr%M %binop',
645 modified_flags => $status_flags
649 cmp_attr => "return 1;",
655 # Out requirements is: different from all in
656 # This is because, out must be different from LowPart and ShiftCount.
657 # We could say "!ecx !in_r4" but it can occur, that all values live through
658 # this Shift and the only value dying is the ShiftCount. Then there would be a
659 # register missing, as result must not be ecx and all other registers are
660 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
661 # (and probably never will). So we create artificial interferences of the result
662 # with all inputs, so the spiller can always assure a free register.
663 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
665 if (get_ia32_immop_type(node) == ia32_ImmNone) {
666 if (get_ia32_op_type(node) == ia32_AddrModeD) {
667 . shrd%M %%cl, %S3, %AM
669 . shrd%M %%cl, %S3, %S2
672 if (get_ia32_op_type(node) == ia32_AddrModeD) {
673 . shrd%M %C, %S3, %AM
675 . shrd%M %C, %S3, %S2
682 modified_flags => $status_flags
686 cmp_attr => "return 1;",
692 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
693 emit => '. sar%M %binop',
696 modified_flags => $status_flags
700 cmp_attr => "return 1;",
706 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
707 emit => '. ror%M %binop',
710 modified_flags => $status_flags
715 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
716 emit => '. rol%M %binop',
719 modified_flags => $status_flags
726 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
727 emit => '. neg%M %unop2',
728 ins => [ "base", "index", "val", "mem" ],
731 modified_flags => $status_flags
736 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
743 outs => [ "low_res", "high_res" ],
745 modified_flags => $status_flags
750 cmp_attr => "return 1;",
756 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
757 emit => '. inc%M %unop2',
760 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
765 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
766 emit => '. dec%M %unop2',
769 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
774 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
775 ins => [ "base", "index", "val", "mem" ],
776 emit => '. not%M %unop2',
787 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
788 out => [ "none", "none"] },
789 ins => [ "base", "index", "left", "right", "mem" ],
790 outs => [ "false", "true" ],
792 init_attr => "attr->pn_code = pnc;",
794 units => [ "BRANCH" ],
800 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
801 out => [ "none", "none" ] },
802 ins => [ "base", "index", "left", "right", "mem" ],
803 outs => [ "false", "true" ],
805 init_attr => "attr->pn_code = pnc;",
807 units => [ "BRANCH" ],
813 reg_req => { in => [ "gp" ], out => [ "none" ] },
815 units => [ "BRANCH" ],
822 reg_req => { in => [ "gp", "gp", "gp", "none" ] },
823 ins => [ "base", "index", "val", "mem" ],
824 emit => '. jmp *%unop2',
825 units => [ "BRANCH" ],
833 reg_req => { out => [ "gp" ] },
842 reg_req => { out => [ "gp_UKNWN" ] },
852 reg_req => { out => [ "vfp_UKNWN" ] },
856 attr_type => "ia32_x87_attr_t",
863 reg_req => { out => [ "xmm_UKNWN" ] },
873 reg_req => { out => [ "gp_NOREG" ] },
883 reg_req => { out => [ "vfp_NOREG" ] },
887 attr_type => "ia32_x87_attr_t",
894 reg_req => { out => [ "xmm_NOREG" ] },
904 reg_req => { out => [ "fp_cw" ] },
908 modified_flags => $fpcw_flags
914 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
916 emit => ". fldcw %AM",
919 modified_flags => $fpcw_flags
925 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
927 emit => ". fnstcw %AM",
933 # we should not rematrialize this node. It produces 2 results and has
934 # very strict constrains
935 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
936 ins => [ "val", "globbered" ],
944 # Note that we add additional latency values depending on address mode, so a
945 # lateny of 0 for load is correct
949 state => "exc_pinned",
950 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
951 ins => [ "base", "index", "mem" ],
952 outs => [ "res", "M" ],
954 emit => ". mov%SE%ME%.l %AM, %D0",
960 cmp_attr => "return 1;",
961 outs => [ "res", "M" ],
967 cmp_attr => "return 1;",
968 state => "exc_pinned",
975 state => "exc_pinned",
976 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
977 ins => [ "base", "index", "val", "mem" ],
978 emit => '. mov%M %binop',
986 state => "exc_pinned",
987 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
988 emit => '. mov%M %binop',
996 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
997 emit => '. leal %AM, %D0',
1001 modified_flags => [],
1005 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
1006 emit => '. push%M %unop2',
1007 ins => [ "base", "index", "val", "stack", "mem" ],
1008 outs => [ "stack:I|S", "M" ],
1011 modified_flags => [],
1015 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
1016 emit => '. pop%M %DAM1',
1017 outs => [ "stack:I|S", "res", "M" ],
1018 ins => [ "base", "index", "stack", "mem" ],
1019 latency => 3, # Pop is more expensive than Push on Athlon
1021 modified_flags => [],
1025 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1027 outs => [ "frame:I", "stack:I|S", "M" ],
1033 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1035 outs => [ "frame:I", "stack:I|S" ],
1042 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1043 emit => '. addl %binop',
1044 outs => [ "stack:S", "M" ],
1046 modified_flags => $status_flags
1051 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "gp", "none" ] },
1052 emit => ". subl %binop\n".
1053 ". movl %%esp, %D1",
1054 outs => [ "stack:I|S", "addr", "M" ],
1056 modified_flags => $status_flags
1061 reg_req => { out => [ "gp" ] },
1065 # the int instruction
1067 reg_req => { in => [ "none" ], out => [ "none" ] },
1069 attr => "tarval *tv",
1070 init_attr => "\tset_ia32_Immop_tarval(res, tv);",
1073 cmp_attr => "return 1;",
1077 #-----------------------------------------------------------------------------#
1078 # _____ _____ ______ __ _ _ _ #
1079 # / ____/ ____| ____| / _| | | | | | #
1080 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1081 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1082 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1083 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1084 #-----------------------------------------------------------------------------#
1086 # commutative operations
1090 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1091 emit => '. add%XXM %binop',
1099 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1100 emit => '. mul%XXM %binop',
1108 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1109 emit => '. max%XXM %binop',
1117 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1118 emit => '. min%XXM %binop',
1126 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1127 emit => '. andp%XSD %binop',
1135 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1136 emit => '. orp%XSD %binop',
1143 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1144 emit => '. xorp%XSD %binop',
1150 # not commutative operations
1154 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1155 emit => '. andnp%XSD %binop',
1163 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1164 emit => '. sub%XXM %binop',
1172 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1173 outs => [ "res", "M" ],
1174 emit => '. div%XXM %binop',
1183 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1191 op_flags => "L|X|Y",
1192 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1193 ins => [ "base", "index", "left", "right", "mem" ],
1194 outs => [ "false", "true" ],
1196 init_attr => "attr->pn_code = pnc;",
1204 reg_req => { out => [ "xmm" ] },
1205 emit => '. mov%XXM %C, %D0',
1215 state => "exc_pinned",
1216 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1217 emit => '. mov%XXM %AM, %D0',
1218 outs => [ "res", "M" ],
1225 state => "exc_pinned",
1226 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1227 emit => '. mov%XXM %binop',
1235 state => "exc_pinned",
1236 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1237 ins => [ "base", "index", "val", "mem" ],
1238 emit => '. mov%XXM %S2, %AM',
1246 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1247 emit => '. cvtsi2ss %D0, %AM',
1255 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1256 emit => '. cvtsi2sd %unop2',
1265 cmp_attr => "return 1;",
1271 cmp_attr => "return 1;",
1280 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1281 outs => [ "DST", "SRC", "CNT", "M" ],
1283 modified_flags => [ "DF" ]
1289 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1290 outs => [ "DST", "SRC", "M" ],
1292 modified_flags => [ "DF" ]
1298 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1300 ins => [ "base", "index", "val", "mem" ],
1302 modified_flags => $status_flags
1306 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1307 ins => [ "base", "index", "val", "mem" ],
1310 modified_flags => $status_flags
1314 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1321 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1328 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1336 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1337 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1338 attr => "pn_Cmp pn_code",
1339 init_attr => "attr->pn_code = pn_code;",
1347 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1348 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1349 attr => "pn_Cmp pn_code",
1350 init_attr => "attr->pn_code = pn_code;",
1358 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1366 reg_req => { in => [ "vfp", "vfp", "gp", "gp" ], out => [ "in_r4" ] },
1370 attr_type => "ia32_x87_attr_t",
1375 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1376 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1377 attr => "pn_Cmp pn_code",
1378 init_attr => "attr->pn_code = pn_code;",
1386 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1387 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1388 attr => "pn_Cmp pn_code",
1389 init_attr => "attr->pn_code = pn_code;",
1397 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1405 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1409 attr_type => "ia32_x87_attr_t",
1414 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1418 attr_type => "ia32_x87_attr_t",
1421 #----------------------------------------------------------#
1423 # (_) | | | | / _| | | | #
1424 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1425 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1426 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1427 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1429 # _ __ ___ __| | ___ ___ #
1430 # | '_ \ / _ \ / _` |/ _ \/ __| #
1431 # | | | | (_) | (_| | __/\__ \ #
1432 # |_| |_|\___/ \__,_|\___||___/ #
1433 #----------------------------------------------------------#
1437 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1438 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1442 attr_type => "ia32_x87_attr_t",
1447 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1448 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1452 attr_type => "ia32_x87_attr_t",
1457 cmp_attr => "return 1;",
1463 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1464 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1468 attr_type => "ia32_x87_attr_t",
1472 cmp_attr => "return 1;",
1477 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
1478 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1479 outs => [ "res", "M" ],
1482 attr_type => "ia32_x87_attr_t",
1486 cmp_attr => "return 1;",
1487 outs => [ "res", "M" ],
1492 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1493 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1497 attr_type => "ia32_x87_attr_t",
1501 cmp_attr => "return 1;",
1507 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1512 attr_type => "ia32_x87_attr_t",
1517 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1522 attr_type => "ia32_x87_attr_t",
1525 # virtual Load and Store
1529 state => "exc_pinned",
1530 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1531 ins => [ "base", "index", "mem" ],
1532 outs => [ "res", "M" ],
1533 attr => "ir_mode *store_mode",
1534 init_attr => "attr->attr.ls_mode = store_mode;",
1537 attr_type => "ia32_x87_attr_t",
1542 state => "exc_pinned",
1543 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1544 ins => [ "base", "index", "val", "mem" ],
1545 attr => "ir_mode *store_mode",
1546 init_attr => "attr->attr.ls_mode = store_mode;",
1550 attr_type => "ia32_x87_attr_t",
1556 state => "exc_pinned",
1557 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1558 outs => [ "res", "M" ],
1559 ins => [ "base", "index", "mem" ],
1562 attr_type => "ia32_x87_attr_t",
1566 cmp_attr => "return 1;",
1567 outs => [ "res", "M" ],
1572 state => "exc_pinned",
1573 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1574 ins => [ "base", "index", "val", "fpcw", "mem" ],
1578 attr_type => "ia32_x87_attr_t",
1582 cmp_attr => "return 1;",
1583 state => "exc_pinned",
1593 reg_req => { out => [ "vfp" ] },
1597 attr_type => "ia32_x87_attr_t",
1602 reg_req => { out => [ "vfp" ] },
1606 attr_type => "ia32_x87_attr_t",
1611 reg_req => { out => [ "vfp" ] },
1615 attr_type => "ia32_x87_attr_t",
1620 reg_req => { out => [ "vfp" ] },
1624 attr_type => "ia32_x87_attr_t",
1629 reg_req => { out => [ "vfp" ] },
1633 attr_type => "ia32_x87_attr_t",
1638 reg_req => { out => [ "vfp" ] },
1642 attr_type => "ia32_x87_attr_t",
1647 reg_req => { out => [ "vfp" ] },
1651 attr_type => "ia32_x87_attr_t",
1657 reg_req => { out => [ "vfp" ] },
1661 attr_type => "ia32_x87_attr_t",
1668 op_flags => "L|X|Y",
1669 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1670 ins => [ "left", "right" ],
1671 outs => [ "false", "true", "temp_reg_eax" ],
1673 init_attr => "attr->attr.pn_code = pnc;",
1676 attr_type => "ia32_x87_attr_t",
1679 #------------------------------------------------------------------------#
1680 # ___ _____ __ _ _ _ #
1681 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1682 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1683 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1684 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1685 #------------------------------------------------------------------------#
1687 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1688 # are swapped, we work this around in the emitter...
1692 rd_constructor => "NONE",
1694 emit => '. fadd%XM %x87_binop',
1695 attr_type => "ia32_x87_attr_t",
1700 rd_constructor => "NONE",
1702 emit => '. faddp%XM %x87_binop',
1703 attr_type => "ia32_x87_attr_t",
1708 rd_constructor => "NONE",
1710 emit => '. fmul%XM %x87_binop',
1711 attr_type => "ia32_x87_attr_t",
1716 rd_constructor => "NONE",
1718 emit => '. fmulp%XM %x87_binop',,
1719 attr_type => "ia32_x87_attr_t",
1724 rd_constructor => "NONE",
1726 emit => '. fsub%XM %x87_binop',
1727 attr_type => "ia32_x87_attr_t",
1732 rd_constructor => "NONE",
1734 # see note about gas bugs
1735 emit => '. fsubrp%XM %x87_binop',
1736 attr_type => "ia32_x87_attr_t",
1741 rd_constructor => "NONE",
1744 emit => '. fsubr%XM %x87_binop',
1745 attr_type => "ia32_x87_attr_t",
1750 rd_constructor => "NONE",
1753 # see note about gas bugs
1754 emit => '. fsubp%XM %x87_binop',
1755 attr_type => "ia32_x87_attr_t",
1760 rd_constructor => "NONE",
1763 attr_type => "ia32_x87_attr_t",
1766 # this node is just here, to keep the simulator running
1767 # we can omit this when a fprem simulation function exists
1770 rd_constructor => "NONE",
1773 attr_type => "ia32_x87_attr_t",
1778 rd_constructor => "NONE",
1780 emit => '. fdiv%XM %x87_binop',
1781 attr_type => "ia32_x87_attr_t",
1786 rd_constructor => "NONE",
1788 # see note about gas bugs
1789 emit => '. fdivrp%XM %x87_binop',
1790 attr_type => "ia32_x87_attr_t",
1795 rd_constructor => "NONE",
1797 emit => '. fdivr%XM %x87_binop',
1798 attr_type => "ia32_x87_attr_t",
1803 rd_constructor => "NONE",
1805 # see note about gas bugs
1806 emit => '. fdivp%XM %x87_binop',
1807 attr_type => "ia32_x87_attr_t",
1812 rd_constructor => "NONE",
1815 attr_type => "ia32_x87_attr_t",
1820 rd_constructor => "NONE",
1823 attr_type => "ia32_x87_attr_t",
1826 # x87 Load and Store
1829 rd_constructor => "NONE",
1830 op_flags => "R|L|F",
1831 state => "exc_pinned",
1833 emit => '. fld%XM %AM',
1834 attr_type => "ia32_x87_attr_t",
1838 rd_constructor => "NONE",
1839 op_flags => "R|L|F",
1840 state => "exc_pinned",
1842 emit => '. fst%XM %AM',
1844 attr_type => "ia32_x87_attr_t",
1848 rd_constructor => "NONE",
1849 op_flags => "R|L|F",
1850 state => "exc_pinned",
1852 emit => '. fstp%XM %AM',
1854 attr_type => "ia32_x87_attr_t",
1861 rd_constructor => "NONE",
1863 emit => '. fild%XM %AM',
1864 attr_type => "ia32_x87_attr_t",
1869 state => "exc_pinned",
1870 rd_constructor => "NONE",
1872 emit => '. fist%XM %AM',
1874 attr_type => "ia32_x87_attr_t",
1879 state => "exc_pinned",
1880 rd_constructor => "NONE",
1882 emit => '. fistp%XM %AM',
1884 attr_type => "ia32_x87_attr_t",
1890 op_flags => "R|c|K",
1894 attr_type => "ia32_x87_attr_t",
1898 op_flags => "R|c|K",
1902 attr_type => "ia32_x87_attr_t",
1906 op_flags => "R|c|K",
1910 attr_type => "ia32_x87_attr_t",
1914 op_flags => "R|c|K",
1918 attr_type => "ia32_x87_attr_t",
1922 op_flags => "R|c|K",
1926 attr_type => "ia32_x87_attr_t",
1930 op_flags => "R|c|K",
1933 emit => '. fldll2t',
1934 attr_type => "ia32_x87_attr_t",
1938 op_flags => "R|c|K",
1942 attr_type => "ia32_x87_attr_t",
1946 # Note that it is NEVER allowed to do CSE on these nodes
1947 # Moreover, note the virtual register requierements!
1952 cmp_attr => "return 1;",
1953 emit => '. fxch %X0',
1954 attr_type => "ia32_x87_attr_t",
1960 cmp_attr => "return 1;",
1961 emit => '. fld %X0',
1962 attr_type => "ia32_x87_attr_t",
1967 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1968 cmp_attr => "return 1;",
1969 emit => '. fld %X0',
1970 attr_type => "ia32_x87_attr_t",
1976 cmp_attr => "return 1;",
1977 emit => '. fstp %X0',
1978 attr_type => "ia32_x87_attr_t",
1984 op_flags => "L|X|Y",
1986 attr_type => "ia32_x87_attr_t",
1990 op_flags => "L|X|Y",
1992 attr_type => "ia32_x87_attr_t",
1996 op_flags => "L|X|Y",
1998 attr_type => "ia32_x87_attr_t",
2002 op_flags => "L|X|Y",
2004 attr_type => "ia32_x87_attr_t",
2008 op_flags => "L|X|Y",
2010 attr_type => "ia32_x87_attr_t",
2014 op_flags => "L|X|Y",
2016 attr_type => "ia32_x87_attr_t",
2020 # -------------------------------------------------------------------------------- #
2021 # ____ ____ _____ _ _ #
2022 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2023 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2024 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2025 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2027 # -------------------------------------------------------------------------------- #
2030 # Spilling and reloading of SSE registers, hardcoded, not generated #
2034 state => "exc_pinned",
2035 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2036 emit => '. movdqu %D0, %AM',
2037 outs => [ "res", "M" ],
2043 state => "exc_pinned",
2044 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2045 emit => '. movdqu %binop',
2052 # Include the generated SIMD node specification written by the SIMD optimization
2053 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2054 unless ($return = do $my_script_name) {
2055 warn "couldn't parse $my_script_name: $@" if $@;
2056 warn "couldn't do $my_script_name: $!" unless defined $return;
2057 warn "couldn't run $my_script_name" unless $return;