3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
38 # ... # (all nodes you need to describe)
40 # ); # close the %nodes initializer
42 # op_flags: flags for the operation, OPTIONAL (default is "N")
43 # the op_flags correspond to the firm irop_flags:
46 # C irop_flag_commutative
47 # X irop_flag_cfopcode
48 # I irop_flag_ip_cfopcode
51 # H irop_flag_highlevel
52 # c irop_flag_constlike
55 # irn_flags: special node flags, OPTIONAL (default is 0)
56 # following irn_flags are supported:
59 # I ignore for register allocation
60 # S modifies stack pointer
62 # state: state of the operation, OPTIONAL (default is "floats")
64 # arity: arity of the operation, MUST NOT BE OMITTED
66 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
67 # are always the first 3 arguments and are always autmatically
69 # If this key is missing the following arguments will be created:
70 # for i = 1 .. arity: ir_node *op_i
73 # outs: if a node defines more than one output, the names of the projections
74 # nodes having outs having automatically the mode mode_T
75 # One can also annotate some flags for each out, additional to irn_flags.
76 # They are separated from name with a colon ':', and concatenated by pipe '|'
77 # Only I and S are available at the moment (same meaning as in irn_flags).
78 # example: [ "frame:I", "stack:I|S", "M" ]
80 # comment: OPTIONAL comment for the node constructor
82 # rd_constructor: for every operation there will be a
83 # new_rd_<arch>_<op-name> function with the arguments from above
84 # which creates the ir_node corresponding to the defined operation
85 # you can either put the complete source code of this function here
87 # This key is OPTIONAL. If omitted, the following constructor will
89 # if (!op_<arch>_<op-name>) assert(0);
93 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
96 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
98 # latency: the latency of the operation, default is 1
102 # 0 - no special type
103 # 1 - caller save (register must be saved by the caller of a function)
104 # 2 - callee save (register must be saved by the called function)
105 # 4 - ignore (do not assign this register)
106 # 8 - emitter can choose an arbitrary register of this class
107 # 16 - the register is a virtual one
108 # 32 - register represents a state
109 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
112 { name => "eax", type => 1 },
113 { name => "edx", type => 1 },
114 { name => "ebx", type => 2 },
115 { name => "ecx", type => 1 },
116 { name => "esi", type => 2 },
117 { name => "edi", type => 2 },
118 { name => "ebp", type => 2 },
119 { name => "esp", type => 4 },
120 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
121 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
122 { mode => "mode_Iu" }
125 { name => "mm0", type => 4 },
126 { name => "mm1", type => 4 },
127 { name => "mm2", type => 4 },
128 { name => "mm3", type => 4 },
129 { name => "mm4", type => 4 },
130 { name => "mm5", type => 4 },
131 { name => "mm6", type => 4 },
132 { name => "mm7", type => 4 },
136 { name => "xmm0", type => 1 },
137 { name => "xmm1", type => 1 },
138 { name => "xmm2", type => 1 },
139 { name => "xmm3", type => 1 },
140 { name => "xmm4", type => 1 },
141 { name => "xmm5", type => 1 },
142 { name => "xmm6", type => 1 },
143 { name => "xmm7", type => 1 },
144 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
145 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
149 { name => "vf0", type => 1 | 16 },
150 { name => "vf1", type => 1 | 16 },
151 { name => "vf2", type => 1 | 16 },
152 { name => "vf3", type => 1 | 16 },
153 { name => "vf4", type => 1 | 16 },
154 { name => "vf5", type => 1 | 16 },
155 { name => "vf6", type => 1 | 16 },
156 { name => "vf7", type => 1 | 16 },
157 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
158 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
162 { name => "st0", realname => "st", type => 4 },
163 { name => "st1", realname => "st(1)", type => 4 },
164 { name => "st2", realname => "st(2)", type => 4 },
165 { name => "st3", realname => "st(3)", type => 4 },
166 { name => "st4", realname => "st(4)", type => 4 },
167 { name => "st5", realname => "st(5)", type => 4 },
168 { name => "st6", realname => "st(6)", type => 4 },
169 { name => "st7", realname => "st(7)", type => 4 },
172 fp_cw => [ # the floating point control word
173 { name => "fpcw", type => 4 | 32},
174 { mode => "mode_fpcw" }
177 { name => "eflags", type => 4 },
178 { mode => "mode_Iu" }
181 { name => "fpsw", type => 4 },
182 { mode => "mode_Hu" }
187 CF => { reg => "eflags", bit => 0 },
188 PF => { reg => "eflags", bit => 2 },
189 AF => { reg => "eflags", bit => 4 },
190 ZF => { reg => "eflags", bit => 6 },
191 SF => { reg => "eflags", bit => 7 },
192 TF => { reg => "eflags", bit => 8 },
193 IF => { reg => "eflags", bit => 9 },
194 DF => { reg => "eflags", bit => 10 },
195 OF => { reg => "eflags", bit => 11 },
196 IOPL0 => { reg => "eflags", bit => 12 },
197 IOPL1 => { reg => "eflags", bit => 13 },
198 NT => { reg => "eflags", bit => 14 },
199 RF => { reg => "eflags", bit => 16 },
200 VM => { reg => "eflags", bit => 17 },
201 AC => { reg => "eflags", bit => 18 },
202 VIF => { reg => "eflags", bit => 19 },
203 VIP => { reg => "eflags", bit => 20 },
204 ID => { reg => "eflags", bit => 21 },
206 FP_IE => { reg => "fpsw", bit => 0 },
207 FP_DE => { reg => "fpsw", bit => 1 },
208 FP_ZE => { reg => "fpsw", bit => 2 },
209 FP_OE => { reg => "fpsw", bit => 3 },
210 FP_UE => { reg => "fpsw", bit => 4 },
211 FP_PE => { reg => "fpsw", bit => 5 },
212 FP_SF => { reg => "fpsw", bit => 6 },
213 FP_ES => { reg => "fpsw", bit => 7 },
214 FP_C0 => { reg => "fpsw", bit => 8 },
215 FP_C1 => { reg => "fpsw", bit => 9 },
216 FP_C2 => { reg => "fpsw", bit => 10 },
217 FP_TOP0 => { reg => "fpsw", bit => 11 },
218 FP_TOP1 => { reg => "fpsw", bit => 12 },
219 FP_TOP2 => { reg => "fpsw", bit => 13 },
220 FP_C3 => { reg => "fpsw", bit => 14 },
221 FP_B => { reg => "fpsw", bit => 15 },
223 FP_IM => { reg => "fpcw", bit => 0 },
224 FP_DM => { reg => "fpcw", bit => 1 },
225 FP_ZM => { reg => "fpcw", bit => 2 },
226 FP_OM => { reg => "fpcw", bit => 3 },
227 FP_UM => { reg => "fpcw", bit => 4 },
228 FP_PM => { reg => "fpcw", bit => 5 },
229 FP_PC0 => { reg => "fpcw", bit => 8 },
230 FP_PC1 => { reg => "fpcw", bit => 9 },
231 FP_RC0 => { reg => "fpcw", bit => 10 },
232 FP_RC1 => { reg => "fpcw", bit => 11 },
233 FP_X => { reg => "fpcw", bit => 12 }
237 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
238 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
239 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
240 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
245 bundels_per_cycle => 1
249 S0 => "${arch}_emit_source_register(env, node, 0);",
250 S1 => "${arch}_emit_source_register(env, node, 1);",
251 S2 => "${arch}_emit_source_register(env, node, 2);",
252 S3 => "${arch}_emit_source_register(env, node, 3);",
253 S4 => "${arch}_emit_source_register(env, node, 4);",
254 S5 => "${arch}_emit_source_register(env, node, 5);",
255 D0 => "${arch}_emit_dest_register(env, node, 0);",
256 D1 => "${arch}_emit_dest_register(env, node, 1);",
257 D2 => "${arch}_emit_dest_register(env, node, 2);",
258 D3 => "${arch}_emit_dest_register(env, node, 3);",
259 D4 => "${arch}_emit_dest_register(env, node, 4);",
260 D5 => "${arch}_emit_dest_register(env, node, 5);",
261 X0 => "${arch}_emit_x87_name(env, node, 0);",
262 X1 => "${arch}_emit_x87_name(env, node, 1);",
263 X2 => "${arch}_emit_x87_name(env, node, 2);",
264 C => "${arch}_emit_immediate(env, node);",
265 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
266 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
267 ia32_emit_mode_suffix(env, node);",
268 M => "${arch}_emit_mode_suffix(env, node);",
269 XM => "${arch}_emit_x87_mode_suffix(env, node);",
270 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
271 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
272 AM => "${arch}_emit_am(env, node);",
273 unop => "${arch}_emit_unop(env, node);",
274 binop => "${arch}_emit_binop(env, node);",
275 x87_binop => "${arch}_emit_x87_binop(env, node);",
278 #--------------------------------------------------#
281 # _ __ _____ __ _ _ __ ___ _ __ ___ #
282 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
283 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
284 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
287 #--------------------------------------------------#
289 $default_cmp_attr = "return ia32_compare_attr(attr_a, attr_b);";
290 $default_attr_type = "ia32_attr_t";
295 $mode_xmm = "mode_E";
296 $mode_gp = "mode_Iu";
297 $mode_fpcw = "mode_fpcw";
298 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
299 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
300 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
308 reg_req => { out => [ "gp_NOREG" ] },
315 out_arity => "variable",
318 #-----------------------------------------------------------------#
321 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
322 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
323 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
324 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
327 #-----------------------------------------------------------------#
329 # commutative operations
332 # All nodes supporting Addressmode have 5 INs:
333 # 1 - base r1 == NoReg in case of no AM or no base
334 # 2 - index r2 == NoReg in case of no AM or no index
335 # 3 - op1 r3 == always present
336 # 4 - op2 r4 == NoReg in case of immediate operation
337 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
341 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
342 ins => [ "base", "index", "left", "right", "mem" ],
343 emit => '. add%M %binop',
346 modified_flags => $status_flags
350 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
351 emit => '. adc%M %binop',
354 modified_flags => $status_flags
360 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
367 outs => [ "low_res", "high_res" ],
369 modified_flags => $status_flags
375 cmp_attr => "return 1;",
381 cmp_attr => "return 1;",
386 # we should not rematrialize this node. It produces 2 results and has
387 # very strict constrains
388 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
389 emit => '. mul%M %unop',
390 outs => [ "EAX", "EDX", "M" ],
393 modified_flags => $status_flags
397 # we should not rematrialize this node. It produces 2 results and has
398 # very strict constrains
400 cmp_attr => "return 1;",
401 outs => [ "EAX", "EDX", "M" ],
407 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
408 emit => '. imul%M %binop',
412 modified_flags => $status_flags
417 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
418 emit => '. imul%M %unop',
419 outs => [ "EAX", "EDX", "M" ],
422 modified_flags => $status_flags
427 cmp_attr => "return 1;",
433 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
434 emit => '. and%M %binop',
437 modified_flags => $status_flags
442 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
443 emit => '. or%M %binop',
446 modified_flags => $status_flags
451 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
452 emit => '. xor%M %binop',
455 modified_flags => $status_flags
460 cmp_attr => "return 1;",
462 modified_flags => $status_flags
465 # not commutative operations
469 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
470 emit => '. sub%M %binop',
473 modified_flags => $status_flags
477 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
478 emit => '. sbb%M %binop',
481 modified_flags => $status_flags
487 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
494 outs => [ "low_res", "high_res" ],
496 modified_flags => $status_flags
501 cmp_attr => "return 1;",
506 cmp_attr => "return 1;",
512 state => "exc_pinned",
513 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
514 attr => "ia32_op_flavour_t dm_flav",
515 init_attr => "attr->data.op_flav = dm_flav;",
516 emit => ". idiv%M %unop",
517 outs => [ "div_res", "mod_res", "M" ],
520 modified_flags => $status_flags
525 state => "exc_pinned",
526 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
527 attr => "ia32_op_flavour_t dm_flav",
528 init_attr => "attr->data.op_flav = dm_flav;",
529 emit => ". div%M %unop",
530 outs => [ "div_res", "mod_res", "M" ],
533 modified_flags => $status_flags
538 # "in_r3" would be enough as out requirement, but the register allocator
539 # does strange things then and doesn't respect the constraint for in4
540 # if the same value is attached to in3 and in4 (if you have "i << i" in C)
541 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
542 ins => [ "base", "index", "left", "right", "mem" ],
543 emit => '. shl%M %binop',
546 modified_flags => $status_flags
550 cmp_attr => "return 1;",
556 # Out requirements is: different from all in
557 # This is because, out must be different from LowPart and ShiftCount.
558 # We could say "!ecx !in_r4" but it can occur, that all values live through
559 # this Shift and the only value dying is the ShiftCount. Then there would be
560 # a register missing, as result must not be ecx and all other registers are
561 # occupied. What we should write is "!in_r4 !in_r5", but this is not
562 # supported (and probably never will). So we create artificial interferences
563 # of the result with all inputs, so the spiller can always assure a free
565 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
568 if (get_ia32_immop_type(node) == ia32_ImmNone) {
569 if (get_ia32_op_type(node) == ia32_AddrModeD) {
570 . shld%M %%cl, %S3, %AM
572 . shld%M %%cl, %S3, %S2
575 if (get_ia32_op_type(node) == ia32_AddrModeD) {
576 . shld%M %C, %S3, %AM
578 . shld%M %C, %S3, %S2
585 modified_flags => $status_flags
589 cmp_attr => "return 1;",
595 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
596 emit => '. shr%M %binop',
599 modified_flags => $status_flags
603 cmp_attr => "return 1;",
609 # Out requirements is: different from all in
610 # This is because, out must be different from LowPart and ShiftCount.
611 # We could say "!ecx !in_r4" but it can occur, that all values live through
612 # this Shift and the only value dying is the ShiftCount. Then there would be a
613 # register missing, as result must not be ecx and all other registers are
614 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
615 # (and probably never will). So we create artificial interferences of the result
616 # with all inputs, so the spiller can always assure a free register.
617 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
619 if (get_ia32_immop_type(node) == ia32_ImmNone) {
620 if (get_ia32_op_type(node) == ia32_AddrModeD) {
621 . shrd%M %%cl, %S3, %AM
623 . shrd%M %%cl, %S3, %S2
626 if (get_ia32_op_type(node) == ia32_AddrModeD) {
627 . shrd%M %C, %S3, %AM
629 . shrd%M %C, %S3, %S2
636 modified_flags => $status_flags
640 cmp_attr => "return 1;",
646 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
647 emit => '. sar%M %binop',
650 modified_flags => $status_flags
654 cmp_attr => "return 1;",
660 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
661 emit => '. ror%M %binop',
664 modified_flags => $status_flags
669 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
670 emit => '. rol%M %binop',
673 modified_flags => $status_flags
680 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
681 emit => '. neg%M %unop',
684 modified_flags => $status_flags
689 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
696 outs => [ "low_res", "high_res" ],
698 modified_flags => $status_flags
703 cmp_attr => "return 1;",
709 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
710 emit => '. inc%M %unop',
713 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
718 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
719 emit => '. dec%M %unop',
722 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
727 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
728 emit => '. not%M %unop',
739 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none"] },
740 outs => [ "false", "true" ],
742 units => [ "BRANCH" ],
748 reg_req => { in => [ "gp", "gp" ], out => [ "none", "none" ] },
749 outs => [ "false", "true" ],
751 units => [ "BRANCH" ],
757 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none" ] },
758 outs => [ "false", "true" ],
759 units => [ "BRANCH" ],
765 reg_req => { in => [ "gp", "gp" ] },
766 units => [ "BRANCH" ],
772 reg_req => { in => [ "gp" ], out => [ "none" ] },
774 units => [ "BRANCH" ],
780 reg_req => { out => [ "gp" ] },
789 reg_req => { out => [ "gp_UKNWN" ] },
799 reg_req => { out => [ "vfp_UKNWN" ] },
809 reg_req => { out => [ "xmm_UKNWN" ] },
819 reg_req => { out => [ "gp_NOREG" ] },
829 reg_req => { out => [ "vfp_NOREG" ] },
839 reg_req => { out => [ "xmm_NOREG" ] },
849 reg_req => { out => [ "fp_cw" ] },
853 modified_flags => $fpcw_flags
858 state => "exc_pinned",
859 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
861 emit => ". fldcw %AM",
864 modified_flags => $fpcw_flags
869 state => "exc_pinned",
870 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
872 emit => ". fnstcw %AM",
878 # we should not rematrialize this node. It produces 2 results and has
879 # very strict constrains
880 reg_req => { in => [ "gp" ], out => [ "eax in_r1", "edx" ] },
882 outs => [ "EAX", "EDX" ],
890 state => "exc_pinned",
891 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
893 emit => ". mov%SE%ME%.l %AM, %D0",
894 outs => [ "res", "M" ],
900 cmp_attr => "return 1;",
901 outs => [ "res", "M" ],
907 cmp_attr => "return 1;",
908 state => "exc_pinned",
915 state => "exc_pinned",
916 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
917 emit => '. mov%M %binop',
925 state => "exc_pinned",
926 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
927 emit => '. mov%M %binop',
935 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1" ] },
936 emit => '. leal %AM, %D0',
940 modified_flags => [],
944 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
945 emit => '. push%M %unop',
946 outs => [ "stack:I|S", "M" ],
949 modified_flags => [],
953 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
954 emit => '. pop%M %unop',
955 outs => [ "stack:I|S", "res", "M" ],
958 modified_flags => [],
962 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
964 outs => [ "frame:I", "stack:I|S", "M" ],
970 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
972 outs => [ "frame:I", "stack:I|S" ],
979 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
980 emit => '. addl %binop',
981 outs => [ "stack:S", "M" ],
983 modified_flags => $status_flags
988 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
989 emit => '. subl %binop',
990 outs => [ "stack:S", "M" ],
992 modified_flags => $status_flags
997 reg_req => { out => [ "gp" ] },
1001 # the int instruction
1003 reg_req => { in => [ "none" ], out => [ "none" ] },
1005 attr => "tarval *tv",
1006 init_attr => "\tset_ia32_Immop_tarval(res, tv);",
1009 cmp_attr => "return 1;",
1013 #-----------------------------------------------------------------------------#
1014 # _____ _____ ______ __ _ _ _ #
1015 # / ____/ ____| ____| / _| | | | | | #
1016 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1017 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1018 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1019 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1020 #-----------------------------------------------------------------------------#
1022 # commutative operations
1026 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1027 emit => '. add%XXM %binop',
1035 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1036 emit => '. mul%XXM %binop',
1044 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1045 emit => '. max%XXM %binop',
1053 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1054 emit => '. min%XXM %binop',
1062 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1063 emit => '. andp%XSD %binop',
1071 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1072 emit => '. orp%XSD %binop',
1079 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1080 emit => '. xorp%XSD %binop',
1086 # not commutative operations
1090 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1091 emit => '. andnp%XSD %binop',
1099 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1100 emit => '. sub%XXM %binop',
1108 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1109 outs => [ "res", "M" ],
1110 emit => '. div%XXM %binop',
1119 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1127 op_flags => "L|X|Y",
1128 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1129 outs => [ "false", "true" ],
1137 reg_req => { out => [ "xmm" ] },
1138 emit => '. mov%XXM %C, %D0',
1148 state => "exc_pinned",
1149 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1150 emit => '. mov%XXM %AM, %D0',
1151 outs => [ "res", "M" ],
1158 state => "exc_pinned",
1159 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1160 emit => '. mov%XXM %binop',
1168 state => "exc_pinned",
1169 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1170 ins => [ "base", "index", "val", "mem" ],
1171 emit => '. mov%XXM %S2, %AM',
1179 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1180 emit => '. cvtsi2ss %D0, %AM',
1188 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1189 emit => '. cvtsi2sd %unop',
1198 cmp_attr => "return 1;",
1204 cmp_attr => "return 1;",
1211 state => "exc_pinned",
1212 reg_req => { in => [ "gp", "gp", "none" ] },
1213 emit => '. fstp%XM %AM',
1222 state => "exc_pinned",
1223 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vf0", "none" ] },
1224 ins => [ "base", "index", "mem" ],
1225 emit => '. fld%XM %AM',
1226 outs => [ "res", "M" ],
1236 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1237 outs => [ "DST", "SRC", "CNT", "M" ],
1239 modified_flags => [ "DF" ]
1245 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1246 outs => [ "DST", "SRC", "M" ],
1248 modified_flags => [ "DF" ]
1254 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1257 modified_flags => $status_flags
1261 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1264 modified_flags => $status_flags
1268 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1275 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1282 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1290 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "in_r4" ] },
1298 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "in_r3" ] },
1306 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1314 reg_req => { in => [ "vfp", "vfp", "gp", "gp" ], out => [ "in_r4" ] },
1322 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1330 reg_req => { in => [ "gp" ], out => [ "eax ebx ecx edx" ] },
1338 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1346 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1354 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1360 #----------------------------------------------------------#
1362 # (_) | | | | / _| | | | #
1363 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1364 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1365 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1366 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1368 # _ __ ___ __| | ___ ___ #
1369 # | '_ \ / _ \ / _` |/ _ \/ __| #
1370 # | | | | (_) | (_| | __/\__ \ #
1371 # |_| |_|\___/ \__,_|\___||___/ #
1372 #----------------------------------------------------------#
1376 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1384 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1392 cmp_attr => "return 1;",
1398 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1405 cmp_attr => "return 1;",
1410 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp", "none" ] },
1411 outs => [ "res", "M" ],
1417 cmp_attr => "return 1;",
1418 outs => [ "res", "M" ],
1423 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1430 cmp_attr => "return 1;",
1436 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1444 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1452 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1460 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1468 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1474 # virtual Load and Store
1478 state => "exc_pinned",
1479 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1480 outs => [ "res", "M" ],
1487 state => "exc_pinned",
1488 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1497 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1498 outs => [ "res", "M" ],
1504 cmp_attr => "return 1;",
1505 outs => [ "res", "M" ],
1510 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1517 cmp_attr => "return 1;",
1527 reg_req => { out => [ "vfp" ] },
1535 reg_req => { out => [ "vfp" ] },
1543 reg_req => { out => [ "vfp" ] },
1551 reg_req => { out => [ "vfp" ] },
1559 reg_req => { out => [ "vfp" ] },
1567 reg_req => { out => [ "vfp" ] },
1575 reg_req => { out => [ "vfp" ] },
1584 # init_attr => " set_ia32_ls_mode(res, mode);",
1585 reg_req => { out => [ "vfp" ] },
1595 op_flags => "L|X|Y",
1596 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "none", "none", "eax" ] },
1597 outs => [ "false", "true", "temp_reg_eax" ],
1602 #------------------------------------------------------------------------#
1603 # ___ _____ __ _ _ _ #
1604 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1605 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1606 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1607 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1608 #------------------------------------------------------------------------#
1610 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1611 # are swapped, we work this around in the emitter...
1615 rd_constructor => "NONE",
1617 emit => '. fadd%XM %x87_binop',
1622 rd_constructor => "NONE",
1624 emit => '. faddp %x87_binop',
1629 rd_constructor => "NONE",
1631 emit => '. fmul%XM %x87_binop',
1636 rd_constructor => "NONE",
1638 emit => '. fmulp %x87_binop',,
1643 rd_constructor => "NONE",
1645 emit => '. fsub%XM %x87_binop',
1650 rd_constructor => "NONE",
1652 # see note about gas bugs
1653 emit => '. fsubrp %x87_binop',
1658 rd_constructor => "NONE",
1661 emit => '. fsubr%XM %x87_binop',
1666 rd_constructor => "NONE",
1669 # see note about gas bugs
1670 emit => '. fsubp %x87_binop',
1675 rd_constructor => "NONE",
1680 # this node is just here, to keep the simulator running
1681 # we can omit this when a fprem simulation function exists
1684 rd_constructor => "NONE",
1691 rd_constructor => "NONE",
1693 emit => '. fdiv%XM %x87_binop',
1698 rd_constructor => "NONE",
1700 # see note about gas bugs
1701 emit => '. fdivrp %x87_binop',
1706 rd_constructor => "NONE",
1708 emit => '. fdivr%XM %x87_binop',
1713 rd_constructor => "NONE",
1715 # see note about gas bugs
1716 emit => '. fdivp %x87_binop',
1721 rd_constructor => "NONE",
1728 rd_constructor => "NONE",
1735 rd_constructor => "NONE",
1742 rd_constructor => "NONE",
1749 rd_constructor => "NONE",
1751 emit => '. fsqrt $',
1754 # x87 Load and Store
1757 rd_constructor => "NONE",
1758 op_flags => "R|L|F",
1759 state => "exc_pinned",
1761 emit => '. fld%XM %AM',
1765 rd_constructor => "NONE",
1766 op_flags => "R|L|F",
1767 state => "exc_pinned",
1769 emit => '. fst%XM %AM',
1774 rd_constructor => "NONE",
1775 op_flags => "R|L|F",
1776 state => "exc_pinned",
1778 emit => '. fstp%XM %AM',
1786 rd_constructor => "NONE",
1788 emit => '. fild%XM %AM',
1793 rd_constructor => "NONE",
1795 emit => '. fist%XM %AM',
1801 rd_constructor => "NONE",
1803 emit => '. fistp%XM %AM',
1810 op_flags => "R|c|K",
1817 op_flags => "R|c|K",
1824 op_flags => "R|c|K",
1831 op_flags => "R|c|K",
1838 op_flags => "R|c|K",
1845 op_flags => "R|c|K",
1848 emit => '. fldll2t',
1852 op_flags => "R|c|K",
1859 # Note that it is NEVER allowed to do CSE on these nodes
1860 # Moreover, note the virtual register requierements!
1865 cmp_attr => "return 1;",
1866 emit => '. fxch %X0',
1872 cmp_attr => "return 1;",
1873 emit => '. fld %X0',
1878 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1879 cmp_attr => "return 1;",
1880 emit => '. fld %X0',
1886 cmp_attr => "return 1;",
1887 emit => '. fstp %X0',
1893 op_flags => "L|X|Y",
1898 op_flags => "L|X|Y",
1903 op_flags => "L|X|Y",
1908 op_flags => "L|X|Y",
1913 op_flags => "L|X|Y",
1918 op_flags => "L|X|Y",
1923 # -------------------------------------------------------------------------------- #
1924 # ____ ____ _____ _ _ #
1925 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
1926 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
1927 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
1928 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
1930 # -------------------------------------------------------------------------------- #
1933 # Spilling and reloading of SSE registers, hardcoded, not generated #
1937 state => "exc_pinned",
1938 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1939 emit => '. movdqu %D0, %AM',
1940 outs => [ "res", "M" ],
1946 state => "exc_pinned",
1947 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1948 emit => '. movdqu %binop',
1955 # Include the generated SIMD node specification written by the SIMD optimization
1956 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
1957 unless ($return = do $my_script_name) {
1958 warn "couldn't parse $my_script_name: $@" if $@;
1959 warn "couldn't do $my_script_name: $!" unless defined $return;
1960 warn "couldn't run $my_script_name" unless $return;