3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
38 # ... # (all nodes you need to describe)
40 # ); # close the %nodes initializer
42 # op_flags: flags for the operation, OPTIONAL (default is "N")
43 # the op_flags correspond to the firm irop_flags:
46 # C irop_flag_commutative
47 # X irop_flag_cfopcode
48 # I irop_flag_ip_cfopcode
51 # H irop_flag_highlevel
52 # c irop_flag_constlike
55 # irn_flags: special node flags, OPTIONAL (default is 0)
56 # following irn_flags are supported:
59 # I ignore for register allocation
60 # S modifies stack pointer
62 # state: state of the operation, OPTIONAL (default is "floats")
64 # arity: arity of the operation, MUST NOT BE OMITTED
66 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
67 # are always the first 3 arguments and are always autmatically
69 # If this key is missing the following arguments will be created:
70 # for i = 1 .. arity: ir_node *op_i
73 # outs: if a node defines more than one output, the names of the projections
74 # nodes having outs having automatically the mode mode_T
75 # One can also annotate some flags for each out, additional to irn_flags.
76 # They are separated from name with a colon ':', and concatenated by pipe '|'
77 # Only I and S are available at the moment (same meaning as in irn_flags).
78 # example: [ "frame:I", "stack:I|S", "M" ]
80 # comment: OPTIONAL comment for the node constructor
82 # rd_constructor: for every operation there will be a
83 # new_rd_<arch>_<op-name> function with the arguments from above
84 # which creates the ir_node corresponding to the defined operation
85 # you can either put the complete source code of this function here
87 # This key is OPTIONAL. If omitted, the following constructor will
89 # if (!op_<arch>_<op-name>) assert(0);
93 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
96 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
98 # latency: the latency of the operation, default is 1
102 # 0 - no special type
103 # 1 - caller save (register must be saved by the caller of a function)
104 # 2 - callee save (register must be saved by the called function)
105 # 4 - ignore (do not assign this register)
106 # 8 - emitter can choose an arbitrary register of this class
107 # 16 - the register is a virtual one
108 # 32 - register represents a state
109 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
112 { name => "eax", type => 1 },
113 { name => "edx", type => 1 },
114 { name => "ebx", type => 2 },
115 { name => "ecx", type => 1 },
116 { name => "esi", type => 2 },
117 { name => "edi", type => 2 },
118 { name => "ebp", type => 2 },
119 { name => "esp", type => 4 },
120 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
121 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
122 { mode => "mode_Iu" }
125 { name => "xmm0", type => 1 },
126 { name => "xmm1", type => 1 },
127 { name => "xmm2", type => 1 },
128 { name => "xmm3", type => 1 },
129 { name => "xmm4", type => 1 },
130 { name => "xmm5", type => 1 },
131 { name => "xmm6", type => 1 },
132 { name => "xmm7", type => 1 },
133 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
134 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
138 { name => "vf0", type => 1 | 16 },
139 { name => "vf1", type => 1 | 16 },
140 { name => "vf2", type => 1 | 16 },
141 { name => "vf3", type => 1 | 16 },
142 { name => "vf4", type => 1 | 16 },
143 { name => "vf5", type => 1 | 16 },
144 { name => "vf6", type => 1 | 16 },
145 { name => "vf7", type => 1 | 16 },
146 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
147 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
151 { name => "st0", realname => "st", type => 4 },
152 { name => "st1", realname => "st(1)", type => 4 },
153 { name => "st2", realname => "st(2)", type => 4 },
154 { name => "st3", realname => "st(3)", type => 4 },
155 { name => "st4", realname => "st(4)", type => 4 },
156 { name => "st5", realname => "st(5)", type => 4 },
157 { name => "st6", realname => "st(6)", type => 4 },
158 { name => "st7", realname => "st(7)", type => 4 },
161 fp_cw => [ # the floating point control word
162 { name => "fpcw", type => 4 | 32},
163 { mode => "mode_fpcw" }
166 { name => "eflags", type => 4 },
167 { mode => "mode_Iu" }
170 { name => "fpsw", type => 4 },
171 { mode => "mode_Hu" }
176 CF => { reg => "eflags", bit => 0 },
177 PF => { reg => "eflags", bit => 2 },
178 AF => { reg => "eflags", bit => 4 },
179 ZF => { reg => "eflags", bit => 6 },
180 SF => { reg => "eflags", bit => 7 },
181 TF => { reg => "eflags", bit => 8 },
182 IF => { reg => "eflags", bit => 9 },
183 DF => { reg => "eflags", bit => 10 },
184 OF => { reg => "eflags", bit => 11 },
185 IOPL0 => { reg => "eflags", bit => 12 },
186 IOPL1 => { reg => "eflags", bit => 13 },
187 NT => { reg => "eflags", bit => 14 },
188 RF => { reg => "eflags", bit => 16 },
189 VM => { reg => "eflags", bit => 17 },
190 AC => { reg => "eflags", bit => 18 },
191 VIF => { reg => "eflags", bit => 19 },
192 VIP => { reg => "eflags", bit => 20 },
193 ID => { reg => "eflags", bit => 21 },
195 FP_IE => { reg => "fpsw", bit => 0 },
196 FP_DE => { reg => "fpsw", bit => 1 },
197 FP_ZE => { reg => "fpsw", bit => 2 },
198 FP_OE => { reg => "fpsw", bit => 3 },
199 FP_UE => { reg => "fpsw", bit => 4 },
200 FP_PE => { reg => "fpsw", bit => 5 },
201 FP_SF => { reg => "fpsw", bit => 6 },
202 FP_ES => { reg => "fpsw", bit => 7 },
203 FP_C0 => { reg => "fpsw", bit => 8 },
204 FP_C1 => { reg => "fpsw", bit => 9 },
205 FP_C2 => { reg => "fpsw", bit => 10 },
206 FP_TOP0 => { reg => "fpsw", bit => 11 },
207 FP_TOP1 => { reg => "fpsw", bit => 12 },
208 FP_TOP2 => { reg => "fpsw", bit => 13 },
209 FP_C3 => { reg => "fpsw", bit => 14 },
210 FP_B => { reg => "fpsw", bit => 15 },
212 FP_IM => { reg => "fpcw", bit => 0 },
213 FP_DM => { reg => "fpcw", bit => 1 },
214 FP_ZM => { reg => "fpcw", bit => 2 },
215 FP_OM => { reg => "fpcw", bit => 3 },
216 FP_UM => { reg => "fpcw", bit => 4 },
217 FP_PM => { reg => "fpcw", bit => 5 },
218 FP_PC0 => { reg => "fpcw", bit => 8 },
219 FP_PC1 => { reg => "fpcw", bit => 9 },
220 FP_RC0 => { reg => "fpcw", bit => 10 },
221 FP_RC1 => { reg => "fpcw", bit => 11 },
222 FP_X => { reg => "fpcw", bit => 12 }
226 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
227 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
228 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
229 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
234 bundels_per_cycle => 1
238 S0 => "${arch}_emit_source_register(env, node, 0);",
239 S1 => "${arch}_emit_source_register(env, node, 1);",
240 S2 => "${arch}_emit_source_register(env, node, 2);",
241 S3 => "${arch}_emit_source_register(env, node, 3);",
242 S4 => "${arch}_emit_source_register(env, node, 4);",
243 S5 => "${arch}_emit_source_register(env, node, 5);",
244 D0 => "${arch}_emit_dest_register(env, node, 0);",
245 D1 => "${arch}_emit_dest_register(env, node, 1);",
246 D2 => "${arch}_emit_dest_register(env, node, 2);",
247 D3 => "${arch}_emit_dest_register(env, node, 3);",
248 D4 => "${arch}_emit_dest_register(env, node, 4);",
249 D5 => "${arch}_emit_dest_register(env, node, 5);",
250 X0 => "${arch}_emit_x87_name(env, node, 0);",
251 X1 => "${arch}_emit_x87_name(env, node, 1);",
252 X2 => "${arch}_emit_x87_name(env, node, 2);",
253 C => "${arch}_emit_immediate(env, node);",
254 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
255 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
256 ia32_emit_mode_suffix(env, node);",
257 M => "${arch}_emit_mode_suffix(env, node);",
258 XM => "${arch}_emit_x87_mode_suffix(env, node);",
259 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
260 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
261 AM => "${arch}_emit_am(env, node);",
262 unop => "${arch}_emit_unop(env, node);",
263 binop => "${arch}_emit_binop(env, node);",
264 x87_binop => "${arch}_emit_x87_binop(env, node);",
267 #--------------------------------------------------#
270 # _ __ _____ __ _ _ __ ___ _ __ ___ #
271 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
272 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
273 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
276 #--------------------------------------------------#
278 $default_cmp_attr = "return ia32_compare_attr(attr_a, attr_b);";
279 $default_attr_type = "ia32_attr_t";
284 $mode_xmm = "mode_E";
285 $mode_gp = "mode_Iu";
286 $mode_fpcw = "mode_fpcw";
287 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
288 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
289 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
295 # reg_req => { out => [ "NoReg_GP" ] },
297 # attr_type => "ia32_imm_t",
303 out_arity => "variable",
306 #-----------------------------------------------------------------#
309 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
310 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
311 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
312 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
315 #-----------------------------------------------------------------#
317 # commutative operations
320 # All nodes supporting Addressmode have 5 INs:
321 # 1 - base r1 == NoReg in case of no AM or no base
322 # 2 - index r2 == NoReg in case of no AM or no index
323 # 3 - op1 r3 == always present
324 # 4 - op2 r4 == NoReg in case of immediate operation
325 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
329 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
330 ins => [ "base", "index", "left", "right", "mem" ],
331 emit => '. add%M %binop',
334 modified_flags => $status_flags
338 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
339 emit => '. adc%M %binop',
342 modified_flags => $status_flags
348 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
355 outs => [ "low_res", "high_res" ],
357 modified_flags => $status_flags
363 cmp_attr => "return 1;",
369 cmp_attr => "return 1;",
374 # we should not rematrialize this node. It produces 2 results and has
375 # very strict constrains
376 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
377 emit => '. mul%M %unop',
378 outs => [ "EAX", "EDX", "M" ],
381 modified_flags => $status_flags
385 # we should not rematrialize this node. It produces 2 results and has
386 # very strict constrains
388 cmp_attr => "return 1;",
389 outs => [ "EAX", "EDX", "M" ],
395 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
396 emit => '. imul%M %binop',
400 modified_flags => $status_flags
405 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
406 emit => '. imul%M %unop',
407 outs => [ "EAX", "EDX", "M" ],
410 modified_flags => $status_flags
415 cmp_attr => "return 1;",
421 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
422 emit => '. and%M %binop',
425 modified_flags => $status_flags
430 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
431 emit => '. or%M %binop',
434 modified_flags => $status_flags
439 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
440 emit => '. xor%M %binop',
443 modified_flags => $status_flags
448 cmp_attr => "return 1;",
450 modified_flags => $status_flags
453 # not commutative operations
457 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
458 emit => '. sub%M %binop',
461 modified_flags => $status_flags
465 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
466 emit => '. sbb%M %binop',
469 modified_flags => $status_flags
475 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
482 outs => [ "low_res", "high_res" ],
484 modified_flags => $status_flags
489 cmp_attr => "return 1;",
494 cmp_attr => "return 1;",
500 state => "exc_pinned",
501 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
502 attr => "ia32_op_flavour_t dm_flav",
503 init_attr => "attr->data.op_flav = dm_flav;",
504 emit => ". idiv%M %unop",
505 outs => [ "div_res", "mod_res", "M" ],
508 modified_flags => $status_flags
513 state => "exc_pinned",
514 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
515 attr => "ia32_op_flavour_t dm_flav",
516 init_attr => "attr->data.op_flav = dm_flav;",
517 emit => ". div%M %unop",
518 outs => [ "div_res", "mod_res", "M" ],
521 modified_flags => $status_flags
526 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
527 ins => [ "base", "index", "left", "right", "mem" ],
528 emit => '. shl%M %binop',
531 modified_flags => $status_flags
535 cmp_attr => "return 1;",
541 # Out requirements is: different from all in
542 # This is because, out must be different from LowPart and ShiftCount.
543 # We could say "!ecx !in_r4" but it can occur, that all values live through
544 # this Shift and the only value dying is the ShiftCount. Then there would be a
545 # register missing, as result must not be ecx and all other registers are
546 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
547 # (and probably never will). So we create artificial interferences of the result
548 # with all inputs, so the spiller can always assure a free register.
549 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
552 if (get_ia32_immop_type(node) == ia32_ImmNone) {
553 if (get_ia32_op_type(node) == ia32_AddrModeD) {
554 . shld%M %%cl, %S3, %AM
556 . shld%M %%cl, %S3, %S2
559 if (get_ia32_op_type(node) == ia32_AddrModeD) {
560 . shld%M %C, %S3, %AM
562 . shld%M %C, %S3, %S2
569 modified_flags => $status_flags
573 cmp_attr => "return 1;",
579 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
580 emit => '. shr%M %binop',
583 modified_flags => $status_flags
587 cmp_attr => "return 1;",
593 # Out requirements is: different from all in
594 # This is because, out must be different from LowPart and ShiftCount.
595 # We could say "!ecx !in_r4" but it can occur, that all values live through
596 # this Shift and the only value dying is the ShiftCount. Then there would be a
597 # register missing, as result must not be ecx and all other registers are
598 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
599 # (and probably never will). So we create artificial interferences of the result
600 # with all inputs, so the spiller can always assure a free register.
601 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
603 if (get_ia32_immop_type(node) == ia32_ImmNone) {
604 if (get_ia32_op_type(node) == ia32_AddrModeD) {
605 . shrd%M %%cl, %S3, %AM
607 . shrd%M %%cl, %S3, %S2
610 if (get_ia32_op_type(node) == ia32_AddrModeD) {
611 . shrd%M %C, %S3, %AM
613 . shrd%M %C, %S3, %S2
620 modified_flags => $status_flags
624 cmp_attr => "return 1;",
630 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
631 emit => '. sar%M %binop',
634 modified_flags => $status_flags
638 cmp_attr => "return 1;",
644 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
645 emit => '. ror%M %binop',
648 modified_flags => $status_flags
653 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
654 emit => '. rol%M %binop',
657 modified_flags => $status_flags
664 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
665 emit => '. neg%M %unop',
668 modified_flags => $status_flags
673 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
680 outs => [ "low_res", "high_res" ],
682 modified_flags => $status_flags
687 cmp_attr => "return 1;",
693 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
694 emit => '. inc%M %unop',
697 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
702 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
703 emit => '. dec%M %unop',
706 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
711 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
712 emit => '. not%M %unop',
723 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none"] },
724 outs => [ "false", "true" ],
726 units => [ "BRANCH" ],
732 reg_req => { in => [ "gp", "gp" ], out => [ "none", "none" ] },
733 outs => [ "false", "true" ],
735 units => [ "BRANCH" ],
741 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none" ] },
742 outs => [ "false", "true" ],
743 units => [ "BRANCH" ],
749 reg_req => { in => [ "gp", "gp" ] },
750 units => [ "BRANCH" ],
756 reg_req => { in => [ "gp" ], out => [ "none" ] },
758 units => [ "BRANCH" ],
764 reg_req => { out => [ "gp" ] },
773 reg_req => { out => [ "gp_UKNWN" ] },
783 reg_req => { out => [ "vfp_UKNWN" ] },
793 reg_req => { out => [ "xmm_UKNWN" ] },
803 reg_req => { out => [ "gp_NOREG" ] },
813 reg_req => { out => [ "vfp_NOREG" ] },
823 reg_req => { out => [ "xmm_NOREG" ] },
833 reg_req => { out => [ "fp_cw" ] },
837 modified_flags => $fpcw_flags
842 state => "exc_pinned",
843 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
845 emit => ". fldcw %AM",
848 modified_flags => $fpcw_flags
853 state => "exc_pinned",
854 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
856 emit => ". fnstcw %AM",
862 # we should not rematrialize this node. It produces 2 results and has
863 # very strict constrains
864 reg_req => { in => [ "gp" ], out => [ "eax in_r1", "edx" ] },
866 outs => [ "EAX", "EDX" ],
874 state => "exc_pinned",
875 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
877 emit => ". mov%SE%ME%.l %AM, %D0",
878 outs => [ "res", "M" ],
884 cmp_attr => "return 1;",
885 outs => [ "res", "M" ],
891 cmp_attr => "return 1;",
892 state => "exc_pinned",
899 state => "exc_pinned",
900 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
901 emit => '. mov%M %binop',
909 state => "exc_pinned",
910 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
911 emit => '. mov%M %binop',
919 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1" ] },
920 emit => '. leal %AM, %D0',
924 modified_flags => [],
928 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
929 emit => '. push%M %unop',
930 outs => [ "stack:I|S", "M" ],
933 modified_flags => [],
937 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
938 emit => '. pop%M %unop',
939 outs => [ "stack:I|S", "res", "M" ],
942 modified_flags => [],
946 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
948 outs => [ "frame:I", "stack:I|S", "M" ],
954 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
956 outs => [ "frame:I", "stack:I|S" ],
963 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
964 emit => '. addl %binop',
965 outs => [ "stack:S", "M" ],
967 modified_flags => $status_flags
972 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
973 emit => '. subl %binop',
974 outs => [ "stack:S", "M" ],
976 modified_flags => $status_flags
981 reg_req => { out => [ "gp" ] },
985 # the int instruction
987 reg_req => { in => [ "none" ], out => [ "none" ] },
989 attr => "tarval *tv",
990 init_attr => "\tset_ia32_Immop_tarval(res, tv);",
993 cmp_attr => "return 1;",
997 #-----------------------------------------------------------------------------#
998 # _____ _____ ______ __ _ _ _ #
999 # / ____/ ____| ____| / _| | | | | | #
1000 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1001 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1002 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1003 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1004 #-----------------------------------------------------------------------------#
1006 # commutative operations
1010 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1011 emit => '. add%XXM %binop',
1019 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1020 emit => '. mul%XXM %binop',
1028 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1029 emit => '. max%XXM %binop',
1037 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1038 emit => '. min%XXM %binop',
1046 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1047 emit => '. andp%XSD %binop',
1055 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1056 emit => '. orp%XSD %binop',
1063 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1064 emit => '. xorp%XSD %binop',
1070 # not commutative operations
1074 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1075 emit => '. andnp%XSD %binop',
1083 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1084 emit => '. sub%XXM %binop',
1092 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1093 outs => [ "res", "M" ],
1094 emit => '. div%XXM %binop',
1103 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1111 op_flags => "L|X|Y",
1112 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1113 outs => [ "false", "true" ],
1121 reg_req => { out => [ "xmm" ] },
1122 emit => '. mov%XXM %C, %D0',
1132 state => "exc_pinned",
1133 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1134 emit => '. mov%XXM %AM, %D0',
1135 outs => [ "res", "M" ],
1142 state => "exc_pinned",
1143 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1144 emit => '. mov%XXM %binop',
1152 state => "exc_pinned",
1153 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1154 ins => [ "base", "index", "val", "mem" ],
1155 emit => '. mov%XXM %S2, %AM',
1163 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1164 emit => '. cvtsi2ss %D0, %AM',
1172 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1173 emit => '. cvtsi2sd %unop',
1182 cmp_attr => "return 1;",
1188 cmp_attr => "return 1;",
1195 state => "exc_pinned",
1196 reg_req => { in => [ "gp", "gp", "none" ] },
1197 emit => '. fstp%XM %AM',
1206 state => "exc_pinned",
1207 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vf0", "none" ] },
1208 ins => [ "base", "index", "mem" ],
1209 emit => '. fld%XM %AM',
1210 outs => [ "res", "M" ],
1220 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1221 outs => [ "DST", "SRC", "CNT", "M" ],
1223 modified_flags => [ "DF" ]
1229 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1230 outs => [ "DST", "SRC", "M" ],
1232 modified_flags => [ "DF" ]
1238 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1241 modified_flags => $status_flags
1245 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1248 modified_flags => $status_flags
1252 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1259 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1266 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1274 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "in_r4" ] },
1282 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "in_r3" ] },
1290 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1298 reg_req => { in => [ "vfp", "vfp", "gp", "gp" ], out => [ "in_r4" ] },
1306 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1314 reg_req => { in => [ "gp" ], out => [ "eax ebx ecx edx" ] },
1322 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1330 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1338 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1344 #----------------------------------------------------------#
1346 # (_) | | | | / _| | | | #
1347 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1348 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1349 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1350 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1352 # _ __ ___ __| | ___ ___ #
1353 # | '_ \ / _ \ / _` |/ _ \/ __| #
1354 # | | | | (_) | (_| | __/\__ \ #
1355 # |_| |_|\___/ \__,_|\___||___/ #
1356 #----------------------------------------------------------#
1360 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1368 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1376 cmp_attr => "return 1;",
1382 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1389 cmp_attr => "return 1;",
1394 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp", "none" ] },
1395 outs => [ "res", "M" ],
1401 cmp_attr => "return 1;",
1402 outs => [ "res", "M" ],
1407 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1414 cmp_attr => "return 1;",
1420 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1428 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1436 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1444 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1452 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1458 # virtual Load and Store
1462 state => "exc_pinned",
1463 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1464 outs => [ "res", "M" ],
1471 state => "exc_pinned",
1472 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1481 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1482 outs => [ "res", "M" ],
1488 cmp_attr => "return 1;",
1489 outs => [ "res", "M" ],
1494 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1501 cmp_attr => "return 1;",
1511 reg_req => { out => [ "vfp" ] },
1519 reg_req => { out => [ "vfp" ] },
1527 reg_req => { out => [ "vfp" ] },
1535 reg_req => { out => [ "vfp" ] },
1543 reg_req => { out => [ "vfp" ] },
1551 reg_req => { out => [ "vfp" ] },
1559 reg_req => { out => [ "vfp" ] },
1568 # init_attr => " set_ia32_ls_mode(res, mode);",
1569 reg_req => { out => [ "vfp" ] },
1579 op_flags => "L|X|Y",
1580 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "none", "none", "eax" ] },
1581 outs => [ "false", "true", "temp_reg_eax" ],
1586 #------------------------------------------------------------------------#
1587 # ___ _____ __ _ _ _ #
1588 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1589 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1590 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1591 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1592 #------------------------------------------------------------------------#
1594 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1595 # are swapped, we work this around in the emitter...
1599 rd_constructor => "NONE",
1601 emit => '. fadd%XM %x87_binop',
1606 rd_constructor => "NONE",
1608 emit => '. faddp %x87_binop',
1613 rd_constructor => "NONE",
1615 emit => '. fmul%XM %x87_binop',
1620 rd_constructor => "NONE",
1622 emit => '. fmulp %x87_binop',,
1627 rd_constructor => "NONE",
1629 emit => '. fsub%XM %x87_binop',
1634 rd_constructor => "NONE",
1636 # see note about gas bugs
1637 emit => '. fsubrp %x87_binop',
1642 rd_constructor => "NONE",
1645 emit => '. fsubr%XM %x87_binop',
1650 rd_constructor => "NONE",
1653 # see note about gas bugs
1654 emit => '. fsubp %x87_binop',
1659 rd_constructor => "NONE",
1664 # this node is just here, to keep the simulator running
1665 # we can omit this when a fprem simulation function exists
1668 rd_constructor => "NONE",
1675 rd_constructor => "NONE",
1677 emit => '. fdiv%XM %x87_binop',
1682 rd_constructor => "NONE",
1684 # see note about gas bugs
1685 emit => '. fdivrp %x87_binop',
1690 rd_constructor => "NONE",
1692 emit => '. fdivr%XM %x87_binop',
1697 rd_constructor => "NONE",
1699 # see note about gas bugs
1700 emit => '. fdivp %x87_binop',
1705 rd_constructor => "NONE",
1712 rd_constructor => "NONE",
1719 rd_constructor => "NONE",
1726 rd_constructor => "NONE",
1733 rd_constructor => "NONE",
1735 emit => '. fsqrt $',
1738 # x87 Load and Store
1741 rd_constructor => "NONE",
1742 op_flags => "R|L|F",
1743 state => "exc_pinned",
1745 emit => '. fld%XM %AM',
1749 rd_constructor => "NONE",
1750 op_flags => "R|L|F",
1751 state => "exc_pinned",
1753 emit => '. fst%XM %AM',
1758 rd_constructor => "NONE",
1759 op_flags => "R|L|F",
1760 state => "exc_pinned",
1762 emit => '. fstp%XM %AM',
1770 rd_constructor => "NONE",
1772 emit => '. fild%XM %AM',
1777 rd_constructor => "NONE",
1779 emit => '. fist%XM %AM',
1785 rd_constructor => "NONE",
1787 emit => '. fistp%XM %AM',
1794 op_flags => "R|c|K",
1801 op_flags => "R|c|K",
1808 op_flags => "R|c|K",
1815 op_flags => "R|c|K",
1822 op_flags => "R|c|K",
1829 op_flags => "R|c|K",
1832 emit => '. fldll2t',
1836 op_flags => "R|c|K",
1843 # Note that it is NEVER allowed to do CSE on these nodes
1844 # Moreover, note the virtual register requierements!
1849 cmp_attr => "return 1;",
1850 emit => '. fxch %X0',
1856 cmp_attr => "return 1;",
1857 emit => '. fld %X0',
1862 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1863 cmp_attr => "return 1;",
1864 emit => '. fld %X0',
1870 cmp_attr => "return 1;",
1871 emit => '. fstp %X0',
1877 op_flags => "L|X|Y",
1882 op_flags => "L|X|Y",
1887 op_flags => "L|X|Y",
1892 op_flags => "L|X|Y",
1897 op_flags => "L|X|Y",
1902 op_flags => "L|X|Y",
1907 # -------------------------------------------------------------------------------- #
1908 # ____ ____ _____ _ _ #
1909 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
1910 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
1911 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
1912 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
1914 # -------------------------------------------------------------------------------- #
1917 # Spilling and reloading of SSE registers, hardcoded, not generated #
1921 state => "exc_pinned",
1922 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1923 emit => '. movdqu %D0, %AM',
1924 outs => [ "res", "M" ],
1930 state => "exc_pinned",
1931 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1932 emit => '. movdqu %binop',
1939 # Include the generated SIMD node specification written by the SIMD optimization
1940 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
1941 unless ($return = do $my_script_name) {
1942 warn "couldn't parse $my_script_name: $@" if $@;
1943 warn "couldn't do $my_script_name: $!" unless defined $return;
1944 warn "couldn't run $my_script_name" unless $return;