3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 SB1 => "${arch}_emit_8bit_source_register(env, node, 1);",
257 SB2 => "${arch}_emit_8bit_source_register(env, node, 2);",
258 SB3 => "${arch}_emit_8bit_source_register(env, node, 3);",
259 SW0 => "${arch}_emit_16bit_source_register(env, node, 0);",
260 SI0 => "${arch}_emit_source_register_or_immediate(env, node, 0);",
261 SI1 => "${arch}_emit_source_register_or_immediate(env, node, 1);",
262 SI2 => "${arch}_emit_source_register_or_immediate(env, node, 2);",
263 SI3 => "${arch}_emit_source_register_or_immediate(env, node, 3);",
264 D0 => "${arch}_emit_dest_register(env, node, 0);",
265 D1 => "${arch}_emit_dest_register(env, node, 1);",
266 D2 => "${arch}_emit_dest_register(env, node, 2);",
267 D3 => "${arch}_emit_dest_register(env, node, 3);",
268 D4 => "${arch}_emit_dest_register(env, node, 4);",
269 D5 => "${arch}_emit_dest_register(env, node, 5);",
270 X0 => "${arch}_emit_x87_name(env, node, 0);",
271 X1 => "${arch}_emit_x87_name(env, node, 1);",
272 X2 => "${arch}_emit_x87_name(env, node, 2);",
273 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
274 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
275 ia32_emit_mode_suffix(env, node);",
276 M => "${arch}_emit_mode_suffix(env, node);",
277 XM => "${arch}_emit_x87_mode_suffix(env, node);",
278 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
279 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
280 AM => "${arch}_emit_am(env, node);",
281 unop0 => "${arch}_emit_unop(env, node, 0);",
282 unop1 => "${arch}_emit_unop(env, node, 1);",
283 unop2 => "${arch}_emit_unop(env, node, 2);",
284 unop3 => "${arch}_emit_unop(env, node, 3);",
285 unop4 => "${arch}_emit_unop(env, node, 4);",
286 unop5 => "${arch}_emit_unop(env, node, 5);",
287 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
288 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 1);",
289 binop => "${arch}_emit_binop(env, node);",
290 x87_binop => "${arch}_emit_x87_binop(env, node);",
293 #--------------------------------------------------#
296 # _ __ _____ __ _ _ __ ___ _ __ ___ #
297 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
298 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
299 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
302 #--------------------------------------------------#
304 $default_attr_type = "ia32_attr_t";
305 $default_copy_attr = "ia32_copy_attr";
307 sub ia32_custom_init_attr {
311 if(defined($node->{modified_flags})) {
312 $res .= "\t/*attr->data.flags |= arch_irn_flags_modify_flags;*/\n";
314 if(defined($node->{am})) {
315 my $am = $node->{am};
316 if($am eq "full,binary") {
317 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_binary);";
318 } elsif($am eq "full,unary") {
319 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_unary);";
320 } elsif($am eq "source,binary") {
321 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_binary);";
322 } elsif($am eq "dest,unary") {
323 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);";
324 } elsif($am eq "dest,binary") {
325 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);";
326 } elsif($am eq "dest,ternary") {
327 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);";
328 } elsif($am eq "source,ternary") {
329 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_ternary);";
330 } elsif($am eq "none") {
333 die("Invalid address mode '$am' specified on op $name");
338 $custom_init_attr_func = \&ia32_custom_init_attr;
341 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
343 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
344 "\tinit_ia32_x87_attributes(res);",
346 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
347 "\tinit_ia32_x87_attributes(res);".
348 "\tinit_ia32_asm_attributes(res);",
349 ia32_immediate_attr_t =>
350 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
351 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
355 ia32_attr_t => "ia32_compare_nodes_attr",
356 ia32_x87_attr_t => "ia32_compare_x87_attr",
357 ia32_asm_attr_t => "ia32_compare_asm_attr",
358 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
364 $mode_xmm = "mode_E";
365 $mode_gp = "mode_Iu";
366 $mode_fpcw = "mode_fpcw";
367 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
368 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
369 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
377 reg_req => { out => [ "gp_NOREG" ] },
378 attr => "ir_entity *symconst, int symconst_sign, long offset",
379 attr_type => "ia32_immediate_attr_t",
387 out_arity => "variable",
388 attr_type => "ia32_asm_attr_t",
395 reg_req => { out => [ "gp" ] },
400 cmp_attr => "return 1;",
403 #-----------------------------------------------------------------#
406 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
407 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
408 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
409 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
412 #-----------------------------------------------------------------#
414 # commutative operations
418 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
419 ins => [ "base", "index", "mem", "left", "right" ],
420 emit => '. add%M %binop',
424 modified_flags => $status_flags
429 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
430 ins => [ "base", "index", "mem", "val" ],
431 emit => ". add%M %SI3, %AM",
434 modified_flags => $status_flags
438 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "flags" ], out => [ "in_r4" ] },
439 ins => [ "base", "index", "mem", "left", "right", "eflags" ],
440 emit => '. adc%M %binop',
444 modified_flags => $status_flags
450 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
457 outs => [ "low_res", "high_res" ],
459 modified_flags => $status_flags
463 # we should not rematrialize this node. It produces 2 results and has
464 # very strict constrains
465 reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], out => [ "eax", "edx", "none" ] },
466 ins => [ "base", "index", "mem", "val_high", "val_low" ],
467 emit => '. mul%M %unop4',
468 outs => [ "EAX", "EDX", "M" ],
469 am => "source,binary",
472 modified_flags => $status_flags
476 # we should not rematrialize this node. It produces 2 results and has
477 # very strict constrains
479 cmp_attr => "return 1;",
480 outs => [ "EAX", "EDX", "M" ],
486 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
487 ins => [ "base", "index", "mem", "left", "right" ],
488 emit => '. imul%M %binop',
489 am => "source,binary",
493 modified_flags => $status_flags
498 reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], out => [ "eax", "edx", "none" ] },
499 ins => [ "base", "index", "mem", "val_high", "val_low" ],
500 emit => '. imul%M %unop4',
501 outs => [ "EAX", "EDX", "M" ],
502 am => "source,binary",
505 modified_flags => $status_flags
509 # we should not rematrialize this node. It produces 2 results and has
510 # very strict constrains
512 cmp_attr => "return 1;",
513 outs => [ "EAX", "EDX", "M" ],
519 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
520 ins => [ "base", "index", "mem", "left", "right" ],
522 emit => '. and%M %binop',
525 modified_flags => $status_flags
530 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
531 ins => [ "base", "index", "mem", "val" ],
532 emit => '. and%M %SI3, %AM',
535 modified_flags => $status_flags
540 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
541 ins => [ "base", "index", "mem", "left", "right" ],
543 emit => '. or%M %binop',
546 modified_flags => $status_flags
551 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
552 ins => [ "base", "index", "mem", "val" ],
553 emit => '. or%M %SI3, %AM',
556 modified_flags => $status_flags
561 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
562 ins => [ "base", "index", "mem", "left", "right" ],
564 emit => '. xor%M %binop',
567 modified_flags => $status_flags
572 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
573 ins => [ "base", "index", "mem", "val" ],
574 emit => '. xor%M %SI3, %AM',
577 modified_flags => $status_flags
580 # not commutative operations
584 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
585 ins => [ "base", "index", "mem", "left", "right" ],
587 emit => '. sub%M %binop',
590 modified_flags => $status_flags
595 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
596 ins => [ "base", "index", "mem", "val" ],
597 emit => '. sub%M %SI3, %AM',
600 modified_flags => $status_flags
604 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 !in_r5" ] },
605 ins => [ "base", "index", "mem", "left", "right" ],
607 emit => '. sbb%M %binop',
610 modified_flags => $status_flags
616 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
623 outs => [ "low_res", "high_res" ],
625 modified_flags => $status_flags
630 state => "exc_pinned",
631 reg_req => { in => [ "gp", "gp", "none", "eax", "edx", "gp" ], out => [ "eax", "edx", "none" ] },
632 ins => [ "base", "index", "mem", "left_low", "left_high", "right" ],
633 outs => [ "div_res", "mod_res", "M" ],
634 attr => "ia32_op_flavour_t dm_flav",
635 am => "source,ternary",
636 init_attr => "attr->data.op_flav = dm_flav;",
637 emit => ". idiv%M %unop5",
640 modified_flags => $status_flags
645 state => "exc_pinned",
646 reg_req => { in => [ "gp", "gp", "none", "eax", "edx", "gp" ], out => [ "eax", "edx", "none" ] },
647 ins => [ "base", "index", "mem", "left_low", "left_high", "right" ],
648 outs => [ "div_res", "mod_res", "M" ],
649 attr => "ia32_op_flavour_t dm_flav",
650 am => "source,ternary",
651 init_attr => "attr->data.op_flav = dm_flav;",
652 emit => ". div%M %unop5",
655 modified_flags => $status_flags
660 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
661 ins => [ "left", "right" ],
663 emit => '. shl %SB1, %S0',
666 modified_flags => $status_flags
671 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
672 ins => [ "base", "index", "mem", "count" ],
673 emit => '. shl%M %SB3, %AM',
676 modified_flags => $status_flags
680 cmp_attr => "return 1;",
681 # value, cnt, dependency
686 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
688 # Out requirements is: different from all in
689 # This is because, out must be different from LowPart and ShiftCount.
690 # We could say "!ecx !in_r4" but it can occur, that all values live through
691 # this Shift and the only value dying is the ShiftCount. Then there would be a
692 # register missing, as result must not be ecx and all other registers are
693 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
694 # (and probably never will). So we create artificial interferences of the result
695 # with all inputs, so the spiller can always assure a free register.
696 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
699 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
700 ins => [ "left_high", "left_low", "right" ],
701 am => "dest,ternary",
702 emit => '. shld%M %SB2, %S1, %S0',
706 modified_flags => $status_flags
710 cmp_attr => "return 1;",
716 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
717 ins => [ "val", "count" ],
719 emit => '. shr %SB1, %S0',
722 modified_flags => $status_flags
727 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
728 ins => [ "base", "index", "mem", "count" ],
729 emit => '. shr%M %SB3, %AM',
732 modified_flags => $status_flags
736 cmp_attr => "return 1;",
737 # value, cnt, dependency
742 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
744 # Out requirements is: different from all in
745 # This is because, out must be different from LowPart and ShiftCount.
746 # We could say "!ecx !in_r4" but it can occur, that all values live through
747 # this Shift and the only value dying is the ShiftCount. Then there would be a
748 # register missing, as result must not be ecx and all other registers are
749 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
750 # (and probably never will). So we create artificial interferences of the result
751 # with all inputs, so the spiller can always assure a free register.
752 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
755 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
756 ins => [ "left_high", "left_low", "right" ],
757 am => "dest,ternary",
758 emit => '. shrd%M %SB2, %S1, %S0',
762 modified_flags => $status_flags
766 cmp_attr => "return 1;",
772 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
773 ins => [ "val", "count" ],
775 emit => '. sar %SB1, %S0',
778 modified_flags => $status_flags
783 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
784 ins => [ "base", "index", "mem", "count" ],
785 emit => '. sar%M %SB3, %AM',
788 modified_flags => $status_flags
792 cmp_attr => "return 1;",
798 cmp_attr => "return 1;",
799 # value, cnt, dependency
805 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
806 ins => [ "val", "count" ],
808 emit => '. ror %SB1, %S0',
811 modified_flags => $status_flags
816 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
817 ins => [ "base", "index", "mem", "count" ],
818 emit => '. ror%M %SB3, %AM',
821 modified_flags => $status_flags
826 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
827 ins => [ "val", "count" ],
829 emit => '. rol %SB1, %S0',
832 modified_flags => $status_flags
837 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
838 ins => [ "base", "index", "mem", "count" ],
839 emit => '. rol%M %SB3, %AM',
842 modified_flags => $status_flags
849 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
855 modified_flags => $status_flags
860 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
861 ins => [ "base", "index", "mem" ],
862 emit => '. neg%M %AM',
865 modified_flags => $status_flags
870 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "gp" ] },
871 outs => [ "low_res", "high_res" ],
873 modified_flags => $status_flags
878 cmp_attr => "return 1;",
884 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
889 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
894 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
895 ins => [ "base", "index", "mem" ],
896 emit => '. inc%M %AM',
899 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
904 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
909 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
914 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
915 ins => [ "base", "index", "mem" ],
916 emit => '. dec%M %AM',
919 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
924 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
935 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
936 ins => [ "base", "index", "mem" ],
937 emit => '. not%M %AM',
940 modified_flags => [],
948 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "none", "none"] },
949 ins => [ "base", "index", "mem", "left", "right" ],
950 outs => [ "false", "true" ],
952 am => "source,binary",
953 init_attr => "attr->pn_code = pnc;",
955 units => [ "BRANCH" ],
961 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ], out => [ "none", "none"] },
962 ins => [ "base", "index", "mem", "left", "right" ],
963 outs => [ "false", "true" ],
965 am => "source,binary",
966 init_attr => "attr->pn_code = pnc;",
968 units => [ "BRANCH" ],
974 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "none", "none" ] },
975 ins => [ "base", "index", "mem", "left", "right" ],
976 outs => [ "false", "true" ],
978 am => "source,binary",
979 init_attr => "attr->pn_code = pnc;",
981 units => [ "BRANCH" ],
987 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ], out => [ "none", "none" ] },
988 ins => [ "base", "index", "mem", "left", "right" ],
989 outs => [ "false", "true" ],
991 am => "source,binary",
992 init_attr => "attr->pn_code = pnc;",
994 units => [ "BRANCH" ],
1000 reg_req => { in => [ "gp" ], out => [ "none" ] },
1002 units => [ "BRANCH" ],
1009 reg_req => { in => [ "gp" ] },
1010 emit => '. jmp *%S0',
1011 units => [ "BRANCH" ],
1013 modified_flags => []
1019 reg_req => { out => [ "gp" ] },
1021 attr => "ir_entity *symconst, int symconst_sign, long offset",
1022 attr_type => "ia32_immediate_attr_t",
1030 reg_req => { out => [ "gp_UKNWN" ] },
1040 reg_req => { out => [ "vfp_UKNWN" ] },
1044 attr_type => "ia32_x87_attr_t",
1051 reg_req => { out => [ "xmm_UKNWN" ] },
1061 reg_req => { out => [ "gp_NOREG" ] },
1071 reg_req => { out => [ "vfp_NOREG" ] },
1075 attr_type => "ia32_x87_attr_t",
1082 reg_req => { out => [ "xmm_NOREG" ] },
1092 reg_req => { out => [ "fp_cw" ] },
1096 modified_flags => $fpcw_flags
1102 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
1103 ins => [ "base", "index", "mem" ],
1105 emit => ". fldcw %AM",
1108 modified_flags => $fpcw_flags
1114 reg_req => { in => [ "gp", "gp", "none", "fp_cw" ], out => [ "none" ] },
1115 ins => [ "base", "index", "mem", "fpcw" ],
1117 emit => ". fnstcw %AM",
1123 # we should not rematrialize this node. It produces 2 results and has
1124 # very strict constrains
1125 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
1126 ins => [ "val", "globbered" ],
1134 # Note that we add additional latency values depending on address mode, so a
1135 # lateny of 0 for load is correct
1139 state => "exc_pinned",
1140 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
1141 ins => [ "base", "index", "mem" ],
1142 outs => [ "res", "M" ],
1144 emit => ". mov%SE%ME%.l %AM, %D0",
1150 cmp_attr => "return 1;",
1151 outs => [ "res", "M" ],
1157 cmp_attr => "return 1;",
1158 state => "exc_pinned",
1165 state => "exc_pinned",
1166 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
1167 ins => [ "base", "index", "mem", "val" ],
1168 emit => '. mov%M %SI3, %AM',
1176 state => "exc_pinned",
1177 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => ["none" ] },
1178 ins => [ "base", "index", "mem", "val" ],
1179 emit => '. mov%M %SB3, %AM',
1187 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1188 ins => [ "base", "index" ],
1189 emit => '. leal %AM, %D0',
1193 modified_flags => [],
1197 reg_req => { in => [ "gp", "gp", "none", "gp", "esp" ], out => [ "esp", "none" ] },
1198 ins => [ "base", "index", "mem", "val", "stack" ],
1199 emit => '. push%M %unop3',
1200 outs => [ "stack:I|S", "M" ],
1201 am => "source,binary",
1204 modified_flags => [],
1208 reg_req => { in => [ "gp", "gp", "none", "esp" ], out => [ "esp", "gp", "none" ] },
1209 emit => '. pop%M %DAM1',
1210 outs => [ "stack:I|S", "res", "M" ],
1211 ins => [ "base", "index", "mem", "stack" ],
1213 latency => 3, # Pop is more expensive than Push on Athlon
1215 modified_flags => [],
1219 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1221 outs => [ "frame:I", "stack:I|S", "M" ],
1227 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1229 outs => [ "frame:I", "stack:I|S" ],
1237 reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "in_r4", "none" ] },
1238 ins => [ "base", "index", "mem", "stack", "size" ],
1239 am => "source,binary",
1240 emit => '. addl %binop',
1241 outs => [ "stack:S", "M" ],
1243 modified_flags => $status_flags
1249 reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "in_r4", "gp", "none" ] },
1250 ins => [ "base", "index", "mem", "stack", "size" ],
1251 am => "source,binary",
1252 emit => ". subl %binop\n".
1253 ". movl %%esp, %D1",
1254 outs => [ "stack:I|S", "addr", "M" ],
1256 modified_flags => $status_flags
1261 reg_req => { out => [ "gp" ] },
1265 # the int instruction
1267 reg_req => { in => [ "gp" ], out => [ "none" ] },
1269 emit => '. int %SI0',
1271 cmp_attr => "return 1;",
1275 #-----------------------------------------------------------------------------#
1276 # _____ _____ ______ __ _ _ _ #
1277 # / ____/ ____| ____| / _| | | | | | #
1278 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1279 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1280 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1281 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1282 #-----------------------------------------------------------------------------#
1286 reg_req => { out => [ "xmm" ] },
1287 emit => '. xorp%XSD %D1, %D1',
1293 # commutative operations
1297 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1298 ins => [ "base", "index", "mem", "left", "right" ],
1299 emit => '. add%XXM %binop',
1307 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1308 ins => [ "base", "index", "mem", "left", "right" ],
1309 emit => '. mul%XXM %binop',
1317 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1318 ins => [ "base", "index", "mem", "left", "right" ],
1319 emit => '. max%XXM %binop',
1327 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1328 ins => [ "base", "index", "mem", "left", "right" ],
1329 emit => '. min%XXM %binop',
1337 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1338 ins => [ "base", "index", "mem", "left", "right" ],
1339 emit => '. andp%XSD %binop',
1347 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1348 ins => [ "base", "index", "mem", "left", "right" ],
1349 emit => '. orp%XSD %binop',
1356 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1357 ins => [ "base", "index", "mem", "left", "right" ],
1358 emit => '. xorp%XSD %binop',
1364 # not commutative operations
1368 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5" ] },
1369 ins => [ "base", "index", "mem", "left", "right" ],
1370 emit => '. andnp%XSD %binop',
1378 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1379 ins => [ "base", "index", "mem", "left", "right" ],
1380 emit => '. sub%XXM %binop',
1388 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5", "none" ] },
1389 ins => [ "base", "index", "mem", "left", "right" ],
1390 outs => [ "res", "M" ],
1391 emit => '. div%XXM %binop',
1400 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5" ] },
1401 ins => [ "base", "index", "mem", "left", "right" ],
1409 op_flags => "L|X|Y",
1410 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "none", "none" ] },
1411 ins => [ "base", "index", "mem", "left", "right" ],
1412 outs => [ "false", "true" ],
1414 init_attr => "attr->pn_code = pnc;",
1423 state => "exc_pinned",
1424 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1425 ins => [ "base", "index", "mem" ],
1426 emit => '. mov%XXM %AM, %D0',
1427 attr => "ir_mode *load_mode",
1428 init_attr => "attr->ls_mode = load_mode;",
1429 outs => [ "res", "M" ],
1436 state => "exc_pinned",
1437 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
1438 ins => [ "base", "index", "mem", "val" ],
1439 emit => '. mov%XXM %S3, %AM',
1447 state => "exc_pinned",
1448 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
1449 ins => [ "base", "index", "mem", "val" ],
1450 emit => '. mov%XXM %S3, %AM',
1458 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
1459 ins => [ "base", "index", "mem", "val" ],
1460 emit => '. cvtsi2ss %D0, %AM',
1468 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
1469 ins => [ "base", "index", "mem", "val" ],
1470 emit => '. cvtsi2sd %unop3',
1479 cmp_attr => "return 1;",
1485 cmp_attr => "return 1;",
1494 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1495 outs => [ "DST", "SRC", "CNT", "M" ],
1497 modified_flags => [ "DF" ]
1503 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1504 outs => [ "DST", "SRC", "M" ],
1506 modified_flags => [ "DF" ]
1512 state => "exc_pinned",
1513 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "in_r4", "none" ] },
1514 ins => [ "base", "index", "mem", "val" ],
1516 attr => "ir_mode *smaller_mode",
1517 init_attr => "attr->ls_mode = smaller_mode;",
1519 modified_flags => $status_flags
1523 state => "exc_pinned",
1524 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "in_r4", "none" ] },
1525 ins => [ "base", "index", "mem", "val" ],
1527 attr => "ir_mode *smaller_mode",
1528 init_attr => "attr->ls_mode = smaller_mode;",
1530 modified_flags => $status_flags
1534 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm", "none" ] },
1535 ins => [ "base", "index", "mem", "val" ],
1542 reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "gp", "none" ] },
1543 ins => [ "base", "index", "mem", "val" ],
1550 reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "xmm", "none" ] },
1551 ins => [ "base", "index", "mem", "val" ],
1559 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "gp", "gp" ], out => [ "in_r7" ] },
1560 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1561 attr => "pn_Cmp pn_code",
1562 init_attr => "attr->pn_code = pn_code;",
1570 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "gp", "gp" ], out => [ "in_r7" ] },
1571 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1572 attr => "pn_Cmp pn_code",
1573 init_attr => "attr->pn_code = pn_code;",
1581 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "gp", "gp" ], out => [ "in_r7" ] },
1582 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1583 attr => "pn_Cmp pn_code",
1584 init_attr => "attr->pn_code = pn_code;",
1592 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "gp", "gp" ], out => [ "in_r7" ] },
1593 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1594 attr => "pn_Cmp pn_code",
1595 init_attr => "attr->pn_code = pn_code;",
1603 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1611 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "gp", "gp" ], out => [ "in_r7" ] },
1612 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1614 units => [ "VFP", "GP" ],
1616 attr_type => "ia32_x87_attr_t",
1621 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "eax ebx ecx edx" ] },
1622 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1623 attr => "pn_Cmp pn_code",
1624 init_attr => "attr->pn_code = pn_code;",
1632 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ], out => [ "eax ebx ecx edx" ] },
1633 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1634 attr => "pn_Cmp pn_code",
1635 init_attr => "attr->pn_code = pn_code;",
1643 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "eax ebx ecx edx" ] },
1644 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1645 attr => "pn_Cmp pn_code",
1646 init_attr => "attr->pn_code = pn_code;",
1654 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ], out => [ "eax ebx ecx edx" ] },
1655 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1656 attr => "pn_Cmp pn_code",
1657 init_attr => "attr->pn_code = pn_code;",
1665 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "eax ebx ecx edx" ] },
1666 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1674 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp" ], out => [ "eax ebx ecx edx" ] },
1675 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1679 attr_type => "ia32_x87_attr_t",
1684 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1688 attr_type => "ia32_x87_attr_t",
1691 #----------------------------------------------------------#
1693 # (_) | | | | / _| | | | #
1694 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1695 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1696 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1697 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1699 # _ __ ___ __| | ___ ___ #
1700 # | '_ \ / _ \ / _` |/ _ \/ __| #
1701 # | | | | (_) | (_| | __/\__ \ #
1702 # |_| |_|\___/ \__,_|\___||___/ #
1703 #----------------------------------------------------------#
1707 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1708 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1712 attr_type => "ia32_x87_attr_t",
1717 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1718 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1722 attr_type => "ia32_x87_attr_t",
1727 cmp_attr => "return 1;",
1733 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1734 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1738 attr_type => "ia32_x87_attr_t",
1742 cmp_attr => "return 1;",
1747 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp", "none" ] },
1748 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1749 outs => [ "res", "M" ],
1752 attr_type => "ia32_x87_attr_t",
1756 cmp_attr => "return 1;",
1757 outs => [ "res", "M" ],
1762 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1763 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1767 attr_type => "ia32_x87_attr_t",
1771 cmp_attr => "return 1;",
1777 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1782 attr_type => "ia32_x87_attr_t",
1787 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1792 attr_type => "ia32_x87_attr_t",
1795 # virtual Load and Store
1799 state => "exc_pinned",
1800 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1801 ins => [ "base", "index", "mem" ],
1802 outs => [ "res", "M" ],
1803 attr => "ir_mode *load_mode",
1804 init_attr => "attr->attr.ls_mode = load_mode;",
1807 attr_type => "ia32_x87_attr_t",
1812 state => "exc_pinned",
1813 reg_req => { in => [ "gp", "gp", "none", "vfp" ] },
1814 ins => [ "base", "index", "mem", "val" ],
1815 attr => "ir_mode *store_mode",
1816 init_attr => "attr->attr.ls_mode = store_mode;",
1820 attr_type => "ia32_x87_attr_t",
1826 state => "exc_pinned",
1827 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1828 outs => [ "res", "M" ],
1829 ins => [ "base", "index", "mem" ],
1832 attr_type => "ia32_x87_attr_t",
1836 cmp_attr => "return 1;",
1837 outs => [ "res", "M" ],
1842 state => "exc_pinned",
1843 reg_req => { in => [ "gp", "gp", "none", "vfp", "fpcw" ] },
1844 ins => [ "base", "index", "mem", "val", "fpcw" ],
1848 attr_type => "ia32_x87_attr_t",
1852 cmp_attr => "return 1;",
1853 state => "exc_pinned",
1863 reg_req => { out => [ "vfp" ] },
1867 attr_type => "ia32_x87_attr_t",
1872 reg_req => { out => [ "vfp" ] },
1876 attr_type => "ia32_x87_attr_t",
1881 reg_req => { out => [ "vfp" ] },
1885 attr_type => "ia32_x87_attr_t",
1890 reg_req => { out => [ "vfp" ] },
1894 attr_type => "ia32_x87_attr_t",
1899 reg_req => { out => [ "vfp" ] },
1903 attr_type => "ia32_x87_attr_t",
1908 reg_req => { out => [ "vfp" ] },
1912 attr_type => "ia32_x87_attr_t",
1917 reg_req => { out => [ "vfp" ] },
1921 attr_type => "ia32_x87_attr_t",
1928 op_flags => "L|X|Y",
1929 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1930 ins => [ "left", "right" ],
1931 outs => [ "false", "true", "temp_reg_eax" ],
1933 init_attr => "attr->attr.pn_code = pnc;",
1936 attr_type => "ia32_x87_attr_t",
1939 #------------------------------------------------------------------------#
1940 # ___ _____ __ _ _ _ #
1941 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1942 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1943 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1944 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1945 #------------------------------------------------------------------------#
1947 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1948 # are swapped, we work this around in the emitter...
1952 rd_constructor => "NONE",
1954 emit => '. fadd%XM %x87_binop',
1955 attr_type => "ia32_x87_attr_t",
1960 rd_constructor => "NONE",
1962 emit => '. faddp%XM %x87_binop',
1963 attr_type => "ia32_x87_attr_t",
1968 rd_constructor => "NONE",
1970 emit => '. fmul%XM %x87_binop',
1971 attr_type => "ia32_x87_attr_t",
1976 rd_constructor => "NONE",
1978 emit => '. fmulp%XM %x87_binop',,
1979 attr_type => "ia32_x87_attr_t",
1984 rd_constructor => "NONE",
1986 emit => '. fsub%XM %x87_binop',
1987 attr_type => "ia32_x87_attr_t",
1992 rd_constructor => "NONE",
1994 # see note about gas bugs
1995 emit => '. fsubrp%XM %x87_binop',
1996 attr_type => "ia32_x87_attr_t",
2001 rd_constructor => "NONE",
2004 emit => '. fsubr%XM %x87_binop',
2005 attr_type => "ia32_x87_attr_t",
2010 rd_constructor => "NONE",
2013 # see note about gas bugs
2014 emit => '. fsubp%XM %x87_binop',
2015 attr_type => "ia32_x87_attr_t",
2020 rd_constructor => "NONE",
2023 attr_type => "ia32_x87_attr_t",
2026 # this node is just here, to keep the simulator running
2027 # we can omit this when a fprem simulation function exists
2030 rd_constructor => "NONE",
2033 attr_type => "ia32_x87_attr_t",
2038 rd_constructor => "NONE",
2040 emit => '. fdiv%XM %x87_binop',
2041 attr_type => "ia32_x87_attr_t",
2046 rd_constructor => "NONE",
2048 # see note about gas bugs
2049 emit => '. fdivrp%XM %x87_binop',
2050 attr_type => "ia32_x87_attr_t",
2055 rd_constructor => "NONE",
2057 emit => '. fdivr%XM %x87_binop',
2058 attr_type => "ia32_x87_attr_t",
2063 rd_constructor => "NONE",
2065 # see note about gas bugs
2066 emit => '. fdivp%XM %x87_binop',
2067 attr_type => "ia32_x87_attr_t",
2072 rd_constructor => "NONE",
2075 attr_type => "ia32_x87_attr_t",
2080 rd_constructor => "NONE",
2083 attr_type => "ia32_x87_attr_t",
2086 # x87 Load and Store
2089 rd_constructor => "NONE",
2090 op_flags => "R|L|F",
2091 state => "exc_pinned",
2093 emit => '. fld%XM %AM',
2094 attr_type => "ia32_x87_attr_t",
2098 rd_constructor => "NONE",
2099 op_flags => "R|L|F",
2100 state => "exc_pinned",
2102 emit => '. fst%XM %AM',
2104 attr_type => "ia32_x87_attr_t",
2108 rd_constructor => "NONE",
2109 op_flags => "R|L|F",
2110 state => "exc_pinned",
2112 emit => '. fstp%XM %AM',
2114 attr_type => "ia32_x87_attr_t",
2121 rd_constructor => "NONE",
2123 emit => '. fild%M %AM',
2124 attr_type => "ia32_x87_attr_t",
2129 state => "exc_pinned",
2130 rd_constructor => "NONE",
2132 emit => '. fist%M %AM',
2134 attr_type => "ia32_x87_attr_t",
2139 state => "exc_pinned",
2140 rd_constructor => "NONE",
2142 emit => '. fistp%M %AM',
2144 attr_type => "ia32_x87_attr_t",
2150 op_flags => "R|c|K",
2154 attr_type => "ia32_x87_attr_t",
2158 op_flags => "R|c|K",
2162 attr_type => "ia32_x87_attr_t",
2166 op_flags => "R|c|K",
2170 attr_type => "ia32_x87_attr_t",
2174 op_flags => "R|c|K",
2178 attr_type => "ia32_x87_attr_t",
2182 op_flags => "R|c|K",
2186 attr_type => "ia32_x87_attr_t",
2190 op_flags => "R|c|K",
2193 emit => '. fldll2t',
2194 attr_type => "ia32_x87_attr_t",
2198 op_flags => "R|c|K",
2202 attr_type => "ia32_x87_attr_t",
2206 # Note that it is NEVER allowed to do CSE on these nodes
2207 # Moreover, note the virtual register requierements!
2212 cmp_attr => "return 1;",
2213 emit => '. fxch %X0',
2214 attr_type => "ia32_x87_attr_t",
2220 cmp_attr => "return 1;",
2221 emit => '. fld %X0',
2222 attr_type => "ia32_x87_attr_t",
2227 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2228 cmp_attr => "return 1;",
2229 emit => '. fld %X0',
2230 attr_type => "ia32_x87_attr_t",
2236 cmp_attr => "return 1;",
2237 emit => '. fstp %X0',
2238 attr_type => "ia32_x87_attr_t",
2244 op_flags => "L|X|Y",
2246 attr_type => "ia32_x87_attr_t",
2250 op_flags => "L|X|Y",
2252 attr_type => "ia32_x87_attr_t",
2256 op_flags => "L|X|Y",
2258 attr_type => "ia32_x87_attr_t",
2262 op_flags => "L|X|Y",
2264 attr_type => "ia32_x87_attr_t",
2268 op_flags => "L|X|Y",
2270 attr_type => "ia32_x87_attr_t",
2274 op_flags => "L|X|Y",
2276 attr_type => "ia32_x87_attr_t",
2280 # -------------------------------------------------------------------------------- #
2281 # ____ ____ _____ _ _ #
2282 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2283 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2284 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2285 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2287 # -------------------------------------------------------------------------------- #
2290 # Spilling and reloading of SSE registers, hardcoded, not generated #
2294 state => "exc_pinned",
2295 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2296 emit => '. movdqu %D0, %AM',
2297 outs => [ "res", "M" ],
2303 state => "exc_pinned",
2304 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
2305 ins => [ "base", "index", "mem", "val" ],
2306 emit => '. movdqu %binop',
2313 # Include the generated SIMD node specification written by the SIMD optimization
2314 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2315 unless ($return = do $my_script_name) {
2316 warn "couldn't parse $my_script_name: $@" if $@;
2317 warn "couldn't do $my_script_name: $!" unless defined $return;
2318 warn "couldn't run $my_script_name" unless $return;