3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 D0 => "${arch}_emit_dest_register(env, node, 0);",
257 D1 => "${arch}_emit_dest_register(env, node, 1);",
258 D2 => "${arch}_emit_dest_register(env, node, 2);",
259 D3 => "${arch}_emit_dest_register(env, node, 3);",
260 D4 => "${arch}_emit_dest_register(env, node, 4);",
261 D5 => "${arch}_emit_dest_register(env, node, 5);",
262 X0 => "${arch}_emit_x87_name(env, node, 0);",
263 X1 => "${arch}_emit_x87_name(env, node, 1);",
264 X2 => "${arch}_emit_x87_name(env, node, 2);",
265 C => "${arch}_emit_immediate(env, node);",
266 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
267 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
268 ia32_emit_mode_suffix(env, node);",
269 M => "${arch}_emit_mode_suffix(env, node);",
270 XM => "${arch}_emit_x87_mode_suffix(env, node);",
271 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
272 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
273 AM => "${arch}_emit_am(env, node);",
274 unop0 => "${arch}_emit_unop(env, node, 0);",
275 unop1 => "${arch}_emit_unop(env, node, 1);",
276 unop2 => "${arch}_emit_unop(env, node, 2);",
277 unop3 => "${arch}_emit_unop(env, node, 3);",
278 unop4 => "${arch}_emit_unop(env, node, 4);",
279 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
280 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 0);",
281 binop => "${arch}_emit_binop(env, node);",
282 x87_binop => "${arch}_emit_x87_binop(env, node);",
285 #--------------------------------------------------#
288 # _ __ _____ __ _ _ __ ___ _ __ ___ #
289 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
290 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
291 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
294 #--------------------------------------------------#
296 $default_attr_type = "ia32_attr_t";
299 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
301 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
302 "\tinit_ia32_x87_attributes(res);",
304 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
305 "\tinit_ia32_x87_attributes(res);".
306 "\tinit_ia32_asm_attributes(res);",
307 ia32_immediate_attr_t =>
308 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
309 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
313 ia32_attr_t => "ia32_compare_nodes_attr",
314 ia32_x87_attr_t => "ia32_compare_x87_attr",
315 ia32_asm_attr_t => "ia32_compare_asm_attr",
316 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
322 $mode_xmm = "mode_E";
323 $mode_gp = "mode_Iu";
324 $mode_fpcw = "mode_fpcw";
325 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
326 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
327 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
335 reg_req => { out => [ "gp_NOREG" ] },
336 attr => "ir_entity *symconst, int symconst_sign, tarval *offset",
337 attr_type => "ia32_immediate_attr_t",
344 out_arity => "variable",
345 attr_type => "ia32_asm_attr_t",
348 #-----------------------------------------------------------------#
351 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
352 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
353 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
354 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
357 #-----------------------------------------------------------------#
359 # commutative operations
362 # All nodes supporting Addressmode have 5 INs:
363 # 1 - base r1 == NoReg in case of no AM or no base
364 # 2 - index r2 == NoReg in case of no AM or no index
365 # 3 - op1 r3 == always present
366 # 4 - op2 r4 == NoReg in case of immediate operation
367 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
371 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
372 ins => [ "base", "index", "left", "right", "mem" ],
373 emit => '. add%M %binop',
376 modified_flags => $status_flags
380 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
381 emit => '. adc%M %binop',
384 modified_flags => $status_flags
390 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
397 outs => [ "low_res", "high_res" ],
399 modified_flags => $status_flags
405 cmp_attr => "return 1;",
411 cmp_attr => "return 1;",
416 # we should not rematrialize this node. It produces 2 results and has
417 # very strict constrains
418 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
419 emit => '. mul%M %unop3',
420 outs => [ "EAX", "EDX", "M" ],
421 ins => [ "base", "index", "val_high", "val_low", "mem" ],
424 modified_flags => $status_flags
428 # we should not rematrialize this node. It produces 2 results and has
429 # very strict constrains
431 cmp_attr => "return 1;",
432 outs => [ "EAX", "EDX", "M" ],
438 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
439 emit => '. imul%M %binop',
443 modified_flags => $status_flags
448 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
449 emit => '. imul%M %unop3',
450 outs => [ "EAX", "EDX", "M" ],
451 ins => [ "base", "index", "val_high", "val_low", "mem" ],
454 modified_flags => $status_flags
459 cmp_attr => "return 1;",
465 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
466 emit => '. and%M %binop',
469 modified_flags => $status_flags
474 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
475 emit => '. or%M %binop',
478 modified_flags => $status_flags
483 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
484 emit => '. xor%M %binop',
487 modified_flags => $status_flags
492 cmp_attr => "return 1;",
494 modified_flags => $status_flags
497 # not commutative operations
501 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
502 emit => '. sub%M %binop',
505 modified_flags => $status_flags
509 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
510 emit => '. sbb%M %binop',
513 modified_flags => $status_flags
519 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
526 outs => [ "low_res", "high_res" ],
528 modified_flags => $status_flags
533 cmp_attr => "return 1;",
538 cmp_attr => "return 1;",
544 state => "exc_pinned",
545 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
546 attr => "ia32_op_flavour_t dm_flav",
547 init_attr => "attr->data.op_flav = dm_flav;",
548 emit => ". idiv%M %unop4",
549 outs => [ "div_res", "mod_res", "M" ],
552 modified_flags => $status_flags
557 state => "exc_pinned",
558 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
559 attr => "ia32_op_flavour_t dm_flav",
560 init_attr => "attr->data.op_flav = dm_flav;",
561 emit => ". div%M %unop4",
562 outs => [ "div_res", "mod_res", "M" ],
565 modified_flags => $status_flags
570 # "in_r3" would be enough as out requirement, but the register allocator
571 # does strange things then and doesn't respect the constraint for in4
572 # if the same value is attached to in3 and in4 (if you have "i << i" in C)
573 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
574 ins => [ "base", "index", "left", "right", "mem" ],
575 emit => '. shl%M %binop',
578 modified_flags => $status_flags
582 cmp_attr => "return 1;",
588 # Out requirements is: different from all in
589 # This is because, out must be different from LowPart and ShiftCount.
590 # We could say "!ecx !in_r4" but it can occur, that all values live through
591 # this Shift and the only value dying is the ShiftCount. Then there would be
592 # a register missing, as result must not be ecx and all other registers are
593 # occupied. What we should write is "!in_r4 !in_r5", but this is not
594 # supported (and probably never will). So we create artificial interferences
595 # of the result with all inputs, so the spiller can always assure a free
597 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
600 if (get_ia32_immop_type(node) == ia32_ImmNone) {
601 if (get_ia32_op_type(node) == ia32_AddrModeD) {
602 . shld%M %%cl, %S3, %AM
604 . shld%M %%cl, %S3, %S2
607 if (get_ia32_op_type(node) == ia32_AddrModeD) {
608 . shld%M %C, %S3, %AM
610 . shld%M %C, %S3, %S2
617 modified_flags => $status_flags
621 cmp_attr => "return 1;",
627 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
628 emit => '. shr%M %binop',
631 modified_flags => $status_flags
635 cmp_attr => "return 1;",
641 # Out requirements is: different from all in
642 # This is because, out must be different from LowPart and ShiftCount.
643 # We could say "!ecx !in_r4" but it can occur, that all values live through
644 # this Shift and the only value dying is the ShiftCount. Then there would be a
645 # register missing, as result must not be ecx and all other registers are
646 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
647 # (and probably never will). So we create artificial interferences of the result
648 # with all inputs, so the spiller can always assure a free register.
649 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
651 if (get_ia32_immop_type(node) == ia32_ImmNone) {
652 if (get_ia32_op_type(node) == ia32_AddrModeD) {
653 . shrd%M %%cl, %S3, %AM
655 . shrd%M %%cl, %S3, %S2
658 if (get_ia32_op_type(node) == ia32_AddrModeD) {
659 . shrd%M %C, %S3, %AM
661 . shrd%M %C, %S3, %S2
668 modified_flags => $status_flags
672 cmp_attr => "return 1;",
678 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
679 emit => '. sar%M %binop',
682 modified_flags => $status_flags
686 cmp_attr => "return 1;",
692 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
693 emit => '. ror%M %binop',
696 modified_flags => $status_flags
701 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
702 emit => '. rol%M %binop',
705 modified_flags => $status_flags
712 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
713 emit => '. neg%M %unop2',
714 ins => [ "base", "index", "val", "mem" ],
717 modified_flags => $status_flags
722 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
729 outs => [ "low_res", "high_res" ],
731 modified_flags => $status_flags
736 cmp_attr => "return 1;",
742 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
743 emit => '. inc%M %unop2',
746 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
751 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
752 emit => '. dec%M %unop2',
755 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
760 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
761 ins => [ "base", "index", "val", "mem" ],
762 emit => '. not%M %unop2',
773 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none"] },
774 outs => [ "false", "true" ],
776 units => [ "BRANCH" ],
782 reg_req => { in => [ "gp", "gp" ], out => [ "none", "none" ] },
783 outs => [ "false", "true" ],
785 units => [ "BRANCH" ],
791 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none" ] },
792 outs => [ "false", "true" ],
793 units => [ "BRANCH" ],
799 reg_req => { in => [ "gp", "gp" ] },
800 units => [ "BRANCH" ],
806 reg_req => { in => [ "gp" ], out => [ "none" ] },
808 units => [ "BRANCH" ],
814 reg_req => { out => [ "gp" ] },
823 reg_req => { out => [ "gp_UKNWN" ] },
833 reg_req => { out => [ "vfp_UKNWN" ] },
837 attr_type => "ia32_x87_attr_t",
844 reg_req => { out => [ "xmm_UKNWN" ] },
854 reg_req => { out => [ "gp_NOREG" ] },
864 reg_req => { out => [ "vfp_NOREG" ] },
868 attr_type => "ia32_x87_attr_t",
875 reg_req => { out => [ "xmm_NOREG" ] },
885 reg_req => { out => [ "fp_cw" ] },
889 modified_flags => $fpcw_flags
895 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
897 emit => ". fldcw %AM",
900 modified_flags => $fpcw_flags
906 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
908 emit => ". fnstcw %AM",
914 # we should not rematrialize this node. It produces 2 results and has
915 # very strict constrains
916 reg_req => { in => [ "gp" ], out => [ "eax in_r1", "edx" ] },
918 outs => [ "EAX", "EDX" ],
924 # Note that we add additional latency values depending on address mode, so a
925 # lateny of 0 for load is correct
929 state => "exc_pinned",
930 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
932 emit => ". mov%SE%ME%.l %AM, %D0",
933 outs => [ "res", "M" ],
939 cmp_attr => "return 1;",
940 outs => [ "res", "M" ],
946 cmp_attr => "return 1;",
947 state => "exc_pinned",
954 state => "exc_pinned",
955 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
956 emit => '. mov%M %binop',
964 state => "exc_pinned",
965 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
966 emit => '. mov%M %binop',
974 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1" ] },
975 emit => '. leal %AM, %D0',
979 modified_flags => [],
983 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
984 emit => '. push%M %unop2',
985 ins => [ "base", "index", "val", "stack", "mem" ],
986 outs => [ "stack:I|S", "M" ],
989 modified_flags => [],
993 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
994 emit => '. pop%M %DAM1',
995 outs => [ "stack:I|S", "res", "M" ],
996 ins => [ "base", "index", "stack", "mem" ],
997 latency => 3, # Pop is more expensive than Push on Athlon
999 modified_flags => [],
1003 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1005 outs => [ "frame:I", "stack:I|S", "M" ],
1011 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1013 outs => [ "frame:I", "stack:I|S" ],
1020 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1021 emit => '. addl %binop',
1022 outs => [ "stack:S", "M" ],
1024 modified_flags => $status_flags
1029 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1030 emit => '. subl %binop',
1031 outs => [ "stack:S", "M" ],
1033 modified_flags => $status_flags
1038 reg_req => { out => [ "gp" ] },
1042 # the int instruction
1044 reg_req => { in => [ "none" ], out => [ "none" ] },
1046 attr => "tarval *tv",
1047 init_attr => "\tset_ia32_Immop_tarval(res, tv);",
1050 cmp_attr => "return 1;",
1054 #-----------------------------------------------------------------------------#
1055 # _____ _____ ______ __ _ _ _ #
1056 # / ____/ ____| ____| / _| | | | | | #
1057 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1058 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1059 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1060 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1061 #-----------------------------------------------------------------------------#
1063 # commutative operations
1067 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1068 emit => '. add%XXM %binop',
1076 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1077 emit => '. mul%XXM %binop',
1085 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1086 emit => '. max%XXM %binop',
1094 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1095 emit => '. min%XXM %binop',
1103 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1104 emit => '. andp%XSD %binop',
1112 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1113 emit => '. orp%XSD %binop',
1120 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1121 emit => '. xorp%XSD %binop',
1127 # not commutative operations
1131 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1132 emit => '. andnp%XSD %binop',
1140 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1141 emit => '. sub%XXM %binop',
1149 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1150 outs => [ "res", "M" ],
1151 emit => '. div%XXM %binop',
1160 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1168 op_flags => "L|X|Y",
1169 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1170 outs => [ "false", "true" ],
1178 reg_req => { out => [ "xmm" ] },
1179 emit => '. mov%XXM %C, %D0',
1189 state => "exc_pinned",
1190 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1191 emit => '. mov%XXM %AM, %D0',
1192 outs => [ "res", "M" ],
1199 state => "exc_pinned",
1200 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1201 emit => '. mov%XXM %binop',
1209 state => "exc_pinned",
1210 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1211 ins => [ "base", "index", "val", "mem" ],
1212 emit => '. mov%XXM %S2, %AM',
1220 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1221 emit => '. cvtsi2ss %D0, %AM',
1229 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1230 emit => '. cvtsi2sd %unop2',
1239 cmp_attr => "return 1;",
1245 cmp_attr => "return 1;",
1253 reg_req => { in => [ "gp", "gp", "none" ] },
1254 emit => '. fstp%XM %AM',
1264 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vf0", "none" ] },
1265 ins => [ "base", "index", "mem" ],
1266 emit => '. fld%XM %AM',
1267 outs => [ "res", "M" ],
1277 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1278 outs => [ "DST", "SRC", "CNT", "M" ],
1280 modified_flags => [ "DF" ]
1286 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1287 outs => [ "DST", "SRC", "M" ],
1289 modified_flags => [ "DF" ]
1295 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1297 ins => [ "base", "index", "val", "mem" ],
1299 modified_flags => $status_flags
1303 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1304 ins => [ "base", "index", "val", "mem" ],
1307 modified_flags => $status_flags
1311 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1318 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1325 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1333 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "in_r4" ] },
1334 ins => [ "cmp_left", "cmp_right", "val_true", "val_false" ],
1335 attr => "pn_Cmp pn_code",
1336 init_attr => "attr->pn_code = pn_code;",
1344 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1352 reg_req => { in => [ "vfp", "vfp", "gp", "gp" ], out => [ "in_r4" ] },
1356 attr_type => "ia32_x87_attr_t",
1361 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1362 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1363 attr => "pn_Cmp pn_code",
1364 init_attr => "attr->pn_code = pn_code;",
1372 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1380 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1384 attr_type => "ia32_x87_attr_t",
1389 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1393 attr_type => "ia32_x87_attr_t",
1396 #----------------------------------------------------------#
1398 # (_) | | | | / _| | | | #
1399 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1400 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1401 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1402 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1404 # _ __ ___ __| | ___ ___ #
1405 # | '_ \ / _ \ / _` |/ _ \/ __| #
1406 # | | | | (_) | (_| | __/\__ \ #
1407 # |_| |_|\___/ \__,_|\___||___/ #
1408 #----------------------------------------------------------#
1412 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1416 attr_type => "ia32_x87_attr_t",
1421 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1425 attr_type => "ia32_x87_attr_t",
1430 cmp_attr => "return 1;",
1436 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1440 attr_type => "ia32_x87_attr_t",
1444 cmp_attr => "return 1;",
1449 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp", "none" ] },
1450 outs => [ "res", "M" ],
1453 attr_type => "ia32_x87_attr_t",
1457 cmp_attr => "return 1;",
1458 outs => [ "res", "M" ],
1463 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1467 attr_type => "ia32_x87_attr_t",
1471 cmp_attr => "return 1;",
1477 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1481 attr_type => "ia32_x87_attr_t",
1486 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1490 attr_type => "ia32_x87_attr_t",
1495 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1499 attr_type => "ia32_x87_attr_t",
1504 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1508 attr_type => "ia32_x87_attr_t",
1513 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1517 attr_type => "ia32_x87_attr_t",
1520 # virtual Load and Store
1524 state => "exc_pinned",
1525 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1526 ins => [ "base", "index", "mem" ],
1527 outs => [ "res", "M" ],
1528 attr => "ir_mode *store_mode",
1529 init_attr => "attr->attr.ls_mode = store_mode;",
1532 attr_type => "ia32_x87_attr_t",
1537 state => "exc_pinned",
1538 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1539 ins => [ "base", "index", "val", "mem" ],
1540 attr => "ir_mode *store_mode",
1541 init_attr => "attr->attr.ls_mode = store_mode;",
1545 attr_type => "ia32_x87_attr_t",
1551 state => "exc_pinned",
1552 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1553 outs => [ "res", "M" ],
1556 attr_type => "ia32_x87_attr_t",
1560 cmp_attr => "return 1;",
1561 outs => [ "res", "M" ],
1566 state => "exc_pinned",
1567 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1571 attr_type => "ia32_x87_attr_t",
1575 cmp_attr => "return 1;",
1576 state => "exc_pinned",
1586 reg_req => { out => [ "vfp" ] },
1590 attr_type => "ia32_x87_attr_t",
1595 reg_req => { out => [ "vfp" ] },
1599 attr_type => "ia32_x87_attr_t",
1604 reg_req => { out => [ "vfp" ] },
1608 attr_type => "ia32_x87_attr_t",
1613 reg_req => { out => [ "vfp" ] },
1617 attr_type => "ia32_x87_attr_t",
1622 reg_req => { out => [ "vfp" ] },
1626 attr_type => "ia32_x87_attr_t",
1631 reg_req => { out => [ "vfp" ] },
1635 attr_type => "ia32_x87_attr_t",
1640 reg_req => { out => [ "vfp" ] },
1644 attr_type => "ia32_x87_attr_t",
1650 reg_req => { out => [ "vfp" ] },
1654 attr_type => "ia32_x87_attr_t",
1661 op_flags => "L|X|Y",
1662 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "none", "none", "eax" ] },
1663 outs => [ "false", "true", "temp_reg_eax" ],
1666 attr_type => "ia32_x87_attr_t",
1669 #------------------------------------------------------------------------#
1670 # ___ _____ __ _ _ _ #
1671 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1672 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1673 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1674 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1675 #------------------------------------------------------------------------#
1677 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1678 # are swapped, we work this around in the emitter...
1682 rd_constructor => "NONE",
1684 emit => '. fadd%XM %x87_binop',
1685 attr_type => "ia32_x87_attr_t",
1690 rd_constructor => "NONE",
1692 emit => '. faddp %x87_binop',
1693 attr_type => "ia32_x87_attr_t",
1698 rd_constructor => "NONE",
1700 emit => '. fmul%XM %x87_binop',
1701 attr_type => "ia32_x87_attr_t",
1706 rd_constructor => "NONE",
1708 emit => '. fmulp %x87_binop',,
1709 attr_type => "ia32_x87_attr_t",
1714 rd_constructor => "NONE",
1716 emit => '. fsub%XM %x87_binop',
1717 attr_type => "ia32_x87_attr_t",
1722 rd_constructor => "NONE",
1724 # see note about gas bugs
1725 emit => '. fsubrp %x87_binop',
1726 attr_type => "ia32_x87_attr_t",
1731 rd_constructor => "NONE",
1734 emit => '. fsubr%XM %x87_binop',
1735 attr_type => "ia32_x87_attr_t",
1740 rd_constructor => "NONE",
1743 # see note about gas bugs
1744 emit => '. fsubp %x87_binop',
1745 attr_type => "ia32_x87_attr_t",
1750 rd_constructor => "NONE",
1753 attr_type => "ia32_x87_attr_t",
1756 # this node is just here, to keep the simulator running
1757 # we can omit this when a fprem simulation function exists
1760 rd_constructor => "NONE",
1763 attr_type => "ia32_x87_attr_t",
1768 rd_constructor => "NONE",
1770 emit => '. fdiv%XM %x87_binop',
1771 attr_type => "ia32_x87_attr_t",
1776 rd_constructor => "NONE",
1778 # see note about gas bugs
1779 emit => '. fdivrp %x87_binop',
1780 attr_type => "ia32_x87_attr_t",
1785 rd_constructor => "NONE",
1787 emit => '. fdivr%XM %x87_binop',
1788 attr_type => "ia32_x87_attr_t",
1793 rd_constructor => "NONE",
1795 # see note about gas bugs
1796 emit => '. fdivp %x87_binop',
1797 attr_type => "ia32_x87_attr_t",
1802 rd_constructor => "NONE",
1805 attr_type => "ia32_x87_attr_t",
1810 rd_constructor => "NONE",
1813 attr_type => "ia32_x87_attr_t",
1818 rd_constructor => "NONE",
1821 attr_type => "ia32_x87_attr_t",
1826 rd_constructor => "NONE",
1829 attr_type => "ia32_x87_attr_t",
1834 rd_constructor => "NONE",
1836 emit => '. fsqrt $',
1837 attr_type => "ia32_x87_attr_t",
1840 # x87 Load and Store
1843 rd_constructor => "NONE",
1844 op_flags => "R|L|F",
1845 state => "exc_pinned",
1847 emit => '. fld%XM %AM',
1848 attr_type => "ia32_x87_attr_t",
1852 rd_constructor => "NONE",
1853 op_flags => "R|L|F",
1854 state => "exc_pinned",
1856 emit => '. fst%XM %AM',
1858 attr_type => "ia32_x87_attr_t",
1862 rd_constructor => "NONE",
1863 op_flags => "R|L|F",
1864 state => "exc_pinned",
1866 emit => '. fstp%XM %AM',
1868 attr_type => "ia32_x87_attr_t",
1875 rd_constructor => "NONE",
1877 emit => '. fild%XM %AM',
1878 attr_type => "ia32_x87_attr_t",
1883 state => "exc_pinned",
1884 rd_constructor => "NONE",
1886 emit => '. fist%XM %AM',
1888 attr_type => "ia32_x87_attr_t",
1893 state => "exc_pinned",
1894 rd_constructor => "NONE",
1896 emit => '. fistp%XM %AM',
1898 attr_type => "ia32_x87_attr_t",
1904 op_flags => "R|c|K",
1908 attr_type => "ia32_x87_attr_t",
1912 op_flags => "R|c|K",
1916 attr_type => "ia32_x87_attr_t",
1920 op_flags => "R|c|K",
1924 attr_type => "ia32_x87_attr_t",
1928 op_flags => "R|c|K",
1932 attr_type => "ia32_x87_attr_t",
1936 op_flags => "R|c|K",
1940 attr_type => "ia32_x87_attr_t",
1944 op_flags => "R|c|K",
1947 emit => '. fldll2t',
1948 attr_type => "ia32_x87_attr_t",
1952 op_flags => "R|c|K",
1956 attr_type => "ia32_x87_attr_t",
1960 # Note that it is NEVER allowed to do CSE on these nodes
1961 # Moreover, note the virtual register requierements!
1966 cmp_attr => "return 1;",
1967 emit => '. fxch %X0',
1968 attr_type => "ia32_x87_attr_t",
1974 cmp_attr => "return 1;",
1975 emit => '. fld %X0',
1976 attr_type => "ia32_x87_attr_t",
1981 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1982 cmp_attr => "return 1;",
1983 emit => '. fld %X0',
1984 attr_type => "ia32_x87_attr_t",
1990 cmp_attr => "return 1;",
1991 emit => '. fstp %X0',
1992 attr_type => "ia32_x87_attr_t",
1998 op_flags => "L|X|Y",
2000 attr_type => "ia32_x87_attr_t",
2004 op_flags => "L|X|Y",
2006 attr_type => "ia32_x87_attr_t",
2010 op_flags => "L|X|Y",
2012 attr_type => "ia32_x87_attr_t",
2016 op_flags => "L|X|Y",
2018 attr_type => "ia32_x87_attr_t",
2022 op_flags => "L|X|Y",
2024 attr_type => "ia32_x87_attr_t",
2028 op_flags => "L|X|Y",
2030 attr_type => "ia32_x87_attr_t",
2034 # -------------------------------------------------------------------------------- #
2035 # ____ ____ _____ _ _ #
2036 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2037 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2038 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2039 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2041 # -------------------------------------------------------------------------------- #
2044 # Spilling and reloading of SSE registers, hardcoded, not generated #
2048 state => "exc_pinned",
2049 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2050 emit => '. movdqu %D0, %AM',
2051 outs => [ "res", "M" ],
2057 state => "exc_pinned",
2058 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2059 emit => '. movdqu %binop',
2066 # Include the generated SIMD node specification written by the SIMD optimization
2067 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2068 unless ($return = do $my_script_name) {
2069 warn "couldn't parse $my_script_name: $@" if $@;
2070 warn "couldn't do $my_script_name: $!" unless defined $return;
2071 warn "couldn't run $my_script_name" unless $return;