3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 SB1 => "${arch}_emit_8bit_source_register(env, node, 1);",
257 SB2 => "${arch}_emit_8bit_source_register(env, node, 2);",
258 SW0 => "${arch}_emit_16bit_source_register(env, node, 0);",
259 SI0 => "${arch}_emit_source_register_or_immediate(env, node, 0);",
260 SI1 => "${arch}_emit_source_register_or_immediate(env, node, 1);",
261 SI2 => "${arch}_emit_source_register_or_immediate(env, node, 2);",
262 SI3 => "${arch}_emit_source_register_or_immediate(env, node, 3);",
263 D0 => "${arch}_emit_dest_register(env, node, 0);",
264 D1 => "${arch}_emit_dest_register(env, node, 1);",
265 D2 => "${arch}_emit_dest_register(env, node, 2);",
266 D3 => "${arch}_emit_dest_register(env, node, 3);",
267 D4 => "${arch}_emit_dest_register(env, node, 4);",
268 D5 => "${arch}_emit_dest_register(env, node, 5);",
269 X0 => "${arch}_emit_x87_name(env, node, 0);",
270 X1 => "${arch}_emit_x87_name(env, node, 1);",
271 X2 => "${arch}_emit_x87_name(env, node, 2);",
272 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
273 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
274 ia32_emit_mode_suffix(env, node);",
275 M => "${arch}_emit_mode_suffix(env, node);",
276 XM => "${arch}_emit_x87_mode_suffix(env, node);",
277 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
278 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
279 AM => "${arch}_emit_am(env, node);",
280 unop0 => "${arch}_emit_unop(env, node, 0);",
281 unop1 => "${arch}_emit_unop(env, node, 1);",
282 unop2 => "${arch}_emit_unop(env, node, 2);",
283 unop3 => "${arch}_emit_unop(env, node, 3);",
284 unop4 => "${arch}_emit_unop(env, node, 4);",
285 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
286 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 0);",
287 binop => "${arch}_emit_binop(env, node);",
288 x87_binop => "${arch}_emit_x87_binop(env, node);",
291 #--------------------------------------------------#
294 # _ __ _____ __ _ _ __ ___ _ __ ___ #
295 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
296 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
297 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
300 #--------------------------------------------------#
302 $default_attr_type = "ia32_attr_t";
303 $default_copy_attr = "ia32_copy_attr";
306 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
308 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
309 "\tinit_ia32_x87_attributes(res);",
311 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
312 "\tinit_ia32_x87_attributes(res);".
313 "\tinit_ia32_asm_attributes(res);",
314 ia32_immediate_attr_t =>
315 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
316 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
320 ia32_attr_t => "ia32_compare_nodes_attr",
321 ia32_x87_attr_t => "ia32_compare_x87_attr",
322 ia32_asm_attr_t => "ia32_compare_asm_attr",
323 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
329 $mode_xmm = "mode_E";
330 $mode_gp = "mode_Iu";
331 $mode_fpcw = "mode_fpcw";
332 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
333 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
334 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
342 reg_req => { out => [ "gp_NOREG" ] },
343 attr => "ir_entity *symconst, int symconst_sign, long offset",
344 attr_type => "ia32_immediate_attr_t",
352 out_arity => "variable",
353 attr_type => "ia32_asm_attr_t",
360 reg_req => { out => [ "gp" ] },
365 cmp_attr => "return 1;",
368 #-----------------------------------------------------------------#
371 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
372 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
373 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
374 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
377 #-----------------------------------------------------------------#
379 # commutative operations
382 # All nodes supporting Addressmode have 5 INs:
383 # 1 - base r1 == NoReg in case of no AM or no base
384 # 2 - index r2 == NoReg in case of no AM or no index
385 # 3 - op1 r3 == always present
386 # 4 - op2 r4 == NoReg in case of immediate operation
387 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
391 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
392 ins => [ "base", "index", "left", "right", "mem" ],
393 emit => '. add%M %binop',
394 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
397 modified_flags => $status_flags
402 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
403 ins => [ "base", "index", "val", "mem" ],
404 emit => ". add%M %SI2, %AM",
407 modified_flags => $status_flags
411 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
412 emit => '. adc%M %binop',
413 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
416 modified_flags => $status_flags
422 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
429 outs => [ "low_res", "high_res" ],
431 modified_flags => $status_flags
437 cmp_attr => "return 1;",
443 cmp_attr => "return 1;",
448 # we should not rematrialize this node. It produces 2 results and has
449 # very strict constrains
450 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
451 emit => '. mul%M %unop3',
452 outs => [ "EAX", "EDX", "M" ],
453 ins => [ "base", "index", "val_high", "val_low", "mem" ],
454 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
457 modified_flags => $status_flags
461 # we should not rematrialize this node. It produces 2 results and has
462 # very strict constrains
464 cmp_attr => "return 1;",
465 outs => [ "EAX", "EDX", "M" ],
471 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
472 ins => [ "base", "index", "left", "right", "mem" ],
473 emit => '. imul%M %binop',
474 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
478 modified_flags => $status_flags
483 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
484 emit => '. imul%M %unop3',
485 outs => [ "EAX", "EDX", "M" ],
486 ins => [ "base", "index", "val_high", "val_low", "mem" ],
487 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
490 modified_flags => $status_flags
494 # we should not rematrialize this node. It produces 2 results and has
495 # very strict constrains
497 cmp_attr => "return 1;",
498 outs => [ "EAX", "EDX", "M" ],
504 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
505 ins => [ "base", "index", "left", "right", "mem" ],
506 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
507 emit => '. and%M %binop',
510 modified_flags => $status_flags
515 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
516 emit => '. and%M %SI2, %AM',
519 modified_flags => $status_flags
524 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
525 ins => [ "base", "index", "left", "right", "mem" ],
526 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
527 emit => '. or%M %binop',
530 modified_flags => $status_flags
535 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
536 ins => [ "base", "index", "val", "mem" ],
537 emit => '. or%M %SI2, %AM',
540 modified_flags => $status_flags
545 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
546 ins => [ "base", "index", "left", "right", "mem" ],
547 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
548 emit => '. xor%M %binop',
551 modified_flags => $status_flags
556 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
557 ins => [ "base", "index", "val", "mem" ],
558 emit => '. xor%M %SI2, %AM',
561 modified_flags => $status_flags
566 cmp_attr => "return 1;",
568 modified_flags => $status_flags
571 # not commutative operations
575 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
576 ins => [ "base", "index", "left", "right", "mem" ],
577 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
578 emit => '. sub%M %binop',
581 modified_flags => $status_flags
586 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
587 ins => [ "base", "index", "val", "mem" ],
588 emit => '. sub%M %SI2, %AM',
591 modified_flags => $status_flags
595 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
596 ins => [ "base", "index", "left", "right", "mem" ],
597 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
598 emit => '. sbb%M %binop',
601 modified_flags => $status_flags
607 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
614 outs => [ "low_res", "high_res" ],
616 modified_flags => $status_flags
621 cmp_attr => "return 1;",
626 cmp_attr => "return 1;",
632 state => "exc_pinned",
633 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ],
634 out => [ "eax", "edx", "none" ] },
635 ins => [ "base", "index", "left_low", "left_high", "right", "mem" ],
636 outs => [ "div_res", "mod_res", "M" ],
637 attr => "ia32_op_flavour_t dm_flav",
639 "attr->data.op_flav = dm_flav;".
640 "set_ia32_am_support(res, ia32_am_Full, ia32_am_ternary);",
641 emit => ". idiv%M %unop4",
644 modified_flags => $status_flags
649 state => "exc_pinned",
650 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ],
651 out => [ "eax", "edx", "none" ] },
652 ins => [ "base", "index", "left_low", "left_high", "right", "mem" ],
653 outs => [ "div_res", "mod_res", "M" ],
654 attr => "ia32_op_flavour_t dm_flav",
656 "attr->data.op_flav = dm_flav;".
657 "set_ia32_am_support(res, ia32_am_Full, ia32_am_ternary);",
658 emit => ". div%M %unop4",
661 modified_flags => $status_flags
666 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
667 ins => [ "left", "right" ],
668 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
669 emit => '. shl %SB1, %S0',
672 modified_flags => $status_flags
677 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
678 ins => [ "base", "index", "count", "mem" ],
679 emit => '. shl%M %SI2, %AM',
682 modified_flags => $status_flags
686 cmp_attr => "return 1;",
687 # value, cnt, dependency
692 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
694 # Out requirements is: different from all in
695 # This is because, out must be different from LowPart and ShiftCount.
696 # We could say "!ecx !in_r4" but it can occur, that all values live through
697 # this Shift and the only value dying is the ShiftCount. Then there would be a
698 # register missing, as result must not be ecx and all other registers are
699 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
700 # (and probably never will). So we create artificial interferences of the result
701 # with all inputs, so the spiller can always assure a free register.
702 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
705 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
706 ins => [ "left_high", "left_low", "right" ],
707 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);",
708 emit => '. shld%M %SB2, %S1, %S0',
712 modified_flags => $status_flags
716 cmp_attr => "return 1;",
722 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
723 ins => [ "val", "count" ],
724 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
725 emit => '. shr %SB1, %S0',
728 modified_flags => $status_flags
733 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
734 ins => [ "base", "index", "count", "mem" ],
735 emit => '. shr%M %SI2, %AM',
738 modified_flags => $status_flags
742 cmp_attr => "return 1;",
743 # value, cnt, dependency
748 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
750 # Out requirements is: different from all in
751 # This is because, out must be different from LowPart and ShiftCount.
752 # We could say "!ecx !in_r4" but it can occur, that all values live through
753 # this Shift and the only value dying is the ShiftCount. Then there would be a
754 # register missing, as result must not be ecx and all other registers are
755 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
756 # (and probably never will). So we create artificial interferences of the result
757 # with all inputs, so the spiller can always assure a free register.
758 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
761 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
762 ins => [ "left_high", "left_low", "right" ],
763 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);",
764 emit => '. shrd%M %SB2, %S1, %S0',
768 modified_flags => $status_flags
772 cmp_attr => "return 1;",
778 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
779 ins => [ "val", "count" ],
780 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
781 emit => '. sar %SB1, %S0',
784 modified_flags => $status_flags
789 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
790 ins => [ "base", "index", "count", "mem" ],
791 emit => '. sar%M %SI2, %AM',
794 modified_flags => $status_flags
798 cmp_attr => "return 1;",
804 cmp_attr => "return 1;",
805 # value, cnt, dependency
811 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
812 ins => [ "val", "count" ],
813 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
814 emit => '. ror %SB1, %S0',
817 modified_flags => $status_flags
822 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
823 ins => [ "base", "index", "count", "mem" ],
824 emit => '. ror%M %SI2, %AM',
827 modified_flags => $status_flags
832 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
833 ins => [ "val", "count" ],
834 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
835 emit => '. rol %SB1, %S0',
838 modified_flags => $status_flags
843 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
844 ins => [ "base", "index", "count", "mem" ],
845 emit => '. rol%M %SI2, %AM',
848 modified_flags => $status_flags
855 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
858 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
861 modified_flags => $status_flags
866 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
867 ins => [ "base", "index", "mem" ],
868 emit => '. neg%M %AM',
871 modified_flags => $status_flags
876 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "gp" ] },
877 outs => [ "low_res", "high_res" ],
879 modified_flags => $status_flags
884 cmp_attr => "return 1;",
890 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
891 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
895 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
900 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
901 ins => [ "base", "index", "mem" ],
902 emit => '. inc%M %AM',
905 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
910 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
911 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
915 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
920 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
921 ins => [ "base", "index", "mem" ],
922 emit => '. dec%M %AM',
925 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
930 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
932 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
941 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
942 ins => [ "base", "index", "mem" ],
943 emit => '. not%M %AM',
946 modified_flags => [],
954 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
955 out => [ "none", "none"] },
956 ins => [ "base", "index", "left", "right", "mem" ],
957 outs => [ "false", "true" ],
960 "attr->pn_code = pnc;".
961 "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
963 units => [ "BRANCH" ],
969 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
971 out => [ "none", "none"] },
972 ins => [ "base", "index", "left", "right", "mem" ],
973 outs => [ "false", "true" ],
976 "attr->pn_code = pnc;".
977 "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
979 units => [ "BRANCH" ],
985 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
986 out => [ "none", "none" ] },
987 ins => [ "base", "index", "left", "right", "mem" ],
988 outs => [ "false", "true" ],
991 "attr->pn_code = pnc;".
992 "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
994 units => [ "BRANCH" ],
1000 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1002 out => [ "none", "none" ] },
1003 ins => [ "base", "index", "left", "right", "mem" ],
1004 outs => [ "false", "true" ],
1007 "attr->pn_code = pnc;".
1008 "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1010 units => [ "BRANCH" ],
1015 op_flags => "L|X|Y",
1016 reg_req => { in => [ "gp" ], out => [ "none" ] },
1018 units => [ "BRANCH" ],
1025 reg_req => { in => [ "gp" ] },
1026 emit => '. jmp *%S0',
1027 units => [ "BRANCH" ],
1029 modified_flags => []
1035 reg_req => { out => [ "gp" ] },
1037 attr => "ir_entity *symconst, int symconst_sign, long offset",
1038 attr_type => "ia32_immediate_attr_t",
1046 reg_req => { out => [ "gp_UKNWN" ] },
1056 reg_req => { out => [ "vfp_UKNWN" ] },
1060 attr_type => "ia32_x87_attr_t",
1067 reg_req => { out => [ "xmm_UKNWN" ] },
1077 reg_req => { out => [ "gp_NOREG" ] },
1087 reg_req => { out => [ "vfp_NOREG" ] },
1091 attr_type => "ia32_x87_attr_t",
1098 reg_req => { out => [ "xmm_NOREG" ] },
1108 reg_req => { out => [ "fp_cw" ] },
1112 modified_flags => $fpcw_flags
1118 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
1119 ins => [ "base", "index", "mem" ],
1121 emit => ". fldcw %AM",
1124 modified_flags => $fpcw_flags
1130 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
1131 ins => [ "base", "index", "fpcw", "mem" ],
1133 emit => ". fnstcw %AM",
1139 # we should not rematrialize this node. It produces 2 results and has
1140 # very strict constrains
1141 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
1142 ins => [ "val", "globbered" ],
1150 # Note that we add additional latency values depending on address mode, so a
1151 # lateny of 0 for load is correct
1155 state => "exc_pinned",
1156 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
1157 ins => [ "base", "index", "mem" ],
1158 outs => [ "res", "M" ],
1160 emit => ". mov%SE%ME%.l %AM, %D0",
1166 cmp_attr => "return 1;",
1167 outs => [ "res", "M" ],
1173 cmp_attr => "return 1;",
1174 state => "exc_pinned",
1181 state => "exc_pinned",
1182 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
1183 ins => [ "base", "index", "val", "mem" ],
1184 emit => '. mov%M %SI2, %AM',
1192 state => "exc_pinned",
1193 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
1194 emit => '. mov%M %SB2, %AM',
1202 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1203 ins => [ "base", "index" ],
1204 emit => '. leal %AM, %D0',
1208 modified_flags => [],
1212 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
1213 emit => '. push%M %unop2',
1214 ins => [ "base", "index", "val", "stack", "mem" ],
1215 outs => [ "stack:I|S", "M" ],
1216 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1219 modified_flags => [],
1223 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
1224 emit => '. pop%M %DAM1',
1225 outs => [ "stack:I|S", "res", "M" ],
1226 ins => [ "base", "index", "stack", "mem" ],
1227 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
1228 latency => 3, # Pop is more expensive than Push on Athlon
1230 modified_flags => [],
1234 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1236 outs => [ "frame:I", "stack:I|S", "M" ],
1242 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1244 outs => [ "frame:I", "stack:I|S" ],
1252 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1253 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1254 emit => '. addl %binop',
1255 outs => [ "stack:S", "M" ],
1257 modified_flags => $status_flags
1263 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "gp", "none" ] },
1264 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1265 emit => ". subl %binop\n".
1266 ". movl %%esp, %D1",
1267 outs => [ "stack:I|S", "addr", "M" ],
1269 modified_flags => $status_flags
1274 reg_req => { out => [ "gp" ] },
1278 # the int instruction
1280 reg_req => { in => [ "gp" ], out => [ "none" ] },
1282 emit => '. int %SI0',
1284 cmp_attr => "return 1;",
1288 #-----------------------------------------------------------------------------#
1289 # _____ _____ ______ __ _ _ _ #
1290 # / ____/ ____| ____| / _| | | | | | #
1291 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1292 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1293 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1294 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1295 #-----------------------------------------------------------------------------#
1299 reg_req => { out => [ "xmm" ] },
1300 emit => '. xorp%XSD %D1, %D1',
1306 # commutative operations
1310 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1311 emit => '. add%XXM %binop',
1319 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1320 emit => '. mul%XXM %binop',
1328 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1329 emit => '. max%XXM %binop',
1337 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1338 emit => '. min%XXM %binop',
1346 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1347 emit => '. andp%XSD %binop',
1355 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1356 emit => '. orp%XSD %binop',
1363 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1364 emit => '. xorp%XSD %binop',
1370 # not commutative operations
1374 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1375 emit => '. andnp%XSD %binop',
1383 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1384 emit => '. sub%XXM %binop',
1392 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1393 outs => [ "res", "M" ],
1394 emit => '. div%XXM %binop',
1403 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1411 op_flags => "L|X|Y",
1412 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1413 ins => [ "base", "index", "left", "right", "mem" ],
1414 outs => [ "false", "true" ],
1416 init_attr => "attr->pn_code = pnc;",
1425 state => "exc_pinned",
1426 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1427 emit => '. mov%XXM %AM, %D0',
1428 attr => "ir_mode *load_mode",
1429 init_attr => "attr->ls_mode = load_mode;",
1430 outs => [ "res", "M" ],
1437 state => "exc_pinned",
1438 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1439 emit => '. mov%XXM %S2, %AM',
1447 state => "exc_pinned",
1448 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1449 ins => [ "base", "index", "val", "mem" ],
1450 emit => '. mov%XXM %S2, %AM',
1458 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1459 emit => '. cvtsi2ss %D0, %AM',
1467 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1468 emit => '. cvtsi2sd %unop2',
1477 cmp_attr => "return 1;",
1483 cmp_attr => "return 1;",
1492 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1493 outs => [ "DST", "SRC", "CNT", "M" ],
1495 modified_flags => [ "DF" ]
1501 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1502 outs => [ "DST", "SRC", "M" ],
1504 modified_flags => [ "DF" ]
1510 state => "exc_pinned",
1511 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1513 ins => [ "base", "index", "val", "mem" ],
1514 attr => "ir_mode *smaller_mode",
1515 init_attr => "attr->ls_mode = smaller_mode;",
1517 modified_flags => $status_flags
1521 state => "exc_pinned",
1522 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1523 ins => [ "base", "index", "val", "mem" ],
1525 attr => "ir_mode *smaller_mode",
1526 init_attr => "attr->ls_mode = smaller_mode;",
1528 modified_flags => $status_flags
1532 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1539 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1546 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1554 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1555 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1556 attr => "pn_Cmp pn_code",
1557 init_attr => "attr->pn_code = pn_code;",
1565 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1566 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1567 attr => "pn_Cmp pn_code",
1568 init_attr => "attr->pn_code = pn_code;",
1576 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1577 out => [ "in_r7" ] },
1578 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1580 attr => "pn_Cmp pn_code",
1581 init_attr => "attr->pn_code = pn_code;",
1589 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1590 out => [ "in_r7" ] },
1591 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1593 attr => "pn_Cmp pn_code",
1594 init_attr => "attr->pn_code = pn_code;",
1602 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1610 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "gp", "gp" ],
1611 out => [ "in_r7" ] },
1612 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1615 units => [ "VFP", "GP" ],
1617 attr_type => "ia32_x87_attr_t",
1622 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1623 out => [ "eax ebx ecx edx" ] },
1624 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1625 attr => "pn_Cmp pn_code",
1626 init_attr => "attr->pn_code = pn_code;",
1634 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1636 out => [ "eax ebx ecx edx" ] },
1637 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1638 attr => "pn_Cmp pn_code",
1639 init_attr => "attr->pn_code = pn_code;",
1647 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1648 out => [ "eax ebx ecx edx" ] },
1649 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1650 attr => "pn_Cmp pn_code",
1651 init_attr => "attr->pn_code = pn_code;",
1659 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1661 out => [ "eax ebx ecx edx" ] },
1662 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1663 attr => "pn_Cmp pn_code",
1664 init_attr => "attr->pn_code = pn_code;",
1672 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1680 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1684 attr_type => "ia32_x87_attr_t",
1689 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1693 attr_type => "ia32_x87_attr_t",
1696 #----------------------------------------------------------#
1698 # (_) | | | | / _| | | | #
1699 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1700 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1701 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1702 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1704 # _ __ ___ __| | ___ ___ #
1705 # | '_ \ / _ \ / _` |/ _ \/ __| #
1706 # | | | | (_) | (_| | __/\__ \ #
1707 # |_| |_|\___/ \__,_|\___||___/ #
1708 #----------------------------------------------------------#
1712 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1713 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1717 attr_type => "ia32_x87_attr_t",
1722 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1723 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1727 attr_type => "ia32_x87_attr_t",
1732 cmp_attr => "return 1;",
1738 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1739 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1743 attr_type => "ia32_x87_attr_t",
1747 cmp_attr => "return 1;",
1752 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
1753 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1754 outs => [ "res", "M" ],
1757 attr_type => "ia32_x87_attr_t",
1761 cmp_attr => "return 1;",
1762 outs => [ "res", "M" ],
1767 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1768 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1772 attr_type => "ia32_x87_attr_t",
1776 cmp_attr => "return 1;",
1782 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1787 attr_type => "ia32_x87_attr_t",
1792 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1797 attr_type => "ia32_x87_attr_t",
1800 # virtual Load and Store
1804 state => "exc_pinned",
1805 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1806 ins => [ "base", "index", "mem" ],
1807 outs => [ "res", "M" ],
1808 attr => "ir_mode *load_mode",
1809 init_attr => "attr->attr.ls_mode = load_mode;",
1812 attr_type => "ia32_x87_attr_t",
1817 state => "exc_pinned",
1818 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1819 ins => [ "base", "index", "val", "mem" ],
1820 attr => "ir_mode *store_mode",
1821 init_attr => "attr->attr.ls_mode = store_mode;",
1825 attr_type => "ia32_x87_attr_t",
1831 state => "exc_pinned",
1832 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1833 outs => [ "res", "M" ],
1834 ins => [ "base", "index", "mem" ],
1837 attr_type => "ia32_x87_attr_t",
1841 cmp_attr => "return 1;",
1842 outs => [ "res", "M" ],
1847 state => "exc_pinned",
1848 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1849 ins => [ "base", "index", "val", "fpcw", "mem" ],
1853 attr_type => "ia32_x87_attr_t",
1857 cmp_attr => "return 1;",
1858 state => "exc_pinned",
1868 reg_req => { out => [ "vfp" ] },
1872 attr_type => "ia32_x87_attr_t",
1877 reg_req => { out => [ "vfp" ] },
1881 attr_type => "ia32_x87_attr_t",
1886 reg_req => { out => [ "vfp" ] },
1890 attr_type => "ia32_x87_attr_t",
1895 reg_req => { out => [ "vfp" ] },
1899 attr_type => "ia32_x87_attr_t",
1904 reg_req => { out => [ "vfp" ] },
1908 attr_type => "ia32_x87_attr_t",
1913 reg_req => { out => [ "vfp" ] },
1917 attr_type => "ia32_x87_attr_t",
1922 reg_req => { out => [ "vfp" ] },
1926 attr_type => "ia32_x87_attr_t",
1933 op_flags => "L|X|Y",
1934 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1935 ins => [ "left", "right" ],
1936 outs => [ "false", "true", "temp_reg_eax" ],
1938 init_attr => "attr->attr.pn_code = pnc;",
1941 attr_type => "ia32_x87_attr_t",
1944 #------------------------------------------------------------------------#
1945 # ___ _____ __ _ _ _ #
1946 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1947 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1948 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1949 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1950 #------------------------------------------------------------------------#
1952 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1953 # are swapped, we work this around in the emitter...
1957 rd_constructor => "NONE",
1959 emit => '. fadd%XM %x87_binop',
1960 attr_type => "ia32_x87_attr_t",
1965 rd_constructor => "NONE",
1967 emit => '. faddp%XM %x87_binop',
1968 attr_type => "ia32_x87_attr_t",
1973 rd_constructor => "NONE",
1975 emit => '. fmul%XM %x87_binop',
1976 attr_type => "ia32_x87_attr_t",
1981 rd_constructor => "NONE",
1983 emit => '. fmulp%XM %x87_binop',,
1984 attr_type => "ia32_x87_attr_t",
1989 rd_constructor => "NONE",
1991 emit => '. fsub%XM %x87_binop',
1992 attr_type => "ia32_x87_attr_t",
1997 rd_constructor => "NONE",
1999 # see note about gas bugs
2000 emit => '. fsubrp%XM %x87_binop',
2001 attr_type => "ia32_x87_attr_t",
2006 rd_constructor => "NONE",
2009 emit => '. fsubr%XM %x87_binop',
2010 attr_type => "ia32_x87_attr_t",
2015 rd_constructor => "NONE",
2018 # see note about gas bugs
2019 emit => '. fsubp%XM %x87_binop',
2020 attr_type => "ia32_x87_attr_t",
2025 rd_constructor => "NONE",
2028 attr_type => "ia32_x87_attr_t",
2031 # this node is just here, to keep the simulator running
2032 # we can omit this when a fprem simulation function exists
2035 rd_constructor => "NONE",
2038 attr_type => "ia32_x87_attr_t",
2043 rd_constructor => "NONE",
2045 emit => '. fdiv%XM %x87_binop',
2046 attr_type => "ia32_x87_attr_t",
2051 rd_constructor => "NONE",
2053 # see note about gas bugs
2054 emit => '. fdivrp%XM %x87_binop',
2055 attr_type => "ia32_x87_attr_t",
2060 rd_constructor => "NONE",
2062 emit => '. fdivr%XM %x87_binop',
2063 attr_type => "ia32_x87_attr_t",
2068 rd_constructor => "NONE",
2070 # see note about gas bugs
2071 emit => '. fdivp%XM %x87_binop',
2072 attr_type => "ia32_x87_attr_t",
2077 rd_constructor => "NONE",
2080 attr_type => "ia32_x87_attr_t",
2085 rd_constructor => "NONE",
2088 attr_type => "ia32_x87_attr_t",
2091 # x87 Load and Store
2094 rd_constructor => "NONE",
2095 op_flags => "R|L|F",
2096 state => "exc_pinned",
2098 emit => '. fld%XM %AM',
2099 attr_type => "ia32_x87_attr_t",
2103 rd_constructor => "NONE",
2104 op_flags => "R|L|F",
2105 state => "exc_pinned",
2107 emit => '. fst%XM %AM',
2109 attr_type => "ia32_x87_attr_t",
2113 rd_constructor => "NONE",
2114 op_flags => "R|L|F",
2115 state => "exc_pinned",
2117 emit => '. fstp%XM %AM',
2119 attr_type => "ia32_x87_attr_t",
2126 rd_constructor => "NONE",
2128 emit => '. fild%M %AM',
2129 attr_type => "ia32_x87_attr_t",
2134 state => "exc_pinned",
2135 rd_constructor => "NONE",
2137 emit => '. fist%M %AM',
2139 attr_type => "ia32_x87_attr_t",
2144 state => "exc_pinned",
2145 rd_constructor => "NONE",
2147 emit => '. fistp%M %AM',
2149 attr_type => "ia32_x87_attr_t",
2155 op_flags => "R|c|K",
2159 attr_type => "ia32_x87_attr_t",
2163 op_flags => "R|c|K",
2167 attr_type => "ia32_x87_attr_t",
2171 op_flags => "R|c|K",
2175 attr_type => "ia32_x87_attr_t",
2179 op_flags => "R|c|K",
2183 attr_type => "ia32_x87_attr_t",
2187 op_flags => "R|c|K",
2191 attr_type => "ia32_x87_attr_t",
2195 op_flags => "R|c|K",
2198 emit => '. fldll2t',
2199 attr_type => "ia32_x87_attr_t",
2203 op_flags => "R|c|K",
2207 attr_type => "ia32_x87_attr_t",
2211 # Note that it is NEVER allowed to do CSE on these nodes
2212 # Moreover, note the virtual register requierements!
2217 cmp_attr => "return 1;",
2218 emit => '. fxch %X0',
2219 attr_type => "ia32_x87_attr_t",
2225 cmp_attr => "return 1;",
2226 emit => '. fld %X0',
2227 attr_type => "ia32_x87_attr_t",
2232 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2233 cmp_attr => "return 1;",
2234 emit => '. fld %X0',
2235 attr_type => "ia32_x87_attr_t",
2241 cmp_attr => "return 1;",
2242 emit => '. fstp %X0',
2243 attr_type => "ia32_x87_attr_t",
2249 op_flags => "L|X|Y",
2251 attr_type => "ia32_x87_attr_t",
2255 op_flags => "L|X|Y",
2257 attr_type => "ia32_x87_attr_t",
2261 op_flags => "L|X|Y",
2263 attr_type => "ia32_x87_attr_t",
2267 op_flags => "L|X|Y",
2269 attr_type => "ia32_x87_attr_t",
2273 op_flags => "L|X|Y",
2275 attr_type => "ia32_x87_attr_t",
2279 op_flags => "L|X|Y",
2281 attr_type => "ia32_x87_attr_t",
2285 # -------------------------------------------------------------------------------- #
2286 # ____ ____ _____ _ _ #
2287 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2288 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2289 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2290 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2292 # -------------------------------------------------------------------------------- #
2295 # Spilling and reloading of SSE registers, hardcoded, not generated #
2299 state => "exc_pinned",
2300 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2301 emit => '. movdqu %D0, %AM',
2302 outs => [ "res", "M" ],
2308 state => "exc_pinned",
2309 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2310 emit => '. movdqu %binop',
2317 # Include the generated SIMD node specification written by the SIMD optimization
2318 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2319 unless ($return = do $my_script_name) {
2320 warn "couldn't parse $my_script_name: $@" if $@;
2321 warn "couldn't do $my_script_name: $!" unless defined $return;
2322 warn "couldn't run $my_script_name" unless $return;