3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 SB0 => "${arch}_emit_8bit_source_register(env, node, 0);",
257 SW0 => "${arch}_emit_16bit_source_register(env, node, 0);",
258 D0 => "${arch}_emit_dest_register(env, node, 0);",
259 D1 => "${arch}_emit_dest_register(env, node, 1);",
260 D2 => "${arch}_emit_dest_register(env, node, 2);",
261 D3 => "${arch}_emit_dest_register(env, node, 3);",
262 D4 => "${arch}_emit_dest_register(env, node, 4);",
263 D5 => "${arch}_emit_dest_register(env, node, 5);",
264 X0 => "${arch}_emit_x87_name(env, node, 0);",
265 X1 => "${arch}_emit_x87_name(env, node, 1);",
266 X2 => "${arch}_emit_x87_name(env, node, 2);",
267 C => "${arch}_emit_immediate(env, node);",
268 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
269 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
270 ia32_emit_mode_suffix(env, node);",
271 M => "${arch}_emit_mode_suffix(env, node);",
272 XM => "${arch}_emit_x87_mode_suffix(env, node);",
273 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
274 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
275 AM => "${arch}_emit_am(env, node);",
276 unop0 => "${arch}_emit_unop(env, node, 0);",
277 unop1 => "${arch}_emit_unop(env, node, 1);",
278 unop2 => "${arch}_emit_unop(env, node, 2);",
279 unop3 => "${arch}_emit_unop(env, node, 3);",
280 unop4 => "${arch}_emit_unop(env, node, 4);",
281 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
282 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 0);",
283 binop => "${arch}_emit_binop(env, node);",
284 x87_binop => "${arch}_emit_x87_binop(env, node);",
287 #--------------------------------------------------#
290 # _ __ _____ __ _ _ __ ___ _ __ ___ #
291 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
292 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
293 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
296 #--------------------------------------------------#
298 $default_attr_type = "ia32_attr_t";
299 $default_copy_attr = "ia32_copy_attr";
302 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
304 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
305 "\tinit_ia32_x87_attributes(res);",
307 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
308 "\tinit_ia32_x87_attributes(res);".
309 "\tinit_ia32_asm_attributes(res);",
310 ia32_immediate_attr_t =>
311 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
312 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
316 ia32_attr_t => "ia32_compare_nodes_attr",
317 ia32_x87_attr_t => "ia32_compare_x87_attr",
318 ia32_asm_attr_t => "ia32_compare_asm_attr",
319 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
325 $mode_xmm = "mode_E";
326 $mode_gp = "mode_Iu";
327 $mode_fpcw = "mode_fpcw";
328 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
329 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
330 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
338 reg_req => { out => [ "gp_NOREG" ] },
339 attr => "ir_entity *symconst, int symconst_sign, long offset",
340 attr_type => "ia32_immediate_attr_t",
348 out_arity => "variable",
349 attr_type => "ia32_asm_attr_t",
356 reg_req => { out => [ "gp" ] },
361 cmp_attr => "return 1;",
364 #-----------------------------------------------------------------#
367 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
368 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
369 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
370 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
373 #-----------------------------------------------------------------#
375 # commutative operations
378 # All nodes supporting Addressmode have 5 INs:
379 # 1 - base r1 == NoReg in case of no AM or no base
380 # 2 - index r2 == NoReg in case of no AM or no index
381 # 3 - op1 r3 == always present
382 # 4 - op2 r4 == NoReg in case of immediate operation
383 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
387 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
388 ins => [ "base", "index", "left", "right", "mem" ],
389 emit => '. add%M %binop',
392 modified_flags => $status_flags
396 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
397 emit => '. adc%M %binop',
400 modified_flags => $status_flags
406 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
413 outs => [ "low_res", "high_res" ],
415 modified_flags => $status_flags
421 cmp_attr => "return 1;",
427 cmp_attr => "return 1;",
432 # we should not rematrialize this node. It produces 2 results and has
433 # very strict constrains
434 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
435 emit => '. mul%M %unop3',
436 outs => [ "EAX", "EDX", "M" ],
437 ins => [ "base", "index", "val_high", "val_low", "mem" ],
440 modified_flags => $status_flags
444 # we should not rematrialize this node. It produces 2 results and has
445 # very strict constrains
447 cmp_attr => "return 1;",
448 outs => [ "EAX", "EDX", "M" ],
454 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
455 emit => '. imul%M %binop',
459 modified_flags => $status_flags
464 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
465 emit => '. imul%M %unop3',
466 outs => [ "EAX", "EDX", "M" ],
467 ins => [ "base", "index", "val_high", "val_low", "mem" ],
470 modified_flags => $status_flags
475 cmp_attr => "return 1;",
481 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
482 emit => '. and%M %binop',
485 modified_flags => $status_flags
490 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
491 emit => '. or%M %binop',
494 modified_flags => $status_flags
499 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
500 emit => '. xor%M %binop',
503 modified_flags => $status_flags
508 cmp_attr => "return 1;",
510 modified_flags => $status_flags
513 # not commutative operations
517 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
518 emit => '. sub%M %binop',
521 modified_flags => $status_flags
525 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
526 emit => '. sbb%M %binop',
529 modified_flags => $status_flags
535 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
542 outs => [ "low_res", "high_res" ],
544 modified_flags => $status_flags
549 cmp_attr => "return 1;",
554 cmp_attr => "return 1;",
560 state => "exc_pinned",
561 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
562 attr => "ia32_op_flavour_t dm_flav",
563 init_attr => "attr->data.op_flav = dm_flav;",
564 emit => ". idiv%M %unop4",
565 outs => [ "div_res", "mod_res", "M" ],
568 modified_flags => $status_flags
573 state => "exc_pinned",
574 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
575 attr => "ia32_op_flavour_t dm_flav",
576 init_attr => "attr->data.op_flav = dm_flav;",
577 emit => ". div%M %unop4",
578 outs => [ "div_res", "mod_res", "M" ],
581 modified_flags => $status_flags
586 # "in_r3" would be enough as out requirement, but the register allocator
587 # does strange things then and doesn't respect the constraint for in4
588 # if the same value is attached to in3 and in4 (if you have "i << i" in C)
589 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
590 ins => [ "base", "index", "left", "right", "mem" ],
591 emit => '. shl%M %binop',
594 modified_flags => $status_flags
598 cmp_attr => "return 1;",
599 # value, cnt, dependency
604 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
606 # Out requirements is: different from all in
607 # This is because, out must be different from LowPart and ShiftCount.
608 # We could say "!ecx !in_r4" but it can occur, that all values live through
609 # this Shift and the only value dying is the ShiftCount. Then there would be a
610 # register missing, as result must not be ecx and all other registers are
611 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
612 # (and probably never will). So we create artificial interferences of the result
613 # with all inputs, so the spiller can always assure a free register.
614 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
617 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r5" ] },
620 if (get_ia32_immop_type(node) == ia32_ImmNone) {
621 if (get_ia32_op_type(node) == ia32_AddrModeD) {
622 . shld%M %%cl, %S3, %AM
624 . shld%M %%cl, %S3, %S2
627 if (get_ia32_op_type(node) == ia32_AddrModeD) {
628 . shld%M %C, %S3, %AM
630 . shld%M %C, %S3, %S2
637 modified_flags => $status_flags
641 cmp_attr => "return 1;",
647 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
648 emit => '. shr%M %binop',
651 modified_flags => $status_flags
655 cmp_attr => "return 1;",
656 # value, cnt, dependency
661 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
663 # Out requirements is: different from all in
664 # This is because, out must be different from LowPart and ShiftCount.
665 # We could say "!ecx !in_r4" but it can occur, that all values live through
666 # this Shift and the only value dying is the ShiftCount. Then there would be a
667 # register missing, as result must not be ecx and all other registers are
668 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
669 # (and probably never will). So we create artificial interferences of the result
670 # with all inputs, so the spiller can always assure a free register.
671 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
674 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r5" ] },
676 if (get_ia32_immop_type(node) == ia32_ImmNone) {
677 if (get_ia32_op_type(node) == ia32_AddrModeD) {
678 . shrd%M %%cl, %S3, %AM
680 . shrd%M %%cl, %S3, %S2
683 if (get_ia32_op_type(node) == ia32_AddrModeD) {
684 . shrd%M %C, %S3, %AM
686 . shrd%M %C, %S3, %S2
693 modified_flags => $status_flags
697 cmp_attr => "return 1;",
703 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
704 emit => '. sar%M %binop',
707 modified_flags => $status_flags
711 cmp_attr => "return 1;",
717 cmp_attr => "return 1;",
718 # value, cnt, dependency
724 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
725 emit => '. ror%M %binop',
728 modified_flags => $status_flags
733 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
734 emit => '. rol%M %binop',
737 modified_flags => $status_flags
744 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
745 emit => '. neg%M %unop2',
746 ins => [ "base", "index", "val", "mem" ],
749 modified_flags => $status_flags
754 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
761 outs => [ "low_res", "high_res" ],
763 modified_flags => $status_flags
768 cmp_attr => "return 1;",
774 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
775 emit => '. inc%M %unop2',
778 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
783 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
784 emit => '. dec%M %unop2',
787 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
792 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
793 ins => [ "base", "index", "val", "mem" ],
794 emit => '. not%M %unop2',
805 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
806 out => [ "none", "none"] },
807 ins => [ "base", "index", "left", "right", "mem" ],
808 outs => [ "false", "true" ],
810 init_attr => "attr->pn_code = pnc;",
812 units => [ "BRANCH" ],
818 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
819 out => [ "none", "none" ] },
820 ins => [ "base", "index", "left", "right", "mem" ],
821 outs => [ "false", "true" ],
823 init_attr => "attr->pn_code = pnc;",
825 units => [ "BRANCH" ],
831 reg_req => { in => [ "gp" ], out => [ "none" ] },
833 units => [ "BRANCH" ],
840 reg_req => { in => [ "gp", "gp", "gp", "none" ] },
841 ins => [ "base", "index", "val", "mem" ],
842 emit => '. jmp *%unop2',
843 units => [ "BRANCH" ],
851 reg_req => { out => [ "gp" ] },
860 reg_req => { out => [ "gp_UKNWN" ] },
870 reg_req => { out => [ "vfp_UKNWN" ] },
874 attr_type => "ia32_x87_attr_t",
881 reg_req => { out => [ "xmm_UKNWN" ] },
891 reg_req => { out => [ "gp_NOREG" ] },
901 reg_req => { out => [ "vfp_NOREG" ] },
905 attr_type => "ia32_x87_attr_t",
912 reg_req => { out => [ "xmm_NOREG" ] },
922 reg_req => { out => [ "fp_cw" ] },
926 modified_flags => $fpcw_flags
932 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
934 emit => ". fldcw %AM",
937 modified_flags => $fpcw_flags
943 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
945 emit => ". fnstcw %AM",
951 # we should not rematrialize this node. It produces 2 results and has
952 # very strict constrains
953 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
954 ins => [ "val", "globbered" ],
962 # Note that we add additional latency values depending on address mode, so a
963 # lateny of 0 for load is correct
967 state => "exc_pinned",
968 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
969 ins => [ "base", "index", "mem" ],
970 outs => [ "res", "M" ],
972 emit => ". mov%SE%ME%.l %AM, %D0",
978 cmp_attr => "return 1;",
979 outs => [ "res", "M" ],
985 cmp_attr => "return 1;",
986 state => "exc_pinned",
993 state => "exc_pinned",
994 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
995 ins => [ "base", "index", "val", "mem" ],
996 emit => '. mov%M %binop',
1004 state => "exc_pinned",
1005 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
1006 emit => '. mov%M %binop',
1014 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1015 emit => '. leal %AM, %D0',
1019 modified_flags => [],
1023 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
1024 emit => '. push%M %unop2',
1025 ins => [ "base", "index", "val", "stack", "mem" ],
1026 outs => [ "stack:I|S", "M" ],
1029 modified_flags => [],
1033 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
1034 emit => '. pop%M %DAM1',
1035 outs => [ "stack:I|S", "res", "M" ],
1036 ins => [ "base", "index", "stack", "mem" ],
1037 latency => 3, # Pop is more expensive than Push on Athlon
1039 modified_flags => [],
1043 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1045 outs => [ "frame:I", "stack:I|S", "M" ],
1051 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1053 outs => [ "frame:I", "stack:I|S" ],
1061 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1062 emit => '. addl %binop',
1063 outs => [ "stack:S", "M" ],
1065 modified_flags => $status_flags
1071 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "gp", "none" ] },
1072 emit => ". subl %binop\n".
1073 ". movl %%esp, %D1",
1074 outs => [ "stack:I|S", "addr", "M" ],
1076 modified_flags => $status_flags
1081 reg_req => { out => [ "gp" ] },
1085 # the int instruction
1087 reg_req => { in => [ "none" ], out => [ "none" ] },
1089 attr => "tarval *tv",
1090 init_attr => "\tset_ia32_Immop_tarval(res, tv);",
1093 cmp_attr => "return 1;",
1097 #-----------------------------------------------------------------------------#
1098 # _____ _____ ______ __ _ _ _ #
1099 # / ____/ ____| ____| / _| | | | | | #
1100 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1101 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1102 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1103 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1104 #-----------------------------------------------------------------------------#
1106 # commutative operations
1110 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1111 emit => '. add%XXM %binop',
1119 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1120 emit => '. mul%XXM %binop',
1128 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1129 emit => '. max%XXM %binop',
1137 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1138 emit => '. min%XXM %binop',
1146 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1147 emit => '. andp%XSD %binop',
1155 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1156 emit => '. orp%XSD %binop',
1163 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1164 emit => '. xorp%XSD %binop',
1170 # not commutative operations
1174 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1175 emit => '. andnp%XSD %binop',
1183 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1184 emit => '. sub%XXM %binop',
1192 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1193 outs => [ "res", "M" ],
1194 emit => '. div%XXM %binop',
1203 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1211 op_flags => "L|X|Y",
1212 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1213 ins => [ "base", "index", "left", "right", "mem" ],
1214 outs => [ "false", "true" ],
1216 init_attr => "attr->pn_code = pnc;",
1224 reg_req => { out => [ "xmm" ] },
1225 emit => '. mov%XXM %C, %D0',
1235 state => "exc_pinned",
1236 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1237 emit => '. mov%XXM %AM, %D0',
1238 outs => [ "res", "M" ],
1245 state => "exc_pinned",
1246 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1247 emit => '. mov%XXM %binop',
1255 state => "exc_pinned",
1256 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1257 ins => [ "base", "index", "val", "mem" ],
1258 emit => '. mov%XXM %S2, %AM',
1266 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1267 emit => '. cvtsi2ss %D0, %AM',
1275 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1276 emit => '. cvtsi2sd %unop2',
1285 cmp_attr => "return 1;",
1291 cmp_attr => "return 1;",
1300 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1301 outs => [ "DST", "SRC", "CNT", "M" ],
1303 modified_flags => [ "DF" ]
1309 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1310 outs => [ "DST", "SRC", "M" ],
1312 modified_flags => [ "DF" ]
1318 state => "exc_pinned",
1319 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1321 ins => [ "base", "index", "val", "mem" ],
1322 attr => "ir_mode *smaller_mode",
1323 init_attr => "attr->ls_mode = smaller_mode;",
1325 modified_flags => $status_flags
1329 state => "exc_pinned",
1330 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1331 ins => [ "base", "index", "val", "mem" ],
1333 attr => "ir_mode *smaller_mode",
1334 init_attr => "attr->ls_mode = smaller_mode;",
1336 modified_flags => $status_flags
1340 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1347 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1354 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1362 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1363 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1364 attr => "pn_Cmp pn_code",
1365 init_attr => "attr->pn_code = pn_code;",
1373 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1374 out => [ "in_r7" ] },
1375 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1377 attr => "pn_Cmp pn_code",
1378 init_attr => "attr->pn_code = pn_code;",
1386 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1394 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "gp", "gp" ],
1395 out => [ "in_r7" ] },
1396 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1399 units => [ "VFP", "GP" ],
1401 attr_type => "ia32_x87_attr_t",
1406 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1407 out => [ "eax ebx ecx edx" ] },
1408 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1409 attr => "pn_Cmp pn_code",
1410 init_attr => "attr->pn_code = pn_code;",
1418 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1419 out => [ "eax ebx ecx edx" ] },
1420 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1421 attr => "pn_Cmp pn_code",
1422 init_attr => "attr->pn_code = pn_code;",
1430 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1438 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1442 attr_type => "ia32_x87_attr_t",
1447 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1451 attr_type => "ia32_x87_attr_t",
1454 #----------------------------------------------------------#
1456 # (_) | | | | / _| | | | #
1457 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1458 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1459 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1460 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1462 # _ __ ___ __| | ___ ___ #
1463 # | '_ \ / _ \ / _` |/ _ \/ __| #
1464 # | | | | (_) | (_| | __/\__ \ #
1465 # |_| |_|\___/ \__,_|\___||___/ #
1466 #----------------------------------------------------------#
1470 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1471 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1475 attr_type => "ia32_x87_attr_t",
1480 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1481 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1485 attr_type => "ia32_x87_attr_t",
1490 cmp_attr => "return 1;",
1496 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1497 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1501 attr_type => "ia32_x87_attr_t",
1505 cmp_attr => "return 1;",
1510 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
1511 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1512 outs => [ "res", "M" ],
1515 attr_type => "ia32_x87_attr_t",
1519 cmp_attr => "return 1;",
1520 outs => [ "res", "M" ],
1525 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1526 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1530 attr_type => "ia32_x87_attr_t",
1534 cmp_attr => "return 1;",
1540 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1545 attr_type => "ia32_x87_attr_t",
1550 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1555 attr_type => "ia32_x87_attr_t",
1558 # virtual Load and Store
1562 state => "exc_pinned",
1563 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1564 ins => [ "base", "index", "mem" ],
1565 outs => [ "res", "M" ],
1566 attr => "ir_mode *store_mode",
1567 init_attr => "attr->attr.ls_mode = store_mode;",
1570 attr_type => "ia32_x87_attr_t",
1575 state => "exc_pinned",
1576 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1577 ins => [ "base", "index", "val", "mem" ],
1578 attr => "ir_mode *store_mode",
1579 init_attr => "attr->attr.ls_mode = store_mode;",
1583 attr_type => "ia32_x87_attr_t",
1589 state => "exc_pinned",
1590 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1591 outs => [ "res", "M" ],
1592 ins => [ "base", "index", "mem" ],
1595 attr_type => "ia32_x87_attr_t",
1599 cmp_attr => "return 1;",
1600 outs => [ "res", "M" ],
1605 state => "exc_pinned",
1606 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1607 ins => [ "base", "index", "val", "fpcw", "mem" ],
1611 attr_type => "ia32_x87_attr_t",
1615 cmp_attr => "return 1;",
1616 state => "exc_pinned",
1626 reg_req => { out => [ "vfp" ] },
1630 attr_type => "ia32_x87_attr_t",
1635 reg_req => { out => [ "vfp" ] },
1639 attr_type => "ia32_x87_attr_t",
1644 reg_req => { out => [ "vfp" ] },
1648 attr_type => "ia32_x87_attr_t",
1653 reg_req => { out => [ "vfp" ] },
1657 attr_type => "ia32_x87_attr_t",
1662 reg_req => { out => [ "vfp" ] },
1666 attr_type => "ia32_x87_attr_t",
1671 reg_req => { out => [ "vfp" ] },
1675 attr_type => "ia32_x87_attr_t",
1680 reg_req => { out => [ "vfp" ] },
1684 attr_type => "ia32_x87_attr_t",
1690 reg_req => { out => [ "vfp" ] },
1694 attr_type => "ia32_x87_attr_t",
1701 op_flags => "L|X|Y",
1702 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1703 ins => [ "left", "right" ],
1704 outs => [ "false", "true", "temp_reg_eax" ],
1706 init_attr => "attr->attr.pn_code = pnc;",
1709 attr_type => "ia32_x87_attr_t",
1712 #------------------------------------------------------------------------#
1713 # ___ _____ __ _ _ _ #
1714 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1715 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1716 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1717 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1718 #------------------------------------------------------------------------#
1720 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1721 # are swapped, we work this around in the emitter...
1725 rd_constructor => "NONE",
1727 emit => '. fadd%XM %x87_binop',
1728 attr_type => "ia32_x87_attr_t",
1733 rd_constructor => "NONE",
1735 emit => '. faddp%XM %x87_binop',
1736 attr_type => "ia32_x87_attr_t",
1741 rd_constructor => "NONE",
1743 emit => '. fmul%XM %x87_binop',
1744 attr_type => "ia32_x87_attr_t",
1749 rd_constructor => "NONE",
1751 emit => '. fmulp%XM %x87_binop',,
1752 attr_type => "ia32_x87_attr_t",
1757 rd_constructor => "NONE",
1759 emit => '. fsub%XM %x87_binop',
1760 attr_type => "ia32_x87_attr_t",
1765 rd_constructor => "NONE",
1767 # see note about gas bugs
1768 emit => '. fsubrp%XM %x87_binop',
1769 attr_type => "ia32_x87_attr_t",
1774 rd_constructor => "NONE",
1777 emit => '. fsubr%XM %x87_binop',
1778 attr_type => "ia32_x87_attr_t",
1783 rd_constructor => "NONE",
1786 # see note about gas bugs
1787 emit => '. fsubp%XM %x87_binop',
1788 attr_type => "ia32_x87_attr_t",
1793 rd_constructor => "NONE",
1796 attr_type => "ia32_x87_attr_t",
1799 # this node is just here, to keep the simulator running
1800 # we can omit this when a fprem simulation function exists
1803 rd_constructor => "NONE",
1806 attr_type => "ia32_x87_attr_t",
1811 rd_constructor => "NONE",
1813 emit => '. fdiv%XM %x87_binop',
1814 attr_type => "ia32_x87_attr_t",
1819 rd_constructor => "NONE",
1821 # see note about gas bugs
1822 emit => '. fdivrp%XM %x87_binop',
1823 attr_type => "ia32_x87_attr_t",
1828 rd_constructor => "NONE",
1830 emit => '. fdivr%XM %x87_binop',
1831 attr_type => "ia32_x87_attr_t",
1836 rd_constructor => "NONE",
1838 # see note about gas bugs
1839 emit => '. fdivp%XM %x87_binop',
1840 attr_type => "ia32_x87_attr_t",
1845 rd_constructor => "NONE",
1848 attr_type => "ia32_x87_attr_t",
1853 rd_constructor => "NONE",
1856 attr_type => "ia32_x87_attr_t",
1859 # x87 Load and Store
1862 rd_constructor => "NONE",
1863 op_flags => "R|L|F",
1864 state => "exc_pinned",
1866 emit => '. fld%XM %AM',
1867 attr_type => "ia32_x87_attr_t",
1871 rd_constructor => "NONE",
1872 op_flags => "R|L|F",
1873 state => "exc_pinned",
1875 emit => '. fst%XM %AM',
1877 attr_type => "ia32_x87_attr_t",
1881 rd_constructor => "NONE",
1882 op_flags => "R|L|F",
1883 state => "exc_pinned",
1885 emit => '. fstp%XM %AM',
1887 attr_type => "ia32_x87_attr_t",
1894 rd_constructor => "NONE",
1896 emit => '. fild%M %AM',
1897 attr_type => "ia32_x87_attr_t",
1902 state => "exc_pinned",
1903 rd_constructor => "NONE",
1905 emit => '. fist%M %AM',
1907 attr_type => "ia32_x87_attr_t",
1912 state => "exc_pinned",
1913 rd_constructor => "NONE",
1915 emit => '. fistp%M %AM',
1917 attr_type => "ia32_x87_attr_t",
1923 op_flags => "R|c|K",
1927 attr_type => "ia32_x87_attr_t",
1931 op_flags => "R|c|K",
1935 attr_type => "ia32_x87_attr_t",
1939 op_flags => "R|c|K",
1943 attr_type => "ia32_x87_attr_t",
1947 op_flags => "R|c|K",
1951 attr_type => "ia32_x87_attr_t",
1955 op_flags => "R|c|K",
1959 attr_type => "ia32_x87_attr_t",
1963 op_flags => "R|c|K",
1966 emit => '. fldll2t',
1967 attr_type => "ia32_x87_attr_t",
1971 op_flags => "R|c|K",
1975 attr_type => "ia32_x87_attr_t",
1979 # Note that it is NEVER allowed to do CSE on these nodes
1980 # Moreover, note the virtual register requierements!
1985 cmp_attr => "return 1;",
1986 emit => '. fxch %X0',
1987 attr_type => "ia32_x87_attr_t",
1993 cmp_attr => "return 1;",
1994 emit => '. fld %X0',
1995 attr_type => "ia32_x87_attr_t",
2000 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2001 cmp_attr => "return 1;",
2002 emit => '. fld %X0',
2003 attr_type => "ia32_x87_attr_t",
2009 cmp_attr => "return 1;",
2010 emit => '. fstp %X0',
2011 attr_type => "ia32_x87_attr_t",
2017 op_flags => "L|X|Y",
2019 attr_type => "ia32_x87_attr_t",
2023 op_flags => "L|X|Y",
2025 attr_type => "ia32_x87_attr_t",
2029 op_flags => "L|X|Y",
2031 attr_type => "ia32_x87_attr_t",
2035 op_flags => "L|X|Y",
2037 attr_type => "ia32_x87_attr_t",
2041 op_flags => "L|X|Y",
2043 attr_type => "ia32_x87_attr_t",
2047 op_flags => "L|X|Y",
2049 attr_type => "ia32_x87_attr_t",
2053 # -------------------------------------------------------------------------------- #
2054 # ____ ____ _____ _ _ #
2055 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2056 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2057 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2058 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2060 # -------------------------------------------------------------------------------- #
2063 # Spilling and reloading of SSE registers, hardcoded, not generated #
2067 state => "exc_pinned",
2068 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2069 emit => '. movdqu %D0, %AM',
2070 outs => [ "res", "M" ],
2076 state => "exc_pinned",
2077 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2078 emit => '. movdqu %binop',
2085 # Include the generated SIMD node specification written by the SIMD optimization
2086 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2087 unless ($return = do $my_script_name) {
2088 warn "couldn't parse $my_script_name: $@" if $@;
2089 warn "couldn't do $my_script_name: $!" unless defined $return;
2090 warn "couldn't run $my_script_name" unless $return;