3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 SB1 => "${arch}_emit_8bit_source_register(env, node, 1);",
257 SB2 => "${arch}_emit_8bit_source_register(env, node, 2);",
258 SW0 => "${arch}_emit_16bit_source_register(env, node, 0);",
259 SI0 => "${arch}_emit_source_register_or_immediate(env, node, 0);",
260 SI1 => "${arch}_emit_source_register_or_immediate(env, node, 1);",
261 SI2 => "${arch}_emit_source_register_or_immediate(env, node, 2);",
262 D0 => "${arch}_emit_dest_register(env, node, 0);",
263 D1 => "${arch}_emit_dest_register(env, node, 1);",
264 D2 => "${arch}_emit_dest_register(env, node, 2);",
265 D3 => "${arch}_emit_dest_register(env, node, 3);",
266 D4 => "${arch}_emit_dest_register(env, node, 4);",
267 D5 => "${arch}_emit_dest_register(env, node, 5);",
268 X0 => "${arch}_emit_x87_name(env, node, 0);",
269 X1 => "${arch}_emit_x87_name(env, node, 1);",
270 X2 => "${arch}_emit_x87_name(env, node, 2);",
271 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
272 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
273 ia32_emit_mode_suffix(env, node);",
274 M => "${arch}_emit_mode_suffix(env, node);",
275 XM => "${arch}_emit_x87_mode_suffix(env, node);",
276 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
277 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
278 AM => "${arch}_emit_am(env, node);",
279 unop0 => "${arch}_emit_unop(env, node, 0);",
280 unop1 => "${arch}_emit_unop(env, node, 1);",
281 unop2 => "${arch}_emit_unop(env, node, 2);",
282 unop3 => "${arch}_emit_unop(env, node, 3);",
283 unop4 => "${arch}_emit_unop(env, node, 4);",
284 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
285 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 0);",
286 binop => "${arch}_emit_binop(env, node);",
287 x87_binop => "${arch}_emit_x87_binop(env, node);",
290 #--------------------------------------------------#
293 # _ __ _____ __ _ _ __ ___ _ __ ___ #
294 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
295 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
296 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
299 #--------------------------------------------------#
301 $default_attr_type = "ia32_attr_t";
302 $default_copy_attr = "ia32_copy_attr";
305 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
307 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
308 "\tinit_ia32_x87_attributes(res);",
310 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
311 "\tinit_ia32_x87_attributes(res);".
312 "\tinit_ia32_asm_attributes(res);",
313 ia32_immediate_attr_t =>
314 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
315 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
319 ia32_attr_t => "ia32_compare_nodes_attr",
320 ia32_x87_attr_t => "ia32_compare_x87_attr",
321 ia32_asm_attr_t => "ia32_compare_asm_attr",
322 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
328 $mode_xmm = "mode_E";
329 $mode_gp = "mode_Iu";
330 $mode_fpcw = "mode_fpcw";
331 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
332 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
333 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
341 reg_req => { out => [ "gp_NOREG" ] },
342 attr => "ir_entity *symconst, int symconst_sign, long offset",
343 attr_type => "ia32_immediate_attr_t",
351 out_arity => "variable",
352 attr_type => "ia32_asm_attr_t",
359 reg_req => { out => [ "gp" ] },
364 cmp_attr => "return 1;",
367 #-----------------------------------------------------------------#
370 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
371 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
372 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
373 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
376 #-----------------------------------------------------------------#
378 # commutative operations
381 # All nodes supporting Addressmode have 5 INs:
382 # 1 - base r1 == NoReg in case of no AM or no base
383 # 2 - index r2 == NoReg in case of no AM or no index
384 # 3 - op1 r3 == always present
385 # 4 - op2 r4 == NoReg in case of immediate operation
386 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
390 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
391 ins => [ "base", "index", "left", "right", "mem" ],
392 emit => '. add%M %binop',
393 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
396 modified_flags => $status_flags
401 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
402 ins => [ "base", "index", "val", "mem" ],
403 emit => ". add%M %SI2, %AM",
406 modified_flags => $status_flags
410 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
411 emit => '. adc%M %binop',
412 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
415 modified_flags => $status_flags
421 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
428 outs => [ "low_res", "high_res" ],
430 modified_flags => $status_flags
436 cmp_attr => "return 1;",
442 cmp_attr => "return 1;",
447 # we should not rematrialize this node. It produces 2 results and has
448 # very strict constrains
449 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
450 emit => '. mul%M %unop3',
451 outs => [ "EAX", "EDX", "M" ],
452 ins => [ "base", "index", "val_high", "val_low", "mem" ],
453 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
456 modified_flags => $status_flags
460 # we should not rematrialize this node. It produces 2 results and has
461 # very strict constrains
463 cmp_attr => "return 1;",
464 outs => [ "EAX", "EDX", "M" ],
470 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
471 ins => [ "base", "index", "left", "right", "mem" ],
472 emit => '. imul%M %binop',
473 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
477 modified_flags => $status_flags
482 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
483 emit => '. imul%M %unop3',
484 outs => [ "EAX", "EDX", "M" ],
485 ins => [ "base", "index", "val_high", "val_low", "mem" ],
486 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
489 modified_flags => $status_flags
493 # we should not rematrialize this node. It produces 2 results and has
494 # very strict constrains
496 cmp_attr => "return 1;",
497 outs => [ "EAX", "EDX", "M" ],
503 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
504 ins => [ "base", "index", "left", "right", "mem" ],
505 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
506 emit => '. and%M %binop',
509 modified_flags => $status_flags
514 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
515 emit => '. and%M %SI2, %AM',
518 modified_flags => $status_flags
523 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
524 ins => [ "base", "index", "left", "right", "mem" ],
525 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
526 emit => '. or%M %binop',
529 modified_flags => $status_flags
534 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
535 ins => [ "base", "index", "val", "mem" ],
536 emit => '. or%M %SI2, %AM',
539 modified_flags => $status_flags
544 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
545 ins => [ "base", "index", "left", "right", "mem" ],
546 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
547 emit => '. xor%M %binop',
550 modified_flags => $status_flags
555 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
556 ins => [ "base", "index", "val", "mem" ],
557 emit => '. xor%M %SI2, %AM',
560 modified_flags => $status_flags
565 cmp_attr => "return 1;",
567 modified_flags => $status_flags
570 # not commutative operations
574 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
575 ins => [ "base", "index", "left", "right", "mem" ],
576 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
577 emit => '. sub%M %binop',
580 modified_flags => $status_flags
585 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
586 ins => [ "base", "index", "val", "mem" ],
587 emit => '. sub%M %SI2, %AM',
590 modified_flags => $status_flags
594 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
595 ins => [ "base", "index", "left", "right", "mem" ],
596 init_attr => "set_ia32_am_support(res, ia32_am_Full, ia32_am_binary);",
597 emit => '. sbb%M %binop',
600 modified_flags => $status_flags
606 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
613 outs => [ "low_res", "high_res" ],
615 modified_flags => $status_flags
620 cmp_attr => "return 1;",
625 cmp_attr => "return 1;",
631 state => "exc_pinned",
632 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ],
633 out => [ "eax", "edx", "none" ] },
634 ins => [ "base", "index", "left_low", "left_high", "right", "mem" ],
635 outs => [ "div_res", "mod_res", "M" ],
636 attr => "ia32_op_flavour_t dm_flav",
638 "attr->data.op_flav = dm_flav;".
639 "set_ia32_am_support(res, ia32_am_Full, ia32_am_ternary);",
640 emit => ". idiv%M %unop4",
643 modified_flags => $status_flags
648 state => "exc_pinned",
649 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ],
650 out => [ "eax", "edx", "none" ] },
651 ins => [ "base", "index", "left_low", "left_high", "right", "mem" ],
652 outs => [ "div_res", "mod_res", "M" ],
653 attr => "ia32_op_flavour_t dm_flav",
655 "attr->data.op_flav = dm_flav;".
656 "set_ia32_am_support(res, ia32_am_Full, ia32_am_ternary);",
657 emit => ". div%M %unop4",
660 modified_flags => $status_flags
665 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
666 ins => [ "left", "right" ],
667 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
668 emit => '. shl %SB1, %S0',
671 modified_flags => $status_flags
676 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
677 ins => [ "base", "index", "count", "mem" ],
678 emit => '. shl%M %SI2, %AM',
681 modified_flags => $status_flags
685 cmp_attr => "return 1;",
686 # value, cnt, dependency
691 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
693 # Out requirements is: different from all in
694 # This is because, out must be different from LowPart and ShiftCount.
695 # We could say "!ecx !in_r4" but it can occur, that all values live through
696 # this Shift and the only value dying is the ShiftCount. Then there would be a
697 # register missing, as result must not be ecx and all other registers are
698 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
699 # (and probably never will). So we create artificial interferences of the result
700 # with all inputs, so the spiller can always assure a free register.
701 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
704 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
705 ins => [ "left_high", "left_low", "right" ],
706 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);",
707 emit => '. shld%M %SB2, %S1, %S0',
711 modified_flags => $status_flags
715 cmp_attr => "return 1;",
721 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
722 ins => [ "val", "count" ],
723 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
724 emit => '. shr %SB1, %S0',
727 modified_flags => $status_flags
732 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
733 ins => [ "base", "index", "count", "mem" ],
734 emit => '. shr%M %SI2, %AM',
737 modified_flags => $status_flags
741 cmp_attr => "return 1;",
742 # value, cnt, dependency
747 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
749 # Out requirements is: different from all in
750 # This is because, out must be different from LowPart and ShiftCount.
751 # We could say "!ecx !in_r4" but it can occur, that all values live through
752 # this Shift and the only value dying is the ShiftCount. Then there would be a
753 # register missing, as result must not be ecx and all other registers are
754 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
755 # (and probably never will). So we create artificial interferences of the result
756 # with all inputs, so the spiller can always assure a free register.
757 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
760 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
761 ins => [ "left_high", "left_low", "right" ],
762 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);",
763 emit => '. shrd%M %SB2, %S1, %S0',
767 modified_flags => $status_flags
771 cmp_attr => "return 1;",
777 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
778 ins => [ "val", "count" ],
779 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
780 emit => '. sar %SB1, %S0',
783 modified_flags => $status_flags
788 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
789 ins => [ "base", "index", "count", "mem" ],
790 emit => '. sar%M %SI2, %AM',
793 modified_flags => $status_flags
797 cmp_attr => "return 1;",
803 cmp_attr => "return 1;",
804 # value, cnt, dependency
810 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
811 ins => [ "val", "count" ],
812 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
813 emit => '. ror %SB1, %S0',
816 modified_flags => $status_flags
821 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
822 ins => [ "base", "index", "count", "mem" ],
823 emit => '. ror%M %SI2, %AM',
826 modified_flags => $status_flags
831 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
832 ins => [ "val", "count" ],
833 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);",
834 emit => '. rol %SB1, %S0',
837 modified_flags => $status_flags
842 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
843 ins => [ "base", "index", "count", "mem" ],
844 emit => '. rol%M %SI2, %AM',
847 modified_flags => $status_flags
854 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
857 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
860 modified_flags => $status_flags
865 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
866 ins => [ "base", "index", "mem" ],
867 emit => '. neg%M %AM',
870 modified_flags => $status_flags
875 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
882 outs => [ "low_res", "high_res" ],
884 modified_flags => $status_flags
889 cmp_attr => "return 1;",
895 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
896 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
900 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
905 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
906 ins => [ "base", "index", "mem" ],
907 emit => '. inc%M %AM',
910 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
915 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
916 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
920 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
925 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
926 ins => [ "base", "index", "mem" ],
927 emit => '. dec%M %AM',
930 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
935 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
937 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
946 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
947 ins => [ "base", "index", "mem" ],
948 emit => '. not%M %AM',
951 modified_flags => [],
959 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
960 out => [ "none", "none"] },
961 ins => [ "base", "index", "left", "right", "mem" ],
962 outs => [ "false", "true" ],
965 "attr->pn_code = pnc;".
966 "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
968 units => [ "BRANCH" ],
974 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
976 out => [ "none", "none"] },
977 ins => [ "base", "index", "left", "right", "mem" ],
978 outs => [ "false", "true" ],
981 "attr->pn_code = pnc;".
982 "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
984 units => [ "BRANCH" ],
990 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
991 out => [ "none", "none" ] },
992 ins => [ "base", "index", "left", "right", "mem" ],
993 outs => [ "false", "true" ],
996 "attr->pn_code = pnc;".
997 "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
999 units => [ "BRANCH" ],
1004 op_flags => "L|X|Y",
1005 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1007 out => [ "none", "none" ] },
1008 ins => [ "base", "index", "left", "right", "mem" ],
1009 outs => [ "false", "true" ],
1012 "attr->pn_code = pnc;".
1013 "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1015 units => [ "BRANCH" ],
1020 op_flags => "L|X|Y",
1021 reg_req => { in => [ "gp" ], out => [ "none" ] },
1023 units => [ "BRANCH" ],
1030 reg_req => { in => [ "gp" ] },
1031 emit => '. jmp *%S0',
1032 units => [ "BRANCH" ],
1034 modified_flags => []
1040 reg_req => { out => [ "gp" ] },
1042 attr => "ir_entity *symconst, int symconst_sign, long offset",
1043 attr_type => "ia32_immediate_attr_t",
1051 reg_req => { out => [ "gp_UKNWN" ] },
1061 reg_req => { out => [ "vfp_UKNWN" ] },
1065 attr_type => "ia32_x87_attr_t",
1072 reg_req => { out => [ "xmm_UKNWN" ] },
1082 reg_req => { out => [ "gp_NOREG" ] },
1092 reg_req => { out => [ "vfp_NOREG" ] },
1096 attr_type => "ia32_x87_attr_t",
1103 reg_req => { out => [ "xmm_NOREG" ] },
1113 reg_req => { out => [ "fp_cw" ] },
1117 modified_flags => $fpcw_flags
1123 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
1124 ins => [ "base", "index", "mem" ],
1126 emit => ". fldcw %AM",
1129 modified_flags => $fpcw_flags
1135 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
1136 ins => [ "base", "index", "fpcw", "mem" ],
1138 emit => ". fnstcw %AM",
1144 # we should not rematrialize this node. It produces 2 results and has
1145 # very strict constrains
1146 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
1147 ins => [ "val", "globbered" ],
1155 # Note that we add additional latency values depending on address mode, so a
1156 # lateny of 0 for load is correct
1160 state => "exc_pinned",
1161 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
1162 ins => [ "base", "index", "mem" ],
1163 outs => [ "res", "M" ],
1165 emit => ". mov%SE%ME%.l %AM, %D0",
1171 cmp_attr => "return 1;",
1172 outs => [ "res", "M" ],
1178 cmp_attr => "return 1;",
1179 state => "exc_pinned",
1186 state => "exc_pinned",
1187 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
1188 ins => [ "base", "index", "val", "mem" ],
1189 emit => '. mov%M %SI2, %AM',
1197 state => "exc_pinned",
1198 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
1199 emit => '. mov%M %SB2, %AM',
1207 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1208 ins => [ "base", "index" ],
1209 emit => '. leal %AM, %D0',
1213 modified_flags => [],
1217 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
1218 emit => '. push%M %unop2',
1219 ins => [ "base", "index", "val", "stack", "mem" ],
1220 outs => [ "stack:I|S", "M" ],
1221 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1224 modified_flags => [],
1228 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
1229 emit => '. pop%M %DAM1',
1230 outs => [ "stack:I|S", "res", "M" ],
1231 ins => [ "base", "index", "stack", "mem" ],
1232 init_attr => "set_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);",
1233 latency => 3, # Pop is more expensive than Push on Athlon
1235 modified_flags => [],
1239 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1241 outs => [ "frame:I", "stack:I|S", "M" ],
1247 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1249 outs => [ "frame:I", "stack:I|S" ],
1257 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1258 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1259 emit => '. addl %binop',
1260 outs => [ "stack:S", "M" ],
1262 modified_flags => $status_flags
1268 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "gp", "none" ] },
1269 init_attr => "set_ia32_am_support(res, ia32_am_Source, ia32_am_binary);",
1270 emit => ". subl %binop\n".
1271 ". movl %%esp, %D1",
1272 outs => [ "stack:I|S", "addr", "M" ],
1274 modified_flags => $status_flags
1279 reg_req => { out => [ "gp" ] },
1283 # the int instruction
1285 reg_req => { in => [ "gp" ], out => [ "none" ] },
1287 emit => '. int %SI0',
1289 cmp_attr => "return 1;",
1293 #-----------------------------------------------------------------------------#
1294 # _____ _____ ______ __ _ _ _ #
1295 # / ____/ ____| ____| / _| | | | | | #
1296 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1297 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1298 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1299 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1300 #-----------------------------------------------------------------------------#
1304 reg_req => { out => [ "xmm" ] },
1305 emit => '. xorp%XSD %D1, %D1',
1311 # commutative operations
1315 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1316 emit => '. add%XXM %binop',
1324 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1325 emit => '. mul%XXM %binop',
1333 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1334 emit => '. max%XXM %binop',
1342 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1343 emit => '. min%XXM %binop',
1351 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1352 emit => '. andp%XSD %binop',
1360 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1361 emit => '. orp%XSD %binop',
1368 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1369 emit => '. xorp%XSD %binop',
1375 # not commutative operations
1379 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1380 emit => '. andnp%XSD %binop',
1388 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1389 emit => '. sub%XXM %binop',
1397 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1398 outs => [ "res", "M" ],
1399 emit => '. div%XXM %binop',
1408 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1416 op_flags => "L|X|Y",
1417 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1418 ins => [ "base", "index", "left", "right", "mem" ],
1419 outs => [ "false", "true" ],
1421 init_attr => "attr->pn_code = pnc;",
1430 state => "exc_pinned",
1431 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1432 emit => '. mov%XXM %AM, %D0',
1433 attr => "ir_mode *load_mode",
1434 init_attr => "attr->ls_mode = load_mode;",
1435 outs => [ "res", "M" ],
1442 state => "exc_pinned",
1443 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1444 emit => '. mov%XXM %SI2, %AM',
1452 state => "exc_pinned",
1453 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1454 ins => [ "base", "index", "val", "mem" ],
1455 emit => '. mov%XXM %S2, %AM',
1463 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1464 emit => '. cvtsi2ss %D0, %AM',
1472 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1473 emit => '. cvtsi2sd %unop2',
1482 cmp_attr => "return 1;",
1488 cmp_attr => "return 1;",
1497 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1498 outs => [ "DST", "SRC", "CNT", "M" ],
1500 modified_flags => [ "DF" ]
1506 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1507 outs => [ "DST", "SRC", "M" ],
1509 modified_flags => [ "DF" ]
1515 state => "exc_pinned",
1516 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1518 ins => [ "base", "index", "val", "mem" ],
1519 attr => "ir_mode *smaller_mode",
1520 init_attr => "attr->ls_mode = smaller_mode;",
1522 modified_flags => $status_flags
1526 state => "exc_pinned",
1527 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1528 ins => [ "base", "index", "val", "mem" ],
1530 attr => "ir_mode *smaller_mode",
1531 init_attr => "attr->ls_mode = smaller_mode;",
1533 modified_flags => $status_flags
1537 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1544 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1551 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1559 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1560 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1561 attr => "pn_Cmp pn_code",
1562 init_attr => "attr->pn_code = pn_code;",
1570 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1571 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1572 attr => "pn_Cmp pn_code",
1573 init_attr => "attr->pn_code = pn_code;",
1581 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1582 out => [ "in_r7" ] },
1583 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1585 attr => "pn_Cmp pn_code",
1586 init_attr => "attr->pn_code = pn_code;",
1594 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1595 out => [ "in_r7" ] },
1596 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1598 attr => "pn_Cmp pn_code",
1599 init_attr => "attr->pn_code = pn_code;",
1607 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1615 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "gp", "gp" ],
1616 out => [ "in_r7" ] },
1617 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1620 units => [ "VFP", "GP" ],
1622 attr_type => "ia32_x87_attr_t",
1627 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1628 out => [ "eax ebx ecx edx" ] },
1629 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1630 attr => "pn_Cmp pn_code",
1631 init_attr => "attr->pn_code = pn_code;",
1639 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1641 out => [ "eax ebx ecx edx" ] },
1642 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1643 attr => "pn_Cmp pn_code",
1644 init_attr => "attr->pn_code = pn_code;",
1652 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1653 out => [ "eax ebx ecx edx" ] },
1654 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1655 attr => "pn_Cmp pn_code",
1656 init_attr => "attr->pn_code = pn_code;",
1664 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1666 out => [ "eax ebx ecx edx" ] },
1667 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1668 attr => "pn_Cmp pn_code",
1669 init_attr => "attr->pn_code = pn_code;",
1677 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1685 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1689 attr_type => "ia32_x87_attr_t",
1694 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1698 attr_type => "ia32_x87_attr_t",
1701 #----------------------------------------------------------#
1703 # (_) | | | | / _| | | | #
1704 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1705 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1706 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1707 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1709 # _ __ ___ __| | ___ ___ #
1710 # | '_ \ / _ \ / _` |/ _ \/ __| #
1711 # | | | | (_) | (_| | __/\__ \ #
1712 # |_| |_|\___/ \__,_|\___||___/ #
1713 #----------------------------------------------------------#
1717 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1718 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1722 attr_type => "ia32_x87_attr_t",
1727 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1728 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1732 attr_type => "ia32_x87_attr_t",
1737 cmp_attr => "return 1;",
1743 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1744 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1748 attr_type => "ia32_x87_attr_t",
1752 cmp_attr => "return 1;",
1757 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
1758 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1759 outs => [ "res", "M" ],
1762 attr_type => "ia32_x87_attr_t",
1766 cmp_attr => "return 1;",
1767 outs => [ "res", "M" ],
1772 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1773 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1777 attr_type => "ia32_x87_attr_t",
1781 cmp_attr => "return 1;",
1787 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1792 attr_type => "ia32_x87_attr_t",
1797 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1802 attr_type => "ia32_x87_attr_t",
1805 # virtual Load and Store
1809 state => "exc_pinned",
1810 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1811 ins => [ "base", "index", "mem" ],
1812 outs => [ "res", "M" ],
1813 attr => "ir_mode *load_mode",
1814 init_attr => "attr->attr.ls_mode = load_mode;",
1817 attr_type => "ia32_x87_attr_t",
1822 state => "exc_pinned",
1823 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1824 ins => [ "base", "index", "val", "mem" ],
1825 attr => "ir_mode *store_mode",
1826 init_attr => "attr->attr.ls_mode = store_mode;",
1830 attr_type => "ia32_x87_attr_t",
1836 state => "exc_pinned",
1837 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1838 outs => [ "res", "M" ],
1839 ins => [ "base", "index", "mem" ],
1842 attr_type => "ia32_x87_attr_t",
1846 cmp_attr => "return 1;",
1847 outs => [ "res", "M" ],
1852 state => "exc_pinned",
1853 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1854 ins => [ "base", "index", "val", "fpcw", "mem" ],
1858 attr_type => "ia32_x87_attr_t",
1862 cmp_attr => "return 1;",
1863 state => "exc_pinned",
1873 reg_req => { out => [ "vfp" ] },
1877 attr_type => "ia32_x87_attr_t",
1882 reg_req => { out => [ "vfp" ] },
1886 attr_type => "ia32_x87_attr_t",
1891 reg_req => { out => [ "vfp" ] },
1895 attr_type => "ia32_x87_attr_t",
1900 reg_req => { out => [ "vfp" ] },
1904 attr_type => "ia32_x87_attr_t",
1909 reg_req => { out => [ "vfp" ] },
1913 attr_type => "ia32_x87_attr_t",
1918 reg_req => { out => [ "vfp" ] },
1922 attr_type => "ia32_x87_attr_t",
1927 reg_req => { out => [ "vfp" ] },
1931 attr_type => "ia32_x87_attr_t",
1938 op_flags => "L|X|Y",
1939 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1940 ins => [ "left", "right" ],
1941 outs => [ "false", "true", "temp_reg_eax" ],
1943 init_attr => "attr->attr.pn_code = pnc;",
1946 attr_type => "ia32_x87_attr_t",
1949 #------------------------------------------------------------------------#
1950 # ___ _____ __ _ _ _ #
1951 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1952 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1953 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1954 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1955 #------------------------------------------------------------------------#
1957 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1958 # are swapped, we work this around in the emitter...
1962 rd_constructor => "NONE",
1964 emit => '. fadd%XM %x87_binop',
1965 attr_type => "ia32_x87_attr_t",
1970 rd_constructor => "NONE",
1972 emit => '. faddp%XM %x87_binop',
1973 attr_type => "ia32_x87_attr_t",
1978 rd_constructor => "NONE",
1980 emit => '. fmul%XM %x87_binop',
1981 attr_type => "ia32_x87_attr_t",
1986 rd_constructor => "NONE",
1988 emit => '. fmulp%XM %x87_binop',,
1989 attr_type => "ia32_x87_attr_t",
1994 rd_constructor => "NONE",
1996 emit => '. fsub%XM %x87_binop',
1997 attr_type => "ia32_x87_attr_t",
2002 rd_constructor => "NONE",
2004 # see note about gas bugs
2005 emit => '. fsubrp%XM %x87_binop',
2006 attr_type => "ia32_x87_attr_t",
2011 rd_constructor => "NONE",
2014 emit => '. fsubr%XM %x87_binop',
2015 attr_type => "ia32_x87_attr_t",
2020 rd_constructor => "NONE",
2023 # see note about gas bugs
2024 emit => '. fsubp%XM %x87_binop',
2025 attr_type => "ia32_x87_attr_t",
2030 rd_constructor => "NONE",
2033 attr_type => "ia32_x87_attr_t",
2036 # this node is just here, to keep the simulator running
2037 # we can omit this when a fprem simulation function exists
2040 rd_constructor => "NONE",
2043 attr_type => "ia32_x87_attr_t",
2048 rd_constructor => "NONE",
2050 emit => '. fdiv%XM %x87_binop',
2051 attr_type => "ia32_x87_attr_t",
2056 rd_constructor => "NONE",
2058 # see note about gas bugs
2059 emit => '. fdivrp%XM %x87_binop',
2060 attr_type => "ia32_x87_attr_t",
2065 rd_constructor => "NONE",
2067 emit => '. fdivr%XM %x87_binop',
2068 attr_type => "ia32_x87_attr_t",
2073 rd_constructor => "NONE",
2075 # see note about gas bugs
2076 emit => '. fdivp%XM %x87_binop',
2077 attr_type => "ia32_x87_attr_t",
2082 rd_constructor => "NONE",
2085 attr_type => "ia32_x87_attr_t",
2090 rd_constructor => "NONE",
2093 attr_type => "ia32_x87_attr_t",
2096 # x87 Load and Store
2099 rd_constructor => "NONE",
2100 op_flags => "R|L|F",
2101 state => "exc_pinned",
2103 emit => '. fld%XM %AM',
2104 attr_type => "ia32_x87_attr_t",
2108 rd_constructor => "NONE",
2109 op_flags => "R|L|F",
2110 state => "exc_pinned",
2112 emit => '. fst%XM %AM',
2114 attr_type => "ia32_x87_attr_t",
2118 rd_constructor => "NONE",
2119 op_flags => "R|L|F",
2120 state => "exc_pinned",
2122 emit => '. fstp%XM %AM',
2124 attr_type => "ia32_x87_attr_t",
2131 rd_constructor => "NONE",
2133 emit => '. fild%M %AM',
2134 attr_type => "ia32_x87_attr_t",
2139 state => "exc_pinned",
2140 rd_constructor => "NONE",
2142 emit => '. fist%M %AM',
2144 attr_type => "ia32_x87_attr_t",
2149 state => "exc_pinned",
2150 rd_constructor => "NONE",
2152 emit => '. fistp%M %AM',
2154 attr_type => "ia32_x87_attr_t",
2160 op_flags => "R|c|K",
2164 attr_type => "ia32_x87_attr_t",
2168 op_flags => "R|c|K",
2172 attr_type => "ia32_x87_attr_t",
2176 op_flags => "R|c|K",
2180 attr_type => "ia32_x87_attr_t",
2184 op_flags => "R|c|K",
2188 attr_type => "ia32_x87_attr_t",
2192 op_flags => "R|c|K",
2196 attr_type => "ia32_x87_attr_t",
2200 op_flags => "R|c|K",
2203 emit => '. fldll2t',
2204 attr_type => "ia32_x87_attr_t",
2208 op_flags => "R|c|K",
2212 attr_type => "ia32_x87_attr_t",
2216 # Note that it is NEVER allowed to do CSE on these nodes
2217 # Moreover, note the virtual register requierements!
2222 cmp_attr => "return 1;",
2223 emit => '. fxch %X0',
2224 attr_type => "ia32_x87_attr_t",
2230 cmp_attr => "return 1;",
2231 emit => '. fld %X0',
2232 attr_type => "ia32_x87_attr_t",
2237 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2238 cmp_attr => "return 1;",
2239 emit => '. fld %X0',
2240 attr_type => "ia32_x87_attr_t",
2246 cmp_attr => "return 1;",
2247 emit => '. fstp %X0',
2248 attr_type => "ia32_x87_attr_t",
2254 op_flags => "L|X|Y",
2256 attr_type => "ia32_x87_attr_t",
2260 op_flags => "L|X|Y",
2262 attr_type => "ia32_x87_attr_t",
2266 op_flags => "L|X|Y",
2268 attr_type => "ia32_x87_attr_t",
2272 op_flags => "L|X|Y",
2274 attr_type => "ia32_x87_attr_t",
2278 op_flags => "L|X|Y",
2280 attr_type => "ia32_x87_attr_t",
2284 op_flags => "L|X|Y",
2286 attr_type => "ia32_x87_attr_t",
2290 # -------------------------------------------------------------------------------- #
2291 # ____ ____ _____ _ _ #
2292 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2293 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2294 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2295 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2297 # -------------------------------------------------------------------------------- #
2300 # Spilling and reloading of SSE registers, hardcoded, not generated #
2304 state => "exc_pinned",
2305 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2306 emit => '. movdqu %D0, %AM',
2307 outs => [ "res", "M" ],
2313 state => "exc_pinned",
2314 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2315 emit => '. movdqu %binop',
2322 # Include the generated SIMD node specification written by the SIMD optimization
2323 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2324 unless ($return = do $my_script_name) {
2325 warn "couldn't parse $my_script_name: $@" if $@;
2326 warn "couldn't do $my_script_name: $!" unless defined $return;
2327 warn "couldn't run $my_script_name" unless $return;