3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 D0 => "${arch}_emit_dest_register(env, node, 0);",
257 D1 => "${arch}_emit_dest_register(env, node, 1);",
258 D2 => "${arch}_emit_dest_register(env, node, 2);",
259 D3 => "${arch}_emit_dest_register(env, node, 3);",
260 D4 => "${arch}_emit_dest_register(env, node, 4);",
261 D5 => "${arch}_emit_dest_register(env, node, 5);",
262 X0 => "${arch}_emit_x87_name(env, node, 0);",
263 X1 => "${arch}_emit_x87_name(env, node, 1);",
264 X2 => "${arch}_emit_x87_name(env, node, 2);",
265 C => "${arch}_emit_immediate(env, node);",
266 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
267 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
268 ia32_emit_mode_suffix(env, node);",
269 M => "${arch}_emit_mode_suffix(env, node);",
270 XM => "${arch}_emit_x87_mode_suffix(env, node);",
271 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
272 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
273 AM => "${arch}_emit_am(env, node);",
274 unop => "${arch}_emit_unop(env, node);",
275 binop => "${arch}_emit_binop(env, node);",
276 x87_binop => "${arch}_emit_x87_binop(env, node);",
279 #--------------------------------------------------#
282 # _ __ _____ __ _ _ __ ___ _ __ ___ #
283 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
284 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
285 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
288 #--------------------------------------------------#
290 $default_attr_type = "ia32_attr_t";
293 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
295 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
296 "\tinit_ia32_x87_attributes(res);",
298 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
299 "\tinit_ia32_x87_attributes(res);".
300 "\tinit_ia32_asm_attributes(res);"
304 ia32_attr_t => "ia32_compare_nodes_attr",
305 ia32_x87_attr_t => "ia32_compare_x87_attr",
306 ia32_asm_attr_t => "ia32_compare_asm_attr",
312 $mode_xmm = "mode_E";
313 $mode_gp = "mode_Iu";
314 $mode_fpcw = "mode_fpcw";
315 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
316 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
317 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
325 reg_req => { out => [ "gp_NOREG" ] },
332 out_arity => "variable",
333 attr_type => "ia32_asm_attr_t",
336 #-----------------------------------------------------------------#
339 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
340 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
341 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
342 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
345 #-----------------------------------------------------------------#
347 # commutative operations
350 # All nodes supporting Addressmode have 5 INs:
351 # 1 - base r1 == NoReg in case of no AM or no base
352 # 2 - index r2 == NoReg in case of no AM or no index
353 # 3 - op1 r3 == always present
354 # 4 - op2 r4 == NoReg in case of immediate operation
355 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
359 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
360 ins => [ "base", "index", "left", "right", "mem" ],
361 emit => '. add%M %binop',
364 modified_flags => $status_flags
368 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
369 emit => '. adc%M %binop',
372 modified_flags => $status_flags
378 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
385 outs => [ "low_res", "high_res" ],
387 modified_flags => $status_flags
393 cmp_attr => "return 1;",
399 cmp_attr => "return 1;",
404 # we should not rematrialize this node. It produces 2 results and has
405 # very strict constrains
406 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
407 emit => '. mul%M %unop',
408 outs => [ "EAX", "EDX", "M" ],
411 modified_flags => $status_flags
415 # we should not rematrialize this node. It produces 2 results and has
416 # very strict constrains
418 cmp_attr => "return 1;",
419 outs => [ "EAX", "EDX", "M" ],
425 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
426 emit => '. imul%M %binop',
430 modified_flags => $status_flags
435 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
436 emit => '. imul%M %unop',
437 outs => [ "EAX", "EDX", "M" ],
440 modified_flags => $status_flags
445 cmp_attr => "return 1;",
451 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
452 emit => '. and%M %binop',
455 modified_flags => $status_flags
460 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
461 emit => '. or%M %binop',
464 modified_flags => $status_flags
469 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
470 emit => '. xor%M %binop',
473 modified_flags => $status_flags
478 cmp_attr => "return 1;",
480 modified_flags => $status_flags
483 # not commutative operations
487 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
488 emit => '. sub%M %binop',
491 modified_flags => $status_flags
495 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
496 emit => '. sbb%M %binop',
499 modified_flags => $status_flags
505 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
512 outs => [ "low_res", "high_res" ],
514 modified_flags => $status_flags
519 cmp_attr => "return 1;",
524 cmp_attr => "return 1;",
530 state => "exc_pinned",
531 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
532 attr => "ia32_op_flavour_t dm_flav",
533 init_attr => "attr->data.op_flav = dm_flav;",
534 emit => ". idiv%M %unop",
535 outs => [ "div_res", "mod_res", "M" ],
538 modified_flags => $status_flags
543 state => "exc_pinned",
544 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
545 attr => "ia32_op_flavour_t dm_flav",
546 init_attr => "attr->data.op_flav = dm_flav;",
547 emit => ". div%M %unop",
548 outs => [ "div_res", "mod_res", "M" ],
551 modified_flags => $status_flags
556 # "in_r3" would be enough as out requirement, but the register allocator
557 # does strange things then and doesn't respect the constraint for in4
558 # if the same value is attached to in3 and in4 (if you have "i << i" in C)
559 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
560 ins => [ "base", "index", "left", "right", "mem" ],
561 emit => '. shl%M %binop',
564 modified_flags => $status_flags
568 cmp_attr => "return 1;",
574 # Out requirements is: different from all in
575 # This is because, out must be different from LowPart and ShiftCount.
576 # We could say "!ecx !in_r4" but it can occur, that all values live through
577 # this Shift and the only value dying is the ShiftCount. Then there would be
578 # a register missing, as result must not be ecx and all other registers are
579 # occupied. What we should write is "!in_r4 !in_r5", but this is not
580 # supported (and probably never will). So we create artificial interferences
581 # of the result with all inputs, so the spiller can always assure a free
583 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
586 if (get_ia32_immop_type(node) == ia32_ImmNone) {
587 if (get_ia32_op_type(node) == ia32_AddrModeD) {
588 . shld%M %%cl, %S3, %AM
590 . shld%M %%cl, %S3, %S2
593 if (get_ia32_op_type(node) == ia32_AddrModeD) {
594 . shld%M %C, %S3, %AM
596 . shld%M %C, %S3, %S2
603 modified_flags => $status_flags
607 cmp_attr => "return 1;",
613 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
614 emit => '. shr%M %binop',
617 modified_flags => $status_flags
621 cmp_attr => "return 1;",
627 # Out requirements is: different from all in
628 # This is because, out must be different from LowPart and ShiftCount.
629 # We could say "!ecx !in_r4" but it can occur, that all values live through
630 # this Shift and the only value dying is the ShiftCount. Then there would be a
631 # register missing, as result must not be ecx and all other registers are
632 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
633 # (and probably never will). So we create artificial interferences of the result
634 # with all inputs, so the spiller can always assure a free register.
635 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
637 if (get_ia32_immop_type(node) == ia32_ImmNone) {
638 if (get_ia32_op_type(node) == ia32_AddrModeD) {
639 . shrd%M %%cl, %S3, %AM
641 . shrd%M %%cl, %S3, %S2
644 if (get_ia32_op_type(node) == ia32_AddrModeD) {
645 . shrd%M %C, %S3, %AM
647 . shrd%M %C, %S3, %S2
654 modified_flags => $status_flags
658 cmp_attr => "return 1;",
664 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
665 emit => '. sar%M %binop',
668 modified_flags => $status_flags
672 cmp_attr => "return 1;",
678 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
679 emit => '. ror%M %binop',
682 modified_flags => $status_flags
687 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
688 emit => '. rol%M %binop',
691 modified_flags => $status_flags
698 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
699 emit => '. neg%M %unop',
702 modified_flags => $status_flags
707 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
714 outs => [ "low_res", "high_res" ],
716 modified_flags => $status_flags
721 cmp_attr => "return 1;",
727 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
728 emit => '. inc%M %unop',
731 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
736 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
737 emit => '. dec%M %unop',
740 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
745 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
746 emit => '. not%M %unop',
757 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none"] },
758 outs => [ "false", "true" ],
760 units => [ "BRANCH" ],
766 reg_req => { in => [ "gp", "gp" ], out => [ "none", "none" ] },
767 outs => [ "false", "true" ],
769 units => [ "BRANCH" ],
775 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none" ] },
776 outs => [ "false", "true" ],
777 units => [ "BRANCH" ],
783 reg_req => { in => [ "gp", "gp" ] },
784 units => [ "BRANCH" ],
790 reg_req => { in => [ "gp" ], out => [ "none" ] },
792 units => [ "BRANCH" ],
798 reg_req => { out => [ "gp" ] },
807 reg_req => { out => [ "gp_UKNWN" ] },
817 reg_req => { out => [ "vfp_UKNWN" ] },
821 attr_type => "ia32_x87_attr_t",
828 reg_req => { out => [ "xmm_UKNWN" ] },
838 reg_req => { out => [ "gp_NOREG" ] },
848 reg_req => { out => [ "vfp_NOREG" ] },
852 attr_type => "ia32_x87_attr_t",
859 reg_req => { out => [ "xmm_NOREG" ] },
869 reg_req => { out => [ "fp_cw" ] },
873 modified_flags => $fpcw_flags
878 state => "exc_pinned",
879 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
881 emit => ". fldcw %AM",
884 modified_flags => $fpcw_flags
889 state => "exc_pinned",
890 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
892 emit => ". fnstcw %AM",
898 # we should not rematrialize this node. It produces 2 results and has
899 # very strict constrains
900 reg_req => { in => [ "gp" ], out => [ "eax in_r1", "edx" ] },
902 outs => [ "EAX", "EDX" ],
910 state => "exc_pinned",
911 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
913 emit => ". mov%SE%ME%.l %AM, %D0",
914 outs => [ "res", "M" ],
920 cmp_attr => "return 1;",
921 outs => [ "res", "M" ],
927 cmp_attr => "return 1;",
928 state => "exc_pinned",
935 state => "exc_pinned",
936 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
937 emit => '. mov%M %binop',
945 state => "exc_pinned",
946 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
947 emit => '. mov%M %binop',
955 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1" ] },
956 emit => '. leal %AM, %D0',
960 modified_flags => [],
964 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
965 emit => '. push%M %unop',
966 outs => [ "stack:I|S", "M" ],
969 modified_flags => [],
973 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
974 emit => '. pop%M %unop',
975 outs => [ "stack:I|S", "res", "M" ],
978 modified_flags => [],
982 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
984 outs => [ "frame:I", "stack:I|S", "M" ],
990 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
992 outs => [ "frame:I", "stack:I|S" ],
999 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1000 emit => '. addl %binop',
1001 outs => [ "stack:S", "M" ],
1003 modified_flags => $status_flags
1008 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1009 emit => '. subl %binop',
1010 outs => [ "stack:S", "M" ],
1012 modified_flags => $status_flags
1017 reg_req => { out => [ "gp" ] },
1021 # the int instruction
1023 reg_req => { in => [ "none" ], out => [ "none" ] },
1025 attr => "tarval *tv",
1026 init_attr => "\tset_ia32_Immop_tarval(res, tv);",
1029 cmp_attr => "return 1;",
1033 #-----------------------------------------------------------------------------#
1034 # _____ _____ ______ __ _ _ _ #
1035 # / ____/ ____| ____| / _| | | | | | #
1036 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1037 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1038 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1039 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1040 #-----------------------------------------------------------------------------#
1042 # commutative operations
1046 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1047 emit => '. add%XXM %binop',
1055 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1056 emit => '. mul%XXM %binop',
1064 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1065 emit => '. max%XXM %binop',
1073 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1074 emit => '. min%XXM %binop',
1082 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1083 emit => '. andp%XSD %binop',
1091 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1092 emit => '. orp%XSD %binop',
1099 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1100 emit => '. xorp%XSD %binop',
1106 # not commutative operations
1110 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1111 emit => '. andnp%XSD %binop',
1119 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1120 emit => '. sub%XXM %binop',
1128 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1129 outs => [ "res", "M" ],
1130 emit => '. div%XXM %binop',
1139 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1147 op_flags => "L|X|Y",
1148 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1149 outs => [ "false", "true" ],
1157 reg_req => { out => [ "xmm" ] },
1158 emit => '. mov%XXM %C, %D0',
1168 state => "exc_pinned",
1169 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1170 emit => '. mov%XXM %AM, %D0',
1171 outs => [ "res", "M" ],
1178 state => "exc_pinned",
1179 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1180 emit => '. mov%XXM %binop',
1188 state => "exc_pinned",
1189 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1190 ins => [ "base", "index", "val", "mem" ],
1191 emit => '. mov%XXM %S2, %AM',
1199 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1200 emit => '. cvtsi2ss %D0, %AM',
1208 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1209 emit => '. cvtsi2sd %unop',
1218 cmp_attr => "return 1;",
1224 cmp_attr => "return 1;",
1231 state => "exc_pinned",
1232 reg_req => { in => [ "gp", "gp", "none" ] },
1233 emit => '. fstp%XM %AM',
1242 state => "exc_pinned",
1243 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vf0", "none" ] },
1244 ins => [ "base", "index", "mem" ],
1245 emit => '. fld%XM %AM',
1246 outs => [ "res", "M" ],
1256 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1257 outs => [ "DST", "SRC", "CNT", "M" ],
1259 modified_flags => [ "DF" ]
1265 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1266 outs => [ "DST", "SRC", "M" ],
1268 modified_flags => [ "DF" ]
1274 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1276 ins => [ "base", "index", "val", "mem" ],
1278 modified_flags => $status_flags
1282 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1283 ins => [ "base", "index", "val", "mem" ],
1286 modified_flags => $status_flags
1290 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1297 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1304 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1312 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "in_r4" ] },
1320 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "in_r3" ] },
1328 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1336 reg_req => { in => [ "vfp", "vfp", "gp", "gp" ], out => [ "in_r4" ] },
1340 attr_type => "ia32_x87_attr_t",
1345 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1353 reg_req => { in => [ "gp" ], out => [ "eax ebx ecx edx" ] },
1361 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1369 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1373 attr_type => "ia32_x87_attr_t",
1378 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1382 attr_type => "ia32_x87_attr_t",
1385 #----------------------------------------------------------#
1387 # (_) | | | | / _| | | | #
1388 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1389 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1390 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1391 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1393 # _ __ ___ __| | ___ ___ #
1394 # | '_ \ / _ \ / _` |/ _ \/ __| #
1395 # | | | | (_) | (_| | __/\__ \ #
1396 # |_| |_|\___/ \__,_|\___||___/ #
1397 #----------------------------------------------------------#
1401 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1405 attr_type => "ia32_x87_attr_t",
1410 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1414 attr_type => "ia32_x87_attr_t",
1419 cmp_attr => "return 1;",
1425 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1429 attr_type => "ia32_x87_attr_t",
1433 cmp_attr => "return 1;",
1438 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp", "none" ] },
1439 outs => [ "res", "M" ],
1442 attr_type => "ia32_x87_attr_t",
1446 cmp_attr => "return 1;",
1447 outs => [ "res", "M" ],
1452 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1456 attr_type => "ia32_x87_attr_t",
1460 cmp_attr => "return 1;",
1466 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1470 attr_type => "ia32_x87_attr_t",
1475 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1479 attr_type => "ia32_x87_attr_t",
1484 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1488 attr_type => "ia32_x87_attr_t",
1493 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1497 attr_type => "ia32_x87_attr_t",
1502 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1506 attr_type => "ia32_x87_attr_t",
1509 # virtual Load and Store
1513 state => "exc_pinned",
1514 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1515 outs => [ "res", "M" ],
1518 attr_type => "ia32_x87_attr_t",
1523 state => "exc_pinned",
1524 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1528 attr_type => "ia32_x87_attr_t",
1534 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1535 outs => [ "res", "M" ],
1538 attr_type => "ia32_x87_attr_t",
1542 cmp_attr => "return 1;",
1543 outs => [ "res", "M" ],
1548 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1552 attr_type => "ia32_x87_attr_t",
1556 cmp_attr => "return 1;",
1566 reg_req => { out => [ "vfp" ] },
1570 attr_type => "ia32_x87_attr_t",
1575 reg_req => { out => [ "vfp" ] },
1579 attr_type => "ia32_x87_attr_t",
1584 reg_req => { out => [ "vfp" ] },
1588 attr_type => "ia32_x87_attr_t",
1593 reg_req => { out => [ "vfp" ] },
1597 attr_type => "ia32_x87_attr_t",
1602 reg_req => { out => [ "vfp" ] },
1606 attr_type => "ia32_x87_attr_t",
1611 reg_req => { out => [ "vfp" ] },
1615 attr_type => "ia32_x87_attr_t",
1620 reg_req => { out => [ "vfp" ] },
1624 attr_type => "ia32_x87_attr_t",
1630 reg_req => { out => [ "vfp" ] },
1634 attr_type => "ia32_x87_attr_t",
1641 op_flags => "L|X|Y",
1642 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "none", "none", "eax" ] },
1643 outs => [ "false", "true", "temp_reg_eax" ],
1646 attr_type => "ia32_x87_attr_t",
1649 #------------------------------------------------------------------------#
1650 # ___ _____ __ _ _ _ #
1651 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1652 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1653 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1654 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1655 #------------------------------------------------------------------------#
1657 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1658 # are swapped, we work this around in the emitter...
1662 rd_constructor => "NONE",
1664 emit => '. fadd%XM %x87_binop',
1665 attr_type => "ia32_x87_attr_t",
1670 rd_constructor => "NONE",
1672 emit => '. faddp %x87_binop',
1673 attr_type => "ia32_x87_attr_t",
1678 rd_constructor => "NONE",
1680 emit => '. fmul%XM %x87_binop',
1681 attr_type => "ia32_x87_attr_t",
1686 rd_constructor => "NONE",
1688 emit => '. fmulp %x87_binop',,
1689 attr_type => "ia32_x87_attr_t",
1694 rd_constructor => "NONE",
1696 emit => '. fsub%XM %x87_binop',
1697 attr_type => "ia32_x87_attr_t",
1702 rd_constructor => "NONE",
1704 # see note about gas bugs
1705 emit => '. fsubrp %x87_binop',
1706 attr_type => "ia32_x87_attr_t",
1711 rd_constructor => "NONE",
1714 emit => '. fsubr%XM %x87_binop',
1715 attr_type => "ia32_x87_attr_t",
1720 rd_constructor => "NONE",
1723 # see note about gas bugs
1724 emit => '. fsubp %x87_binop',
1725 attr_type => "ia32_x87_attr_t",
1730 rd_constructor => "NONE",
1733 attr_type => "ia32_x87_attr_t",
1736 # this node is just here, to keep the simulator running
1737 # we can omit this when a fprem simulation function exists
1740 rd_constructor => "NONE",
1743 attr_type => "ia32_x87_attr_t",
1748 rd_constructor => "NONE",
1750 emit => '. fdiv%XM %x87_binop',
1751 attr_type => "ia32_x87_attr_t",
1756 rd_constructor => "NONE",
1758 # see note about gas bugs
1759 emit => '. fdivrp %x87_binop',
1760 attr_type => "ia32_x87_attr_t",
1765 rd_constructor => "NONE",
1767 emit => '. fdivr%XM %x87_binop',
1768 attr_type => "ia32_x87_attr_t",
1773 rd_constructor => "NONE",
1775 # see note about gas bugs
1776 emit => '. fdivp %x87_binop',
1777 attr_type => "ia32_x87_attr_t",
1782 rd_constructor => "NONE",
1785 attr_type => "ia32_x87_attr_t",
1790 rd_constructor => "NONE",
1793 attr_type => "ia32_x87_attr_t",
1798 rd_constructor => "NONE",
1801 attr_type => "ia32_x87_attr_t",
1806 rd_constructor => "NONE",
1809 attr_type => "ia32_x87_attr_t",
1814 rd_constructor => "NONE",
1816 emit => '. fsqrt $',
1817 attr_type => "ia32_x87_attr_t",
1820 # x87 Load and Store
1823 rd_constructor => "NONE",
1824 op_flags => "R|L|F",
1825 state => "exc_pinned",
1827 emit => '. fld%XM %AM',
1828 attr_type => "ia32_x87_attr_t",
1832 rd_constructor => "NONE",
1833 op_flags => "R|L|F",
1834 state => "exc_pinned",
1836 emit => '. fst%XM %AM',
1838 attr_type => "ia32_x87_attr_t",
1842 rd_constructor => "NONE",
1843 op_flags => "R|L|F",
1844 state => "exc_pinned",
1846 emit => '. fstp%XM %AM',
1848 attr_type => "ia32_x87_attr_t",
1855 rd_constructor => "NONE",
1857 emit => '. fild%XM %AM',
1858 attr_type => "ia32_x87_attr_t",
1863 rd_constructor => "NONE",
1865 emit => '. fist%XM %AM',
1867 attr_type => "ia32_x87_attr_t",
1872 rd_constructor => "NONE",
1874 emit => '. fistp%XM %AM',
1876 attr_type => "ia32_x87_attr_t",
1882 op_flags => "R|c|K",
1886 attr_type => "ia32_x87_attr_t",
1890 op_flags => "R|c|K",
1894 attr_type => "ia32_x87_attr_t",
1898 op_flags => "R|c|K",
1902 attr_type => "ia32_x87_attr_t",
1906 op_flags => "R|c|K",
1910 attr_type => "ia32_x87_attr_t",
1914 op_flags => "R|c|K",
1918 attr_type => "ia32_x87_attr_t",
1922 op_flags => "R|c|K",
1925 emit => '. fldll2t',
1926 attr_type => "ia32_x87_attr_t",
1930 op_flags => "R|c|K",
1934 attr_type => "ia32_x87_attr_t",
1938 # Note that it is NEVER allowed to do CSE on these nodes
1939 # Moreover, note the virtual register requierements!
1944 cmp_attr => "return 1;",
1945 emit => '. fxch %X0',
1946 attr_type => "ia32_x87_attr_t",
1952 cmp_attr => "return 1;",
1953 emit => '. fld %X0',
1954 attr_type => "ia32_x87_attr_t",
1959 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1960 cmp_attr => "return 1;",
1961 emit => '. fld %X0',
1962 attr_type => "ia32_x87_attr_t",
1968 cmp_attr => "return 1;",
1969 emit => '. fstp %X0',
1970 attr_type => "ia32_x87_attr_t",
1976 op_flags => "L|X|Y",
1978 attr_type => "ia32_x87_attr_t",
1982 op_flags => "L|X|Y",
1984 attr_type => "ia32_x87_attr_t",
1988 op_flags => "L|X|Y",
1990 attr_type => "ia32_x87_attr_t",
1994 op_flags => "L|X|Y",
1996 attr_type => "ia32_x87_attr_t",
2000 op_flags => "L|X|Y",
2002 attr_type => "ia32_x87_attr_t",
2006 op_flags => "L|X|Y",
2008 attr_type => "ia32_x87_attr_t",
2012 # -------------------------------------------------------------------------------- #
2013 # ____ ____ _____ _ _ #
2014 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2015 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2016 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2017 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2019 # -------------------------------------------------------------------------------- #
2022 # Spilling and reloading of SSE registers, hardcoded, not generated #
2026 state => "exc_pinned",
2027 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2028 emit => '. movdqu %D0, %AM',
2029 outs => [ "res", "M" ],
2035 state => "exc_pinned",
2036 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2037 emit => '. movdqu %binop',
2044 # Include the generated SIMD node specification written by the SIMD optimization
2045 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2046 unless ($return = do $my_script_name) {
2047 warn "couldn't parse $my_script_name: $@" if $@;
2048 warn "couldn't do $my_script_name: $!" unless defined $return;
2049 warn "couldn't run $my_script_name" unless $return;