3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 SB1 => "${arch}_emit_8bit_source_register(env, node, 1);",
257 SB2 => "${arch}_emit_8bit_source_register(env, node, 2);",
258 SB3 => "${arch}_emit_8bit_source_register(env, node, 3);",
259 SW0 => "${arch}_emit_16bit_source_register(env, node, 0);",
260 SI0 => "${arch}_emit_source_register_or_immediate(env, node, 0);",
261 SI1 => "${arch}_emit_source_register_or_immediate(env, node, 1);",
262 SI2 => "${arch}_emit_source_register_or_immediate(env, node, 2);",
263 SI3 => "${arch}_emit_source_register_or_immediate(env, node, 3);",
264 D0 => "${arch}_emit_dest_register(env, node, 0);",
265 D1 => "${arch}_emit_dest_register(env, node, 1);",
266 D2 => "${arch}_emit_dest_register(env, node, 2);",
267 D3 => "${arch}_emit_dest_register(env, node, 3);",
268 D4 => "${arch}_emit_dest_register(env, node, 4);",
269 D5 => "${arch}_emit_dest_register(env, node, 5);",
270 X0 => "${arch}_emit_x87_name(env, node, 0);",
271 X1 => "${arch}_emit_x87_name(env, node, 1);",
272 X2 => "${arch}_emit_x87_name(env, node, 2);",
273 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
274 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
275 ia32_emit_mode_suffix(env, node);",
276 M => "${arch}_emit_mode_suffix(env, node);",
277 XM => "${arch}_emit_x87_mode_suffix(env, node);",
278 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
279 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
280 AM => "${arch}_emit_am(env, node);",
281 unop0 => "${arch}_emit_unop(env, node, 0);",
282 unop1 => "${arch}_emit_unop(env, node, 1);",
283 unop2 => "${arch}_emit_unop(env, node, 2);",
284 unop3 => "${arch}_emit_unop(env, node, 3);",
285 unop4 => "${arch}_emit_unop(env, node, 4);",
286 unop5 => "${arch}_emit_unop(env, node, 5);",
287 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
288 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 1);",
289 binop => "${arch}_emit_binop(env, node);",
290 x87_binop => "${arch}_emit_x87_binop(env, node);",
293 #--------------------------------------------------#
296 # _ __ _____ __ _ _ __ ___ _ __ ___ #
297 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
298 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
299 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
302 #--------------------------------------------------#
304 $default_attr_type = "ia32_attr_t";
305 $default_copy_attr = "ia32_copy_attr";
307 sub ia32_custom_init_attr {
311 if(defined($node->{modified_flags})) {
312 $res .= "\tset_ia32_flags(res, get_ia32_flags(res) | arch_irn_flags_modify_flags);\n";
314 if(defined($node->{am})) {
315 my $am = $node->{am};
316 if($am eq "full,binary") {
317 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_binary);";
318 } elsif($am eq "full,unary") {
319 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_unary);";
320 } elsif($am eq "source,binary") {
321 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_binary);";
322 } elsif($am eq "dest,unary") {
323 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);";
324 } elsif($am eq "dest,binary") {
325 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);";
326 } elsif($am eq "dest,ternary") {
327 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);";
328 } elsif($am eq "source,ternary") {
329 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_ternary);";
330 } elsif($am eq "none") {
333 die("Invalid address mode '$am' specified on op $name");
338 $custom_init_attr_func = \&ia32_custom_init_attr;
341 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
343 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
344 "\tinit_ia32_x87_attributes(res);",
346 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
347 "\tinit_ia32_x87_attributes(res);".
348 "\tinit_ia32_asm_attributes(res);",
349 ia32_immediate_attr_t =>
350 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
351 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
355 ia32_attr_t => "ia32_compare_nodes_attr",
356 ia32_x87_attr_t => "ia32_compare_x87_attr",
357 ia32_asm_attr_t => "ia32_compare_asm_attr",
358 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
364 $mode_xmm = "mode_E";
365 $mode_gp = "mode_Iu";
366 $mode_fpcw = "mode_fpcw";
367 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
368 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
369 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
377 reg_req => { out => [ "gp_NOREG" ] },
378 attr => "ir_entity *symconst, int symconst_sign, long offset",
379 attr_type => "ia32_immediate_attr_t",
387 out_arity => "variable",
388 attr_type => "ia32_asm_attr_t",
395 reg_req => { out => [ "gp" ] },
400 cmp_attr => "return 1;",
403 #-----------------------------------------------------------------#
406 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
407 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
408 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
409 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
412 #-----------------------------------------------------------------#
414 # commutative operations
418 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4", "none", "flags" ] },
419 ins => [ "base", "index", "mem", "left", "right" ],
420 emit => '. add%M %binop',
424 modified_flags => $status_flags
429 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
430 ins => [ "base", "index", "mem", "val" ],
431 emit => ". add%M %SI3, %AM",
434 modified_flags => $status_flags
438 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "flags" ], out => [ "in_r4" ] },
439 ins => [ "base", "index", "mem", "left", "right", "eflags" ],
440 emit => '. adc%M %binop',
444 modified_flags => $status_flags
449 reg_req => { in => [ "none", "none" ], out => [ "none" ] },
450 ins => [ "left", "right" ],
454 reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
455 ins => [ "left", "right", "eflags" ],
461 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
468 outs => [ "low_res", "high_res" ],
470 modified_flags => $status_flags
474 # we should not rematrialize this node. It produces 2 results and has
475 # very strict constrains
476 reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], out => [ "eax", "edx", "none" ] },
477 ins => [ "base", "index", "mem", "val_high", "val_low" ],
478 emit => '. mul%M %unop4',
479 outs => [ "EAX", "EDX", "M" ],
480 am => "source,binary",
483 modified_flags => $status_flags
487 # we should not rematrialize this node. It produces 2 results and has
488 # very strict constrains
490 cmp_attr => "return 1;",
491 outs => [ "EAX", "EDX", "M" ],
497 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
498 ins => [ "base", "index", "mem", "left", "right" ],
499 emit => '. imul%M %binop',
500 am => "source,binary",
504 modified_flags => $status_flags
509 reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], out => [ "eax", "edx", "none" ] },
510 ins => [ "base", "index", "mem", "val_high", "val_low" ],
511 emit => '. imul%M %unop4',
512 outs => [ "EAX", "EDX", "M" ],
513 am => "source,binary",
516 modified_flags => $status_flags
520 # we should not rematrialize this node. It produces 2 results and has
521 # very strict constrains
523 cmp_attr => "return 1;",
524 outs => [ "EAX", "EDX", "M" ],
530 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
531 ins => [ "base", "index", "mem", "left", "right" ],
533 emit => '. and%M %binop',
536 modified_flags => $status_flags
541 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
542 ins => [ "base", "index", "mem", "val" ],
543 emit => '. and%M %SI3, %AM',
546 modified_flags => $status_flags
551 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
552 ins => [ "base", "index", "mem", "left", "right" ],
554 emit => '. or%M %binop',
557 modified_flags => $status_flags
562 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
563 ins => [ "base", "index", "mem", "val" ],
564 emit => '. or%M %SI3, %AM',
567 modified_flags => $status_flags
572 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
573 ins => [ "base", "index", "mem", "left", "right" ],
575 emit => '. xor%M %binop',
578 modified_flags => $status_flags
583 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
584 ins => [ "base", "index", "mem", "val" ],
585 emit => '. xor%M %SI3, %AM',
588 modified_flags => $status_flags
591 # not commutative operations
595 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
596 ins => [ "base", "index", "mem", "left", "right" ],
598 emit => '. sub%M %binop',
601 modified_flags => $status_flags
606 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
607 ins => [ "base", "index", "mem", "val" ],
608 emit => '. sub%M %SI3, %AM',
611 modified_flags => $status_flags
615 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 !in_r5" ] },
616 ins => [ "base", "index", "mem", "left", "right" ],
618 emit => '. sbb%M %binop',
621 modified_flags => $status_flags
627 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
634 outs => [ "low_res", "high_res" ],
636 modified_flags => $status_flags
641 state => "exc_pinned",
642 reg_req => { in => [ "gp", "gp", "none", "eax", "edx", "gp" ], out => [ "eax", "edx", "none" ] },
643 ins => [ "base", "index", "mem", "left_low", "left_high", "right" ],
644 outs => [ "div_res", "mod_res", "M" ],
645 attr => "ia32_op_flavour_t dm_flav",
646 am => "source,ternary",
647 init_attr => "attr->data.op_flav = dm_flav;",
648 emit => ". idiv%M %unop5",
651 modified_flags => $status_flags
656 state => "exc_pinned",
657 reg_req => { in => [ "gp", "gp", "none", "eax", "edx", "gp" ], out => [ "eax", "edx", "none" ] },
658 ins => [ "base", "index", "mem", "left_low", "left_high", "right" ],
659 outs => [ "div_res", "mod_res", "M" ],
660 attr => "ia32_op_flavour_t dm_flav",
661 am => "source,ternary",
662 init_attr => "attr->data.op_flav = dm_flav;",
663 emit => ". div%M %unop5",
666 modified_flags => $status_flags
671 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
672 ins => [ "left", "right" ],
674 emit => '. shl %SB1, %S0',
677 modified_flags => $status_flags
682 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
683 ins => [ "base", "index", "mem", "count" ],
684 emit => '. shl%M %SB3, %AM',
687 modified_flags => $status_flags
691 cmp_attr => "return 1;",
692 # value, cnt, dependency
697 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
699 # Out requirements is: different from all in
700 # This is because, out must be different from LowPart and ShiftCount.
701 # We could say "!ecx !in_r4" but it can occur, that all values live through
702 # this Shift and the only value dying is the ShiftCount. Then there would be a
703 # register missing, as result must not be ecx and all other registers are
704 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
705 # (and probably never will). So we create artificial interferences of the result
706 # with all inputs, so the spiller can always assure a free register.
707 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
710 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
711 ins => [ "left_high", "left_low", "right" ],
712 am => "dest,ternary",
713 emit => '. shld%M %SB2, %S1, %S0',
717 modified_flags => $status_flags
721 cmp_attr => "return 1;",
727 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
728 ins => [ "val", "count" ],
730 emit => '. shr %SB1, %S0',
733 modified_flags => $status_flags
738 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
739 ins => [ "base", "index", "mem", "count" ],
740 emit => '. shr%M %SB3, %AM',
743 modified_flags => $status_flags
747 cmp_attr => "return 1;",
748 # value, cnt, dependency
753 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
755 # Out requirements is: different from all in
756 # This is because, out must be different from LowPart and ShiftCount.
757 # We could say "!ecx !in_r4" but it can occur, that all values live through
758 # this Shift and the only value dying is the ShiftCount. Then there would be a
759 # register missing, as result must not be ecx and all other registers are
760 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
761 # (and probably never will). So we create artificial interferences of the result
762 # with all inputs, so the spiller can always assure a free register.
763 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
766 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
767 ins => [ "left_high", "left_low", "right" ],
768 am => "dest,ternary",
769 emit => '. shrd%M %SB2, %S1, %S0',
773 modified_flags => $status_flags
777 cmp_attr => "return 1;",
783 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
784 ins => [ "val", "count" ],
786 emit => '. sar %SB1, %S0',
789 modified_flags => $status_flags
794 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
795 ins => [ "base", "index", "mem", "count" ],
796 emit => '. sar%M %SB3, %AM',
799 modified_flags => $status_flags
803 cmp_attr => "return 1;",
809 cmp_attr => "return 1;",
810 # value, cnt, dependency
816 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
817 ins => [ "val", "count" ],
819 emit => '. ror %SB1, %S0',
822 modified_flags => $status_flags
827 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
828 ins => [ "base", "index", "mem", "count" ],
829 emit => '. ror%M %SB3, %AM',
832 modified_flags => $status_flags
837 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
838 ins => [ "val", "count" ],
840 emit => '. rol %SB1, %S0',
843 modified_flags => $status_flags
848 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
849 ins => [ "base", "index", "mem", "count" ],
850 emit => '. rol%M %SB3, %AM',
853 modified_flags => $status_flags
860 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
866 modified_flags => $status_flags
871 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
872 ins => [ "base", "index", "mem" ],
873 emit => '. neg%M %AM',
876 modified_flags => $status_flags
881 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "gp" ] },
882 outs => [ "low_res", "high_res" ],
884 modified_flags => $status_flags
889 cmp_attr => "return 1;",
895 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
900 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
905 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
906 ins => [ "base", "index", "mem" ],
907 emit => '. inc%M %AM',
910 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
915 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
920 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
925 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
926 ins => [ "base", "index", "mem" ],
927 emit => '. dec%M %AM',
930 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
935 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
945 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
946 ins => [ "base", "index", "mem" ],
947 emit => '. not%M %AM',
957 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "none", "none"] },
958 ins => [ "base", "index", "mem", "left", "right" ],
959 outs => [ "false", "true" ],
961 am => "source,binary",
962 init_attr => "attr->pn_code = pnc;",
964 units => [ "BRANCH" ],
970 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ], out => [ "none", "none"] },
971 ins => [ "base", "index", "mem", "left", "right" ],
972 outs => [ "false", "true" ],
974 am => "source,binary",
975 init_attr => "attr->pn_code = pnc;",
977 units => [ "BRANCH" ],
983 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "none", "none" ] },
984 ins => [ "base", "index", "mem", "left", "right" ],
985 outs => [ "false", "true" ],
987 am => "source,binary",
988 init_attr => "attr->pn_code = pnc;",
990 units => [ "BRANCH" ],
996 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ], out => [ "none", "none" ] },
997 ins => [ "base", "index", "mem", "left", "right" ],
998 outs => [ "false", "true" ],
1000 am => "source,binary",
1001 init_attr => "attr->pn_code = pnc;",
1003 units => [ "BRANCH" ],
1008 op_flags => "L|X|Y",
1009 reg_req => { in => [ "gp" ], out => [ "none" ] },
1011 units => [ "BRANCH" ],
1018 reg_req => { in => [ "gp" ] },
1019 emit => '. jmp *%S0',
1020 units => [ "BRANCH" ],
1027 reg_req => { out => [ "gp" ] },
1029 attr => "ir_entity *symconst, int symconst_sign, long offset",
1030 attr_type => "ia32_immediate_attr_t",
1038 reg_req => { out => [ "gp_UKNWN" ] },
1048 reg_req => { out => [ "vfp_UKNWN" ] },
1052 attr_type => "ia32_x87_attr_t",
1059 reg_req => { out => [ "xmm_UKNWN" ] },
1069 reg_req => { out => [ "gp_NOREG" ] },
1079 reg_req => { out => [ "vfp_NOREG" ] },
1083 attr_type => "ia32_x87_attr_t",
1090 reg_req => { out => [ "xmm_NOREG" ] },
1100 reg_req => { out => [ "fp_cw" ] },
1104 modified_flags => $fpcw_flags
1110 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
1111 ins => [ "base", "index", "mem" ],
1113 emit => ". fldcw %AM",
1116 modified_flags => $fpcw_flags
1122 reg_req => { in => [ "gp", "gp", "none", "fp_cw" ], out => [ "none" ] },
1123 ins => [ "base", "index", "mem", "fpcw" ],
1125 emit => ". fnstcw %AM",
1131 # we should not rematrialize this node. It produces 2 results and has
1132 # very strict constrains
1133 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
1134 ins => [ "val", "globbered" ],
1142 # Note that we add additional latency values depending on address mode, so a
1143 # lateny of 0 for load is correct
1147 state => "exc_pinned",
1148 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
1149 ins => [ "base", "index", "mem" ],
1150 outs => [ "res", "M" ],
1152 emit => ". mov%SE%ME%.l %AM, %D0",
1158 cmp_attr => "return 1;",
1159 outs => [ "res", "M" ],
1165 cmp_attr => "return 1;",
1166 state => "exc_pinned",
1173 state => "exc_pinned",
1174 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
1175 ins => [ "base", "index", "mem", "val" ],
1176 emit => '. mov%M %SI3, %AM',
1184 state => "exc_pinned",
1185 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => ["none" ] },
1186 ins => [ "base", "index", "mem", "val" ],
1187 emit => '. mov%M %SB3, %AM',
1195 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1196 ins => [ "base", "index" ],
1197 emit => '. leal %AM, %D0',
1204 reg_req => { in => [ "gp", "gp", "none", "gp", "esp" ], out => [ "esp", "none" ] },
1205 ins => [ "base", "index", "mem", "val", "stack" ],
1206 emit => '. push%M %unop3',
1207 outs => [ "stack:I|S", "M" ],
1208 am => "source,binary",
1214 reg_req => { in => [ "gp", "gp", "none", "esp" ], out => [ "esp", "gp", "none" ] },
1215 emit => '. pop%M %DAM1',
1216 outs => [ "stack:I|S", "res", "M" ],
1217 ins => [ "base", "index", "mem", "stack" ],
1219 latency => 3, # Pop is more expensive than Push on Athlon
1224 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1226 outs => [ "frame:I", "stack:I|S", "M" ],
1232 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1234 outs => [ "frame:I", "stack:I|S" ],
1242 reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "in_r4", "none" ] },
1243 ins => [ "base", "index", "mem", "stack", "size" ],
1244 am => "source,binary",
1245 emit => '. addl %binop',
1246 outs => [ "stack:S", "M" ],
1248 modified_flags => $status_flags
1254 reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "in_r4", "gp", "none" ] },
1255 ins => [ "base", "index", "mem", "stack", "size" ],
1256 am => "source,binary",
1257 emit => ". subl %binop\n".
1258 ". movl %%esp, %D1",
1259 outs => [ "stack:I|S", "addr", "M" ],
1261 modified_flags => $status_flags
1266 reg_req => { out => [ "gp" ] },
1270 # the int instruction
1272 reg_req => { in => [ "gp" ], out => [ "none" ] },
1274 emit => '. int %SI0',
1276 cmp_attr => "return 1;",
1280 #-----------------------------------------------------------------------------#
1281 # _____ _____ ______ __ _ _ _ #
1282 # / ____/ ____| ____| / _| | | | | | #
1283 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1284 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1285 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1286 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1287 #-----------------------------------------------------------------------------#
1291 reg_req => { out => [ "xmm" ] },
1292 emit => '. xorp%XSD %D1, %D1',
1298 # commutative operations
1302 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1303 ins => [ "base", "index", "mem", "left", "right" ],
1304 emit => '. add%XXM %binop',
1312 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1313 ins => [ "base", "index", "mem", "left", "right" ],
1314 emit => '. mul%XXM %binop',
1322 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1323 ins => [ "base", "index", "mem", "left", "right" ],
1324 emit => '. max%XXM %binop',
1332 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1333 ins => [ "base", "index", "mem", "left", "right" ],
1334 emit => '. min%XXM %binop',
1342 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1343 ins => [ "base", "index", "mem", "left", "right" ],
1344 emit => '. andp%XSD %binop',
1352 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1353 ins => [ "base", "index", "mem", "left", "right" ],
1354 emit => '. orp%XSD %binop',
1361 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1362 ins => [ "base", "index", "mem", "left", "right" ],
1363 emit => '. xorp%XSD %binop',
1369 # not commutative operations
1373 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5" ] },
1374 ins => [ "base", "index", "mem", "left", "right" ],
1375 emit => '. andnp%XSD %binop',
1383 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1384 ins => [ "base", "index", "mem", "left", "right" ],
1385 emit => '. sub%XXM %binop',
1393 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5", "none" ] },
1394 ins => [ "base", "index", "mem", "left", "right" ],
1395 outs => [ "res", "M" ],
1396 emit => '. div%XXM %binop',
1405 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5" ] },
1406 ins => [ "base", "index", "mem", "left", "right" ],
1414 op_flags => "L|X|Y",
1415 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "none", "none" ] },
1416 ins => [ "base", "index", "mem", "left", "right" ],
1417 outs => [ "false", "true" ],
1419 init_attr => "attr->pn_code = pnc;",
1428 state => "exc_pinned",
1429 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1430 ins => [ "base", "index", "mem" ],
1431 emit => '. mov%XXM %AM, %D0',
1432 attr => "ir_mode *load_mode",
1433 init_attr => "attr->ls_mode = load_mode;",
1434 outs => [ "res", "M" ],
1441 state => "exc_pinned",
1442 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
1443 ins => [ "base", "index", "mem", "val" ],
1444 emit => '. mov%XXM %S3, %AM',
1452 state => "exc_pinned",
1453 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
1454 ins => [ "base", "index", "mem", "val" ],
1455 emit => '. mov%XXM %S3, %AM',
1463 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
1464 ins => [ "base", "index", "mem", "val" ],
1465 emit => '. cvtsi2ss %D0, %AM',
1473 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
1474 ins => [ "base", "index", "mem", "val" ],
1475 emit => '. cvtsi2sd %unop3',
1484 cmp_attr => "return 1;",
1490 cmp_attr => "return 1;",
1499 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1500 outs => [ "DST", "SRC", "CNT", "M" ],
1502 # we don't care about this flag, so no need to mark this node
1503 # modified_flags => [ "DF" ]
1509 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1510 outs => [ "DST", "SRC", "M" ],
1512 # we don't care about this flag, so no need to mark this node
1513 # modified_flags => [ "DF" ]
1519 state => "exc_pinned",
1520 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "in_r4", "none" ] },
1521 ins => [ "base", "index", "mem", "val" ],
1523 attr => "ir_mode *smaller_mode",
1524 init_attr => "attr->ls_mode = smaller_mode;",
1526 modified_flags => $status_flags
1530 state => "exc_pinned",
1531 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "in_r4", "none" ] },
1532 ins => [ "base", "index", "mem", "val" ],
1534 attr => "ir_mode *smaller_mode",
1535 init_attr => "attr->ls_mode = smaller_mode;",
1537 modified_flags => $status_flags
1541 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm", "none" ] },
1542 ins => [ "base", "index", "mem", "val" ],
1549 reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "gp", "none" ] },
1550 ins => [ "base", "index", "mem", "val" ],
1557 reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "xmm", "none" ] },
1558 ins => [ "base", "index", "mem", "val" ],
1566 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "gp", "gp" ], out => [ "in_r7" ] },
1567 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1568 attr => "pn_Cmp pn_code",
1569 init_attr => "attr->pn_code = pn_code;",
1577 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "gp", "gp" ], out => [ "in_r7" ] },
1578 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1579 attr => "pn_Cmp pn_code",
1580 init_attr => "attr->pn_code = pn_code;",
1588 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "gp", "gp" ], out => [ "in_r7" ] },
1589 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1590 attr => "pn_Cmp pn_code",
1591 init_attr => "attr->pn_code = pn_code;",
1599 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "gp", "gp" ], out => [ "in_r7" ] },
1600 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1601 attr => "pn_Cmp pn_code",
1602 init_attr => "attr->pn_code = pn_code;",
1610 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1618 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "gp", "gp" ], out => [ "in_r7" ] },
1619 ins => [ "base", "index", "mem", "cmp_left", "cmp_right", "val_true", "val_false" ],
1621 units => [ "VFP", "GP" ],
1623 attr_type => "ia32_x87_attr_t",
1628 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "eax ebx ecx edx" ] },
1629 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1630 attr => "pn_Cmp pn_code",
1631 init_attr => "attr->pn_code = pn_code;",
1639 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ], out => [ "eax ebx ecx edx" ] },
1640 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1641 attr => "pn_Cmp pn_code",
1642 init_attr => "attr->pn_code = pn_code;",
1650 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "eax ebx ecx edx" ] },
1651 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1652 attr => "pn_Cmp pn_code",
1653 init_attr => "attr->pn_code = pn_code;",
1661 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ], out => [ "eax ebx ecx edx" ] },
1662 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1663 attr => "pn_Cmp pn_code",
1664 init_attr => "attr->pn_code = pn_code;",
1672 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "eax ebx ecx edx" ] },
1673 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1681 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp" ], out => [ "eax ebx ecx edx" ] },
1682 ins => [ "base", "index", "mem", "cmp_left", "cmp_right" ],
1686 attr_type => "ia32_x87_attr_t",
1691 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1695 attr_type => "ia32_x87_attr_t",
1698 #----------------------------------------------------------#
1700 # (_) | | | | / _| | | | #
1701 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1702 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1703 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1704 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1706 # _ __ ___ __| | ___ ___ #
1707 # | '_ \ / _ \ / _` |/ _ \/ __| #
1708 # | | | | (_) | (_| | __/\__ \ #
1709 # |_| |_|\___/ \__,_|\___||___/ #
1710 #----------------------------------------------------------#
1714 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1715 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1719 attr_type => "ia32_x87_attr_t",
1724 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1725 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1729 attr_type => "ia32_x87_attr_t",
1734 cmp_attr => "return 1;",
1740 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1741 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1745 attr_type => "ia32_x87_attr_t",
1749 cmp_attr => "return 1;",
1754 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp", "none" ] },
1755 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1756 outs => [ "res", "M" ],
1759 attr_type => "ia32_x87_attr_t",
1763 cmp_attr => "return 1;",
1764 outs => [ "res", "M" ],
1769 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1770 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1774 attr_type => "ia32_x87_attr_t",
1778 cmp_attr => "return 1;",
1784 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1789 attr_type => "ia32_x87_attr_t",
1794 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1799 attr_type => "ia32_x87_attr_t",
1802 # virtual Load and Store
1806 state => "exc_pinned",
1807 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1808 ins => [ "base", "index", "mem" ],
1809 outs => [ "res", "M" ],
1810 attr => "ir_mode *load_mode",
1811 init_attr => "attr->attr.ls_mode = load_mode;",
1814 attr_type => "ia32_x87_attr_t",
1819 state => "exc_pinned",
1820 reg_req => { in => [ "gp", "gp", "none", "vfp" ] },
1821 ins => [ "base", "index", "mem", "val" ],
1822 attr => "ir_mode *store_mode",
1823 init_attr => "attr->attr.ls_mode = store_mode;",
1827 attr_type => "ia32_x87_attr_t",
1833 state => "exc_pinned",
1834 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1835 outs => [ "res", "M" ],
1836 ins => [ "base", "index", "mem" ],
1839 attr_type => "ia32_x87_attr_t",
1843 cmp_attr => "return 1;",
1844 outs => [ "res", "M" ],
1849 state => "exc_pinned",
1850 reg_req => { in => [ "gp", "gp", "none", "vfp", "fpcw" ] },
1851 ins => [ "base", "index", "mem", "val", "fpcw" ],
1855 attr_type => "ia32_x87_attr_t",
1859 cmp_attr => "return 1;",
1860 state => "exc_pinned",
1870 reg_req => { out => [ "vfp" ] },
1874 attr_type => "ia32_x87_attr_t",
1879 reg_req => { out => [ "vfp" ] },
1883 attr_type => "ia32_x87_attr_t",
1888 reg_req => { out => [ "vfp" ] },
1892 attr_type => "ia32_x87_attr_t",
1897 reg_req => { out => [ "vfp" ] },
1901 attr_type => "ia32_x87_attr_t",
1906 reg_req => { out => [ "vfp" ] },
1910 attr_type => "ia32_x87_attr_t",
1915 reg_req => { out => [ "vfp" ] },
1919 attr_type => "ia32_x87_attr_t",
1924 reg_req => { out => [ "vfp" ] },
1928 attr_type => "ia32_x87_attr_t",
1935 op_flags => "L|X|Y",
1936 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1937 ins => [ "left", "right" ],
1938 outs => [ "false", "true", "temp_reg_eax" ],
1940 init_attr => "attr->attr.pn_code = pnc;",
1943 attr_type => "ia32_x87_attr_t",
1946 #------------------------------------------------------------------------#
1947 # ___ _____ __ _ _ _ #
1948 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1949 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1950 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1951 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1952 #------------------------------------------------------------------------#
1954 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1955 # are swapped, we work this around in the emitter...
1959 rd_constructor => "NONE",
1961 emit => '. fadd%XM %x87_binop',
1962 attr_type => "ia32_x87_attr_t",
1967 rd_constructor => "NONE",
1969 emit => '. faddp%XM %x87_binop',
1970 attr_type => "ia32_x87_attr_t",
1975 rd_constructor => "NONE",
1977 emit => '. fmul%XM %x87_binop',
1978 attr_type => "ia32_x87_attr_t",
1983 rd_constructor => "NONE",
1985 emit => '. fmulp%XM %x87_binop',,
1986 attr_type => "ia32_x87_attr_t",
1991 rd_constructor => "NONE",
1993 emit => '. fsub%XM %x87_binop',
1994 attr_type => "ia32_x87_attr_t",
1999 rd_constructor => "NONE",
2001 # see note about gas bugs
2002 emit => '. fsubrp%XM %x87_binop',
2003 attr_type => "ia32_x87_attr_t",
2008 rd_constructor => "NONE",
2011 emit => '. fsubr%XM %x87_binop',
2012 attr_type => "ia32_x87_attr_t",
2017 rd_constructor => "NONE",
2020 # see note about gas bugs
2021 emit => '. fsubp%XM %x87_binop',
2022 attr_type => "ia32_x87_attr_t",
2027 rd_constructor => "NONE",
2030 attr_type => "ia32_x87_attr_t",
2033 # this node is just here, to keep the simulator running
2034 # we can omit this when a fprem simulation function exists
2037 rd_constructor => "NONE",
2040 attr_type => "ia32_x87_attr_t",
2045 rd_constructor => "NONE",
2047 emit => '. fdiv%XM %x87_binop',
2048 attr_type => "ia32_x87_attr_t",
2053 rd_constructor => "NONE",
2055 # see note about gas bugs
2056 emit => '. fdivrp%XM %x87_binop',
2057 attr_type => "ia32_x87_attr_t",
2062 rd_constructor => "NONE",
2064 emit => '. fdivr%XM %x87_binop',
2065 attr_type => "ia32_x87_attr_t",
2070 rd_constructor => "NONE",
2072 # see note about gas bugs
2073 emit => '. fdivp%XM %x87_binop',
2074 attr_type => "ia32_x87_attr_t",
2079 rd_constructor => "NONE",
2082 attr_type => "ia32_x87_attr_t",
2087 rd_constructor => "NONE",
2090 attr_type => "ia32_x87_attr_t",
2093 # x87 Load and Store
2096 rd_constructor => "NONE",
2097 op_flags => "R|L|F",
2098 state => "exc_pinned",
2100 emit => '. fld%XM %AM',
2101 attr_type => "ia32_x87_attr_t",
2105 rd_constructor => "NONE",
2106 op_flags => "R|L|F",
2107 state => "exc_pinned",
2109 emit => '. fst%XM %AM',
2111 attr_type => "ia32_x87_attr_t",
2115 rd_constructor => "NONE",
2116 op_flags => "R|L|F",
2117 state => "exc_pinned",
2119 emit => '. fstp%XM %AM',
2121 attr_type => "ia32_x87_attr_t",
2128 rd_constructor => "NONE",
2130 emit => '. fild%M %AM',
2131 attr_type => "ia32_x87_attr_t",
2136 state => "exc_pinned",
2137 rd_constructor => "NONE",
2139 emit => '. fist%M %AM',
2141 attr_type => "ia32_x87_attr_t",
2146 state => "exc_pinned",
2147 rd_constructor => "NONE",
2149 emit => '. fistp%M %AM',
2151 attr_type => "ia32_x87_attr_t",
2157 op_flags => "R|c|K",
2161 attr_type => "ia32_x87_attr_t",
2165 op_flags => "R|c|K",
2169 attr_type => "ia32_x87_attr_t",
2173 op_flags => "R|c|K",
2177 attr_type => "ia32_x87_attr_t",
2181 op_flags => "R|c|K",
2185 attr_type => "ia32_x87_attr_t",
2189 op_flags => "R|c|K",
2193 attr_type => "ia32_x87_attr_t",
2197 op_flags => "R|c|K",
2200 emit => '. fldll2t',
2201 attr_type => "ia32_x87_attr_t",
2205 op_flags => "R|c|K",
2209 attr_type => "ia32_x87_attr_t",
2213 # Note that it is NEVER allowed to do CSE on these nodes
2214 # Moreover, note the virtual register requierements!
2219 cmp_attr => "return 1;",
2220 emit => '. fxch %X0',
2221 attr_type => "ia32_x87_attr_t",
2227 cmp_attr => "return 1;",
2228 emit => '. fld %X0',
2229 attr_type => "ia32_x87_attr_t",
2234 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2235 cmp_attr => "return 1;",
2236 emit => '. fld %X0',
2237 attr_type => "ia32_x87_attr_t",
2243 cmp_attr => "return 1;",
2244 emit => '. fstp %X0',
2245 attr_type => "ia32_x87_attr_t",
2251 cmp_attr => "return 1;",
2252 emit => '. ffreep %X0',
2253 attr_type => "ia32_x87_attr_t",
2259 cmp_attr => "return 1;",
2261 attr_type => "ia32_x87_attr_t",
2267 cmp_attr => "return 1;",
2269 attr_type => "ia32_x87_attr_t",
2275 op_flags => "L|X|Y",
2277 attr_type => "ia32_x87_attr_t",
2281 op_flags => "L|X|Y",
2283 attr_type => "ia32_x87_attr_t",
2287 op_flags => "L|X|Y",
2289 attr_type => "ia32_x87_attr_t",
2293 op_flags => "L|X|Y",
2295 attr_type => "ia32_x87_attr_t",
2299 op_flags => "L|X|Y",
2301 attr_type => "ia32_x87_attr_t",
2305 op_flags => "L|X|Y",
2307 attr_type => "ia32_x87_attr_t",
2311 # -------------------------------------------------------------------------------- #
2312 # ____ ____ _____ _ _ #
2313 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2314 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2315 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2316 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2318 # -------------------------------------------------------------------------------- #
2321 # Spilling and reloading of SSE registers, hardcoded, not generated #
2325 state => "exc_pinned",
2326 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2327 emit => '. movdqu %D0, %AM',
2328 outs => [ "res", "M" ],
2334 state => "exc_pinned",
2335 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
2336 ins => [ "base", "index", "mem", "val" ],
2337 emit => '. movdqu %binop',
2344 # Include the generated SIMD node specification written by the SIMD optimization
2345 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2346 unless ($return = do $my_script_name) {
2347 warn "couldn't parse $my_script_name: $@" if $@;
2348 warn "couldn't do $my_script_name: $!" unless defined $return;
2349 warn "couldn't run $my_script_name" unless $return;