3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
38 # ... # (all nodes you need to describe)
40 # ); # close the %nodes initializer
42 # op_flags: flags for the operation, OPTIONAL (default is "N")
43 # the op_flags correspond to the firm irop_flags:
46 # C irop_flag_commutative
47 # X irop_flag_cfopcode
48 # I irop_flag_ip_cfopcode
51 # H irop_flag_highlevel
52 # c irop_flag_constlike
55 # irn_flags: special node flags, OPTIONAL (default is 0)
56 # following irn_flags are supported:
59 # I ignore for register allocation
60 # S modifies stack pointer
62 # state: state of the operation, OPTIONAL (default is "floats")
64 # arity: arity of the operation, MUST NOT BE OMITTED
66 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
67 # are always the first 3 arguments and are always autmatically
69 # If this key is missing the following arguments will be created:
70 # for i = 1 .. arity: ir_node *op_i
73 # outs: if a node defines more than one output, the names of the projections
74 # nodes having outs having automatically the mode mode_T
75 # One can also annotate some flags for each out, additional to irn_flags.
76 # They are separated from name with a colon ':', and concatenated by pipe '|'
77 # Only I and S are available at the moment (same meaning as in irn_flags).
78 # example: [ "frame:I", "stack:I|S", "M" ]
80 # comment: OPTIONAL comment for the node constructor
82 # rd_constructor: for every operation there will be a
83 # new_rd_<arch>_<op-name> function with the arguments from above
84 # which creates the ir_node corresponding to the defined operation
85 # you can either put the complete source code of this function here
87 # This key is OPTIONAL. If omitted, the following constructor will
89 # if (!op_<arch>_<op-name>) assert(0);
93 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
96 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
98 # latency: the latency of the operation, default is 1
102 # 0 - no special type
103 # 1 - caller save (register must be saved by the caller of a function)
104 # 2 - callee save (register must be saved by the called function)
105 # 4 - ignore (do not assign this register)
106 # 8 - emitter can choose an arbitrary register of this class
107 # 16 - the register is a virtual one
108 # 32 - register represents a state
109 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
112 { name => "eax", type => 1 },
113 { name => "edx", type => 1 },
114 { name => "ebx", type => 2 },
115 { name => "ecx", type => 1 },
116 { name => "esi", type => 2 },
117 { name => "edi", type => 2 },
118 { name => "ebp", type => 2 },
119 { name => "esp", type => 4 },
120 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
121 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
122 { mode => "mode_Iu" }
125 { name => "mm0", type => 4 },
126 { name => "mm1", type => 4 },
127 { name => "mm2", type => 4 },
128 { name => "mm3", type => 4 },
129 { name => "mm4", type => 4 },
130 { name => "mm5", type => 4 },
131 { name => "mm6", type => 4 },
132 { name => "mm7", type => 4 },
136 { name => "xmm0", type => 1 },
137 { name => "xmm1", type => 1 },
138 { name => "xmm2", type => 1 },
139 { name => "xmm3", type => 1 },
140 { name => "xmm4", type => 1 },
141 { name => "xmm5", type => 1 },
142 { name => "xmm6", type => 1 },
143 { name => "xmm7", type => 1 },
144 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
145 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
149 { name => "vf0", type => 1 | 16 },
150 { name => "vf1", type => 1 | 16 },
151 { name => "vf2", type => 1 | 16 },
152 { name => "vf3", type => 1 | 16 },
153 { name => "vf4", type => 1 | 16 },
154 { name => "vf5", type => 1 | 16 },
155 { name => "vf6", type => 1 | 16 },
156 { name => "vf7", type => 1 | 16 },
157 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
158 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
162 { name => "st0", realname => "st", type => 4 },
163 { name => "st1", realname => "st(1)", type => 4 },
164 { name => "st2", realname => "st(2)", type => 4 },
165 { name => "st3", realname => "st(3)", type => 4 },
166 { name => "st4", realname => "st(4)", type => 4 },
167 { name => "st5", realname => "st(5)", type => 4 },
168 { name => "st6", realname => "st(6)", type => 4 },
169 { name => "st7", realname => "st(7)", type => 4 },
172 fp_cw => [ # the floating point control word
173 { name => "fpcw", type => 4 | 32},
174 { mode => "mode_fpcw" }
177 { name => "eflags", type => 4 },
178 { mode => "mode_Iu" }
181 { name => "fpsw", type => 4 },
182 { mode => "mode_Hu" }
187 CF => { reg => "eflags", bit => 0 },
188 PF => { reg => "eflags", bit => 2 },
189 AF => { reg => "eflags", bit => 4 },
190 ZF => { reg => "eflags", bit => 6 },
191 SF => { reg => "eflags", bit => 7 },
192 TF => { reg => "eflags", bit => 8 },
193 IF => { reg => "eflags", bit => 9 },
194 DF => { reg => "eflags", bit => 10 },
195 OF => { reg => "eflags", bit => 11 },
196 IOPL0 => { reg => "eflags", bit => 12 },
197 IOPL1 => { reg => "eflags", bit => 13 },
198 NT => { reg => "eflags", bit => 14 },
199 RF => { reg => "eflags", bit => 16 },
200 VM => { reg => "eflags", bit => 17 },
201 AC => { reg => "eflags", bit => 18 },
202 VIF => { reg => "eflags", bit => 19 },
203 VIP => { reg => "eflags", bit => 20 },
204 ID => { reg => "eflags", bit => 21 },
206 FP_IE => { reg => "fpsw", bit => 0 },
207 FP_DE => { reg => "fpsw", bit => 1 },
208 FP_ZE => { reg => "fpsw", bit => 2 },
209 FP_OE => { reg => "fpsw", bit => 3 },
210 FP_UE => { reg => "fpsw", bit => 4 },
211 FP_PE => { reg => "fpsw", bit => 5 },
212 FP_SF => { reg => "fpsw", bit => 6 },
213 FP_ES => { reg => "fpsw", bit => 7 },
214 FP_C0 => { reg => "fpsw", bit => 8 },
215 FP_C1 => { reg => "fpsw", bit => 9 },
216 FP_C2 => { reg => "fpsw", bit => 10 },
217 FP_TOP0 => { reg => "fpsw", bit => 11 },
218 FP_TOP1 => { reg => "fpsw", bit => 12 },
219 FP_TOP2 => { reg => "fpsw", bit => 13 },
220 FP_C3 => { reg => "fpsw", bit => 14 },
221 FP_B => { reg => "fpsw", bit => 15 },
223 FP_IM => { reg => "fpcw", bit => 0 },
224 FP_DM => { reg => "fpcw", bit => 1 },
225 FP_ZM => { reg => "fpcw", bit => 2 },
226 FP_OM => { reg => "fpcw", bit => 3 },
227 FP_UM => { reg => "fpcw", bit => 4 },
228 FP_PM => { reg => "fpcw", bit => 5 },
229 FP_PC0 => { reg => "fpcw", bit => 8 },
230 FP_PC1 => { reg => "fpcw", bit => 9 },
231 FP_RC0 => { reg => "fpcw", bit => 10 },
232 FP_RC1 => { reg => "fpcw", bit => 11 },
233 FP_X => { reg => "fpcw", bit => 12 }
237 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
238 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
239 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
240 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
245 bundels_per_cycle => 1
249 S0 => "${arch}_emit_source_register(env, node, 0);",
250 S1 => "${arch}_emit_source_register(env, node, 1);",
251 S2 => "${arch}_emit_source_register(env, node, 2);",
252 S3 => "${arch}_emit_source_register(env, node, 3);",
253 S4 => "${arch}_emit_source_register(env, node, 4);",
254 S5 => "${arch}_emit_source_register(env, node, 5);",
255 D0 => "${arch}_emit_dest_register(env, node, 0);",
256 D1 => "${arch}_emit_dest_register(env, node, 1);",
257 D2 => "${arch}_emit_dest_register(env, node, 2);",
258 D3 => "${arch}_emit_dest_register(env, node, 3);",
259 D4 => "${arch}_emit_dest_register(env, node, 4);",
260 D5 => "${arch}_emit_dest_register(env, node, 5);",
261 X0 => "${arch}_emit_x87_name(env, node, 0);",
262 X1 => "${arch}_emit_x87_name(env, node, 1);",
263 X2 => "${arch}_emit_x87_name(env, node, 2);",
264 C => "${arch}_emit_immediate(env, node);",
265 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
266 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
267 ia32_emit_mode_suffix(env, node);",
268 M => "${arch}_emit_mode_suffix(env, node);",
269 XM => "${arch}_emit_x87_mode_suffix(env, node);",
270 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
271 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
272 AM => "${arch}_emit_am(env, node);",
273 unop => "${arch}_emit_unop(env, node);",
274 binop => "${arch}_emit_binop(env, node);",
275 x87_binop => "${arch}_emit_x87_binop(env, node);",
278 #--------------------------------------------------#
281 # _ __ _____ __ _ _ __ ___ _ __ ___ #
282 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
283 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
284 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
287 #--------------------------------------------------#
289 $default_attr_type = "ia32_attr_t";
292 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
294 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
295 "\tinit_ia32_x87_attributes(res);",
297 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
298 "\tinit_ia32_x87_attributes(res);".
299 "\tinit_ia32_asm_attributes(res);"
303 ia32_attr_t => "ia32_compare_nodes_attr",
304 ia32_x87_attr_t => "ia32_compare_x87_attr",
305 ia32_asm_attr_t => "ia32_compare_asm_attr",
311 $mode_xmm = "mode_E";
312 $mode_gp = "mode_Iu";
313 $mode_fpcw = "mode_fpcw";
314 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
315 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
316 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
324 reg_req => { out => [ "gp_NOREG" ] },
331 out_arity => "variable",
332 attr_type => "ia32_asm_attr_t",
335 #-----------------------------------------------------------------#
338 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
339 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
340 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
341 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
344 #-----------------------------------------------------------------#
346 # commutative operations
349 # All nodes supporting Addressmode have 5 INs:
350 # 1 - base r1 == NoReg in case of no AM or no base
351 # 2 - index r2 == NoReg in case of no AM or no index
352 # 3 - op1 r3 == always present
353 # 4 - op2 r4 == NoReg in case of immediate operation
354 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
358 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
359 ins => [ "base", "index", "left", "right", "mem" ],
360 emit => '. add%M %binop',
363 modified_flags => $status_flags
367 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
368 emit => '. adc%M %binop',
371 modified_flags => $status_flags
377 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
384 outs => [ "low_res", "high_res" ],
386 modified_flags => $status_flags
392 cmp_attr => "return 1;",
398 cmp_attr => "return 1;",
403 # we should not rematrialize this node. It produces 2 results and has
404 # very strict constrains
405 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
406 emit => '. mul%M %unop',
407 outs => [ "EAX", "EDX", "M" ],
410 modified_flags => $status_flags
414 # we should not rematrialize this node. It produces 2 results and has
415 # very strict constrains
417 cmp_attr => "return 1;",
418 outs => [ "EAX", "EDX", "M" ],
424 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
425 emit => '. imul%M %binop',
429 modified_flags => $status_flags
434 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
435 emit => '. imul%M %unop',
436 outs => [ "EAX", "EDX", "M" ],
439 modified_flags => $status_flags
444 cmp_attr => "return 1;",
450 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
451 emit => '. and%M %binop',
454 modified_flags => $status_flags
459 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
460 emit => '. or%M %binop',
463 modified_flags => $status_flags
468 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
469 emit => '. xor%M %binop',
472 modified_flags => $status_flags
477 cmp_attr => "return 1;",
479 modified_flags => $status_flags
482 # not commutative operations
486 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
487 emit => '. sub%M %binop',
490 modified_flags => $status_flags
494 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
495 emit => '. sbb%M %binop',
498 modified_flags => $status_flags
504 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
511 outs => [ "low_res", "high_res" ],
513 modified_flags => $status_flags
518 cmp_attr => "return 1;",
523 cmp_attr => "return 1;",
529 state => "exc_pinned",
530 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
531 attr => "ia32_op_flavour_t dm_flav",
532 init_attr => "attr->data.op_flav = dm_flav;",
533 emit => ". idiv%M %unop",
534 outs => [ "div_res", "mod_res", "M" ],
537 modified_flags => $status_flags
542 state => "exc_pinned",
543 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
544 attr => "ia32_op_flavour_t dm_flav",
545 init_attr => "attr->data.op_flav = dm_flav;",
546 emit => ". div%M %unop",
547 outs => [ "div_res", "mod_res", "M" ],
550 modified_flags => $status_flags
555 # "in_r3" would be enough as out requirement, but the register allocator
556 # does strange things then and doesn't respect the constraint for in4
557 # if the same value is attached to in3 and in4 (if you have "i << i" in C)
558 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
559 ins => [ "base", "index", "left", "right", "mem" ],
560 emit => '. shl%M %binop',
563 modified_flags => $status_flags
567 cmp_attr => "return 1;",
573 # Out requirements is: different from all in
574 # This is because, out must be different from LowPart and ShiftCount.
575 # We could say "!ecx !in_r4" but it can occur, that all values live through
576 # this Shift and the only value dying is the ShiftCount. Then there would be
577 # a register missing, as result must not be ecx and all other registers are
578 # occupied. What we should write is "!in_r4 !in_r5", but this is not
579 # supported (and probably never will). So we create artificial interferences
580 # of the result with all inputs, so the spiller can always assure a free
582 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
585 if (get_ia32_immop_type(node) == ia32_ImmNone) {
586 if (get_ia32_op_type(node) == ia32_AddrModeD) {
587 . shld%M %%cl, %S3, %AM
589 . shld%M %%cl, %S3, %S2
592 if (get_ia32_op_type(node) == ia32_AddrModeD) {
593 . shld%M %C, %S3, %AM
595 . shld%M %C, %S3, %S2
602 modified_flags => $status_flags
606 cmp_attr => "return 1;",
612 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
613 emit => '. shr%M %binop',
616 modified_flags => $status_flags
620 cmp_attr => "return 1;",
626 # Out requirements is: different from all in
627 # This is because, out must be different from LowPart and ShiftCount.
628 # We could say "!ecx !in_r4" but it can occur, that all values live through
629 # this Shift and the only value dying is the ShiftCount. Then there would be a
630 # register missing, as result must not be ecx and all other registers are
631 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
632 # (and probably never will). So we create artificial interferences of the result
633 # with all inputs, so the spiller can always assure a free register.
634 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
636 if (get_ia32_immop_type(node) == ia32_ImmNone) {
637 if (get_ia32_op_type(node) == ia32_AddrModeD) {
638 . shrd%M %%cl, %S3, %AM
640 . shrd%M %%cl, %S3, %S2
643 if (get_ia32_op_type(node) == ia32_AddrModeD) {
644 . shrd%M %C, %S3, %AM
646 . shrd%M %C, %S3, %S2
653 modified_flags => $status_flags
657 cmp_attr => "return 1;",
663 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
664 emit => '. sar%M %binop',
667 modified_flags => $status_flags
671 cmp_attr => "return 1;",
677 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
678 emit => '. ror%M %binop',
681 modified_flags => $status_flags
686 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
687 emit => '. rol%M %binop',
690 modified_flags => $status_flags
697 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
698 emit => '. neg%M %unop',
701 modified_flags => $status_flags
706 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
713 outs => [ "low_res", "high_res" ],
715 modified_flags => $status_flags
720 cmp_attr => "return 1;",
726 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
727 emit => '. inc%M %unop',
730 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
735 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
736 emit => '. dec%M %unop',
739 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
744 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
745 emit => '. not%M %unop',
756 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none"] },
757 outs => [ "false", "true" ],
759 units => [ "BRANCH" ],
765 reg_req => { in => [ "gp", "gp" ], out => [ "none", "none" ] },
766 outs => [ "false", "true" ],
768 units => [ "BRANCH" ],
774 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "none", "none" ] },
775 outs => [ "false", "true" ],
776 units => [ "BRANCH" ],
782 reg_req => { in => [ "gp", "gp" ] },
783 units => [ "BRANCH" ],
789 reg_req => { in => [ "gp" ], out => [ "none" ] },
791 units => [ "BRANCH" ],
797 reg_req => { out => [ "gp" ] },
806 reg_req => { out => [ "gp_UKNWN" ] },
816 reg_req => { out => [ "vfp_UKNWN" ] },
820 attr_type => "ia32_x87_attr_t",
827 reg_req => { out => [ "xmm_UKNWN" ] },
837 reg_req => { out => [ "gp_NOREG" ] },
847 reg_req => { out => [ "vfp_NOREG" ] },
851 attr_type => "ia32_x87_attr_t",
858 reg_req => { out => [ "xmm_NOREG" ] },
868 reg_req => { out => [ "fp_cw" ] },
872 modified_flags => $fpcw_flags
877 state => "exc_pinned",
878 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
880 emit => ". fldcw %AM",
883 modified_flags => $fpcw_flags
888 state => "exc_pinned",
889 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
891 emit => ". fnstcw %AM",
897 # we should not rematrialize this node. It produces 2 results and has
898 # very strict constrains
899 reg_req => { in => [ "gp" ], out => [ "eax in_r1", "edx" ] },
901 outs => [ "EAX", "EDX" ],
909 state => "exc_pinned",
910 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
912 emit => ". mov%SE%ME%.l %AM, %D0",
913 outs => [ "res", "M" ],
919 cmp_attr => "return 1;",
920 outs => [ "res", "M" ],
926 cmp_attr => "return 1;",
927 state => "exc_pinned",
934 state => "exc_pinned",
935 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
936 emit => '. mov%M %binop',
944 state => "exc_pinned",
945 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
946 emit => '. mov%M %binop',
954 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1" ] },
955 emit => '. leal %AM, %D0',
959 modified_flags => [],
963 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
964 emit => '. push%M %unop',
965 outs => [ "stack:I|S", "M" ],
968 modified_flags => [],
972 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
973 emit => '. pop%M %unop',
974 outs => [ "stack:I|S", "res", "M" ],
977 modified_flags => [],
981 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
983 outs => [ "frame:I", "stack:I|S", "M" ],
989 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
991 outs => [ "frame:I", "stack:I|S" ],
998 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
999 emit => '. addl %binop',
1000 outs => [ "stack:S", "M" ],
1002 modified_flags => $status_flags
1007 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1008 emit => '. subl %binop',
1009 outs => [ "stack:S", "M" ],
1011 modified_flags => $status_flags
1016 reg_req => { out => [ "gp" ] },
1020 # the int instruction
1022 reg_req => { in => [ "none" ], out => [ "none" ] },
1024 attr => "tarval *tv",
1025 init_attr => "\tset_ia32_Immop_tarval(res, tv);",
1028 cmp_attr => "return 1;",
1032 #-----------------------------------------------------------------------------#
1033 # _____ _____ ______ __ _ _ _ #
1034 # / ____/ ____| ____| / _| | | | | | #
1035 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1036 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1037 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1038 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1039 #-----------------------------------------------------------------------------#
1041 # commutative operations
1045 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1046 emit => '. add%XXM %binop',
1054 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1055 emit => '. mul%XXM %binop',
1063 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1064 emit => '. max%XXM %binop',
1072 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1073 emit => '. min%XXM %binop',
1081 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1082 emit => '. andp%XSD %binop',
1090 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1091 emit => '. orp%XSD %binop',
1098 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1099 emit => '. xorp%XSD %binop',
1105 # not commutative operations
1109 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1110 emit => '. andnp%XSD %binop',
1118 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1119 emit => '. sub%XXM %binop',
1127 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1128 outs => [ "res", "M" ],
1129 emit => '. div%XXM %binop',
1138 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1146 op_flags => "L|X|Y",
1147 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1148 outs => [ "false", "true" ],
1156 reg_req => { out => [ "xmm" ] },
1157 emit => '. mov%XXM %C, %D0',
1167 state => "exc_pinned",
1168 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1169 emit => '. mov%XXM %AM, %D0',
1170 outs => [ "res", "M" ],
1177 state => "exc_pinned",
1178 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1179 emit => '. mov%XXM %binop',
1187 state => "exc_pinned",
1188 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1189 ins => [ "base", "index", "val", "mem" ],
1190 emit => '. mov%XXM %S2, %AM',
1198 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1199 emit => '. cvtsi2ss %D0, %AM',
1207 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1208 emit => '. cvtsi2sd %unop',
1217 cmp_attr => "return 1;",
1223 cmp_attr => "return 1;",
1230 state => "exc_pinned",
1231 reg_req => { in => [ "gp", "gp", "none" ] },
1232 emit => '. fstp%XM %AM',
1241 state => "exc_pinned",
1242 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vf0", "none" ] },
1243 ins => [ "base", "index", "mem" ],
1244 emit => '. fld%XM %AM',
1245 outs => [ "res", "M" ],
1255 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1256 outs => [ "DST", "SRC", "CNT", "M" ],
1258 modified_flags => [ "DF" ]
1264 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1265 outs => [ "DST", "SRC", "M" ],
1267 modified_flags => [ "DF" ]
1273 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1276 modified_flags => $status_flags
1280 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1283 modified_flags => $status_flags
1287 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1294 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1301 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1309 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "in_r4" ] },
1317 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "in_r3" ] },
1325 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1333 reg_req => { in => [ "vfp", "vfp", "gp", "gp" ], out => [ "in_r4" ] },
1337 attr_type => "ia32_x87_attr_t",
1342 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1350 reg_req => { in => [ "gp" ], out => [ "eax ebx ecx edx" ] },
1358 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1366 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1370 attr_type => "ia32_x87_attr_t",
1375 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1379 attr_type => "ia32_x87_attr_t",
1382 #----------------------------------------------------------#
1384 # (_) | | | | / _| | | | #
1385 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1386 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1387 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1388 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1390 # _ __ ___ __| | ___ ___ #
1391 # | '_ \ / _ \ / _` |/ _ \/ __| #
1392 # | | | | (_) | (_| | __/\__ \ #
1393 # |_| |_|\___/ \__,_|\___||___/ #
1394 #----------------------------------------------------------#
1398 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1402 attr_type => "ia32_x87_attr_t",
1407 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1411 attr_type => "ia32_x87_attr_t",
1416 cmp_attr => "return 1;",
1422 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1426 attr_type => "ia32_x87_attr_t",
1430 cmp_attr => "return 1;",
1435 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp", "none" ] },
1436 outs => [ "res", "M" ],
1439 attr_type => "ia32_x87_attr_t",
1443 cmp_attr => "return 1;",
1444 outs => [ "res", "M" ],
1449 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "vfp" ] },
1453 attr_type => "ia32_x87_attr_t",
1457 cmp_attr => "return 1;",
1463 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1467 attr_type => "ia32_x87_attr_t",
1472 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1476 attr_type => "ia32_x87_attr_t",
1481 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1485 attr_type => "ia32_x87_attr_t",
1490 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1494 attr_type => "ia32_x87_attr_t",
1499 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1503 attr_type => "ia32_x87_attr_t",
1506 # virtual Load and Store
1510 state => "exc_pinned",
1511 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1512 outs => [ "res", "M" ],
1515 attr_type => "ia32_x87_attr_t",
1520 state => "exc_pinned",
1521 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1525 attr_type => "ia32_x87_attr_t",
1531 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1532 outs => [ "res", "M" ],
1535 attr_type => "ia32_x87_attr_t",
1539 cmp_attr => "return 1;",
1540 outs => [ "res", "M" ],
1545 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1549 attr_type => "ia32_x87_attr_t",
1553 cmp_attr => "return 1;",
1563 reg_req => { out => [ "vfp" ] },
1567 attr_type => "ia32_x87_attr_t",
1572 reg_req => { out => [ "vfp" ] },
1576 attr_type => "ia32_x87_attr_t",
1581 reg_req => { out => [ "vfp" ] },
1585 attr_type => "ia32_x87_attr_t",
1590 reg_req => { out => [ "vfp" ] },
1594 attr_type => "ia32_x87_attr_t",
1599 reg_req => { out => [ "vfp" ] },
1603 attr_type => "ia32_x87_attr_t",
1608 reg_req => { out => [ "vfp" ] },
1612 attr_type => "ia32_x87_attr_t",
1617 reg_req => { out => [ "vfp" ] },
1621 attr_type => "ia32_x87_attr_t",
1627 reg_req => { out => [ "vfp" ] },
1631 attr_type => "ia32_x87_attr_t",
1638 op_flags => "L|X|Y",
1639 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "none", "none", "eax" ] },
1640 outs => [ "false", "true", "temp_reg_eax" ],
1643 attr_type => "ia32_x87_attr_t",
1646 #------------------------------------------------------------------------#
1647 # ___ _____ __ _ _ _ #
1648 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1649 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1650 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1651 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1652 #------------------------------------------------------------------------#
1654 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1655 # are swapped, we work this around in the emitter...
1659 rd_constructor => "NONE",
1661 emit => '. fadd%XM %x87_binop',
1662 attr_type => "ia32_x87_attr_t",
1667 rd_constructor => "NONE",
1669 emit => '. faddp %x87_binop',
1670 attr_type => "ia32_x87_attr_t",
1675 rd_constructor => "NONE",
1677 emit => '. fmul%XM %x87_binop',
1678 attr_type => "ia32_x87_attr_t",
1683 rd_constructor => "NONE",
1685 emit => '. fmulp %x87_binop',,
1686 attr_type => "ia32_x87_attr_t",
1691 rd_constructor => "NONE",
1693 emit => '. fsub%XM %x87_binop',
1694 attr_type => "ia32_x87_attr_t",
1699 rd_constructor => "NONE",
1701 # see note about gas bugs
1702 emit => '. fsubrp %x87_binop',
1703 attr_type => "ia32_x87_attr_t",
1708 rd_constructor => "NONE",
1711 emit => '. fsubr%XM %x87_binop',
1712 attr_type => "ia32_x87_attr_t",
1717 rd_constructor => "NONE",
1720 # see note about gas bugs
1721 emit => '. fsubp %x87_binop',
1722 attr_type => "ia32_x87_attr_t",
1727 rd_constructor => "NONE",
1730 attr_type => "ia32_x87_attr_t",
1733 # this node is just here, to keep the simulator running
1734 # we can omit this when a fprem simulation function exists
1737 rd_constructor => "NONE",
1740 attr_type => "ia32_x87_attr_t",
1745 rd_constructor => "NONE",
1747 emit => '. fdiv%XM %x87_binop',
1748 attr_type => "ia32_x87_attr_t",
1753 rd_constructor => "NONE",
1755 # see note about gas bugs
1756 emit => '. fdivrp %x87_binop',
1757 attr_type => "ia32_x87_attr_t",
1762 rd_constructor => "NONE",
1764 emit => '. fdivr%XM %x87_binop',
1765 attr_type => "ia32_x87_attr_t",
1770 rd_constructor => "NONE",
1772 # see note about gas bugs
1773 emit => '. fdivp %x87_binop',
1774 attr_type => "ia32_x87_attr_t",
1779 rd_constructor => "NONE",
1782 attr_type => "ia32_x87_attr_t",
1787 rd_constructor => "NONE",
1790 attr_type => "ia32_x87_attr_t",
1795 rd_constructor => "NONE",
1798 attr_type => "ia32_x87_attr_t",
1803 rd_constructor => "NONE",
1806 attr_type => "ia32_x87_attr_t",
1811 rd_constructor => "NONE",
1813 emit => '. fsqrt $',
1814 attr_type => "ia32_x87_attr_t",
1817 # x87 Load and Store
1820 rd_constructor => "NONE",
1821 op_flags => "R|L|F",
1822 state => "exc_pinned",
1824 emit => '. fld%XM %AM',
1825 attr_type => "ia32_x87_attr_t",
1829 rd_constructor => "NONE",
1830 op_flags => "R|L|F",
1831 state => "exc_pinned",
1833 emit => '. fst%XM %AM',
1835 attr_type => "ia32_x87_attr_t",
1839 rd_constructor => "NONE",
1840 op_flags => "R|L|F",
1841 state => "exc_pinned",
1843 emit => '. fstp%XM %AM',
1845 attr_type => "ia32_x87_attr_t",
1852 rd_constructor => "NONE",
1854 emit => '. fild%XM %AM',
1855 attr_type => "ia32_x87_attr_t",
1860 rd_constructor => "NONE",
1862 emit => '. fist%XM %AM',
1864 attr_type => "ia32_x87_attr_t",
1869 rd_constructor => "NONE",
1871 emit => '. fistp%XM %AM',
1873 attr_type => "ia32_x87_attr_t",
1879 op_flags => "R|c|K",
1883 attr_type => "ia32_x87_attr_t",
1887 op_flags => "R|c|K",
1891 attr_type => "ia32_x87_attr_t",
1895 op_flags => "R|c|K",
1899 attr_type => "ia32_x87_attr_t",
1903 op_flags => "R|c|K",
1907 attr_type => "ia32_x87_attr_t",
1911 op_flags => "R|c|K",
1915 attr_type => "ia32_x87_attr_t",
1919 op_flags => "R|c|K",
1922 emit => '. fldll2t',
1923 attr_type => "ia32_x87_attr_t",
1927 op_flags => "R|c|K",
1931 attr_type => "ia32_x87_attr_t",
1935 # Note that it is NEVER allowed to do CSE on these nodes
1936 # Moreover, note the virtual register requierements!
1941 cmp_attr => "return 1;",
1942 emit => '. fxch %X0',
1943 attr_type => "ia32_x87_attr_t",
1949 cmp_attr => "return 1;",
1950 emit => '. fld %X0',
1951 attr_type => "ia32_x87_attr_t",
1956 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1957 cmp_attr => "return 1;",
1958 emit => '. fld %X0',
1959 attr_type => "ia32_x87_attr_t",
1965 cmp_attr => "return 1;",
1966 emit => '. fstp %X0',
1967 attr_type => "ia32_x87_attr_t",
1973 op_flags => "L|X|Y",
1975 attr_type => "ia32_x87_attr_t",
1979 op_flags => "L|X|Y",
1981 attr_type => "ia32_x87_attr_t",
1985 op_flags => "L|X|Y",
1987 attr_type => "ia32_x87_attr_t",
1991 op_flags => "L|X|Y",
1993 attr_type => "ia32_x87_attr_t",
1997 op_flags => "L|X|Y",
1999 attr_type => "ia32_x87_attr_t",
2003 op_flags => "L|X|Y",
2005 attr_type => "ia32_x87_attr_t",
2009 # -------------------------------------------------------------------------------- #
2010 # ____ ____ _____ _ _ #
2011 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2012 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2013 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2014 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2016 # -------------------------------------------------------------------------------- #
2019 # Spilling and reloading of SSE registers, hardcoded, not generated #
2023 state => "exc_pinned",
2024 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2025 emit => '. movdqu %D0, %AM',
2026 outs => [ "res", "M" ],
2032 state => "exc_pinned",
2033 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2034 emit => '. movdqu %binop',
2041 # Include the generated SIMD node specification written by the SIMD optimization
2042 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2043 unless ($return = do $my_script_name) {
2044 warn "couldn't parse $my_script_name: $@" if $@;
2045 warn "couldn't do $my_script_name: $!" unless defined $return;
2046 warn "couldn't run $my_script_name" unless $return;