3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 SB0 => "${arch}_emit_8bit_source_register(env, node, 0);",
257 SW0 => "${arch}_emit_16bit_source_register(env, node, 0);",
258 D0 => "${arch}_emit_dest_register(env, node, 0);",
259 D1 => "${arch}_emit_dest_register(env, node, 1);",
260 D2 => "${arch}_emit_dest_register(env, node, 2);",
261 D3 => "${arch}_emit_dest_register(env, node, 3);",
262 D4 => "${arch}_emit_dest_register(env, node, 4);",
263 D5 => "${arch}_emit_dest_register(env, node, 5);",
264 X0 => "${arch}_emit_x87_name(env, node, 0);",
265 X1 => "${arch}_emit_x87_name(env, node, 1);",
266 X2 => "${arch}_emit_x87_name(env, node, 2);",
267 C => "${arch}_emit_immediate(env, node);",
268 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
269 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
270 ia32_emit_mode_suffix(env, node);",
271 M => "${arch}_emit_mode_suffix(env, node);",
272 XM => "${arch}_emit_x87_mode_suffix(env, node);",
273 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
274 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
275 AM => "${arch}_emit_am(env, node);",
276 unop0 => "${arch}_emit_unop(env, node, 0);",
277 unop1 => "${arch}_emit_unop(env, node, 1);",
278 unop2 => "${arch}_emit_unop(env, node, 2);",
279 unop3 => "${arch}_emit_unop(env, node, 3);",
280 unop4 => "${arch}_emit_unop(env, node, 4);",
281 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
282 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 0);",
283 binop => "${arch}_emit_binop(env, node);",
284 x87_binop => "${arch}_emit_x87_binop(env, node);",
287 #--------------------------------------------------#
290 # _ __ _____ __ _ _ __ ___ _ __ ___ #
291 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
292 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
293 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
296 #--------------------------------------------------#
298 $default_attr_type = "ia32_attr_t";
299 $default_copy_attr = "ia32_copy_attr";
302 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
304 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
305 "\tinit_ia32_x87_attributes(res);",
307 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
308 "\tinit_ia32_x87_attributes(res);".
309 "\tinit_ia32_asm_attributes(res);",
310 ia32_immediate_attr_t =>
311 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
312 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
316 ia32_attr_t => "ia32_compare_nodes_attr",
317 ia32_x87_attr_t => "ia32_compare_x87_attr",
318 ia32_asm_attr_t => "ia32_compare_asm_attr",
319 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
325 $mode_xmm = "mode_E";
326 $mode_gp = "mode_Iu";
327 $mode_fpcw = "mode_fpcw";
328 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
329 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
330 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
338 reg_req => { out => [ "gp_NOREG" ] },
339 attr => "ir_entity *symconst, int symconst_sign, long offset",
340 attr_type => "ia32_immediate_attr_t",
348 out_arity => "variable",
349 attr_type => "ia32_asm_attr_t",
356 reg_req => { out => [ "gp" ] },
361 cmp_attr => "return 1;",
364 #-----------------------------------------------------------------#
367 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
368 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
369 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
370 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
373 #-----------------------------------------------------------------#
375 # commutative operations
378 # All nodes supporting Addressmode have 5 INs:
379 # 1 - base r1 == NoReg in case of no AM or no base
380 # 2 - index r2 == NoReg in case of no AM or no index
381 # 3 - op1 r3 == always present
382 # 4 - op2 r4 == NoReg in case of immediate operation
383 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
387 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
388 ins => [ "base", "index", "left", "right", "mem" ],
389 emit => '. add%M %binop',
392 modified_flags => $status_flags
396 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
397 emit => '. adc%M %binop',
400 modified_flags => $status_flags
406 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
413 outs => [ "low_res", "high_res" ],
415 modified_flags => $status_flags
421 cmp_attr => "return 1;",
427 cmp_attr => "return 1;",
432 # we should not rematrialize this node. It produces 2 results and has
433 # very strict constrains
434 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
435 emit => '. mul%M %unop3',
436 outs => [ "EAX", "EDX", "M" ],
437 ins => [ "base", "index", "val_high", "val_low", "mem" ],
440 modified_flags => $status_flags
444 # we should not rematrialize this node. It produces 2 results and has
445 # very strict constrains
447 cmp_attr => "return 1;",
448 outs => [ "EAX", "EDX", "M" ],
454 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
455 emit => '. imul%M %binop',
459 modified_flags => $status_flags
464 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
465 emit => '. imul%M %unop3',
466 outs => [ "EAX", "EDX", "M" ],
467 ins => [ "base", "index", "val_high", "val_low", "mem" ],
470 modified_flags => $status_flags
474 # we should not rematrialize this node. It produces 2 results and has
475 # very strict constrains
477 cmp_attr => "return 1;",
478 outs => [ "EAX", "EDX", "M" ],
484 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
485 emit => '. and%M %binop',
488 modified_flags => $status_flags
493 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
494 emit => '. or%M %binop',
497 modified_flags => $status_flags
502 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
503 emit => '. xor%M %binop',
506 modified_flags => $status_flags
511 cmp_attr => "return 1;",
513 modified_flags => $status_flags
516 # not commutative operations
520 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
521 emit => '. sub%M %binop',
524 modified_flags => $status_flags
528 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
529 emit => '. sbb%M %binop',
532 modified_flags => $status_flags
538 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
545 outs => [ "low_res", "high_res" ],
547 modified_flags => $status_flags
552 cmp_attr => "return 1;",
557 cmp_attr => "return 1;",
563 state => "exc_pinned",
564 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
565 attr => "ia32_op_flavour_t dm_flav",
566 init_attr => "attr->data.op_flav = dm_flav;",
567 emit => ". idiv%M %unop4",
568 outs => [ "div_res", "mod_res", "M" ],
571 modified_flags => $status_flags
576 state => "exc_pinned",
577 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
578 attr => "ia32_op_flavour_t dm_flav",
579 init_attr => "attr->data.op_flav = dm_flav;",
580 emit => ". div%M %unop4",
581 outs => [ "div_res", "mod_res", "M" ],
584 modified_flags => $status_flags
589 # "in_r3" would be enough as out requirement, but the register allocator
590 # does strange things then and doesn't respect the constraint for in4
591 # if the same value is attached to in3 and in4 (if you have "i << i" in C)
592 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
593 ins => [ "base", "index", "left", "right", "mem" ],
594 emit => '. shl%M %binop',
597 modified_flags => $status_flags
601 cmp_attr => "return 1;",
602 # value, cnt, dependency
607 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
609 # Out requirements is: different from all in
610 # This is because, out must be different from LowPart and ShiftCount.
611 # We could say "!ecx !in_r4" but it can occur, that all values live through
612 # this Shift and the only value dying is the ShiftCount. Then there would be a
613 # register missing, as result must not be ecx and all other registers are
614 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
615 # (and probably never will). So we create artificial interferences of the result
616 # with all inputs, so the spiller can always assure a free register.
617 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
620 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r5" ] },
623 if (get_ia32_immop_type(node) == ia32_ImmNone) {
624 if (get_ia32_op_type(node) == ia32_AddrModeD) {
625 . shld%M %%cl, %S3, %AM
627 . shld%M %%cl, %S3, %S2
630 if (get_ia32_op_type(node) == ia32_AddrModeD) {
631 . shld%M %C, %S3, %AM
633 . shld%M %C, %S3, %S2
640 modified_flags => $status_flags
644 cmp_attr => "return 1;",
650 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
651 emit => '. shr%M %binop',
654 modified_flags => $status_flags
658 cmp_attr => "return 1;",
659 # value, cnt, dependency
664 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
666 # Out requirements is: different from all in
667 # This is because, out must be different from LowPart and ShiftCount.
668 # We could say "!ecx !in_r4" but it can occur, that all values live through
669 # this Shift and the only value dying is the ShiftCount. Then there would be a
670 # register missing, as result must not be ecx and all other registers are
671 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
672 # (and probably never will). So we create artificial interferences of the result
673 # with all inputs, so the spiller can always assure a free register.
674 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
677 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r5" ] },
679 if (get_ia32_immop_type(node) == ia32_ImmNone) {
680 if (get_ia32_op_type(node) == ia32_AddrModeD) {
681 . shrd%M %%cl, %S3, %AM
683 . shrd%M %%cl, %S3, %S2
686 if (get_ia32_op_type(node) == ia32_AddrModeD) {
687 . shrd%M %C, %S3, %AM
689 . shrd%M %C, %S3, %S2
696 modified_flags => $status_flags
700 cmp_attr => "return 1;",
706 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
707 emit => '. sar%M %binop',
710 modified_flags => $status_flags
714 cmp_attr => "return 1;",
720 cmp_attr => "return 1;",
721 # value, cnt, dependency
727 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
728 emit => '. ror%M %binop',
731 modified_flags => $status_flags
736 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
737 emit => '. rol%M %binop',
740 modified_flags => $status_flags
747 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
748 emit => '. neg%M %unop2',
749 ins => [ "base", "index", "val", "mem" ],
752 modified_flags => $status_flags
757 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
764 outs => [ "low_res", "high_res" ],
766 modified_flags => $status_flags
771 cmp_attr => "return 1;",
777 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
778 emit => '. inc%M %unop2',
781 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
786 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
787 emit => '. dec%M %unop2',
790 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
795 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
796 ins => [ "base", "index", "val", "mem" ],
797 emit => '. not%M %unop2',
808 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
809 out => [ "none", "none"] },
810 ins => [ "base", "index", "left", "right", "mem" ],
811 outs => [ "false", "true" ],
813 init_attr => "attr->pn_code = pnc;",
815 units => [ "BRANCH" ],
821 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
822 out => [ "none", "none" ] },
823 ins => [ "base", "index", "left", "right", "mem" ],
824 outs => [ "false", "true" ],
826 init_attr => "attr->pn_code = pnc;",
828 units => [ "BRANCH" ],
834 reg_req => { in => [ "gp" ], out => [ "none" ] },
836 units => [ "BRANCH" ],
843 reg_req => { in => [ "gp", "gp", "gp", "none" ] },
844 ins => [ "base", "index", "val", "mem" ],
845 emit => '. jmp *%unop2',
846 units => [ "BRANCH" ],
854 reg_req => { out => [ "gp" ] },
863 reg_req => { out => [ "gp_UKNWN" ] },
873 reg_req => { out => [ "vfp_UKNWN" ] },
877 attr_type => "ia32_x87_attr_t",
884 reg_req => { out => [ "xmm_UKNWN" ] },
894 reg_req => { out => [ "gp_NOREG" ] },
904 reg_req => { out => [ "vfp_NOREG" ] },
908 attr_type => "ia32_x87_attr_t",
915 reg_req => { out => [ "xmm_NOREG" ] },
925 reg_req => { out => [ "fp_cw" ] },
929 modified_flags => $fpcw_flags
935 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
937 emit => ". fldcw %AM",
940 modified_flags => $fpcw_flags
946 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
948 emit => ". fnstcw %AM",
954 # we should not rematrialize this node. It produces 2 results and has
955 # very strict constrains
956 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
957 ins => [ "val", "globbered" ],
965 # Note that we add additional latency values depending on address mode, so a
966 # lateny of 0 for load is correct
970 state => "exc_pinned",
971 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
972 ins => [ "base", "index", "mem" ],
973 outs => [ "res", "M" ],
975 emit => ". mov%SE%ME%.l %AM, %D0",
981 cmp_attr => "return 1;",
982 outs => [ "res", "M" ],
988 cmp_attr => "return 1;",
989 state => "exc_pinned",
996 state => "exc_pinned",
997 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
998 ins => [ "base", "index", "val", "mem" ],
999 emit => '. mov%M %binop',
1007 state => "exc_pinned",
1008 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
1009 emit => '. mov%M %binop',
1017 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1018 emit => '. leal %AM, %D0',
1022 modified_flags => [],
1026 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
1027 emit => '. push%M %unop2',
1028 ins => [ "base", "index", "val", "stack", "mem" ],
1029 outs => [ "stack:I|S", "M" ],
1032 modified_flags => [],
1036 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
1037 emit => '. pop%M %DAM1',
1038 outs => [ "stack:I|S", "res", "M" ],
1039 ins => [ "base", "index", "stack", "mem" ],
1040 latency => 3, # Pop is more expensive than Push on Athlon
1042 modified_flags => [],
1046 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1048 outs => [ "frame:I", "stack:I|S", "M" ],
1054 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1056 outs => [ "frame:I", "stack:I|S" ],
1064 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1065 emit => '. addl %binop',
1066 outs => [ "stack:S", "M" ],
1068 modified_flags => $status_flags
1074 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "gp", "none" ] },
1075 emit => ". subl %binop\n".
1076 ". movl %%esp, %D1",
1077 outs => [ "stack:I|S", "addr", "M" ],
1079 modified_flags => $status_flags
1084 reg_req => { out => [ "gp" ] },
1088 # the int instruction
1090 reg_req => { in => [ "none" ], out => [ "none" ] },
1092 attr => "tarval *tv",
1093 init_attr => "\tset_ia32_Immop_tarval(res, tv);",
1096 cmp_attr => "return 1;",
1100 #-----------------------------------------------------------------------------#
1101 # _____ _____ ______ __ _ _ _ #
1102 # / ____/ ____| ____| / _| | | | | | #
1103 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1104 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1105 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1106 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1107 #-----------------------------------------------------------------------------#
1109 # commutative operations
1113 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1114 emit => '. add%XXM %binop',
1122 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1123 emit => '. mul%XXM %binop',
1131 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1132 emit => '. max%XXM %binop',
1140 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1141 emit => '. min%XXM %binop',
1149 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1150 emit => '. andp%XSD %binop',
1158 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1159 emit => '. orp%XSD %binop',
1166 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1167 emit => '. xorp%XSD %binop',
1173 # not commutative operations
1177 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1178 emit => '. andnp%XSD %binop',
1186 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1187 emit => '. sub%XXM %binop',
1195 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1196 outs => [ "res", "M" ],
1197 emit => '. div%XXM %binop',
1206 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1214 op_flags => "L|X|Y",
1215 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1216 ins => [ "base", "index", "left", "right", "mem" ],
1217 outs => [ "false", "true" ],
1219 init_attr => "attr->pn_code = pnc;",
1227 reg_req => { out => [ "xmm" ] },
1228 emit => '. mov%XXM %C, %D0',
1238 state => "exc_pinned",
1239 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1240 emit => '. mov%XXM %AM, %D0',
1241 outs => [ "res", "M" ],
1248 state => "exc_pinned",
1249 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1250 emit => '. mov%XXM %binop',
1258 state => "exc_pinned",
1259 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1260 ins => [ "base", "index", "val", "mem" ],
1261 emit => '. mov%XXM %S2, %AM',
1269 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1270 emit => '. cvtsi2ss %D0, %AM',
1278 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1279 emit => '. cvtsi2sd %unop2',
1288 cmp_attr => "return 1;",
1294 cmp_attr => "return 1;",
1303 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1304 outs => [ "DST", "SRC", "CNT", "M" ],
1306 modified_flags => [ "DF" ]
1312 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1313 outs => [ "DST", "SRC", "M" ],
1315 modified_flags => [ "DF" ]
1321 state => "exc_pinned",
1322 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1324 ins => [ "base", "index", "val", "mem" ],
1325 attr => "ir_mode *smaller_mode",
1326 init_attr => "attr->ls_mode = smaller_mode;",
1328 modified_flags => $status_flags
1332 state => "exc_pinned",
1333 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1334 ins => [ "base", "index", "val", "mem" ],
1336 attr => "ir_mode *smaller_mode",
1337 init_attr => "attr->ls_mode = smaller_mode;",
1339 modified_flags => $status_flags
1343 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1350 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1357 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1365 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1366 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1367 attr => "pn_Cmp pn_code",
1368 init_attr => "attr->pn_code = pn_code;",
1376 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1377 out => [ "in_r7" ] },
1378 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1380 attr => "pn_Cmp pn_code",
1381 init_attr => "attr->pn_code = pn_code;",
1389 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1397 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "gp", "gp" ],
1398 out => [ "in_r7" ] },
1399 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1402 units => [ "VFP", "GP" ],
1404 attr_type => "ia32_x87_attr_t",
1409 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1410 out => [ "eax ebx ecx edx" ] },
1411 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1412 attr => "pn_Cmp pn_code",
1413 init_attr => "attr->pn_code = pn_code;",
1421 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1422 out => [ "eax ebx ecx edx" ] },
1423 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1424 attr => "pn_Cmp pn_code",
1425 init_attr => "attr->pn_code = pn_code;",
1433 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1441 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1445 attr_type => "ia32_x87_attr_t",
1450 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1454 attr_type => "ia32_x87_attr_t",
1457 #----------------------------------------------------------#
1459 # (_) | | | | / _| | | | #
1460 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1461 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1462 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1463 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1465 # _ __ ___ __| | ___ ___ #
1466 # | '_ \ / _ \ / _` |/ _ \/ __| #
1467 # | | | | (_) | (_| | __/\__ \ #
1468 # |_| |_|\___/ \__,_|\___||___/ #
1469 #----------------------------------------------------------#
1473 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1474 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1478 attr_type => "ia32_x87_attr_t",
1483 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1484 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1488 attr_type => "ia32_x87_attr_t",
1493 cmp_attr => "return 1;",
1499 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1500 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1504 attr_type => "ia32_x87_attr_t",
1508 cmp_attr => "return 1;",
1513 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
1514 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1515 outs => [ "res", "M" ],
1518 attr_type => "ia32_x87_attr_t",
1522 cmp_attr => "return 1;",
1523 outs => [ "res", "M" ],
1528 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1529 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1533 attr_type => "ia32_x87_attr_t",
1537 cmp_attr => "return 1;",
1543 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1548 attr_type => "ia32_x87_attr_t",
1553 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1558 attr_type => "ia32_x87_attr_t",
1561 # virtual Load and Store
1565 state => "exc_pinned",
1566 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1567 ins => [ "base", "index", "mem" ],
1568 outs => [ "res", "M" ],
1569 attr => "ir_mode *store_mode",
1570 init_attr => "attr->attr.ls_mode = store_mode;",
1573 attr_type => "ia32_x87_attr_t",
1578 state => "exc_pinned",
1579 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1580 ins => [ "base", "index", "val", "mem" ],
1581 attr => "ir_mode *store_mode",
1582 init_attr => "attr->attr.ls_mode = store_mode;",
1586 attr_type => "ia32_x87_attr_t",
1592 state => "exc_pinned",
1593 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1594 outs => [ "res", "M" ],
1595 ins => [ "base", "index", "mem" ],
1598 attr_type => "ia32_x87_attr_t",
1602 cmp_attr => "return 1;",
1603 outs => [ "res", "M" ],
1608 state => "exc_pinned",
1609 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1610 ins => [ "base", "index", "val", "fpcw", "mem" ],
1614 attr_type => "ia32_x87_attr_t",
1618 cmp_attr => "return 1;",
1619 state => "exc_pinned",
1629 reg_req => { out => [ "vfp" ] },
1633 attr_type => "ia32_x87_attr_t",
1638 reg_req => { out => [ "vfp" ] },
1642 attr_type => "ia32_x87_attr_t",
1647 reg_req => { out => [ "vfp" ] },
1651 attr_type => "ia32_x87_attr_t",
1656 reg_req => { out => [ "vfp" ] },
1660 attr_type => "ia32_x87_attr_t",
1665 reg_req => { out => [ "vfp" ] },
1669 attr_type => "ia32_x87_attr_t",
1674 reg_req => { out => [ "vfp" ] },
1678 attr_type => "ia32_x87_attr_t",
1683 reg_req => { out => [ "vfp" ] },
1687 attr_type => "ia32_x87_attr_t",
1693 reg_req => { out => [ "vfp" ] },
1697 attr_type => "ia32_x87_attr_t",
1704 op_flags => "L|X|Y",
1705 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1706 ins => [ "left", "right" ],
1707 outs => [ "false", "true", "temp_reg_eax" ],
1709 init_attr => "attr->attr.pn_code = pnc;",
1712 attr_type => "ia32_x87_attr_t",
1715 #------------------------------------------------------------------------#
1716 # ___ _____ __ _ _ _ #
1717 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1718 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1719 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1720 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1721 #------------------------------------------------------------------------#
1723 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1724 # are swapped, we work this around in the emitter...
1728 rd_constructor => "NONE",
1730 emit => '. fadd%XM %x87_binop',
1731 attr_type => "ia32_x87_attr_t",
1736 rd_constructor => "NONE",
1738 emit => '. faddp%XM %x87_binop',
1739 attr_type => "ia32_x87_attr_t",
1744 rd_constructor => "NONE",
1746 emit => '. fmul%XM %x87_binop',
1747 attr_type => "ia32_x87_attr_t",
1752 rd_constructor => "NONE",
1754 emit => '. fmulp%XM %x87_binop',,
1755 attr_type => "ia32_x87_attr_t",
1760 rd_constructor => "NONE",
1762 emit => '. fsub%XM %x87_binop',
1763 attr_type => "ia32_x87_attr_t",
1768 rd_constructor => "NONE",
1770 # see note about gas bugs
1771 emit => '. fsubrp%XM %x87_binop',
1772 attr_type => "ia32_x87_attr_t",
1777 rd_constructor => "NONE",
1780 emit => '. fsubr%XM %x87_binop',
1781 attr_type => "ia32_x87_attr_t",
1786 rd_constructor => "NONE",
1789 # see note about gas bugs
1790 emit => '. fsubp%XM %x87_binop',
1791 attr_type => "ia32_x87_attr_t",
1796 rd_constructor => "NONE",
1799 attr_type => "ia32_x87_attr_t",
1802 # this node is just here, to keep the simulator running
1803 # we can omit this when a fprem simulation function exists
1806 rd_constructor => "NONE",
1809 attr_type => "ia32_x87_attr_t",
1814 rd_constructor => "NONE",
1816 emit => '. fdiv%XM %x87_binop',
1817 attr_type => "ia32_x87_attr_t",
1822 rd_constructor => "NONE",
1824 # see note about gas bugs
1825 emit => '. fdivrp%XM %x87_binop',
1826 attr_type => "ia32_x87_attr_t",
1831 rd_constructor => "NONE",
1833 emit => '. fdivr%XM %x87_binop',
1834 attr_type => "ia32_x87_attr_t",
1839 rd_constructor => "NONE",
1841 # see note about gas bugs
1842 emit => '. fdivp%XM %x87_binop',
1843 attr_type => "ia32_x87_attr_t",
1848 rd_constructor => "NONE",
1851 attr_type => "ia32_x87_attr_t",
1856 rd_constructor => "NONE",
1859 attr_type => "ia32_x87_attr_t",
1862 # x87 Load and Store
1865 rd_constructor => "NONE",
1866 op_flags => "R|L|F",
1867 state => "exc_pinned",
1869 emit => '. fld%XM %AM',
1870 attr_type => "ia32_x87_attr_t",
1874 rd_constructor => "NONE",
1875 op_flags => "R|L|F",
1876 state => "exc_pinned",
1878 emit => '. fst%XM %AM',
1880 attr_type => "ia32_x87_attr_t",
1884 rd_constructor => "NONE",
1885 op_flags => "R|L|F",
1886 state => "exc_pinned",
1888 emit => '. fstp%XM %AM',
1890 attr_type => "ia32_x87_attr_t",
1897 rd_constructor => "NONE",
1899 emit => '. fild%M %AM',
1900 attr_type => "ia32_x87_attr_t",
1905 state => "exc_pinned",
1906 rd_constructor => "NONE",
1908 emit => '. fist%M %AM',
1910 attr_type => "ia32_x87_attr_t",
1915 state => "exc_pinned",
1916 rd_constructor => "NONE",
1918 emit => '. fistp%M %AM',
1920 attr_type => "ia32_x87_attr_t",
1926 op_flags => "R|c|K",
1930 attr_type => "ia32_x87_attr_t",
1934 op_flags => "R|c|K",
1938 attr_type => "ia32_x87_attr_t",
1942 op_flags => "R|c|K",
1946 attr_type => "ia32_x87_attr_t",
1950 op_flags => "R|c|K",
1954 attr_type => "ia32_x87_attr_t",
1958 op_flags => "R|c|K",
1962 attr_type => "ia32_x87_attr_t",
1966 op_flags => "R|c|K",
1969 emit => '. fldll2t',
1970 attr_type => "ia32_x87_attr_t",
1974 op_flags => "R|c|K",
1978 attr_type => "ia32_x87_attr_t",
1982 # Note that it is NEVER allowed to do CSE on these nodes
1983 # Moreover, note the virtual register requierements!
1988 cmp_attr => "return 1;",
1989 emit => '. fxch %X0',
1990 attr_type => "ia32_x87_attr_t",
1996 cmp_attr => "return 1;",
1997 emit => '. fld %X0',
1998 attr_type => "ia32_x87_attr_t",
2003 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2004 cmp_attr => "return 1;",
2005 emit => '. fld %X0',
2006 attr_type => "ia32_x87_attr_t",
2012 cmp_attr => "return 1;",
2013 emit => '. fstp %X0',
2014 attr_type => "ia32_x87_attr_t",
2020 op_flags => "L|X|Y",
2022 attr_type => "ia32_x87_attr_t",
2026 op_flags => "L|X|Y",
2028 attr_type => "ia32_x87_attr_t",
2032 op_flags => "L|X|Y",
2034 attr_type => "ia32_x87_attr_t",
2038 op_flags => "L|X|Y",
2040 attr_type => "ia32_x87_attr_t",
2044 op_flags => "L|X|Y",
2046 attr_type => "ia32_x87_attr_t",
2050 op_flags => "L|X|Y",
2052 attr_type => "ia32_x87_attr_t",
2056 # -------------------------------------------------------------------------------- #
2057 # ____ ____ _____ _ _ #
2058 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2059 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2060 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2061 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2063 # -------------------------------------------------------------------------------- #
2066 # Spilling and reloading of SSE registers, hardcoded, not generated #
2070 state => "exc_pinned",
2071 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2072 emit => '. movdqu %D0, %AM',
2073 outs => [ "res", "M" ],
2079 state => "exc_pinned",
2080 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2081 emit => '. movdqu %binop',
2088 # Include the generated SIMD node specification written by the SIMD optimization
2089 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2090 unless ($return = do $my_script_name) {
2091 warn "couldn't parse $my_script_name: $@" if $@;
2092 warn "couldn't do $my_script_name: $!" unless defined $return;
2093 warn "couldn't run $my_script_name" unless $return;