3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 SB1 => "${arch}_emit_8bit_source_register(env, node, 1);",
257 SB2 => "${arch}_emit_8bit_source_register(env, node, 2);",
258 SW0 => "${arch}_emit_16bit_source_register(env, node, 0);",
259 SI0 => "${arch}_emit_source_register_or_immediate(env, node, 0);",
260 SI1 => "${arch}_emit_source_register_or_immediate(env, node, 1);",
261 SI2 => "${arch}_emit_source_register_or_immediate(env, node, 2);",
262 SI3 => "${arch}_emit_source_register_or_immediate(env, node, 3);",
263 D0 => "${arch}_emit_dest_register(env, node, 0);",
264 D1 => "${arch}_emit_dest_register(env, node, 1);",
265 D2 => "${arch}_emit_dest_register(env, node, 2);",
266 D3 => "${arch}_emit_dest_register(env, node, 3);",
267 D4 => "${arch}_emit_dest_register(env, node, 4);",
268 D5 => "${arch}_emit_dest_register(env, node, 5);",
269 X0 => "${arch}_emit_x87_name(env, node, 0);",
270 X1 => "${arch}_emit_x87_name(env, node, 1);",
271 X2 => "${arch}_emit_x87_name(env, node, 2);",
272 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
273 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
274 ia32_emit_mode_suffix(env, node);",
275 M => "${arch}_emit_mode_suffix(env, node);",
276 XM => "${arch}_emit_x87_mode_suffix(env, node);",
277 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
278 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
279 AM => "${arch}_emit_am(env, node);",
280 unop0 => "${arch}_emit_unop(env, node, 0);",
281 unop1 => "${arch}_emit_unop(env, node, 1);",
282 unop2 => "${arch}_emit_unop(env, node, 2);",
283 unop3 => "${arch}_emit_unop(env, node, 3);",
284 unop4 => "${arch}_emit_unop(env, node, 4);",
285 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
286 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 0);",
287 binop => "${arch}_emit_binop(env, node);",
288 x87_binop => "${arch}_emit_x87_binop(env, node);",
291 #--------------------------------------------------#
294 # _ __ _____ __ _ _ __ ___ _ __ ___ #
295 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
296 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
297 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
300 #--------------------------------------------------#
302 $default_attr_type = "ia32_attr_t";
303 $default_copy_attr = "ia32_copy_attr";
305 sub ia32_custom_init_attr {
309 if(defined($node->{modified_flags})) {
310 $res .= "\t/*attr->data.flags |= arch_irn_flags_modify_flags;*/\n";
312 if(defined($node->{am})) {
313 my $am = $node->{am};
314 if($am eq "full,binary") {
315 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_binary);";
316 } elsif($am eq "full,unary") {
317 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_unary);";
318 } elsif($am eq "source,binary") {
319 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_binary);";
320 } elsif($am eq "dest,unary") {
321 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);";
322 } elsif($am eq "dest,binary") {
323 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);";
324 } elsif($am eq "dest,ternary") {
325 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);";
326 } elsif($am eq "source,ternary") {
327 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_ternary);";
328 } elsif($am eq "none") {
331 die("Invalid address mode '$am' specified on op $name");
336 $custom_init_attr_func = \&ia32_custom_init_attr;
339 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
341 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
342 "\tinit_ia32_x87_attributes(res);",
344 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
345 "\tinit_ia32_x87_attributes(res);".
346 "\tinit_ia32_asm_attributes(res);",
347 ia32_immediate_attr_t =>
348 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
349 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
353 ia32_attr_t => "ia32_compare_nodes_attr",
354 ia32_x87_attr_t => "ia32_compare_x87_attr",
355 ia32_asm_attr_t => "ia32_compare_asm_attr",
356 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
362 $mode_xmm = "mode_E";
363 $mode_gp = "mode_Iu";
364 $mode_fpcw = "mode_fpcw";
365 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
366 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
367 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
375 reg_req => { out => [ "gp_NOREG" ] },
376 attr => "ir_entity *symconst, int symconst_sign, long offset",
377 attr_type => "ia32_immediate_attr_t",
385 out_arity => "variable",
386 attr_type => "ia32_asm_attr_t",
393 reg_req => { out => [ "gp" ] },
398 cmp_attr => "return 1;",
401 #-----------------------------------------------------------------#
404 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
405 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
406 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
407 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
410 #-----------------------------------------------------------------#
412 # commutative operations
415 # All nodes supporting Addressmode have 5 INs:
416 # 1 - base r1 == NoReg in case of no AM or no base
417 # 2 - index r2 == NoReg in case of no AM or no index
418 # 3 - op1 r3 == always present
419 # 4 - op2 r4 == NoReg in case of immediate operation
420 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
424 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
425 ins => [ "base", "index", "left", "right", "mem" ],
426 emit => '. add%M %binop',
431 modified_flags => $status_flags
436 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
437 ins => [ "base", "index", "val", "mem" ],
438 emit => ". add%M %SI2, %AM",
441 modified_flags => $status_flags
445 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
446 emit => '. adc%M %binop',
450 modified_flags => $status_flags
456 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
463 outs => [ "low_res", "high_res" ],
465 modified_flags => $status_flags
471 cmp_attr => "return 1;",
477 cmp_attr => "return 1;",
482 # we should not rematrialize this node. It produces 2 results and has
483 # very strict constrains
484 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
485 emit => '. mul%M %unop3',
486 outs => [ "EAX", "EDX", "M" ],
487 ins => [ "base", "index", "val_high", "val_low", "mem" ],
488 am => "source,binary",
489 am => "source,binary",
492 modified_flags => $status_flags
496 # we should not rematrialize this node. It produces 2 results and has
497 # very strict constrains
499 cmp_attr => "return 1;",
500 outs => [ "EAX", "EDX", "M" ],
506 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
507 ins => [ "base", "index", "left", "right", "mem" ],
508 emit => '. imul%M %binop',
509 am => "source,binary",
513 modified_flags => $status_flags
518 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
519 emit => '. imul%M %unop3',
520 outs => [ "EAX", "EDX", "M" ],
521 ins => [ "base", "index", "val_high", "val_low", "mem" ],
522 am => "source,binary",
525 modified_flags => $status_flags
529 # we should not rematrialize this node. It produces 2 results and has
530 # very strict constrains
532 cmp_attr => "return 1;",
533 outs => [ "EAX", "EDX", "M" ],
539 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
540 ins => [ "base", "index", "left", "right", "mem" ],
542 emit => '. and%M %binop',
545 modified_flags => $status_flags
550 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
551 emit => '. and%M %SI2, %AM',
554 modified_flags => $status_flags
559 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
560 ins => [ "base", "index", "left", "right", "mem" ],
562 emit => '. or%M %binop',
565 modified_flags => $status_flags
570 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
571 ins => [ "base", "index", "val", "mem" ],
572 emit => '. or%M %SI2, %AM',
575 modified_flags => $status_flags
580 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
581 ins => [ "base", "index", "left", "right", "mem" ],
583 emit => '. xor%M %binop',
586 modified_flags => $status_flags
591 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
592 ins => [ "base", "index", "val", "mem" ],
593 emit => '. xor%M %SI2, %AM',
596 modified_flags => $status_flags
601 cmp_attr => "return 1;",
603 modified_flags => $status_flags
606 # not commutative operations
610 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
611 ins => [ "base", "index", "left", "right", "mem" ],
613 emit => '. sub%M %binop',
616 modified_flags => $status_flags
621 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
622 ins => [ "base", "index", "val", "mem" ],
623 emit => '. sub%M %SI2, %AM',
626 modified_flags => $status_flags
630 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
631 ins => [ "base", "index", "left", "right", "mem" ],
633 emit => '. sbb%M %binop',
636 modified_flags => $status_flags
642 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
649 outs => [ "low_res", "high_res" ],
651 modified_flags => $status_flags
656 cmp_attr => "return 1;",
661 cmp_attr => "return 1;",
667 state => "exc_pinned",
668 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ],
669 out => [ "eax", "edx", "none" ] },
670 ins => [ "base", "index", "left_low", "left_high", "right", "mem" ],
671 outs => [ "div_res", "mod_res", "M" ],
672 attr => "ia32_op_flavour_t dm_flav",
673 am => "source,ternary",
674 init_attr => "attr->data.op_flav = dm_flav;",
675 emit => ". idiv%M %unop4",
678 modified_flags => $status_flags
683 state => "exc_pinned",
684 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ],
685 out => [ "eax", "edx", "none" ] },
686 ins => [ "base", "index", "left_low", "left_high", "right", "mem" ],
687 outs => [ "div_res", "mod_res", "M" ],
688 attr => "ia32_op_flavour_t dm_flav",
689 am => "source,ternary",
690 init_attr => "attr->data.op_flav = dm_flav;",
691 emit => ". div%M %unop4",
694 modified_flags => $status_flags
699 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
700 ins => [ "left", "right" ],
703 emit => '. shl %SB1, %S0',
706 modified_flags => $status_flags
711 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
712 ins => [ "base", "index", "count", "mem" ],
713 emit => '. shl%M %SI2, %AM',
716 modified_flags => $status_flags
720 cmp_attr => "return 1;",
721 # value, cnt, dependency
726 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
728 # Out requirements is: different from all in
729 # This is because, out must be different from LowPart and ShiftCount.
730 # We could say "!ecx !in_r4" but it can occur, that all values live through
731 # this Shift and the only value dying is the ShiftCount. Then there would be a
732 # register missing, as result must not be ecx and all other registers are
733 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
734 # (and probably never will). So we create artificial interferences of the result
735 # with all inputs, so the spiller can always assure a free register.
736 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
739 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
740 ins => [ "left_high", "left_low", "right" ],
741 am => "dest,ternary",
742 emit => '. shld%M %SB2, %S1, %S0',
746 modified_flags => $status_flags
750 cmp_attr => "return 1;",
756 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
757 ins => [ "val", "count" ],
759 emit => '. shr %SB1, %S0',
762 modified_flags => $status_flags
767 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
768 ins => [ "base", "index", "count", "mem" ],
769 emit => '. shr%M %SI2, %AM',
772 modified_flags => $status_flags
776 cmp_attr => "return 1;",
777 # value, cnt, dependency
782 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
784 # Out requirements is: different from all in
785 # This is because, out must be different from LowPart and ShiftCount.
786 # We could say "!ecx !in_r4" but it can occur, that all values live through
787 # this Shift and the only value dying is the ShiftCount. Then there would be a
788 # register missing, as result must not be ecx and all other registers are
789 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
790 # (and probably never will). So we create artificial interferences of the result
791 # with all inputs, so the spiller can always assure a free register.
792 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
795 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
796 ins => [ "left_high", "left_low", "right" ],
797 am => "dest,ternary",
798 emit => '. shrd%M %SB2, %S1, %S0',
802 modified_flags => $status_flags
806 cmp_attr => "return 1;",
812 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
813 ins => [ "val", "count" ],
815 emit => '. sar %SB1, %S0',
818 modified_flags => $status_flags
823 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
824 ins => [ "base", "index", "count", "mem" ],
825 emit => '. sar%M %SI2, %AM',
828 modified_flags => $status_flags
832 cmp_attr => "return 1;",
838 cmp_attr => "return 1;",
839 # value, cnt, dependency
845 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
846 ins => [ "val", "count" ],
848 emit => '. ror %SB1, %S0',
851 modified_flags => $status_flags
856 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
857 ins => [ "base", "index", "count", "mem" ],
858 emit => '. ror%M %SI2, %AM',
861 modified_flags => $status_flags
866 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
867 ins => [ "val", "count" ],
869 emit => '. rol %SB1, %S0',
872 modified_flags => $status_flags
877 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
878 ins => [ "base", "index", "count", "mem" ],
879 emit => '. rol%M %SI2, %AM',
882 modified_flags => $status_flags
889 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
895 modified_flags => $status_flags
900 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
901 ins => [ "base", "index", "mem" ],
902 emit => '. neg%M %AM',
905 modified_flags => $status_flags
910 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "gp" ] },
911 outs => [ "low_res", "high_res" ],
913 modified_flags => $status_flags
918 cmp_attr => "return 1;",
924 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
929 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
934 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
935 ins => [ "base", "index", "mem" ],
936 emit => '. inc%M %AM',
939 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
944 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
949 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
954 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
955 ins => [ "base", "index", "mem" ],
956 emit => '. dec%M %AM',
959 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
964 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
975 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
976 ins => [ "base", "index", "mem" ],
977 emit => '. not%M %AM',
980 modified_flags => [],
988 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
989 out => [ "none", "none"] },
990 ins => [ "base", "index", "left", "right", "mem" ],
991 outs => [ "false", "true" ],
993 am => "source,binary",
994 init_attr => "attr->pn_code = pnc;",
996 units => [ "BRANCH" ],
1001 op_flags => "L|X|Y",
1002 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1004 out => [ "none", "none"] },
1005 ins => [ "base", "index", "left", "right", "mem" ],
1006 outs => [ "false", "true" ],
1008 am => "source,binary",
1009 init_attr => "attr->pn_code = pnc;",
1011 units => [ "BRANCH" ],
1016 op_flags => "L|X|Y",
1017 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1018 out => [ "none", "none" ] },
1019 ins => [ "base", "index", "left", "right", "mem" ],
1020 outs => [ "false", "true" ],
1022 am => "source,binary",
1023 init_attr => "attr->pn_code = pnc;",
1025 units => [ "BRANCH" ],
1030 op_flags => "L|X|Y",
1031 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1033 out => [ "none", "none" ] },
1034 ins => [ "base", "index", "left", "right", "mem" ],
1035 outs => [ "false", "true" ],
1037 am => "source,binary",
1038 init_attr => "attr->pn_code = pnc;",
1040 units => [ "BRANCH" ],
1045 op_flags => "L|X|Y",
1046 reg_req => { in => [ "gp" ], out => [ "none" ] },
1048 units => [ "BRANCH" ],
1055 reg_req => { in => [ "gp" ] },
1056 emit => '. jmp *%S0',
1057 units => [ "BRANCH" ],
1059 modified_flags => []
1065 reg_req => { out => [ "gp" ] },
1067 attr => "ir_entity *symconst, int symconst_sign, long offset",
1068 attr_type => "ia32_immediate_attr_t",
1076 reg_req => { out => [ "gp_UKNWN" ] },
1086 reg_req => { out => [ "vfp_UKNWN" ] },
1090 attr_type => "ia32_x87_attr_t",
1097 reg_req => { out => [ "xmm_UKNWN" ] },
1107 reg_req => { out => [ "gp_NOREG" ] },
1117 reg_req => { out => [ "vfp_NOREG" ] },
1121 attr_type => "ia32_x87_attr_t",
1128 reg_req => { out => [ "xmm_NOREG" ] },
1138 reg_req => { out => [ "fp_cw" ] },
1142 modified_flags => $fpcw_flags
1148 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
1149 ins => [ "base", "index", "mem" ],
1151 emit => ". fldcw %AM",
1154 modified_flags => $fpcw_flags
1160 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
1161 ins => [ "base", "index", "fpcw", "mem" ],
1163 emit => ". fnstcw %AM",
1169 # we should not rematrialize this node. It produces 2 results and has
1170 # very strict constrains
1171 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
1172 ins => [ "val", "globbered" ],
1180 # Note that we add additional latency values depending on address mode, so a
1181 # lateny of 0 for load is correct
1185 state => "exc_pinned",
1186 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
1187 ins => [ "base", "index", "mem" ],
1188 outs => [ "res", "M" ],
1190 emit => ". mov%SE%ME%.l %AM, %D0",
1196 cmp_attr => "return 1;",
1197 outs => [ "res", "M" ],
1203 cmp_attr => "return 1;",
1204 state => "exc_pinned",
1211 state => "exc_pinned",
1212 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
1213 ins => [ "base", "index", "val", "mem" ],
1214 emit => '. mov%M %SI2, %AM',
1222 state => "exc_pinned",
1223 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
1224 emit => '. mov%M %SB2, %AM',
1232 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1233 ins => [ "base", "index" ],
1234 emit => '. leal %AM, %D0',
1238 modified_flags => [],
1242 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
1243 emit => '. push%M %unop2',
1244 ins => [ "base", "index", "val", "stack", "mem" ],
1245 outs => [ "stack:I|S", "M" ],
1246 am => "source,binary",
1249 modified_flags => [],
1253 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
1254 emit => '. pop%M %DAM1',
1255 outs => [ "stack:I|S", "res", "M" ],
1256 ins => [ "base", "index", "stack", "mem" ],
1258 latency => 3, # Pop is more expensive than Push on Athlon
1260 modified_flags => [],
1264 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1266 outs => [ "frame:I", "stack:I|S", "M" ],
1272 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1274 outs => [ "frame:I", "stack:I|S" ],
1282 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1283 am => "source,binary",
1284 emit => '. addl %binop',
1285 outs => [ "stack:S", "M" ],
1287 modified_flags => $status_flags
1293 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "gp", "none" ] },
1294 am => "source,binary",
1295 emit => ". subl %binop\n".
1296 ". movl %%esp, %D1",
1297 outs => [ "stack:I|S", "addr", "M" ],
1299 modified_flags => $status_flags
1304 reg_req => { out => [ "gp" ] },
1308 # the int instruction
1310 reg_req => { in => [ "gp" ], out => [ "none" ] },
1312 emit => '. int %SI0',
1314 cmp_attr => "return 1;",
1318 #-----------------------------------------------------------------------------#
1319 # _____ _____ ______ __ _ _ _ #
1320 # / ____/ ____| ____| / _| | | | | | #
1321 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1322 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1323 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1324 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1325 #-----------------------------------------------------------------------------#
1329 reg_req => { out => [ "xmm" ] },
1330 emit => '. xorp%XSD %D1, %D1',
1336 # commutative operations
1340 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1341 emit => '. add%XXM %binop',
1349 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1350 emit => '. mul%XXM %binop',
1358 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1359 emit => '. max%XXM %binop',
1367 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1368 emit => '. min%XXM %binop',
1376 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1377 emit => '. andp%XSD %binop',
1385 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1386 emit => '. orp%XSD %binop',
1393 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1394 emit => '. xorp%XSD %binop',
1400 # not commutative operations
1404 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1405 emit => '. andnp%XSD %binop',
1413 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1414 emit => '. sub%XXM %binop',
1422 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1423 outs => [ "res", "M" ],
1424 emit => '. div%XXM %binop',
1433 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1441 op_flags => "L|X|Y",
1442 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1443 ins => [ "base", "index", "left", "right", "mem" ],
1444 outs => [ "false", "true" ],
1446 init_attr => "attr->pn_code = pnc;",
1455 state => "exc_pinned",
1456 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1457 emit => '. mov%XXM %AM, %D0',
1458 attr => "ir_mode *load_mode",
1459 init_attr => "attr->ls_mode = load_mode;",
1460 outs => [ "res", "M" ],
1467 state => "exc_pinned",
1468 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1469 emit => '. mov%XXM %S2, %AM',
1477 state => "exc_pinned",
1478 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1479 ins => [ "base", "index", "val", "mem" ],
1480 emit => '. mov%XXM %S2, %AM',
1488 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1489 emit => '. cvtsi2ss %D0, %AM',
1497 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1498 emit => '. cvtsi2sd %unop2',
1507 cmp_attr => "return 1;",
1513 cmp_attr => "return 1;",
1522 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1523 outs => [ "DST", "SRC", "CNT", "M" ],
1525 modified_flags => [ "DF" ]
1531 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1532 outs => [ "DST", "SRC", "M" ],
1534 modified_flags => [ "DF" ]
1540 state => "exc_pinned",
1541 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1543 ins => [ "base", "index", "val", "mem" ],
1544 attr => "ir_mode *smaller_mode",
1545 init_attr => "attr->ls_mode = smaller_mode;",
1547 modified_flags => $status_flags
1551 state => "exc_pinned",
1552 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1553 ins => [ "base", "index", "val", "mem" ],
1555 attr => "ir_mode *smaller_mode",
1556 init_attr => "attr->ls_mode = smaller_mode;",
1558 modified_flags => $status_flags
1562 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1569 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1576 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1584 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1585 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1586 attr => "pn_Cmp pn_code",
1587 init_attr => "attr->pn_code = pn_code;",
1595 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1596 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1597 attr => "pn_Cmp pn_code",
1598 init_attr => "attr->pn_code = pn_code;",
1606 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1607 out => [ "in_r7" ] },
1608 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1610 attr => "pn_Cmp pn_code",
1611 init_attr => "attr->pn_code = pn_code;",
1619 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1620 out => [ "in_r7" ] },
1621 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1623 attr => "pn_Cmp pn_code",
1624 init_attr => "attr->pn_code = pn_code;",
1632 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1640 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "gp", "gp" ],
1641 out => [ "in_r7" ] },
1642 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1645 units => [ "VFP", "GP" ],
1647 attr_type => "ia32_x87_attr_t",
1652 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1653 out => [ "eax ebx ecx edx" ] },
1654 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1655 attr => "pn_Cmp pn_code",
1656 init_attr => "attr->pn_code = pn_code;",
1664 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1666 out => [ "eax ebx ecx edx" ] },
1667 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1668 attr => "pn_Cmp pn_code",
1669 init_attr => "attr->pn_code = pn_code;",
1677 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1678 out => [ "eax ebx ecx edx" ] },
1679 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1680 attr => "pn_Cmp pn_code",
1681 init_attr => "attr->pn_code = pn_code;",
1689 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1691 out => [ "eax ebx ecx edx" ] },
1692 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1693 attr => "pn_Cmp pn_code",
1694 init_attr => "attr->pn_code = pn_code;",
1702 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1710 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1714 attr_type => "ia32_x87_attr_t",
1719 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1723 attr_type => "ia32_x87_attr_t",
1726 #----------------------------------------------------------#
1728 # (_) | | | | / _| | | | #
1729 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1730 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1731 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1732 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1734 # _ __ ___ __| | ___ ___ #
1735 # | '_ \ / _ \ / _` |/ _ \/ __| #
1736 # | | | | (_) | (_| | __/\__ \ #
1737 # |_| |_|\___/ \__,_|\___||___/ #
1738 #----------------------------------------------------------#
1742 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1743 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1747 attr_type => "ia32_x87_attr_t",
1752 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1753 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1757 attr_type => "ia32_x87_attr_t",
1762 cmp_attr => "return 1;",
1768 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1769 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1773 attr_type => "ia32_x87_attr_t",
1777 cmp_attr => "return 1;",
1782 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
1783 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1784 outs => [ "res", "M" ],
1787 attr_type => "ia32_x87_attr_t",
1791 cmp_attr => "return 1;",
1792 outs => [ "res", "M" ],
1797 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1798 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1802 attr_type => "ia32_x87_attr_t",
1806 cmp_attr => "return 1;",
1812 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1817 attr_type => "ia32_x87_attr_t",
1822 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1827 attr_type => "ia32_x87_attr_t",
1830 # virtual Load and Store
1834 state => "exc_pinned",
1835 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1836 ins => [ "base", "index", "mem" ],
1837 outs => [ "res", "M" ],
1838 attr => "ir_mode *load_mode",
1839 init_attr => "attr->attr.ls_mode = load_mode;",
1842 attr_type => "ia32_x87_attr_t",
1847 state => "exc_pinned",
1848 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1849 ins => [ "base", "index", "val", "mem" ],
1850 attr => "ir_mode *store_mode",
1851 init_attr => "attr->attr.ls_mode = store_mode;",
1855 attr_type => "ia32_x87_attr_t",
1861 state => "exc_pinned",
1862 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1863 outs => [ "res", "M" ],
1864 ins => [ "base", "index", "mem" ],
1867 attr_type => "ia32_x87_attr_t",
1871 cmp_attr => "return 1;",
1872 outs => [ "res", "M" ],
1877 state => "exc_pinned",
1878 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1879 ins => [ "base", "index", "val", "fpcw", "mem" ],
1883 attr_type => "ia32_x87_attr_t",
1887 cmp_attr => "return 1;",
1888 state => "exc_pinned",
1898 reg_req => { out => [ "vfp" ] },
1902 attr_type => "ia32_x87_attr_t",
1907 reg_req => { out => [ "vfp" ] },
1911 attr_type => "ia32_x87_attr_t",
1916 reg_req => { out => [ "vfp" ] },
1920 attr_type => "ia32_x87_attr_t",
1925 reg_req => { out => [ "vfp" ] },
1929 attr_type => "ia32_x87_attr_t",
1934 reg_req => { out => [ "vfp" ] },
1938 attr_type => "ia32_x87_attr_t",
1943 reg_req => { out => [ "vfp" ] },
1947 attr_type => "ia32_x87_attr_t",
1952 reg_req => { out => [ "vfp" ] },
1956 attr_type => "ia32_x87_attr_t",
1963 op_flags => "L|X|Y",
1964 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1965 ins => [ "left", "right" ],
1966 outs => [ "false", "true", "temp_reg_eax" ],
1968 init_attr => "attr->attr.pn_code = pnc;",
1971 attr_type => "ia32_x87_attr_t",
1974 #------------------------------------------------------------------------#
1975 # ___ _____ __ _ _ _ #
1976 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1977 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1978 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1979 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1980 #------------------------------------------------------------------------#
1982 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1983 # are swapped, we work this around in the emitter...
1987 rd_constructor => "NONE",
1989 emit => '. fadd%XM %x87_binop',
1990 attr_type => "ia32_x87_attr_t",
1995 rd_constructor => "NONE",
1997 emit => '. faddp%XM %x87_binop',
1998 attr_type => "ia32_x87_attr_t",
2003 rd_constructor => "NONE",
2005 emit => '. fmul%XM %x87_binop',
2006 attr_type => "ia32_x87_attr_t",
2011 rd_constructor => "NONE",
2013 emit => '. fmulp%XM %x87_binop',,
2014 attr_type => "ia32_x87_attr_t",
2019 rd_constructor => "NONE",
2021 emit => '. fsub%XM %x87_binop',
2022 attr_type => "ia32_x87_attr_t",
2027 rd_constructor => "NONE",
2029 # see note about gas bugs
2030 emit => '. fsubrp%XM %x87_binop',
2031 attr_type => "ia32_x87_attr_t",
2036 rd_constructor => "NONE",
2039 emit => '. fsubr%XM %x87_binop',
2040 attr_type => "ia32_x87_attr_t",
2045 rd_constructor => "NONE",
2048 # see note about gas bugs
2049 emit => '. fsubp%XM %x87_binop',
2050 attr_type => "ia32_x87_attr_t",
2055 rd_constructor => "NONE",
2058 attr_type => "ia32_x87_attr_t",
2061 # this node is just here, to keep the simulator running
2062 # we can omit this when a fprem simulation function exists
2065 rd_constructor => "NONE",
2068 attr_type => "ia32_x87_attr_t",
2073 rd_constructor => "NONE",
2075 emit => '. fdiv%XM %x87_binop',
2076 attr_type => "ia32_x87_attr_t",
2081 rd_constructor => "NONE",
2083 # see note about gas bugs
2084 emit => '. fdivrp%XM %x87_binop',
2085 attr_type => "ia32_x87_attr_t",
2090 rd_constructor => "NONE",
2092 emit => '. fdivr%XM %x87_binop',
2093 attr_type => "ia32_x87_attr_t",
2098 rd_constructor => "NONE",
2100 # see note about gas bugs
2101 emit => '. fdivp%XM %x87_binop',
2102 attr_type => "ia32_x87_attr_t",
2107 rd_constructor => "NONE",
2110 attr_type => "ia32_x87_attr_t",
2115 rd_constructor => "NONE",
2118 attr_type => "ia32_x87_attr_t",
2121 # x87 Load and Store
2124 rd_constructor => "NONE",
2125 op_flags => "R|L|F",
2126 state => "exc_pinned",
2128 emit => '. fld%XM %AM',
2129 attr_type => "ia32_x87_attr_t",
2133 rd_constructor => "NONE",
2134 op_flags => "R|L|F",
2135 state => "exc_pinned",
2137 emit => '. fst%XM %AM',
2139 attr_type => "ia32_x87_attr_t",
2143 rd_constructor => "NONE",
2144 op_flags => "R|L|F",
2145 state => "exc_pinned",
2147 emit => '. fstp%XM %AM',
2149 attr_type => "ia32_x87_attr_t",
2156 rd_constructor => "NONE",
2158 emit => '. fild%M %AM',
2159 attr_type => "ia32_x87_attr_t",
2164 state => "exc_pinned",
2165 rd_constructor => "NONE",
2167 emit => '. fist%M %AM',
2169 attr_type => "ia32_x87_attr_t",
2174 state => "exc_pinned",
2175 rd_constructor => "NONE",
2177 emit => '. fistp%M %AM',
2179 attr_type => "ia32_x87_attr_t",
2185 op_flags => "R|c|K",
2189 attr_type => "ia32_x87_attr_t",
2193 op_flags => "R|c|K",
2197 attr_type => "ia32_x87_attr_t",
2201 op_flags => "R|c|K",
2205 attr_type => "ia32_x87_attr_t",
2209 op_flags => "R|c|K",
2213 attr_type => "ia32_x87_attr_t",
2217 op_flags => "R|c|K",
2221 attr_type => "ia32_x87_attr_t",
2225 op_flags => "R|c|K",
2228 emit => '. fldll2t',
2229 attr_type => "ia32_x87_attr_t",
2233 op_flags => "R|c|K",
2237 attr_type => "ia32_x87_attr_t",
2241 # Note that it is NEVER allowed to do CSE on these nodes
2242 # Moreover, note the virtual register requierements!
2247 cmp_attr => "return 1;",
2248 emit => '. fxch %X0',
2249 attr_type => "ia32_x87_attr_t",
2255 cmp_attr => "return 1;",
2256 emit => '. fld %X0',
2257 attr_type => "ia32_x87_attr_t",
2262 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2263 cmp_attr => "return 1;",
2264 emit => '. fld %X0',
2265 attr_type => "ia32_x87_attr_t",
2271 cmp_attr => "return 1;",
2272 emit => '. fstp %X0',
2273 attr_type => "ia32_x87_attr_t",
2279 op_flags => "L|X|Y",
2281 attr_type => "ia32_x87_attr_t",
2285 op_flags => "L|X|Y",
2287 attr_type => "ia32_x87_attr_t",
2291 op_flags => "L|X|Y",
2293 attr_type => "ia32_x87_attr_t",
2297 op_flags => "L|X|Y",
2299 attr_type => "ia32_x87_attr_t",
2303 op_flags => "L|X|Y",
2305 attr_type => "ia32_x87_attr_t",
2309 op_flags => "L|X|Y",
2311 attr_type => "ia32_x87_attr_t",
2315 # -------------------------------------------------------------------------------- #
2316 # ____ ____ _____ _ _ #
2317 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2318 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2319 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2320 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2322 # -------------------------------------------------------------------------------- #
2325 # Spilling and reloading of SSE registers, hardcoded, not generated #
2329 state => "exc_pinned",
2330 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2331 emit => '. movdqu %D0, %AM',
2332 outs => [ "res", "M" ],
2338 state => "exc_pinned",
2339 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2340 emit => '. movdqu %binop',
2347 # Include the generated SIMD node specification written by the SIMD optimization
2348 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2349 unless ($return = do $my_script_name) {
2350 warn "couldn't parse $my_script_name: $@" if $@;
2351 warn "couldn't do $my_script_name: $!" unless defined $return;
2352 warn "couldn't run $my_script_name" unless $return;