3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "edx", type => 1 },
114 { name => "ecx", type => 1 },
115 { name => "eax", type => 1 },
116 { name => "ebx", type => 2 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
134 { mode => "mode_E", flags => "manual_ra" }
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
171 { mode => "mode_E", flags => "manual_ra" }
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4|32 },
175 { mode => "mode_fpcw", flags => "manual_ra|state" }
178 { name => "eflags", type => 0 },
179 { mode => "mode_Iu", flags => "manual_ra" }
184 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
185 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
186 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
187 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
192 bundels_per_cycle => 1
196 S0 => "${arch}_emit_source_register(node, 0);",
197 S1 => "${arch}_emit_source_register(node, 1);",
198 S2 => "${arch}_emit_source_register(node, 2);",
199 S3 => "${arch}_emit_source_register(node, 3);",
200 S4 => "${arch}_emit_source_register(node, 4);",
201 S5 => "${arch}_emit_source_register(node, 5);",
202 SB1 => "${arch}_emit_8bit_source_register_or_immediate(node, 1);",
203 SB2 => "${arch}_emit_8bit_source_register_or_immediate(node, 2);",
204 SB3 => "${arch}_emit_8bit_source_register_or_immediate(node, 3);",
205 SI0 => "${arch}_emit_source_register_or_immediate(node, 0);",
206 SI1 => "${arch}_emit_source_register_or_immediate(node, 1);",
207 SI2 => "${arch}_emit_source_register_or_immediate(node, 2);",
208 SI3 => "${arch}_emit_source_register_or_immediate(node, 3);",
209 D0 => "${arch}_emit_dest_register(node, 0);",
210 D1 => "${arch}_emit_dest_register(node, 1);",
211 D2 => "${arch}_emit_dest_register(node, 2);",
212 D3 => "${arch}_emit_dest_register(node, 3);",
213 D4 => "${arch}_emit_dest_register(node, 4);",
214 D5 => "${arch}_emit_dest_register(node, 5);",
215 DB0 => "${arch}_emit_8bit_dest_register(node, 0);",
216 X0 => "${arch}_emit_x87_register(node, 0);",
217 X1 => "${arch}_emit_x87_register(node, 1);",
218 X2 => "${arch}_emit_x87_register(node, 2);",
219 SE => "${arch}_emit_extend_suffix(get_ia32_ls_mode(node));",
220 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
221 ia32_emit_mode_suffix(node);",
222 M => "${arch}_emit_mode_suffix(node);",
223 XM => "${arch}_emit_x87_mode_suffix(node);",
224 XXM => "${arch}_emit_xmm_mode_suffix(node);",
225 XSD => "${arch}_emit_xmm_mode_suffix_s(node);",
226 AM => "${arch}_emit_am(node);",
227 unop0 => "${arch}_emit_unop(node, 0);",
228 unop1 => "${arch}_emit_unop(node, 1);",
229 unop2 => "${arch}_emit_unop(node, 2);",
230 unop3 => "${arch}_emit_unop(node, 3);",
231 unop4 => "${arch}_emit_unop(node, 4);",
232 unop5 => "${arch}_emit_unop(node, 5);",
233 DAM0 => "${arch}_emit_am_or_dest_register(node, 0);",
234 DAM1 => "${arch}_emit_am_or_dest_register(node, 1);",
235 binop => "${arch}_emit_binop(node);",
236 x87_binop => "${arch}_emit_x87_binop(node);",
237 CMP0 => "${arch}_emit_cmp_suffix_node(node, 0);",
240 #--------------------------------------------------#
243 # _ __ _____ __ _ _ __ ___ _ __ ___ #
244 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
245 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
246 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
249 #--------------------------------------------------#
251 $default_attr_type = "ia32_attr_t";
252 $default_copy_attr = "ia32_copy_attr";
254 sub ia32_custom_init_attr {
258 if(defined($node->{modified_flags})) {
259 $res .= "\tset_ia32_flags(res, get_ia32_flags(res) | arch_irn_flags_modify_flags);\n";
261 if(defined($node->{am})) {
262 my $am = $node->{am};
263 if($am eq "full,binary") {
264 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_binary);";
265 } elsif($am eq "full,unary") {
266 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_unary);";
267 } elsif($am eq "source,binary") {
268 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_binary);";
269 } elsif($am eq "dest,unary") {
270 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);";
271 } elsif($am eq "dest,binary") {
272 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);";
273 } elsif($am eq "dest,ternary") {
274 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);";
275 } elsif($am eq "source,ternary") {
276 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_ternary);";
277 } elsif($am eq "none") {
280 die("Invalid address mode '$am' specified on op $name");
285 $custom_init_attr_func = \&ia32_custom_init_attr;
288 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
290 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
291 "\tinit_ia32_x87_attributes(res);",
293 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
294 "\tinit_ia32_x87_attributes(res);".
295 "\tinit_ia32_asm_attributes(res);",
296 ia32_immediate_attr_t =>
297 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
298 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
302 ia32_attr_t => "ia32_compare_nodes_attr",
303 ia32_x87_attr_t => "ia32_compare_x87_attr",
304 ia32_asm_attr_t => "ia32_compare_asm_attr",
305 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
311 $mode_xmm = "mode_E";
312 $mode_gp = "mode_Iu";
313 $mode_flags = "mode_Iu";
314 $mode_fpcw = "mode_fpcw";
315 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
316 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
317 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
325 reg_req => { out => [ "gp_NOREG" ] },
326 attr => "ir_entity *symconst, int symconst_sign, long offset",
327 attr_type => "ia32_immediate_attr_t",
335 out_arity => "variable",
336 attr_type => "ia32_asm_attr_t",
343 reg_req => { out => [ "gp" ] },
348 cmp_attr => "return 1;",
351 #-----------------------------------------------------------------#
354 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
355 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
356 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
357 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
360 #-----------------------------------------------------------------#
362 # commutative operations
366 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5", "none", "flags" ] },
367 ins => [ "base", "index", "mem", "left", "right" ],
368 emit => '. add%M %binop',
372 modified_flags => $status_flags
377 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
378 ins => [ "base", "index", "mem", "val" ],
379 emit => ". add%M %SI3, %AM",
382 modified_flags => $status_flags
387 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
388 ins => [ "base", "index", "mem", "val" ],
389 emit => ". add%M %SB3, %AM",
392 modified_flags => $status_flags
396 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "flags" ], out => [ "in_r4 in_r5" ] },
397 ins => [ "base", "index", "mem", "left", "right", "eflags" ],
398 emit => '. adc%M %binop',
402 modified_flags => $status_flags
407 reg_req => { in => [ "none", "none" ], out => [ "none" ] },
408 ins => [ "left", "right" ],
412 reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
413 ins => [ "left", "right", "eflags" ],
417 # we should not rematrialize this node. It produces 2 results and has
418 # very strict constrains
419 reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], out => [ "eax", "edx", "none" ] },
420 ins => [ "base", "index", "mem", "val_high", "val_low" ],
421 emit => '. mul%M %unop4',
422 outs => [ "EAX", "EDX", "M" ],
423 am => "source,binary",
426 modified_flags => $status_flags
430 # we should not rematrialize this node. It produces 2 results and has
431 # very strict constrains
433 cmp_attr => "return 1;",
434 outs => [ "EAX", "EDX", "M" ],
440 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5" ] },
441 ins => [ "base", "index", "mem", "left", "right" ],
442 emit => '. imul%M %binop',
443 am => "source,binary",
447 modified_flags => $status_flags
452 reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], out => [ "eax", "edx", "none" ] },
453 ins => [ "base", "index", "mem", "val_high", "val_low" ],
454 emit => '. imul%M %unop4',
455 outs => [ "EAX", "EDX", "M" ],
456 am => "source,binary",
459 modified_flags => $status_flags
463 # we should not rematrialize this node. It produces 2 results and has
464 # very strict constrains
466 cmp_attr => "return 1;",
467 outs => [ "EAX", "EDX", "M" ],
473 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5" ] },
474 ins => [ "base", "index", "mem", "left", "right" ],
476 emit => '. and%M %binop',
479 modified_flags => $status_flags
484 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
485 ins => [ "base", "index", "mem", "val" ],
486 emit => '. and%M %SI3, %AM',
489 modified_flags => $status_flags
494 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
495 ins => [ "base", "index", "mem", "val" ],
496 emit => '. and%M %SB3, %AM',
499 modified_flags => $status_flags
504 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5" ] },
505 ins => [ "base", "index", "mem", "left", "right" ],
507 emit => '. or%M %binop',
510 modified_flags => $status_flags
515 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
516 ins => [ "base", "index", "mem", "val" ],
517 emit => '. or%M %SI3, %AM',
520 modified_flags => $status_flags
525 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
526 ins => [ "base", "index", "mem", "val" ],
527 emit => '. or%M %SB3, %AM',
530 modified_flags => $status_flags
535 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5" ] },
536 ins => [ "base", "index", "mem", "left", "right" ],
538 emit => '. xor%M %binop',
541 modified_flags => $status_flags
546 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
547 ins => [ "base", "index", "mem", "val" ],
548 emit => '. xor%M %SI3, %AM',
551 modified_flags => $status_flags
556 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
557 ins => [ "base", "index", "mem", "val" ],
558 emit => '. xor%M %SB3, %AM',
561 modified_flags => $status_flags
564 # not commutative operations
568 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4", "none", "flags" ] },
569 ins => [ "base", "index", "mem", "left", "right" ],
571 emit => '. sub%M %binop',
574 modified_flags => $status_flags
579 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
580 ins => [ "base", "index", "mem", "val" ],
581 emit => '. sub%M %SI3, %AM',
584 modified_flags => $status_flags
589 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
590 ins => [ "base", "index", "mem", "val" ],
591 emit => '. sub%M %SB3, %AM',
594 modified_flags => $status_flags
598 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "flags" ], out => [ "in_r4 !in_r5" ] },
599 ins => [ "base", "index", "mem", "left", "right", "eflags" ],
601 emit => '. sbb%M %binop',
604 modified_flags => $status_flags
608 reg_req => { in => [ "none", "none" ], out => [ "none" ] },
609 ins => [ "left", "right" ],
613 reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
614 ins => [ "left", "right", "eflags" ],
619 state => "exc_pinned",
620 reg_req => { in => [ "gp", "gp", "none", "eax", "edx", "gp" ], out => [ "eax", "edx", "none" ] },
621 ins => [ "base", "index", "mem", "left_low", "left_high", "right" ],
622 outs => [ "div_res", "mod_res", "M" ],
623 attr => "ia32_op_flavour_t dm_flav",
624 am => "source,ternary",
625 init_attr => "attr->data.op_flav = dm_flav;",
626 emit => ". idiv%M %unop5",
629 modified_flags => $status_flags
634 state => "exc_pinned",
635 reg_req => { in => [ "gp", "gp", "none", "eax", "edx", "gp" ], out => [ "eax", "edx", "none" ] },
636 ins => [ "base", "index", "mem", "left_low", "left_high", "right" ],
637 outs => [ "div_res", "mod_res", "M" ],
638 attr => "ia32_op_flavour_t dm_flav",
639 am => "source,ternary",
640 init_attr => "attr->data.op_flav = dm_flav;",
641 emit => ". div%M %unop5",
644 modified_flags => $status_flags
649 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
650 ins => [ "left", "right" ],
652 emit => '. shl %SB1, %S0',
655 modified_flags => $status_flags
660 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
661 ins => [ "base", "index", "mem", "count" ],
662 emit => '. shl%M %SB3, %AM',
665 modified_flags => $status_flags
669 cmp_attr => "return 1;",
670 # value, cnt, dependency
675 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
677 # Out requirements is: different from all in
678 # This is because, out must be different from LowPart and ShiftCount.
679 # We could say "!ecx !in_r4" but it can occur, that all values live through
680 # this Shift and the only value dying is the ShiftCount. Then there would be a
681 # register missing, as result must not be ecx and all other registers are
682 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
683 # (and probably never will). So we create artificial interferences of the result
684 # with all inputs, so the spiller can always assure a free register.
685 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
688 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
689 ins => [ "left_high", "left_low", "right" ],
690 am => "dest,ternary",
691 emit => '. shld%M %SB2, %S1, %S0',
695 modified_flags => $status_flags
699 cmp_attr => "return 1;",
705 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
706 ins => [ "val", "count" ],
708 emit => '. shr %SB1, %S0',
711 modified_flags => $status_flags
716 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
717 ins => [ "base", "index", "mem", "count" ],
718 emit => '. shr%M %SB3, %AM',
721 modified_flags => $status_flags
725 cmp_attr => "return 1;",
726 # value, cnt, dependency
731 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
733 # Out requirements is: different from all in
734 # This is because, out must be different from LowPart and ShiftCount.
735 # We could say "!ecx !in_r4" but it can occur, that all values live through
736 # this Shift and the only value dying is the ShiftCount. Then there would be a
737 # register missing, as result must not be ecx and all other registers are
738 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
739 # (and probably never will). So we create artificial interferences of the result
740 # with all inputs, so the spiller can always assure a free register.
741 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
744 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
745 ins => [ "left_high", "left_low", "right" ],
746 am => "dest,ternary",
747 emit => '. shrd%M %SB2, %S1, %S0',
751 modified_flags => $status_flags
755 cmp_attr => "return 1;",
761 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
762 ins => [ "val", "count" ],
764 emit => '. sar %SB1, %S0',
767 modified_flags => $status_flags
772 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
773 ins => [ "base", "index", "mem", "count" ],
774 emit => '. sar%M %SB3, %AM',
777 modified_flags => $status_flags
781 cmp_attr => "return 1;",
787 cmp_attr => "return 1;",
788 # value, cnt, dependency
794 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
795 ins => [ "val", "count" ],
797 emit => '. ror %SB1, %S0',
800 modified_flags => $status_flags
805 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
806 ins => [ "base", "index", "mem", "count" ],
807 emit => '. ror%M %SB3, %AM',
810 modified_flags => $status_flags
815 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
816 ins => [ "val", "count" ],
818 emit => '. rol %SB1, %S0',
821 modified_flags => $status_flags
826 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
827 ins => [ "base", "index", "mem", "count" ],
828 emit => '. rol%M %SB3, %AM',
831 modified_flags => $status_flags
838 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
844 modified_flags => $status_flags
849 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
850 ins => [ "base", "index", "mem" ],
851 emit => '. neg%M %AM',
854 modified_flags => $status_flags
859 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "gp" ] },
860 outs => [ "low_res", "high_res" ],
862 modified_flags => $status_flags
867 cmp_attr => "return 1;",
873 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
878 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
883 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
884 ins => [ "base", "index", "mem" ],
885 emit => '. inc%M %AM',
888 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
893 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
898 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
903 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
904 ins => [ "base", "index", "mem" ],
905 emit => '. dec%M %AM',
908 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
913 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
923 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
924 ins => [ "base", "index", "mem" ],
925 emit => '. not%M %AM',
934 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ] , out => [ "flags" ] },
935 ins => [ "base", "index", "mem", "left", "right" ],
936 outs => [ "eflags" ],
937 am => "source,binary",
938 emit => '. cmp%M %binop',
939 attr => "int flipped, int cmp_unsigned",
940 init_attr => "attr->data.cmp_flipped = flipped;\n".
941 "\tattr->data.cmp_unsigned = cmp_unsigned;\n",
945 modified_flags => $status_flags
950 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] , out => [ "flags" ] },
951 ins => [ "base", "index", "mem", "left", "right" ],
952 outs => [ "eflags" ],
953 am => "source,binary",
954 emit => '. cmpb %binop',
955 attr => "int flipped, int cmp_unsigned",
956 init_attr => "attr->data.cmp_flipped = flipped;\n".
957 "\tattr->data.cmp_unsigned = cmp_unsigned;\n",
961 modified_flags => $status_flags
966 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ] , out => [ "flags" ] },
967 ins => [ "base", "index", "mem", "left", "right" ],
968 outs => [ "eflags" ],
969 am => "source,binary",
970 emit => '. test%M %binop',
971 attr => "int flipped, int cmp_unsigned",
972 init_attr => "attr->data.cmp_flipped = flipped;\n".
973 "\tattr->data.cmp_unsigned = cmp_unsigned;\n",
977 modified_flags => $status_flags
982 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] , out => [ "flags" ] },
983 ins => [ "base", "index", "mem", "left", "right" ],
984 outs => [ "eflags" ],
985 am => "source,binary",
986 emit => '. testb %binop',
987 attr => "int flipped, int cmp_unsigned",
988 init_attr => "attr->data.cmp_flipped = flipped;\n".
989 "\tattr->data.cmp_unsigned = cmp_unsigned;\n",
993 modified_flags => $status_flags
998 reg_req => { in => [ "eflags" ], out => [ "eax ebx ecx edx" ] },
1001 attr => "pn_Cmp pnc",
1002 init_attr => "attr->pn_code = pnc;\nset_ia32_ls_mode(res, mode_Bu);\n",
1003 emit => '. set%CMP0 %DB0',
1011 # (note: leave the false,true order intact to make it compatible with other
1013 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "eflags" ], out => [ "in_r4" ] },
1014 ins => [ "base", "index", "mem", "val_false", "val_true", "eflags" ],
1015 am => "source,binary",
1016 attr => "pn_Cmp pn_code",
1017 init_attr => "attr->pn_code = pn_code;",
1025 op_flags => "L|X|Y",
1026 reg_req => { in => [ "eflags" ], out => [ "none", "none" ] },
1027 ins => [ "eflags" ],
1028 outs => [ "false", "true" ],
1029 attr => "pn_Cmp pnc",
1030 init_attr => "attr->pn_code = pnc;",
1032 units => [ "BRANCH" ],
1037 op_flags => "L|X|Y",
1038 reg_req => { in => [ "gp" ], out => [ "none" ] },
1040 units => [ "BRANCH" ],
1042 modified_flags => $status_flags
1048 reg_req => { in => [ "gp" ] },
1049 emit => '. jmp *%S0',
1050 units => [ "BRANCH" ],
1057 reg_req => { out => [ "gp" ] },
1059 attr => "ir_entity *symconst, int symconst_sign, long offset",
1060 attr_type => "ia32_immediate_attr_t",
1062 # depends on the const and is set in ia32_transform
1063 # modified_flags => $status_flags
1070 reg_req => { out => [ "gp_UKNWN" ] },
1080 reg_req => { out => [ "vfp_UKNWN" ] },
1084 attr_type => "ia32_x87_attr_t",
1091 reg_req => { out => [ "xmm_UKNWN" ] },
1101 reg_req => { out => [ "gp_NOREG" ] },
1111 reg_req => { out => [ "vfp_NOREG" ] },
1115 attr_type => "ia32_x87_attr_t",
1122 reg_req => { out => [ "xmm_NOREG" ] },
1132 reg_req => { out => [ "fp_cw" ] },
1136 modified_flags => $fpcw_flags
1142 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
1143 ins => [ "base", "index", "mem" ],
1145 emit => ". fldcw %AM",
1148 modified_flags => $fpcw_flags
1154 reg_req => { in => [ "gp", "gp", "none", "fp_cw" ], out => [ "none" ] },
1155 ins => [ "base", "index", "mem", "fpcw" ],
1157 emit => ". fnstcw %AM",
1163 # we should not rematrialize this node. It has very strict constraints.
1164 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
1165 ins => [ "val", "globbered" ],
1173 # Note that we add additional latency values depending on address mode, so a
1174 # lateny of 0 for load is correct
1178 state => "exc_pinned",
1179 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
1180 ins => [ "base", "index", "mem" ],
1181 outs => [ "res", "M" ],
1183 emit => ". mov%SE%ME%.l %AM, %D0",
1189 cmp_attr => "return 1;",
1190 outs => [ "res", "M" ],
1196 cmp_attr => "return 1;",
1197 state => "exc_pinned",
1204 state => "exc_pinned",
1205 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
1206 ins => [ "base", "index", "mem", "val" ],
1207 emit => '. mov%M %SI3, %AM',
1215 state => "exc_pinned",
1216 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => ["none" ] },
1217 ins => [ "base", "index", "mem", "val" ],
1218 emit => '. mov%M %SB3, %AM',
1226 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1227 ins => [ "base", "index" ],
1228 emit => '. leal %AM, %D0',
1232 # well this isn't true for Lea, but we often transform Lea back to Add, Inc
1233 # or Dec, so we set the flag
1234 modified_flags => 1,
1238 reg_req => { in => [ "gp", "gp", "none", "gp", "esp" ], out => [ "esp", "none" ] },
1239 ins => [ "base", "index", "mem", "val", "stack" ],
1240 emit => '. push%M %unop3',
1241 outs => [ "stack:I|S", "M" ],
1242 am => "source,binary",
1248 reg_req => { in => [ "gp", "gp", "none", "esp" ], out => [ "esp", "gp", "none" ] },
1249 emit => '. pop%M %DAM1',
1250 outs => [ "stack:I|S", "res", "M" ],
1251 ins => [ "base", "index", "mem", "stack" ],
1253 latency => 3, # Pop is more expensive than Push on Athlon
1258 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1260 outs => [ "frame:I", "stack:I|S", "M" ],
1266 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1268 outs => [ "frame:I", "stack:I|S" ],
1276 reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "in_r4", "none" ] },
1277 ins => [ "base", "index", "mem", "stack", "size" ],
1278 am => "source,binary",
1279 emit => '. addl %binop',
1280 outs => [ "stack:S", "M" ],
1282 modified_flags => $status_flags
1288 reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "in_r4", "gp", "none" ] },
1289 ins => [ "base", "index", "mem", "stack", "size" ],
1290 am => "source,binary",
1291 emit => ". subl %binop\n".
1292 ". movl %%esp, %D1",
1293 outs => [ "stack:I|S", "addr", "M" ],
1295 modified_flags => $status_flags
1300 reg_req => { out => [ "gp" ] },
1304 # the int instruction
1306 reg_req => { in => [ "gp" ], out => [ "none" ] },
1308 emit => '. int %SI0',
1310 cmp_attr => "return 1;",
1314 #-----------------------------------------------------------------------------#
1315 # _____ _____ ______ __ _ _ _ #
1316 # / ____/ ____| ____| / _| | | | | | #
1317 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1318 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1319 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1320 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1321 #-----------------------------------------------------------------------------#
1325 reg_req => { out => [ "xmm" ] },
1326 emit => '. xorp%XSD %D0, %D0',
1332 # commutative operations
1336 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1337 ins => [ "base", "index", "mem", "left", "right" ],
1338 emit => '. add%XXM %binop',
1346 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1347 ins => [ "base", "index", "mem", "left", "right" ],
1348 emit => '. mul%XXM %binop',
1356 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1357 ins => [ "base", "index", "mem", "left", "right" ],
1358 emit => '. max%XXM %binop',
1366 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1367 ins => [ "base", "index", "mem", "left", "right" ],
1368 emit => '. min%XXM %binop',
1376 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1377 ins => [ "base", "index", "mem", "left", "right" ],
1378 emit => '. andp%XSD %binop',
1386 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1387 ins => [ "base", "index", "mem", "left", "right" ],
1388 emit => '. orp%XSD %binop',
1395 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1396 ins => [ "base", "index", "mem", "left", "right" ],
1397 emit => '. xorp%XSD %binop',
1403 # not commutative operations
1407 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5" ] },
1408 ins => [ "base", "index", "mem", "left", "right" ],
1409 emit => '. andnp%XSD %binop',
1417 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1418 ins => [ "base", "index", "mem", "left", "right" ],
1419 emit => '. sub%XXM %binop',
1427 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5", "none" ] },
1428 ins => [ "base", "index", "mem", "left", "right" ],
1429 outs => [ "res", "M" ],
1430 emit => '. div%XXM %binop',
1439 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "eflags" ] },
1440 ins => [ "base", "index", "mem", "left", "right" ],
1441 outs => [ "flags" ],
1442 am => "source,binary",
1443 attr => "int flipped",
1444 init_attr => "attr->data.cmp_flipped = flipped;",
1445 emit => ' .ucomi%XXM %binop',
1448 mode => $mode_flags,
1449 modified_flags => 1,
1456 state => "exc_pinned",
1457 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1458 ins => [ "base", "index", "mem" ],
1459 emit => '. mov%XXM %AM, %D0',
1460 attr => "ir_mode *load_mode",
1461 init_attr => "attr->ls_mode = load_mode;",
1462 outs => [ "res", "M" ],
1469 state => "exc_pinned",
1470 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
1471 ins => [ "base", "index", "mem", "val" ],
1472 emit => '. mov%XXM %S3, %AM',
1480 state => "exc_pinned",
1481 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
1482 ins => [ "base", "index", "mem", "val" ],
1483 emit => '. mov%XXM %S3, %AM',
1491 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
1492 ins => [ "base", "index", "mem", "val" ],
1493 emit => '. cvtsi2ss %D0, %AM',
1501 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
1502 ins => [ "base", "index", "mem", "val" ],
1503 emit => '. cvtsi2sd %unop3',
1512 cmp_attr => "return 1;",
1518 cmp_attr => "return 1;",
1527 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1528 outs => [ "DST", "SRC", "CNT", "M" ],
1530 # we don't care about this flag, so no need to mark this node
1531 # modified_flags => [ "DF" ]
1537 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1538 outs => [ "DST", "SRC", "M" ],
1540 # we don't care about this flag, so no need to mark this node
1541 # modified_flags => [ "DF" ]
1547 state => "exc_pinned",
1548 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "gp", "none" ] },
1549 ins => [ "base", "index", "mem", "val" ],
1551 attr => "ir_mode *smaller_mode",
1552 init_attr => "attr->ls_mode = smaller_mode;",
1557 state => "exc_pinned",
1558 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "gp", "none" ] },
1559 ins => [ "base", "index", "mem", "val" ],
1561 attr => "ir_mode *smaller_mode",
1562 init_attr => "attr->ls_mode = smaller_mode;",
1567 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm", "none" ] },
1568 ins => [ "base", "index", "mem", "val" ],
1575 reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "gp", "none" ] },
1576 ins => [ "base", "index", "mem", "val" ],
1583 reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "xmm", "none" ] },
1584 ins => [ "base", "index", "mem", "val" ],
1590 #----------------------------------------------------------#
1592 # (_) | | | | / _| | | | #
1593 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1594 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1595 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1596 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1598 # _ __ ___ __| | ___ ___ #
1599 # | '_ \ / _ \ / _` |/ _ \/ __| #
1600 # | | | | (_) | (_| | __/\__ \ #
1601 # |_| |_|\___/ \__,_|\___||___/ #
1602 #----------------------------------------------------------#
1606 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1607 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1611 attr_type => "ia32_x87_attr_t",
1616 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1617 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1621 attr_type => "ia32_x87_attr_t",
1626 cmp_attr => "return 1;",
1632 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1633 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1637 attr_type => "ia32_x87_attr_t",
1641 cmp_attr => "return 1;",
1646 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp", "none" ] },
1647 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1648 outs => [ "res", "M" ],
1651 attr_type => "ia32_x87_attr_t",
1655 cmp_attr => "return 1;",
1656 outs => [ "res", "M" ],
1661 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1662 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1666 attr_type => "ia32_x87_attr_t",
1670 cmp_attr => "return 1;",
1676 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1681 attr_type => "ia32_x87_attr_t",
1686 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1691 attr_type => "ia32_x87_attr_t",
1694 # virtual Load and Store
1698 state => "exc_pinned",
1699 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1700 ins => [ "base", "index", "mem" ],
1701 outs => [ "res", "M" ],
1702 attr => "ir_mode *load_mode",
1703 init_attr => "attr->attr.ls_mode = load_mode;",
1706 attr_type => "ia32_x87_attr_t",
1711 state => "exc_pinned",
1712 reg_req => { in => [ "gp", "gp", "none", "vfp" ] },
1713 ins => [ "base", "index", "mem", "val" ],
1714 attr => "ir_mode *store_mode",
1715 init_attr => "attr->attr.ls_mode = store_mode;",
1719 attr_type => "ia32_x87_attr_t",
1725 state => "exc_pinned",
1726 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1727 outs => [ "res", "M" ],
1728 ins => [ "base", "index", "mem" ],
1731 attr_type => "ia32_x87_attr_t",
1735 cmp_attr => "return 1;",
1736 outs => [ "res", "M" ],
1741 state => "exc_pinned",
1742 reg_req => { in => [ "gp", "gp", "none", "vfp", "fpcw" ] },
1743 ins => [ "base", "index", "mem", "val", "fpcw" ],
1747 attr_type => "ia32_x87_attr_t",
1751 cmp_attr => "return 1;",
1752 state => "exc_pinned",
1762 reg_req => { out => [ "vfp" ] },
1766 attr_type => "ia32_x87_attr_t",
1771 reg_req => { out => [ "vfp" ] },
1775 attr_type => "ia32_x87_attr_t",
1780 reg_req => { out => [ "vfp" ] },
1784 attr_type => "ia32_x87_attr_t",
1789 reg_req => { out => [ "vfp" ] },
1793 attr_type => "ia32_x87_attr_t",
1798 reg_req => { out => [ "vfp" ] },
1802 attr_type => "ia32_x87_attr_t",
1807 reg_req => { out => [ "vfp" ] },
1811 attr_type => "ia32_x87_attr_t",
1816 reg_req => { out => [ "vfp" ] },
1820 attr_type => "ia32_x87_attr_t",
1826 # we can't allow to rematerialize this node so we don't have
1827 # accidently produce Phi(Fucom, Fucom(flipped))
1829 reg_req => { in => [ "vfp", "vfp" ], out => [ "eax" ] },
1830 ins => [ "left", "right" ],
1831 outs => [ "flags" ],
1832 am => "source,binary",
1833 attr => "int flipped",
1834 init_attr => "attr->attr.data.cmp_flipped = flipped;",
1837 attr_type => "ia32_x87_attr_t",
1843 reg_req => { in => [ "eax" ], out => [ "eflags" ] },
1845 outs => [ "flags" ],
1848 mode => $mode_flags,
1851 #------------------------------------------------------------------------#
1852 # ___ _____ __ _ _ _ #
1853 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1854 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1855 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1856 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1857 #------------------------------------------------------------------------#
1859 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1860 # are swapped, we work this around in the emitter...
1864 rd_constructor => "NONE",
1866 emit => '. fadd%XM %x87_binop',
1867 attr_type => "ia32_x87_attr_t",
1872 rd_constructor => "NONE",
1874 emit => '. faddp%XM %x87_binop',
1875 attr_type => "ia32_x87_attr_t",
1880 rd_constructor => "NONE",
1882 emit => '. fmul%XM %x87_binop',
1883 attr_type => "ia32_x87_attr_t",
1888 rd_constructor => "NONE",
1890 emit => '. fmulp%XM %x87_binop',,
1891 attr_type => "ia32_x87_attr_t",
1896 rd_constructor => "NONE",
1898 emit => '. fsub%XM %x87_binop',
1899 attr_type => "ia32_x87_attr_t",
1904 rd_constructor => "NONE",
1906 # see note about gas bugs
1907 emit => '. fsubrp%XM %x87_binop',
1908 attr_type => "ia32_x87_attr_t",
1913 rd_constructor => "NONE",
1916 emit => '. fsubr%XM %x87_binop',
1917 attr_type => "ia32_x87_attr_t",
1922 rd_constructor => "NONE",
1925 # see note about gas bugs
1926 emit => '. fsubp%XM %x87_binop',
1927 attr_type => "ia32_x87_attr_t",
1932 rd_constructor => "NONE",
1935 attr_type => "ia32_x87_attr_t",
1938 # this node is just here, to keep the simulator running
1939 # we can omit this when a fprem simulation function exists
1942 rd_constructor => "NONE",
1945 attr_type => "ia32_x87_attr_t",
1950 rd_constructor => "NONE",
1952 emit => '. fdiv%XM %x87_binop',
1953 attr_type => "ia32_x87_attr_t",
1958 rd_constructor => "NONE",
1960 # see note about gas bugs
1961 emit => '. fdivrp%XM %x87_binop',
1962 attr_type => "ia32_x87_attr_t",
1967 rd_constructor => "NONE",
1969 emit => '. fdivr%XM %x87_binop',
1970 attr_type => "ia32_x87_attr_t",
1975 rd_constructor => "NONE",
1977 # see note about gas bugs
1978 emit => '. fdivp%XM %x87_binop',
1979 attr_type => "ia32_x87_attr_t",
1984 rd_constructor => "NONE",
1987 attr_type => "ia32_x87_attr_t",
1992 rd_constructor => "NONE",
1995 attr_type => "ia32_x87_attr_t",
1998 # x87 Load and Store
2001 rd_constructor => "NONE",
2002 op_flags => "R|L|F",
2003 state => "exc_pinned",
2005 emit => '. fld%XM %AM',
2006 attr_type => "ia32_x87_attr_t",
2010 rd_constructor => "NONE",
2011 op_flags => "R|L|F",
2012 state => "exc_pinned",
2014 emit => '. fst%XM %AM',
2016 attr_type => "ia32_x87_attr_t",
2020 rd_constructor => "NONE",
2021 op_flags => "R|L|F",
2022 state => "exc_pinned",
2024 emit => '. fstp%XM %AM',
2026 attr_type => "ia32_x87_attr_t",
2033 rd_constructor => "NONE",
2035 emit => '. fild%M %AM',
2036 attr_type => "ia32_x87_attr_t",
2041 state => "exc_pinned",
2042 rd_constructor => "NONE",
2044 emit => '. fist%M %AM',
2046 attr_type => "ia32_x87_attr_t",
2051 state => "exc_pinned",
2052 rd_constructor => "NONE",
2054 emit => '. fistp%M %AM',
2056 attr_type => "ia32_x87_attr_t",
2062 op_flags => "R|c|K",
2066 attr_type => "ia32_x87_attr_t",
2070 op_flags => "R|c|K",
2074 attr_type => "ia32_x87_attr_t",
2078 op_flags => "R|c|K",
2082 attr_type => "ia32_x87_attr_t",
2086 op_flags => "R|c|K",
2090 attr_type => "ia32_x87_attr_t",
2094 op_flags => "R|c|K",
2098 attr_type => "ia32_x87_attr_t",
2102 op_flags => "R|c|K",
2105 emit => '. fldll2t',
2106 attr_type => "ia32_x87_attr_t",
2110 op_flags => "R|c|K",
2114 attr_type => "ia32_x87_attr_t",
2118 # Note that it is NEVER allowed to do CSE on these nodes
2119 # Moreover, note the virtual register requierements!
2124 cmp_attr => "return 1;",
2125 emit => '. fxch %X0',
2126 attr_type => "ia32_x87_attr_t",
2132 cmp_attr => "return 1;",
2133 emit => '. fld %X0',
2134 attr_type => "ia32_x87_attr_t",
2139 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2140 cmp_attr => "return 1;",
2141 emit => '. fld %X0',
2142 attr_type => "ia32_x87_attr_t",
2148 cmp_attr => "return 1;",
2149 emit => '. fstp %X0',
2150 attr_type => "ia32_x87_attr_t",
2156 cmp_attr => "return 1;",
2157 emit => '. ffreep %X0',
2158 attr_type => "ia32_x87_attr_t",
2164 cmp_attr => "return 1;",
2166 attr_type => "ia32_x87_attr_t",
2172 cmp_attr => "return 1;",
2174 attr_type => "ia32_x87_attr_t",
2182 emit => ". fucom %X1\n".
2184 attr_type => "ia32_x87_attr_t",
2190 emit => ". fucomp %X1\n".
2192 attr_type => "ia32_x87_attr_t",
2198 emit => ". fucompp\n".
2200 attr_type => "ia32_x87_attr_t",
2204 # -------------------------------------------------------------------------------- #
2205 # ____ ____ _____ _ _ #
2206 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2207 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2208 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2209 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2211 # -------------------------------------------------------------------------------- #
2214 # Spilling and reloading of SSE registers, hardcoded, not generated #
2218 state => "exc_pinned",
2219 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2220 emit => '. movdqu %D0, %AM',
2221 outs => [ "res", "M" ],
2227 state => "exc_pinned",
2228 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
2229 ins => [ "base", "index", "mem", "val" ],
2230 emit => '. movdqu %binop',
2237 # Include the generated SIMD node specification written by the SIMD optimization
2238 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2239 unless ($return = do $my_script_name) {
2240 warn "couldn't parse $my_script_name: $@" if $@;
2241 warn "couldn't do $my_script_name: $!" unless defined $return;
2242 warn "couldn't run $my_script_name" unless $return;