3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 SB1 => "${arch}_emit_8bit_source_register(env, node, 1);",
257 SB2 => "${arch}_emit_8bit_source_register(env, node, 2);",
258 SW0 => "${arch}_emit_16bit_source_register(env, node, 0);",
259 SI0 => "${arch}_emit_source_register_or_immediate(env, node, 0);",
260 SI1 => "${arch}_emit_source_register_or_immediate(env, node, 1);",
261 SI2 => "${arch}_emit_source_register_or_immediate(env, node, 2);",
262 SI3 => "${arch}_emit_source_register_or_immediate(env, node, 3);",
263 D0 => "${arch}_emit_dest_register(env, node, 0);",
264 D1 => "${arch}_emit_dest_register(env, node, 1);",
265 D2 => "${arch}_emit_dest_register(env, node, 2);",
266 D3 => "${arch}_emit_dest_register(env, node, 3);",
267 D4 => "${arch}_emit_dest_register(env, node, 4);",
268 D5 => "${arch}_emit_dest_register(env, node, 5);",
269 X0 => "${arch}_emit_x87_name(env, node, 0);",
270 X1 => "${arch}_emit_x87_name(env, node, 1);",
271 X2 => "${arch}_emit_x87_name(env, node, 2);",
272 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
273 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
274 ia32_emit_mode_suffix(env, node);",
275 M => "${arch}_emit_mode_suffix(env, node);",
276 XM => "${arch}_emit_x87_mode_suffix(env, node);",
277 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
278 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
279 AM => "${arch}_emit_am(env, node);",
280 unop0 => "${arch}_emit_unop(env, node, 0);",
281 unop1 => "${arch}_emit_unop(env, node, 1);",
282 unop2 => "${arch}_emit_unop(env, node, 2);",
283 unop3 => "${arch}_emit_unop(env, node, 3);",
284 unop4 => "${arch}_emit_unop(env, node, 4);",
285 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
286 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 0);",
287 binop => "${arch}_emit_binop(env, node);",
288 x87_binop => "${arch}_emit_x87_binop(env, node);",
291 #--------------------------------------------------#
294 # _ __ _____ __ _ _ __ ___ _ __ ___ #
295 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
296 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
297 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
300 #--------------------------------------------------#
302 $default_attr_type = "ia32_attr_t";
303 $default_copy_attr = "ia32_copy_attr";
305 sub ia32_custom_init_attr {
309 if(defined($node->{modified_flags})) {
310 $res .= "\t/*attr->data.flags |= arch_irn_flags_modify_flags;*/\n";
312 if(defined($node->{am})) {
313 my $am = $node->{am};
314 if($am eq "full,binary") {
315 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_binary);";
316 } elsif($am eq "full,unary") {
317 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_unary);";
318 } elsif($am eq "source,binary") {
319 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_binary);";
320 } elsif($am eq "dest,unary") {
321 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);";
322 } elsif($am eq "dest,binary") {
323 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);";
324 } elsif($am eq "dest,ternary") {
325 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);";
326 } elsif($am eq "source,ternary") {
327 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_ternary);";
328 } elsif($am eq "none") {
331 die("Invalid address mode '$am' specified on op $name");
336 $custom_init_attr_func = \&ia32_custom_init_attr;
339 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
341 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
342 "\tinit_ia32_x87_attributes(res);",
344 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
345 "\tinit_ia32_x87_attributes(res);".
346 "\tinit_ia32_asm_attributes(res);",
347 ia32_immediate_attr_t =>
348 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
349 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
353 ia32_attr_t => "ia32_compare_nodes_attr",
354 ia32_x87_attr_t => "ia32_compare_x87_attr",
355 ia32_asm_attr_t => "ia32_compare_asm_attr",
356 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
362 $mode_xmm = "mode_E";
363 $mode_gp = "mode_Iu";
364 $mode_fpcw = "mode_fpcw";
365 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
366 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
367 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
375 reg_req => { out => [ "gp_NOREG" ] },
376 attr => "ir_entity *symconst, int symconst_sign, long offset",
377 attr_type => "ia32_immediate_attr_t",
385 out_arity => "variable",
386 attr_type => "ia32_asm_attr_t",
393 reg_req => { out => [ "gp" ] },
398 cmp_attr => "return 1;",
401 #-----------------------------------------------------------------#
404 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
405 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
406 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
407 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
410 #-----------------------------------------------------------------#
412 # commutative operations
415 # All nodes supporting Addressmode have 5 INs:
416 # 1 - base r1 == NoReg in case of no AM or no base
417 # 2 - index r2 == NoReg in case of no AM or no index
418 # 3 - op1 r3 == always present
419 # 4 - op2 r4 == NoReg in case of immediate operation
420 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
424 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
425 ins => [ "base", "index", "left", "right", "mem" ],
426 emit => '. add%M %binop',
430 modified_flags => $status_flags
435 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
436 ins => [ "base", "index", "val", "mem" ],
437 emit => ". add%M %SI2, %AM",
440 modified_flags => $status_flags
444 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "flags" ], out => [ "in_r3" ] },
445 ins => [ "base", "index", "left", "right", "mem", "eflags" ],
446 emit => '. adc%M %binop',
450 modified_flags => $status_flags
456 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
463 outs => [ "low_res", "high_res" ],
465 modified_flags => $status_flags
469 # we should not rematrialize this node. It produces 2 results and has
470 # very strict constrains
471 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
472 emit => '. mul%M %unop3',
473 outs => [ "EAX", "EDX", "M" ],
474 ins => [ "base", "index", "val_high", "val_low", "mem" ],
475 am => "source,binary",
478 modified_flags => $status_flags
482 # we should not rematrialize this node. It produces 2 results and has
483 # very strict constrains
485 cmp_attr => "return 1;",
486 outs => [ "EAX", "EDX", "M" ],
492 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
493 ins => [ "base", "index", "left", "right", "mem" ],
494 emit => '. imul%M %binop',
495 am => "source,binary",
499 modified_flags => $status_flags
504 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
505 emit => '. imul%M %unop3',
506 outs => [ "EAX", "EDX", "M" ],
507 ins => [ "base", "index", "val_high", "val_low", "mem" ],
508 am => "source,binary",
511 modified_flags => $status_flags
515 # we should not rematrialize this node. It produces 2 results and has
516 # very strict constrains
518 cmp_attr => "return 1;",
519 outs => [ "EAX", "EDX", "M" ],
525 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
526 ins => [ "base", "index", "left", "right", "mem" ],
528 emit => '. and%M %binop',
531 modified_flags => $status_flags
536 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
537 emit => '. and%M %SI2, %AM',
540 modified_flags => $status_flags
545 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
546 ins => [ "base", "index", "left", "right", "mem" ],
548 emit => '. or%M %binop',
551 modified_flags => $status_flags
556 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
557 ins => [ "base", "index", "val", "mem" ],
558 emit => '. or%M %SI2, %AM',
561 modified_flags => $status_flags
566 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
567 ins => [ "base", "index", "left", "right", "mem" ],
569 emit => '. xor%M %binop',
572 modified_flags => $status_flags
577 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
578 ins => [ "base", "index", "val", "mem" ],
579 emit => '. xor%M %SI2, %AM',
582 modified_flags => $status_flags
585 # not commutative operations
589 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
590 ins => [ "base", "index", "left", "right", "mem" ],
592 emit => '. sub%M %binop',
595 modified_flags => $status_flags
600 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
601 ins => [ "base", "index", "val", "mem" ],
602 emit => '. sub%M %SI2, %AM',
605 modified_flags => $status_flags
609 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
610 ins => [ "base", "index", "left", "right", "mem" ],
612 emit => '. sbb%M %binop',
615 modified_flags => $status_flags
621 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
628 outs => [ "low_res", "high_res" ],
630 modified_flags => $status_flags
635 state => "exc_pinned",
636 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ],
637 out => [ "eax", "edx", "none" ] },
638 ins => [ "base", "index", "left_low", "left_high", "right", "mem" ],
639 outs => [ "div_res", "mod_res", "M" ],
640 attr => "ia32_op_flavour_t dm_flav",
641 am => "source,ternary",
642 init_attr => "attr->data.op_flav = dm_flav;",
643 emit => ". idiv%M %unop4",
646 modified_flags => $status_flags
651 state => "exc_pinned",
652 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ],
653 out => [ "eax", "edx", "none" ] },
654 ins => [ "base", "index", "left_low", "left_high", "right", "mem" ],
655 outs => [ "div_res", "mod_res", "M" ],
656 attr => "ia32_op_flavour_t dm_flav",
657 am => "source,ternary",
658 init_attr => "attr->data.op_flav = dm_flav;",
659 emit => ". div%M %unop4",
662 modified_flags => $status_flags
667 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
668 ins => [ "left", "right" ],
670 emit => '. shl %SB1, %S0',
673 modified_flags => $status_flags
678 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
679 ins => [ "base", "index", "count", "mem" ],
680 emit => '. shl%M %SI2, %AM',
683 modified_flags => $status_flags
687 cmp_attr => "return 1;",
688 # value, cnt, dependency
693 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
695 # Out requirements is: different from all in
696 # This is because, out must be different from LowPart and ShiftCount.
697 # We could say "!ecx !in_r4" but it can occur, that all values live through
698 # this Shift and the only value dying is the ShiftCount. Then there would be a
699 # register missing, as result must not be ecx and all other registers are
700 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
701 # (and probably never will). So we create artificial interferences of the result
702 # with all inputs, so the spiller can always assure a free register.
703 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
706 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
707 ins => [ "left_high", "left_low", "right" ],
708 am => "dest,ternary",
709 emit => '. shld%M %SB2, %S1, %S0',
713 modified_flags => $status_flags
717 cmp_attr => "return 1;",
723 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
724 ins => [ "val", "count" ],
726 emit => '. shr %SB1, %S0',
729 modified_flags => $status_flags
734 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
735 ins => [ "base", "index", "count", "mem" ],
736 emit => '. shr%M %SI2, %AM',
739 modified_flags => $status_flags
743 cmp_attr => "return 1;",
744 # value, cnt, dependency
749 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
751 # Out requirements is: different from all in
752 # This is because, out must be different from LowPart and ShiftCount.
753 # We could say "!ecx !in_r4" but it can occur, that all values live through
754 # this Shift and the only value dying is the ShiftCount. Then there would be a
755 # register missing, as result must not be ecx and all other registers are
756 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
757 # (and probably never will). So we create artificial interferences of the result
758 # with all inputs, so the spiller can always assure a free register.
759 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
762 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
763 ins => [ "left_high", "left_low", "right" ],
764 am => "dest,ternary",
765 emit => '. shrd%M %SB2, %S1, %S0',
769 modified_flags => $status_flags
773 cmp_attr => "return 1;",
779 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
780 ins => [ "val", "count" ],
782 emit => '. sar %SB1, %S0',
785 modified_flags => $status_flags
790 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
791 ins => [ "base", "index", "count", "mem" ],
792 emit => '. sar%M %SI2, %AM',
795 modified_flags => $status_flags
799 cmp_attr => "return 1;",
805 cmp_attr => "return 1;",
806 # value, cnt, dependency
812 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
813 ins => [ "val", "count" ],
815 emit => '. ror %SB1, %S0',
818 modified_flags => $status_flags
823 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
824 ins => [ "base", "index", "count", "mem" ],
825 emit => '. ror%M %SI2, %AM',
828 modified_flags => $status_flags
833 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
834 ins => [ "val", "count" ],
836 emit => '. rol %SB1, %S0',
839 modified_flags => $status_flags
844 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
845 ins => [ "base", "index", "count", "mem" ],
846 emit => '. rol%M %SI2, %AM',
849 modified_flags => $status_flags
856 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
862 modified_flags => $status_flags
867 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
868 ins => [ "base", "index", "mem" ],
869 emit => '. neg%M %AM',
872 modified_flags => $status_flags
877 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "gp" ] },
878 outs => [ "low_res", "high_res" ],
880 modified_flags => $status_flags
885 cmp_attr => "return 1;",
891 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
896 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
901 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
902 ins => [ "base", "index", "mem" ],
903 emit => '. inc%M %AM',
906 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
911 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
916 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
921 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
922 ins => [ "base", "index", "mem" ],
923 emit => '. dec%M %AM',
926 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
931 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
942 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
943 ins => [ "base", "index", "mem" ],
944 emit => '. not%M %AM',
947 modified_flags => [],
955 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
956 out => [ "none", "none"] },
957 ins => [ "base", "index", "left", "right", "mem" ],
958 outs => [ "false", "true" ],
960 am => "source,binary",
961 init_attr => "attr->pn_code = pnc;",
963 units => [ "BRANCH" ],
969 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
971 out => [ "none", "none"] },
972 ins => [ "base", "index", "left", "right", "mem" ],
973 outs => [ "false", "true" ],
975 am => "source,binary",
976 init_attr => "attr->pn_code = pnc;",
978 units => [ "BRANCH" ],
984 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
985 out => [ "none", "none" ] },
986 ins => [ "base", "index", "left", "right", "mem" ],
987 outs => [ "false", "true" ],
989 am => "source,binary",
990 init_attr => "attr->pn_code = pnc;",
992 units => [ "BRANCH" ],
998 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1000 out => [ "none", "none" ] },
1001 ins => [ "base", "index", "left", "right", "mem" ],
1002 outs => [ "false", "true" ],
1004 am => "source,binary",
1005 init_attr => "attr->pn_code = pnc;",
1007 units => [ "BRANCH" ],
1012 op_flags => "L|X|Y",
1013 reg_req => { in => [ "gp" ], out => [ "none" ] },
1015 units => [ "BRANCH" ],
1022 reg_req => { in => [ "gp" ] },
1023 emit => '. jmp *%S0',
1024 units => [ "BRANCH" ],
1026 modified_flags => []
1032 reg_req => { out => [ "gp" ] },
1034 attr => "ir_entity *symconst, int symconst_sign, long offset",
1035 attr_type => "ia32_immediate_attr_t",
1043 reg_req => { out => [ "gp_UKNWN" ] },
1053 reg_req => { out => [ "vfp_UKNWN" ] },
1057 attr_type => "ia32_x87_attr_t",
1064 reg_req => { out => [ "xmm_UKNWN" ] },
1074 reg_req => { out => [ "gp_NOREG" ] },
1084 reg_req => { out => [ "vfp_NOREG" ] },
1088 attr_type => "ia32_x87_attr_t",
1095 reg_req => { out => [ "xmm_NOREG" ] },
1105 reg_req => { out => [ "fp_cw" ] },
1109 modified_flags => $fpcw_flags
1115 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
1116 ins => [ "base", "index", "mem" ],
1118 emit => ". fldcw %AM",
1121 modified_flags => $fpcw_flags
1127 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
1128 ins => [ "base", "index", "fpcw", "mem" ],
1130 emit => ". fnstcw %AM",
1136 # we should not rematrialize this node. It produces 2 results and has
1137 # very strict constrains
1138 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
1139 ins => [ "val", "globbered" ],
1147 # Note that we add additional latency values depending on address mode, so a
1148 # lateny of 0 for load is correct
1152 state => "exc_pinned",
1153 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
1154 ins => [ "base", "index", "mem" ],
1155 outs => [ "res", "M" ],
1157 emit => ". mov%SE%ME%.l %AM, %D0",
1163 cmp_attr => "return 1;",
1164 outs => [ "res", "M" ],
1170 cmp_attr => "return 1;",
1171 state => "exc_pinned",
1178 state => "exc_pinned",
1179 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
1180 ins => [ "base", "index", "val", "mem" ],
1181 emit => '. mov%M %SI2, %AM',
1189 state => "exc_pinned",
1190 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
1191 emit => '. mov%M %SB2, %AM',
1199 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1200 ins => [ "base", "index" ],
1201 emit => '. leal %AM, %D0',
1205 modified_flags => [],
1209 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
1210 emit => '. push%M %unop2',
1211 ins => [ "base", "index", "val", "stack", "mem" ],
1212 outs => [ "stack:I|S", "M" ],
1213 am => "source,binary",
1216 modified_flags => [],
1220 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
1221 emit => '. pop%M %DAM1',
1222 outs => [ "stack:I|S", "res", "M" ],
1223 ins => [ "base", "index", "stack", "mem" ],
1225 latency => 3, # Pop is more expensive than Push on Athlon
1227 modified_flags => [],
1231 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1233 outs => [ "frame:I", "stack:I|S", "M" ],
1239 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1241 outs => [ "frame:I", "stack:I|S" ],
1249 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1250 am => "source,binary",
1251 emit => '. addl %binop',
1252 outs => [ "stack:S", "M" ],
1254 modified_flags => $status_flags
1260 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "gp", "none" ] },
1261 am => "source,binary",
1262 emit => ". subl %binop\n".
1263 ". movl %%esp, %D1",
1264 outs => [ "stack:I|S", "addr", "M" ],
1266 modified_flags => $status_flags
1271 reg_req => { out => [ "gp" ] },
1275 # the int instruction
1277 reg_req => { in => [ "gp" ], out => [ "none" ] },
1279 emit => '. int %SI0',
1281 cmp_attr => "return 1;",
1285 #-----------------------------------------------------------------------------#
1286 # _____ _____ ______ __ _ _ _ #
1287 # / ____/ ____| ____| / _| | | | | | #
1288 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1289 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1290 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1291 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1292 #-----------------------------------------------------------------------------#
1296 reg_req => { out => [ "xmm" ] },
1297 emit => '. xorp%XSD %D1, %D1',
1303 # commutative operations
1307 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1308 emit => '. add%XXM %binop',
1316 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1317 emit => '. mul%XXM %binop',
1325 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1326 emit => '. max%XXM %binop',
1334 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1335 emit => '. min%XXM %binop',
1343 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1344 emit => '. andp%XSD %binop',
1352 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1353 emit => '. orp%XSD %binop',
1360 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1361 emit => '. xorp%XSD %binop',
1367 # not commutative operations
1371 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1372 emit => '. andnp%XSD %binop',
1380 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1381 emit => '. sub%XXM %binop',
1389 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1390 outs => [ "res", "M" ],
1391 emit => '. div%XXM %binop',
1400 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1408 op_flags => "L|X|Y",
1409 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1410 ins => [ "base", "index", "left", "right", "mem" ],
1411 outs => [ "false", "true" ],
1413 init_attr => "attr->pn_code = pnc;",
1422 state => "exc_pinned",
1423 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1424 emit => '. mov%XXM %AM, %D0',
1425 attr => "ir_mode *load_mode",
1426 init_attr => "attr->ls_mode = load_mode;",
1427 outs => [ "res", "M" ],
1434 state => "exc_pinned",
1435 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1436 emit => '. mov%XXM %S2, %AM',
1444 state => "exc_pinned",
1445 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1446 ins => [ "base", "index", "val", "mem" ],
1447 emit => '. mov%XXM %S2, %AM',
1455 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1456 emit => '. cvtsi2ss %D0, %AM',
1464 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1465 emit => '. cvtsi2sd %unop2',
1474 cmp_attr => "return 1;",
1480 cmp_attr => "return 1;",
1489 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1490 outs => [ "DST", "SRC", "CNT", "M" ],
1492 modified_flags => [ "DF" ]
1498 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1499 outs => [ "DST", "SRC", "M" ],
1501 modified_flags => [ "DF" ]
1507 state => "exc_pinned",
1508 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1510 ins => [ "base", "index", "val", "mem" ],
1511 attr => "ir_mode *smaller_mode",
1512 init_attr => "attr->ls_mode = smaller_mode;",
1514 modified_flags => $status_flags
1518 state => "exc_pinned",
1519 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1520 ins => [ "base", "index", "val", "mem" ],
1522 attr => "ir_mode *smaller_mode",
1523 init_attr => "attr->ls_mode = smaller_mode;",
1525 modified_flags => $status_flags
1529 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1536 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1543 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1551 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1552 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1553 attr => "pn_Cmp pn_code",
1554 init_attr => "attr->pn_code = pn_code;",
1562 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1563 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1564 attr => "pn_Cmp pn_code",
1565 init_attr => "attr->pn_code = pn_code;",
1573 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1574 out => [ "in_r7" ] },
1575 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1577 attr => "pn_Cmp pn_code",
1578 init_attr => "attr->pn_code = pn_code;",
1586 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1587 out => [ "in_r7" ] },
1588 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1590 attr => "pn_Cmp pn_code",
1591 init_attr => "attr->pn_code = pn_code;",
1599 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1607 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "gp", "gp" ],
1608 out => [ "in_r7" ] },
1609 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1612 units => [ "VFP", "GP" ],
1614 attr_type => "ia32_x87_attr_t",
1619 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1620 out => [ "eax ebx ecx edx" ] },
1621 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1622 attr => "pn_Cmp pn_code",
1623 init_attr => "attr->pn_code = pn_code;",
1631 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1633 out => [ "eax ebx ecx edx" ] },
1634 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1635 attr => "pn_Cmp pn_code",
1636 init_attr => "attr->pn_code = pn_code;",
1644 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1645 out => [ "eax ebx ecx edx" ] },
1646 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1647 attr => "pn_Cmp pn_code",
1648 init_attr => "attr->pn_code = pn_code;",
1656 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1658 out => [ "eax ebx ecx edx" ] },
1659 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1660 attr => "pn_Cmp pn_code",
1661 init_attr => "attr->pn_code = pn_code;",
1669 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1677 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1681 attr_type => "ia32_x87_attr_t",
1686 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1690 attr_type => "ia32_x87_attr_t",
1693 #----------------------------------------------------------#
1695 # (_) | | | | / _| | | | #
1696 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1697 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1698 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1699 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1701 # _ __ ___ __| | ___ ___ #
1702 # | '_ \ / _ \ / _` |/ _ \/ __| #
1703 # | | | | (_) | (_| | __/\__ \ #
1704 # |_| |_|\___/ \__,_|\___||___/ #
1705 #----------------------------------------------------------#
1709 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1710 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1714 attr_type => "ia32_x87_attr_t",
1719 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1720 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1724 attr_type => "ia32_x87_attr_t",
1729 cmp_attr => "return 1;",
1735 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1736 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1740 attr_type => "ia32_x87_attr_t",
1744 cmp_attr => "return 1;",
1749 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
1750 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1751 outs => [ "res", "M" ],
1754 attr_type => "ia32_x87_attr_t",
1758 cmp_attr => "return 1;",
1759 outs => [ "res", "M" ],
1764 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1765 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1769 attr_type => "ia32_x87_attr_t",
1773 cmp_attr => "return 1;",
1779 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1784 attr_type => "ia32_x87_attr_t",
1789 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1794 attr_type => "ia32_x87_attr_t",
1797 # virtual Load and Store
1801 state => "exc_pinned",
1802 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1803 ins => [ "base", "index", "mem" ],
1804 outs => [ "res", "M" ],
1805 attr => "ir_mode *load_mode",
1806 init_attr => "attr->attr.ls_mode = load_mode;",
1809 attr_type => "ia32_x87_attr_t",
1814 state => "exc_pinned",
1815 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1816 ins => [ "base", "index", "val", "mem" ],
1817 attr => "ir_mode *store_mode",
1818 init_attr => "attr->attr.ls_mode = store_mode;",
1822 attr_type => "ia32_x87_attr_t",
1828 state => "exc_pinned",
1829 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1830 outs => [ "res", "M" ],
1831 ins => [ "base", "index", "mem" ],
1834 attr_type => "ia32_x87_attr_t",
1838 cmp_attr => "return 1;",
1839 outs => [ "res", "M" ],
1844 state => "exc_pinned",
1845 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1846 ins => [ "base", "index", "val", "fpcw", "mem" ],
1850 attr_type => "ia32_x87_attr_t",
1854 cmp_attr => "return 1;",
1855 state => "exc_pinned",
1865 reg_req => { out => [ "vfp" ] },
1869 attr_type => "ia32_x87_attr_t",
1874 reg_req => { out => [ "vfp" ] },
1878 attr_type => "ia32_x87_attr_t",
1883 reg_req => { out => [ "vfp" ] },
1887 attr_type => "ia32_x87_attr_t",
1892 reg_req => { out => [ "vfp" ] },
1896 attr_type => "ia32_x87_attr_t",
1901 reg_req => { out => [ "vfp" ] },
1905 attr_type => "ia32_x87_attr_t",
1910 reg_req => { out => [ "vfp" ] },
1914 attr_type => "ia32_x87_attr_t",
1919 reg_req => { out => [ "vfp" ] },
1923 attr_type => "ia32_x87_attr_t",
1930 op_flags => "L|X|Y",
1931 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1932 ins => [ "left", "right" ],
1933 outs => [ "false", "true", "temp_reg_eax" ],
1935 init_attr => "attr->attr.pn_code = pnc;",
1938 attr_type => "ia32_x87_attr_t",
1941 #------------------------------------------------------------------------#
1942 # ___ _____ __ _ _ _ #
1943 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1944 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1945 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1946 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1947 #------------------------------------------------------------------------#
1949 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1950 # are swapped, we work this around in the emitter...
1954 rd_constructor => "NONE",
1956 emit => '. fadd%XM %x87_binop',
1957 attr_type => "ia32_x87_attr_t",
1962 rd_constructor => "NONE",
1964 emit => '. faddp%XM %x87_binop',
1965 attr_type => "ia32_x87_attr_t",
1970 rd_constructor => "NONE",
1972 emit => '. fmul%XM %x87_binop',
1973 attr_type => "ia32_x87_attr_t",
1978 rd_constructor => "NONE",
1980 emit => '. fmulp%XM %x87_binop',,
1981 attr_type => "ia32_x87_attr_t",
1986 rd_constructor => "NONE",
1988 emit => '. fsub%XM %x87_binop',
1989 attr_type => "ia32_x87_attr_t",
1994 rd_constructor => "NONE",
1996 # see note about gas bugs
1997 emit => '. fsubrp%XM %x87_binop',
1998 attr_type => "ia32_x87_attr_t",
2003 rd_constructor => "NONE",
2006 emit => '. fsubr%XM %x87_binop',
2007 attr_type => "ia32_x87_attr_t",
2012 rd_constructor => "NONE",
2015 # see note about gas bugs
2016 emit => '. fsubp%XM %x87_binop',
2017 attr_type => "ia32_x87_attr_t",
2022 rd_constructor => "NONE",
2025 attr_type => "ia32_x87_attr_t",
2028 # this node is just here, to keep the simulator running
2029 # we can omit this when a fprem simulation function exists
2032 rd_constructor => "NONE",
2035 attr_type => "ia32_x87_attr_t",
2040 rd_constructor => "NONE",
2042 emit => '. fdiv%XM %x87_binop',
2043 attr_type => "ia32_x87_attr_t",
2048 rd_constructor => "NONE",
2050 # see note about gas bugs
2051 emit => '. fdivrp%XM %x87_binop',
2052 attr_type => "ia32_x87_attr_t",
2057 rd_constructor => "NONE",
2059 emit => '. fdivr%XM %x87_binop',
2060 attr_type => "ia32_x87_attr_t",
2065 rd_constructor => "NONE",
2067 # see note about gas bugs
2068 emit => '. fdivp%XM %x87_binop',
2069 attr_type => "ia32_x87_attr_t",
2074 rd_constructor => "NONE",
2077 attr_type => "ia32_x87_attr_t",
2082 rd_constructor => "NONE",
2085 attr_type => "ia32_x87_attr_t",
2088 # x87 Load and Store
2091 rd_constructor => "NONE",
2092 op_flags => "R|L|F",
2093 state => "exc_pinned",
2095 emit => '. fld%XM %AM',
2096 attr_type => "ia32_x87_attr_t",
2100 rd_constructor => "NONE",
2101 op_flags => "R|L|F",
2102 state => "exc_pinned",
2104 emit => '. fst%XM %AM',
2106 attr_type => "ia32_x87_attr_t",
2110 rd_constructor => "NONE",
2111 op_flags => "R|L|F",
2112 state => "exc_pinned",
2114 emit => '. fstp%XM %AM',
2116 attr_type => "ia32_x87_attr_t",
2123 rd_constructor => "NONE",
2125 emit => '. fild%M %AM',
2126 attr_type => "ia32_x87_attr_t",
2131 state => "exc_pinned",
2132 rd_constructor => "NONE",
2134 emit => '. fist%M %AM',
2136 attr_type => "ia32_x87_attr_t",
2141 state => "exc_pinned",
2142 rd_constructor => "NONE",
2144 emit => '. fistp%M %AM',
2146 attr_type => "ia32_x87_attr_t",
2152 op_flags => "R|c|K",
2156 attr_type => "ia32_x87_attr_t",
2160 op_flags => "R|c|K",
2164 attr_type => "ia32_x87_attr_t",
2168 op_flags => "R|c|K",
2172 attr_type => "ia32_x87_attr_t",
2176 op_flags => "R|c|K",
2180 attr_type => "ia32_x87_attr_t",
2184 op_flags => "R|c|K",
2188 attr_type => "ia32_x87_attr_t",
2192 op_flags => "R|c|K",
2195 emit => '. fldll2t',
2196 attr_type => "ia32_x87_attr_t",
2200 op_flags => "R|c|K",
2204 attr_type => "ia32_x87_attr_t",
2208 # Note that it is NEVER allowed to do CSE on these nodes
2209 # Moreover, note the virtual register requierements!
2214 cmp_attr => "return 1;",
2215 emit => '. fxch %X0',
2216 attr_type => "ia32_x87_attr_t",
2222 cmp_attr => "return 1;",
2223 emit => '. fld %X0',
2224 attr_type => "ia32_x87_attr_t",
2229 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2230 cmp_attr => "return 1;",
2231 emit => '. fld %X0',
2232 attr_type => "ia32_x87_attr_t",
2238 cmp_attr => "return 1;",
2239 emit => '. fstp %X0',
2240 attr_type => "ia32_x87_attr_t",
2246 op_flags => "L|X|Y",
2248 attr_type => "ia32_x87_attr_t",
2252 op_flags => "L|X|Y",
2254 attr_type => "ia32_x87_attr_t",
2258 op_flags => "L|X|Y",
2260 attr_type => "ia32_x87_attr_t",
2264 op_flags => "L|X|Y",
2266 attr_type => "ia32_x87_attr_t",
2270 op_flags => "L|X|Y",
2272 attr_type => "ia32_x87_attr_t",
2276 op_flags => "L|X|Y",
2278 attr_type => "ia32_x87_attr_t",
2282 # -------------------------------------------------------------------------------- #
2283 # ____ ____ _____ _ _ #
2284 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2285 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2286 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2287 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2289 # -------------------------------------------------------------------------------- #
2292 # Spilling and reloading of SSE registers, hardcoded, not generated #
2296 state => "exc_pinned",
2297 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2298 emit => '. movdqu %D0, %AM',
2299 outs => [ "res", "M" ],
2305 state => "exc_pinned",
2306 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2307 emit => '. movdqu %binop',
2314 # Include the generated SIMD node specification written by the SIMD optimization
2315 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2316 unless ($return = do $my_script_name) {
2317 warn "couldn't parse $my_script_name: $@" if $@;
2318 warn "couldn't do $my_script_name: $!" unless defined $return;
2319 warn "couldn't run $my_script_name" unless $return;