3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 SB1 => "${arch}_emit_8bit_source_register(env, node, 1);",
257 SB2 => "${arch}_emit_8bit_source_register(env, node, 2);",
258 SW0 => "${arch}_emit_16bit_source_register(env, node, 0);",
259 SI0 => "${arch}_emit_source_register_or_immediate(env, node, 0);",
260 SI1 => "${arch}_emit_source_register_or_immediate(env, node, 1);",
261 SI2 => "${arch}_emit_source_register_or_immediate(env, node, 2);",
262 SI3 => "${arch}_emit_source_register_or_immediate(env, node, 3);",
263 D0 => "${arch}_emit_dest_register(env, node, 0);",
264 D1 => "${arch}_emit_dest_register(env, node, 1);",
265 D2 => "${arch}_emit_dest_register(env, node, 2);",
266 D3 => "${arch}_emit_dest_register(env, node, 3);",
267 D4 => "${arch}_emit_dest_register(env, node, 4);",
268 D5 => "${arch}_emit_dest_register(env, node, 5);",
269 X0 => "${arch}_emit_x87_name(env, node, 0);",
270 X1 => "${arch}_emit_x87_name(env, node, 1);",
271 X2 => "${arch}_emit_x87_name(env, node, 2);",
272 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
273 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
274 ia32_emit_mode_suffix(env, node);",
275 M => "${arch}_emit_mode_suffix(env, node);",
276 XM => "${arch}_emit_x87_mode_suffix(env, node);",
277 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
278 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
279 AM => "${arch}_emit_am(env, node);",
280 unop0 => "${arch}_emit_unop(env, node, 0);",
281 unop1 => "${arch}_emit_unop(env, node, 1);",
282 unop2 => "${arch}_emit_unop(env, node, 2);",
283 unop3 => "${arch}_emit_unop(env, node, 3);",
284 unop4 => "${arch}_emit_unop(env, node, 4);",
285 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
286 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 0);",
287 binop => "${arch}_emit_binop(env, node);",
288 x87_binop => "${arch}_emit_x87_binop(env, node);",
291 #--------------------------------------------------#
294 # _ __ _____ __ _ _ __ ___ _ __ ___ #
295 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
296 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
297 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
300 #--------------------------------------------------#
302 $default_attr_type = "ia32_attr_t";
303 $default_copy_attr = "ia32_copy_attr";
305 sub ia32_custom_init_attr {
309 if(defined($node->{modified_flags})) {
310 $res .= "\t/*attr->data.flags |= arch_irn_flags_modify_flags;*/\n";
312 if(defined($node->{am})) {
313 my $am = $node->{am};
314 if($am eq "full,binary") {
315 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_binary);";
316 } elsif($am eq "full,unary") {
317 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_unary);";
318 } elsif($am eq "source,binary") {
319 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_binary);";
320 } elsif($am eq "dest,unary") {
321 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);";
322 } elsif($am eq "dest,binary") {
323 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);";
324 } elsif($am eq "dest,ternary") {
325 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);";
326 } elsif($am eq "source,ternary") {
327 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_ternary);";
328 } elsif($am eq "none") {
331 die("Invalid address mode '$am' specified on op $name");
336 $custom_init_attr_func = \&ia32_custom_init_attr;
339 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
341 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
342 "\tinit_ia32_x87_attributes(res);",
344 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
345 "\tinit_ia32_x87_attributes(res);".
346 "\tinit_ia32_asm_attributes(res);",
347 ia32_immediate_attr_t =>
348 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
349 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
353 ia32_attr_t => "ia32_compare_nodes_attr",
354 ia32_x87_attr_t => "ia32_compare_x87_attr",
355 ia32_asm_attr_t => "ia32_compare_asm_attr",
356 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
362 $mode_xmm = "mode_E";
363 $mode_gp = "mode_Iu";
364 $mode_fpcw = "mode_fpcw";
365 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
366 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
367 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
375 reg_req => { out => [ "gp_NOREG" ] },
376 attr => "ir_entity *symconst, int symconst_sign, long offset",
377 attr_type => "ia32_immediate_attr_t",
385 out_arity => "variable",
386 attr_type => "ia32_asm_attr_t",
393 reg_req => { out => [ "gp" ] },
398 cmp_attr => "return 1;",
401 #-----------------------------------------------------------------#
404 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
405 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
406 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
407 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
410 #-----------------------------------------------------------------#
412 # commutative operations
415 # All nodes supporting Addressmode have 5 INs:
416 # 1 - base r1 == NoReg in case of no AM or no base
417 # 2 - index r2 == NoReg in case of no AM or no index
418 # 3 - op1 r3 == always present
419 # 4 - op2 r4 == NoReg in case of immediate operation
420 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
424 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
425 ins => [ "base", "index", "left", "right", "mem" ],
426 emit => '. add%M %binop',
430 modified_flags => $status_flags
435 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
436 ins => [ "base", "index", "val", "mem" ],
437 emit => ". add%M %SI2, %AM",
440 modified_flags => $status_flags
444 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
445 emit => '. adc%M %binop',
449 modified_flags => $status_flags
455 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
462 outs => [ "low_res", "high_res" ],
464 modified_flags => $status_flags
470 cmp_attr => "return 1;",
476 cmp_attr => "return 1;",
481 # we should not rematrialize this node. It produces 2 results and has
482 # very strict constrains
483 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
484 emit => '. mul%M %unop3',
485 outs => [ "EAX", "EDX", "M" ],
486 ins => [ "base", "index", "val_high", "val_low", "mem" ],
487 am => "source,binary",
490 modified_flags => $status_flags
494 # we should not rematrialize this node. It produces 2 results and has
495 # very strict constrains
497 cmp_attr => "return 1;",
498 outs => [ "EAX", "EDX", "M" ],
504 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
505 ins => [ "base", "index", "left", "right", "mem" ],
506 emit => '. imul%M %binop',
507 am => "source,binary",
511 modified_flags => $status_flags
516 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
517 emit => '. imul%M %unop3',
518 outs => [ "EAX", "EDX", "M" ],
519 ins => [ "base", "index", "val_high", "val_low", "mem" ],
520 am => "source,binary",
523 modified_flags => $status_flags
527 # we should not rematrialize this node. It produces 2 results and has
528 # very strict constrains
530 cmp_attr => "return 1;",
531 outs => [ "EAX", "EDX", "M" ],
537 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
538 ins => [ "base", "index", "left", "right", "mem" ],
540 emit => '. and%M %binop',
543 modified_flags => $status_flags
548 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
549 emit => '. and%M %SI2, %AM',
552 modified_flags => $status_flags
557 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
558 ins => [ "base", "index", "left", "right", "mem" ],
560 emit => '. or%M %binop',
563 modified_flags => $status_flags
568 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
569 ins => [ "base", "index", "val", "mem" ],
570 emit => '. or%M %SI2, %AM',
573 modified_flags => $status_flags
578 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
579 ins => [ "base", "index", "left", "right", "mem" ],
581 emit => '. xor%M %binop',
584 modified_flags => $status_flags
589 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
590 ins => [ "base", "index", "val", "mem" ],
591 emit => '. xor%M %SI2, %AM',
594 modified_flags => $status_flags
599 cmp_attr => "return 1;",
601 modified_flags => $status_flags
604 # not commutative operations
608 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
609 ins => [ "base", "index", "left", "right", "mem" ],
611 emit => '. sub%M %binop',
614 modified_flags => $status_flags
619 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
620 ins => [ "base", "index", "val", "mem" ],
621 emit => '. sub%M %SI2, %AM',
624 modified_flags => $status_flags
628 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
629 ins => [ "base", "index", "left", "right", "mem" ],
631 emit => '. sbb%M %binop',
634 modified_flags => $status_flags
640 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
647 outs => [ "low_res", "high_res" ],
649 modified_flags => $status_flags
654 cmp_attr => "return 1;",
659 cmp_attr => "return 1;",
665 state => "exc_pinned",
666 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ],
667 out => [ "eax", "edx", "none" ] },
668 ins => [ "base", "index", "left_low", "left_high", "right", "mem" ],
669 outs => [ "div_res", "mod_res", "M" ],
670 attr => "ia32_op_flavour_t dm_flav",
671 am => "source,ternary",
672 init_attr => "attr->data.op_flav = dm_flav;",
673 emit => ". idiv%M %unop4",
676 modified_flags => $status_flags
681 state => "exc_pinned",
682 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ],
683 out => [ "eax", "edx", "none" ] },
684 ins => [ "base", "index", "left_low", "left_high", "right", "mem" ],
685 outs => [ "div_res", "mod_res", "M" ],
686 attr => "ia32_op_flavour_t dm_flav",
687 am => "source,ternary",
688 init_attr => "attr->data.op_flav = dm_flav;",
689 emit => ". div%M %unop4",
692 modified_flags => $status_flags
697 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
698 ins => [ "left", "right" ],
700 emit => '. shl %SB1, %S0',
703 modified_flags => $status_flags
708 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
709 ins => [ "base", "index", "count", "mem" ],
710 emit => '. shl%M %SI2, %AM',
713 modified_flags => $status_flags
717 cmp_attr => "return 1;",
718 # value, cnt, dependency
723 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
725 # Out requirements is: different from all in
726 # This is because, out must be different from LowPart and ShiftCount.
727 # We could say "!ecx !in_r4" but it can occur, that all values live through
728 # this Shift and the only value dying is the ShiftCount. Then there would be a
729 # register missing, as result must not be ecx and all other registers are
730 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
731 # (and probably never will). So we create artificial interferences of the result
732 # with all inputs, so the spiller can always assure a free register.
733 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
736 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
737 ins => [ "left_high", "left_low", "right" ],
738 am => "dest,ternary",
739 emit => '. shld%M %SB2, %S1, %S0',
743 modified_flags => $status_flags
747 cmp_attr => "return 1;",
753 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
754 ins => [ "val", "count" ],
756 emit => '. shr %SB1, %S0',
759 modified_flags => $status_flags
764 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
765 ins => [ "base", "index", "count", "mem" ],
766 emit => '. shr%M %SI2, %AM',
769 modified_flags => $status_flags
773 cmp_attr => "return 1;",
774 # value, cnt, dependency
779 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
781 # Out requirements is: different from all in
782 # This is because, out must be different from LowPart and ShiftCount.
783 # We could say "!ecx !in_r4" but it can occur, that all values live through
784 # this Shift and the only value dying is the ShiftCount. Then there would be a
785 # register missing, as result must not be ecx and all other registers are
786 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
787 # (and probably never will). So we create artificial interferences of the result
788 # with all inputs, so the spiller can always assure a free register.
789 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
792 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
793 ins => [ "left_high", "left_low", "right" ],
794 am => "dest,ternary",
795 emit => '. shrd%M %SB2, %S1, %S0',
799 modified_flags => $status_flags
803 cmp_attr => "return 1;",
809 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
810 ins => [ "val", "count" ],
812 emit => '. sar %SB1, %S0',
815 modified_flags => $status_flags
820 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
821 ins => [ "base", "index", "count", "mem" ],
822 emit => '. sar%M %SI2, %AM',
825 modified_flags => $status_flags
829 cmp_attr => "return 1;",
835 cmp_attr => "return 1;",
836 # value, cnt, dependency
842 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
843 ins => [ "val", "count" ],
845 emit => '. ror %SB1, %S0',
848 modified_flags => $status_flags
853 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
854 ins => [ "base", "index", "count", "mem" ],
855 emit => '. ror%M %SI2, %AM',
858 modified_flags => $status_flags
863 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
864 ins => [ "val", "count" ],
866 emit => '. rol %SB1, %S0',
869 modified_flags => $status_flags
874 reg_req => { in => [ "gp", "gp", "ecx", "none" ], out => [ "none" ] },
875 ins => [ "base", "index", "count", "mem" ],
876 emit => '. rol%M %SI2, %AM',
879 modified_flags => $status_flags
886 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
892 modified_flags => $status_flags
897 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
898 ins => [ "base", "index", "mem" ],
899 emit => '. neg%M %AM',
902 modified_flags => $status_flags
907 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "gp" ] },
908 outs => [ "low_res", "high_res" ],
910 modified_flags => $status_flags
915 cmp_attr => "return 1;",
921 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
926 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
931 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
932 ins => [ "base", "index", "mem" ],
933 emit => '. inc%M %AM',
936 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
941 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
946 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
951 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
952 ins => [ "base", "index", "mem" ],
953 emit => '. dec%M %AM',
956 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
961 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
972 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
973 ins => [ "base", "index", "mem" ],
974 emit => '. not%M %AM',
977 modified_flags => [],
985 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
986 out => [ "none", "none"] },
987 ins => [ "base", "index", "left", "right", "mem" ],
988 outs => [ "false", "true" ],
990 am => "source,binary",
991 init_attr => "attr->pn_code = pnc;",
993 units => [ "BRANCH" ],
999 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1001 out => [ "none", "none"] },
1002 ins => [ "base", "index", "left", "right", "mem" ],
1003 outs => [ "false", "true" ],
1005 am => "source,binary",
1006 init_attr => "attr->pn_code = pnc;",
1008 units => [ "BRANCH" ],
1013 op_flags => "L|X|Y",
1014 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1015 out => [ "none", "none" ] },
1016 ins => [ "base", "index", "left", "right", "mem" ],
1017 outs => [ "false", "true" ],
1019 am => "source,binary",
1020 init_attr => "attr->pn_code = pnc;",
1022 units => [ "BRANCH" ],
1027 op_flags => "L|X|Y",
1028 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1030 out => [ "none", "none" ] },
1031 ins => [ "base", "index", "left", "right", "mem" ],
1032 outs => [ "false", "true" ],
1034 am => "source,binary",
1035 init_attr => "attr->pn_code = pnc;",
1037 units => [ "BRANCH" ],
1042 op_flags => "L|X|Y",
1043 reg_req => { in => [ "gp" ], out => [ "none" ] },
1045 units => [ "BRANCH" ],
1052 reg_req => { in => [ "gp" ] },
1053 emit => '. jmp *%S0',
1054 units => [ "BRANCH" ],
1056 modified_flags => []
1062 reg_req => { out => [ "gp" ] },
1064 attr => "ir_entity *symconst, int symconst_sign, long offset",
1065 attr_type => "ia32_immediate_attr_t",
1073 reg_req => { out => [ "gp_UKNWN" ] },
1083 reg_req => { out => [ "vfp_UKNWN" ] },
1087 attr_type => "ia32_x87_attr_t",
1094 reg_req => { out => [ "xmm_UKNWN" ] },
1104 reg_req => { out => [ "gp_NOREG" ] },
1114 reg_req => { out => [ "vfp_NOREG" ] },
1118 attr_type => "ia32_x87_attr_t",
1125 reg_req => { out => [ "xmm_NOREG" ] },
1135 reg_req => { out => [ "fp_cw" ] },
1139 modified_flags => $fpcw_flags
1145 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
1146 ins => [ "base", "index", "mem" ],
1148 emit => ". fldcw %AM",
1151 modified_flags => $fpcw_flags
1157 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
1158 ins => [ "base", "index", "fpcw", "mem" ],
1160 emit => ". fnstcw %AM",
1166 # we should not rematrialize this node. It produces 2 results and has
1167 # very strict constrains
1168 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
1169 ins => [ "val", "globbered" ],
1177 # Note that we add additional latency values depending on address mode, so a
1178 # lateny of 0 for load is correct
1182 state => "exc_pinned",
1183 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
1184 ins => [ "base", "index", "mem" ],
1185 outs => [ "res", "M" ],
1187 emit => ". mov%SE%ME%.l %AM, %D0",
1193 cmp_attr => "return 1;",
1194 outs => [ "res", "M" ],
1200 cmp_attr => "return 1;",
1201 state => "exc_pinned",
1208 state => "exc_pinned",
1209 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
1210 ins => [ "base", "index", "val", "mem" ],
1211 emit => '. mov%M %SI2, %AM',
1219 state => "exc_pinned",
1220 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
1221 emit => '. mov%M %SB2, %AM',
1229 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1230 ins => [ "base", "index" ],
1231 emit => '. leal %AM, %D0',
1235 modified_flags => [],
1239 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
1240 emit => '. push%M %unop2',
1241 ins => [ "base", "index", "val", "stack", "mem" ],
1242 outs => [ "stack:I|S", "M" ],
1243 am => "source,binary",
1246 modified_flags => [],
1250 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
1251 emit => '. pop%M %DAM1',
1252 outs => [ "stack:I|S", "res", "M" ],
1253 ins => [ "base", "index", "stack", "mem" ],
1255 latency => 3, # Pop is more expensive than Push on Athlon
1257 modified_flags => [],
1261 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1263 outs => [ "frame:I", "stack:I|S", "M" ],
1269 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1271 outs => [ "frame:I", "stack:I|S" ],
1279 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1280 am => "source,binary",
1281 emit => '. addl %binop',
1282 outs => [ "stack:S", "M" ],
1284 modified_flags => $status_flags
1290 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "gp", "none" ] },
1291 am => "source,binary",
1292 emit => ". subl %binop\n".
1293 ". movl %%esp, %D1",
1294 outs => [ "stack:I|S", "addr", "M" ],
1296 modified_flags => $status_flags
1301 reg_req => { out => [ "gp" ] },
1305 # the int instruction
1307 reg_req => { in => [ "gp" ], out => [ "none" ] },
1309 emit => '. int %SI0',
1311 cmp_attr => "return 1;",
1315 #-----------------------------------------------------------------------------#
1316 # _____ _____ ______ __ _ _ _ #
1317 # / ____/ ____| ____| / _| | | | | | #
1318 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1319 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1320 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1321 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1322 #-----------------------------------------------------------------------------#
1326 reg_req => { out => [ "xmm" ] },
1327 emit => '. xorp%XSD %D1, %D1',
1333 # commutative operations
1337 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1338 emit => '. add%XXM %binop',
1346 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1347 emit => '. mul%XXM %binop',
1355 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1356 emit => '. max%XXM %binop',
1364 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1365 emit => '. min%XXM %binop',
1373 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1374 emit => '. andp%XSD %binop',
1382 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1383 emit => '. orp%XSD %binop',
1390 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1391 emit => '. xorp%XSD %binop',
1397 # not commutative operations
1401 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1402 emit => '. andnp%XSD %binop',
1410 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1411 emit => '. sub%XXM %binop',
1419 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1420 outs => [ "res", "M" ],
1421 emit => '. div%XXM %binop',
1430 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1438 op_flags => "L|X|Y",
1439 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1440 ins => [ "base", "index", "left", "right", "mem" ],
1441 outs => [ "false", "true" ],
1443 init_attr => "attr->pn_code = pnc;",
1452 state => "exc_pinned",
1453 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1454 emit => '. mov%XXM %AM, %D0',
1455 attr => "ir_mode *load_mode",
1456 init_attr => "attr->ls_mode = load_mode;",
1457 outs => [ "res", "M" ],
1464 state => "exc_pinned",
1465 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1466 emit => '. mov%XXM %S2, %AM',
1474 state => "exc_pinned",
1475 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1476 ins => [ "base", "index", "val", "mem" ],
1477 emit => '. mov%XXM %S2, %AM',
1485 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1486 emit => '. cvtsi2ss %D0, %AM',
1494 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1495 emit => '. cvtsi2sd %unop2',
1504 cmp_attr => "return 1;",
1510 cmp_attr => "return 1;",
1519 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1520 outs => [ "DST", "SRC", "CNT", "M" ],
1522 modified_flags => [ "DF" ]
1528 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1529 outs => [ "DST", "SRC", "M" ],
1531 modified_flags => [ "DF" ]
1537 state => "exc_pinned",
1538 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1540 ins => [ "base", "index", "val", "mem" ],
1541 attr => "ir_mode *smaller_mode",
1542 init_attr => "attr->ls_mode = smaller_mode;",
1544 modified_flags => $status_flags
1548 state => "exc_pinned",
1549 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1550 ins => [ "base", "index", "val", "mem" ],
1552 attr => "ir_mode *smaller_mode",
1553 init_attr => "attr->ls_mode = smaller_mode;",
1555 modified_flags => $status_flags
1559 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1566 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1573 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1581 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1582 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1583 attr => "pn_Cmp pn_code",
1584 init_attr => "attr->pn_code = pn_code;",
1592 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1593 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1594 attr => "pn_Cmp pn_code",
1595 init_attr => "attr->pn_code = pn_code;",
1603 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1604 out => [ "in_r7" ] },
1605 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1607 attr => "pn_Cmp pn_code",
1608 init_attr => "attr->pn_code = pn_code;",
1616 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ],
1617 out => [ "in_r7" ] },
1618 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1620 attr => "pn_Cmp pn_code",
1621 init_attr => "attr->pn_code = pn_code;",
1629 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1637 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "gp", "gp" ],
1638 out => [ "in_r7" ] },
1639 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true",
1642 units => [ "VFP", "GP" ],
1644 attr_type => "ia32_x87_attr_t",
1649 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1650 out => [ "eax ebx ecx edx" ] },
1651 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1652 attr => "pn_Cmp pn_code",
1653 init_attr => "attr->pn_code = pn_code;",
1661 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1663 out => [ "eax ebx ecx edx" ] },
1664 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1665 attr => "pn_Cmp pn_code",
1666 init_attr => "attr->pn_code = pn_code;",
1674 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
1675 out => [ "eax ebx ecx edx" ] },
1676 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1677 attr => "pn_Cmp pn_code",
1678 init_attr => "attr->pn_code = pn_code;",
1686 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "eax ebx ecx edx",
1688 out => [ "eax ebx ecx edx" ] },
1689 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1690 attr => "pn_Cmp pn_code",
1691 init_attr => "attr->pn_code = pn_code;",
1699 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1707 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1711 attr_type => "ia32_x87_attr_t",
1716 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1720 attr_type => "ia32_x87_attr_t",
1723 #----------------------------------------------------------#
1725 # (_) | | | | / _| | | | #
1726 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1727 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1728 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1729 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1731 # _ __ ___ __| | ___ ___ #
1732 # | '_ \ / _ \ / _` |/ _ \/ __| #
1733 # | | | | (_) | (_| | __/\__ \ #
1734 # |_| |_|\___/ \__,_|\___||___/ #
1735 #----------------------------------------------------------#
1739 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1740 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1744 attr_type => "ia32_x87_attr_t",
1749 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1750 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1754 attr_type => "ia32_x87_attr_t",
1759 cmp_attr => "return 1;",
1765 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1766 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1770 attr_type => "ia32_x87_attr_t",
1774 cmp_attr => "return 1;",
1779 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
1780 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1781 outs => [ "res", "M" ],
1784 attr_type => "ia32_x87_attr_t",
1788 cmp_attr => "return 1;",
1789 outs => [ "res", "M" ],
1794 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1795 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1799 attr_type => "ia32_x87_attr_t",
1803 cmp_attr => "return 1;",
1809 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1814 attr_type => "ia32_x87_attr_t",
1819 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1824 attr_type => "ia32_x87_attr_t",
1827 # virtual Load and Store
1831 state => "exc_pinned",
1832 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1833 ins => [ "base", "index", "mem" ],
1834 outs => [ "res", "M" ],
1835 attr => "ir_mode *load_mode",
1836 init_attr => "attr->attr.ls_mode = load_mode;",
1839 attr_type => "ia32_x87_attr_t",
1844 state => "exc_pinned",
1845 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1846 ins => [ "base", "index", "val", "mem" ],
1847 attr => "ir_mode *store_mode",
1848 init_attr => "attr->attr.ls_mode = store_mode;",
1852 attr_type => "ia32_x87_attr_t",
1858 state => "exc_pinned",
1859 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1860 outs => [ "res", "M" ],
1861 ins => [ "base", "index", "mem" ],
1864 attr_type => "ia32_x87_attr_t",
1868 cmp_attr => "return 1;",
1869 outs => [ "res", "M" ],
1874 state => "exc_pinned",
1875 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1876 ins => [ "base", "index", "val", "fpcw", "mem" ],
1880 attr_type => "ia32_x87_attr_t",
1884 cmp_attr => "return 1;",
1885 state => "exc_pinned",
1895 reg_req => { out => [ "vfp" ] },
1899 attr_type => "ia32_x87_attr_t",
1904 reg_req => { out => [ "vfp" ] },
1908 attr_type => "ia32_x87_attr_t",
1913 reg_req => { out => [ "vfp" ] },
1917 attr_type => "ia32_x87_attr_t",
1922 reg_req => { out => [ "vfp" ] },
1926 attr_type => "ia32_x87_attr_t",
1931 reg_req => { out => [ "vfp" ] },
1935 attr_type => "ia32_x87_attr_t",
1940 reg_req => { out => [ "vfp" ] },
1944 attr_type => "ia32_x87_attr_t",
1949 reg_req => { out => [ "vfp" ] },
1953 attr_type => "ia32_x87_attr_t",
1960 op_flags => "L|X|Y",
1961 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1962 ins => [ "left", "right" ],
1963 outs => [ "false", "true", "temp_reg_eax" ],
1965 init_attr => "attr->attr.pn_code = pnc;",
1968 attr_type => "ia32_x87_attr_t",
1971 #------------------------------------------------------------------------#
1972 # ___ _____ __ _ _ _ #
1973 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1974 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1975 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1976 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1977 #------------------------------------------------------------------------#
1979 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1980 # are swapped, we work this around in the emitter...
1984 rd_constructor => "NONE",
1986 emit => '. fadd%XM %x87_binop',
1987 attr_type => "ia32_x87_attr_t",
1992 rd_constructor => "NONE",
1994 emit => '. faddp%XM %x87_binop',
1995 attr_type => "ia32_x87_attr_t",
2000 rd_constructor => "NONE",
2002 emit => '. fmul%XM %x87_binop',
2003 attr_type => "ia32_x87_attr_t",
2008 rd_constructor => "NONE",
2010 emit => '. fmulp%XM %x87_binop',,
2011 attr_type => "ia32_x87_attr_t",
2016 rd_constructor => "NONE",
2018 emit => '. fsub%XM %x87_binop',
2019 attr_type => "ia32_x87_attr_t",
2024 rd_constructor => "NONE",
2026 # see note about gas bugs
2027 emit => '. fsubrp%XM %x87_binop',
2028 attr_type => "ia32_x87_attr_t",
2033 rd_constructor => "NONE",
2036 emit => '. fsubr%XM %x87_binop',
2037 attr_type => "ia32_x87_attr_t",
2042 rd_constructor => "NONE",
2045 # see note about gas bugs
2046 emit => '. fsubp%XM %x87_binop',
2047 attr_type => "ia32_x87_attr_t",
2052 rd_constructor => "NONE",
2055 attr_type => "ia32_x87_attr_t",
2058 # this node is just here, to keep the simulator running
2059 # we can omit this when a fprem simulation function exists
2062 rd_constructor => "NONE",
2065 attr_type => "ia32_x87_attr_t",
2070 rd_constructor => "NONE",
2072 emit => '. fdiv%XM %x87_binop',
2073 attr_type => "ia32_x87_attr_t",
2078 rd_constructor => "NONE",
2080 # see note about gas bugs
2081 emit => '. fdivrp%XM %x87_binop',
2082 attr_type => "ia32_x87_attr_t",
2087 rd_constructor => "NONE",
2089 emit => '. fdivr%XM %x87_binop',
2090 attr_type => "ia32_x87_attr_t",
2095 rd_constructor => "NONE",
2097 # see note about gas bugs
2098 emit => '. fdivp%XM %x87_binop',
2099 attr_type => "ia32_x87_attr_t",
2104 rd_constructor => "NONE",
2107 attr_type => "ia32_x87_attr_t",
2112 rd_constructor => "NONE",
2115 attr_type => "ia32_x87_attr_t",
2118 # x87 Load and Store
2121 rd_constructor => "NONE",
2122 op_flags => "R|L|F",
2123 state => "exc_pinned",
2125 emit => '. fld%XM %AM',
2126 attr_type => "ia32_x87_attr_t",
2130 rd_constructor => "NONE",
2131 op_flags => "R|L|F",
2132 state => "exc_pinned",
2134 emit => '. fst%XM %AM',
2136 attr_type => "ia32_x87_attr_t",
2140 rd_constructor => "NONE",
2141 op_flags => "R|L|F",
2142 state => "exc_pinned",
2144 emit => '. fstp%XM %AM',
2146 attr_type => "ia32_x87_attr_t",
2153 rd_constructor => "NONE",
2155 emit => '. fild%M %AM',
2156 attr_type => "ia32_x87_attr_t",
2161 state => "exc_pinned",
2162 rd_constructor => "NONE",
2164 emit => '. fist%M %AM',
2166 attr_type => "ia32_x87_attr_t",
2171 state => "exc_pinned",
2172 rd_constructor => "NONE",
2174 emit => '. fistp%M %AM',
2176 attr_type => "ia32_x87_attr_t",
2182 op_flags => "R|c|K",
2186 attr_type => "ia32_x87_attr_t",
2190 op_flags => "R|c|K",
2194 attr_type => "ia32_x87_attr_t",
2198 op_flags => "R|c|K",
2202 attr_type => "ia32_x87_attr_t",
2206 op_flags => "R|c|K",
2210 attr_type => "ia32_x87_attr_t",
2214 op_flags => "R|c|K",
2218 attr_type => "ia32_x87_attr_t",
2222 op_flags => "R|c|K",
2225 emit => '. fldll2t',
2226 attr_type => "ia32_x87_attr_t",
2230 op_flags => "R|c|K",
2234 attr_type => "ia32_x87_attr_t",
2238 # Note that it is NEVER allowed to do CSE on these nodes
2239 # Moreover, note the virtual register requierements!
2244 cmp_attr => "return 1;",
2245 emit => '. fxch %X0',
2246 attr_type => "ia32_x87_attr_t",
2252 cmp_attr => "return 1;",
2253 emit => '. fld %X0',
2254 attr_type => "ia32_x87_attr_t",
2259 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2260 cmp_attr => "return 1;",
2261 emit => '. fld %X0',
2262 attr_type => "ia32_x87_attr_t",
2268 cmp_attr => "return 1;",
2269 emit => '. fstp %X0',
2270 attr_type => "ia32_x87_attr_t",
2276 op_flags => "L|X|Y",
2278 attr_type => "ia32_x87_attr_t",
2282 op_flags => "L|X|Y",
2284 attr_type => "ia32_x87_attr_t",
2288 op_flags => "L|X|Y",
2290 attr_type => "ia32_x87_attr_t",
2294 op_flags => "L|X|Y",
2296 attr_type => "ia32_x87_attr_t",
2300 op_flags => "L|X|Y",
2302 attr_type => "ia32_x87_attr_t",
2306 op_flags => "L|X|Y",
2308 attr_type => "ia32_x87_attr_t",
2312 # -------------------------------------------------------------------------------- #
2313 # ____ ____ _____ _ _ #
2314 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2315 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2316 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2317 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2319 # -------------------------------------------------------------------------------- #
2322 # Spilling and reloading of SSE registers, hardcoded, not generated #
2326 state => "exc_pinned",
2327 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2328 emit => '. movdqu %D0, %AM',
2329 outs => [ "res", "M" ],
2335 state => "exc_pinned",
2336 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2337 emit => '. movdqu %binop',
2344 # Include the generated SIMD node specification written by the SIMD optimization
2345 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2346 unless ($return = do $my_script_name) {
2347 warn "couldn't parse $my_script_name: $@" if $@;
2348 warn "couldn't do $my_script_name: $!" unless defined $return;
2349 warn "couldn't run $my_script_name" unless $return;