3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "eax", type => 1 },
114 { name => "edx", type => 1 },
115 { name => "ebx", type => 2 },
116 { name => "ecx", type => 1 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4 | 32},
175 { mode => "mode_fpcw" }
178 { name => "eflags", type => 4 },
179 { mode => "mode_Iu" }
182 { name => "fpsw", type => 4 },
183 { mode => "mode_Hu" }
188 CF => { reg => "eflags", bit => 0 },
189 PF => { reg => "eflags", bit => 2 },
190 AF => { reg => "eflags", bit => 4 },
191 ZF => { reg => "eflags", bit => 6 },
192 SF => { reg => "eflags", bit => 7 },
193 TF => { reg => "eflags", bit => 8 },
194 IF => { reg => "eflags", bit => 9 },
195 DF => { reg => "eflags", bit => 10 },
196 OF => { reg => "eflags", bit => 11 },
197 IOPL0 => { reg => "eflags", bit => 12 },
198 IOPL1 => { reg => "eflags", bit => 13 },
199 NT => { reg => "eflags", bit => 14 },
200 RF => { reg => "eflags", bit => 16 },
201 VM => { reg => "eflags", bit => 17 },
202 AC => { reg => "eflags", bit => 18 },
203 VIF => { reg => "eflags", bit => 19 },
204 VIP => { reg => "eflags", bit => 20 },
205 ID => { reg => "eflags", bit => 21 },
207 FP_IE => { reg => "fpsw", bit => 0 },
208 FP_DE => { reg => "fpsw", bit => 1 },
209 FP_ZE => { reg => "fpsw", bit => 2 },
210 FP_OE => { reg => "fpsw", bit => 3 },
211 FP_UE => { reg => "fpsw", bit => 4 },
212 FP_PE => { reg => "fpsw", bit => 5 },
213 FP_SF => { reg => "fpsw", bit => 6 },
214 FP_ES => { reg => "fpsw", bit => 7 },
215 FP_C0 => { reg => "fpsw", bit => 8 },
216 FP_C1 => { reg => "fpsw", bit => 9 },
217 FP_C2 => { reg => "fpsw", bit => 10 },
218 FP_TOP0 => { reg => "fpsw", bit => 11 },
219 FP_TOP1 => { reg => "fpsw", bit => 12 },
220 FP_TOP2 => { reg => "fpsw", bit => 13 },
221 FP_C3 => { reg => "fpsw", bit => 14 },
222 FP_B => { reg => "fpsw", bit => 15 },
224 FP_IM => { reg => "fpcw", bit => 0 },
225 FP_DM => { reg => "fpcw", bit => 1 },
226 FP_ZM => { reg => "fpcw", bit => 2 },
227 FP_OM => { reg => "fpcw", bit => 3 },
228 FP_UM => { reg => "fpcw", bit => 4 },
229 FP_PM => { reg => "fpcw", bit => 5 },
230 FP_PC0 => { reg => "fpcw", bit => 8 },
231 FP_PC1 => { reg => "fpcw", bit => 9 },
232 FP_RC0 => { reg => "fpcw", bit => 10 },
233 FP_RC1 => { reg => "fpcw", bit => 11 },
234 FP_X => { reg => "fpcw", bit => 12 }
238 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
239 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
240 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
241 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
246 bundels_per_cycle => 1
250 S0 => "${arch}_emit_source_register(env, node, 0);",
251 S1 => "${arch}_emit_source_register(env, node, 1);",
252 S2 => "${arch}_emit_source_register(env, node, 2);",
253 S3 => "${arch}_emit_source_register(env, node, 3);",
254 S4 => "${arch}_emit_source_register(env, node, 4);",
255 S5 => "${arch}_emit_source_register(env, node, 5);",
256 SB0 => "${arch}_emit_8bit_source_register(env, node, 0);",
257 SW0 => "${arch}_emit_16bit_source_register(env, node, 0);",
258 D0 => "${arch}_emit_dest_register(env, node, 0);",
259 D1 => "${arch}_emit_dest_register(env, node, 1);",
260 D2 => "${arch}_emit_dest_register(env, node, 2);",
261 D3 => "${arch}_emit_dest_register(env, node, 3);",
262 D4 => "${arch}_emit_dest_register(env, node, 4);",
263 D5 => "${arch}_emit_dest_register(env, node, 5);",
264 X0 => "${arch}_emit_x87_name(env, node, 0);",
265 X1 => "${arch}_emit_x87_name(env, node, 1);",
266 X2 => "${arch}_emit_x87_name(env, node, 2);",
267 C => "${arch}_emit_immediate(env, node);",
268 SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));",
269 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
270 ia32_emit_mode_suffix(env, node);",
271 M => "${arch}_emit_mode_suffix(env, node);",
272 XM => "${arch}_emit_x87_mode_suffix(env, node);",
273 XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
274 XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
275 AM => "${arch}_emit_am(env, node);",
276 unop0 => "${arch}_emit_unop(env, node, 0);",
277 unop1 => "${arch}_emit_unop(env, node, 1);",
278 unop2 => "${arch}_emit_unop(env, node, 2);",
279 unop3 => "${arch}_emit_unop(env, node, 3);",
280 unop4 => "${arch}_emit_unop(env, node, 4);",
281 DAM0 => "${arch}_emit_am_or_dest_register(env, node, 0);",
282 DAM1 => "${arch}_emit_am_or_dest_register(env, node, 0);",
283 binop => "${arch}_emit_binop(env, node);",
284 x87_binop => "${arch}_emit_x87_binop(env, node);",
287 #--------------------------------------------------#
290 # _ __ _____ __ _ _ __ ___ _ __ ___ #
291 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
292 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
293 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
296 #--------------------------------------------------#
298 $default_attr_type = "ia32_attr_t";
299 $default_copy_attr = "ia32_copy_attr";
302 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
304 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
305 "\tinit_ia32_x87_attributes(res);",
307 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
308 "\tinit_ia32_x87_attributes(res);".
309 "\tinit_ia32_asm_attributes(res);",
310 ia32_immediate_attr_t =>
311 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
312 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
316 ia32_attr_t => "ia32_compare_nodes_attr",
317 ia32_x87_attr_t => "ia32_compare_x87_attr",
318 ia32_asm_attr_t => "ia32_compare_asm_attr",
319 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
325 $mode_xmm = "mode_E";
326 $mode_gp = "mode_Iu";
327 $mode_fpcw = "mode_fpcw";
328 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
329 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
330 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
338 reg_req => { out => [ "gp_NOREG" ] },
339 attr => "ir_entity *symconst, int symconst_sign, long offset",
340 attr_type => "ia32_immediate_attr_t",
348 out_arity => "variable",
349 attr_type => "ia32_asm_attr_t",
356 reg_req => { out => [ "gp" ] },
361 cmp_attr => "return 1;",
364 #-----------------------------------------------------------------#
367 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
368 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
369 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
370 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
373 #-----------------------------------------------------------------#
375 # commutative operations
378 # All nodes supporting Addressmode have 5 INs:
379 # 1 - base r1 == NoReg in case of no AM or no base
380 # 2 - index r2 == NoReg in case of no AM or no index
381 # 3 - op1 r3 == always present
382 # 4 - op2 r4 == NoReg in case of immediate operation
383 # 5 - mem NoMem in case of no AM otherwise it takes the mem from the Load
387 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
388 ins => [ "base", "index", "left", "right", "mem" ],
389 emit => '. add%M %binop',
392 modified_flags => $status_flags
396 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
397 emit => '. adc%M %binop',
400 modified_flags => $status_flags
406 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
413 outs => [ "low_res", "high_res" ],
415 modified_flags => $status_flags
421 cmp_attr => "return 1;",
427 cmp_attr => "return 1;",
432 # we should not rematrialize this node. It produces 2 results and has
433 # very strict constrains
434 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
435 emit => '. mul%M %unop3',
436 outs => [ "EAX", "EDX", "M" ],
437 ins => [ "base", "index", "val_high", "val_low", "mem" ],
440 modified_flags => $status_flags
444 # we should not rematrialize this node. It produces 2 results and has
445 # very strict constrains
447 cmp_attr => "return 1;",
448 outs => [ "EAX", "EDX", "M" ],
454 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
455 emit => '. imul%M %binop',
459 modified_flags => $status_flags
464 reg_req => { in => [ "gp", "gp", "eax", "gp", "none" ], out => [ "eax", "edx", "none" ] },
465 emit => '. imul%M %unop3',
466 outs => [ "EAX", "EDX", "M" ],
467 ins => [ "base", "index", "val_high", "val_low", "mem" ],
470 modified_flags => $status_flags
475 cmp_attr => "return 1;",
481 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
482 emit => '. and%M %binop',
485 modified_flags => $status_flags
490 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
491 emit => '. or%M %binop',
494 modified_flags => $status_flags
499 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
500 emit => '. xor%M %binop',
503 modified_flags => $status_flags
508 cmp_attr => "return 1;",
510 modified_flags => $status_flags
513 # not commutative operations
517 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
518 emit => '. sub%M %binop',
521 modified_flags => $status_flags
525 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] },
526 emit => '. sbb%M %binop',
529 modified_flags => $status_flags
535 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
542 outs => [ "low_res", "high_res" ],
544 modified_flags => $status_flags
549 cmp_attr => "return 1;",
554 cmp_attr => "return 1;",
560 state => "exc_pinned",
561 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
562 attr => "ia32_op_flavour_t dm_flav",
563 init_attr => "attr->data.op_flav = dm_flav;",
564 emit => ". idiv%M %unop4",
565 outs => [ "div_res", "mod_res", "M" ],
568 modified_flags => $status_flags
573 state => "exc_pinned",
574 reg_req => { in => [ "gp", "gp", "eax", "edx", "gp", "none" ], out => [ "eax", "edx", "none" ] },
575 attr => "ia32_op_flavour_t dm_flav",
576 init_attr => "attr->data.op_flav = dm_flav;",
577 emit => ". div%M %unop4",
578 outs => [ "div_res", "mod_res", "M" ],
581 modified_flags => $status_flags
586 # "in_r3" would be enough as out requirement, but the register allocator
587 # does strange things then and doesn't respect the constraint for in4
588 # if the same value is attached to in3 and in4 (if you have "i << i" in C)
589 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
590 ins => [ "base", "index", "left", "right", "mem" ],
591 emit => '. shl%M %binop',
594 modified_flags => $status_flags
598 cmp_attr => "return 1;",
604 # Out requirements is: different from all in
605 # This is because, out must be different from LowPart and ShiftCount.
606 # We could say "!ecx !in_r4" but it can occur, that all values live through
607 # this Shift and the only value dying is the ShiftCount. Then there would be
608 # a register missing, as result must not be ecx and all other registers are
609 # occupied. What we should write is "!in_r4 !in_r5", but this is not
610 # supported (and probably never will). So we create artificial interferences
611 # of the result with all inputs, so the spiller can always assure a free
613 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
616 if (get_ia32_immop_type(node) == ia32_ImmNone) {
617 if (get_ia32_op_type(node) == ia32_AddrModeD) {
618 . shld%M %%cl, %S3, %AM
620 . shld%M %%cl, %S3, %S2
623 if (get_ia32_op_type(node) == ia32_AddrModeD) {
624 . shld%M %C, %S3, %AM
626 . shld%M %C, %S3, %S2
633 modified_flags => $status_flags
637 cmp_attr => "return 1;",
643 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
644 emit => '. shr%M %binop',
647 modified_flags => $status_flags
651 cmp_attr => "return 1;",
657 # Out requirements is: different from all in
658 # This is because, out must be different from LowPart and ShiftCount.
659 # We could say "!ecx !in_r4" but it can occur, that all values live through
660 # this Shift and the only value dying is the ShiftCount. Then there would be a
661 # register missing, as result must not be ecx and all other registers are
662 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
663 # (and probably never will). So we create artificial interferences of the result
664 # with all inputs, so the spiller can always assure a free register.
665 reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
667 if (get_ia32_immop_type(node) == ia32_ImmNone) {
668 if (get_ia32_op_type(node) == ia32_AddrModeD) {
669 . shrd%M %%cl, %S3, %AM
671 . shrd%M %%cl, %S3, %S2
674 if (get_ia32_op_type(node) == ia32_AddrModeD) {
675 . shrd%M %C, %S3, %AM
677 . shrd%M %C, %S3, %S2
684 modified_flags => $status_flags
688 cmp_attr => "return 1;",
694 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
695 emit => '. sar%M %binop',
698 modified_flags => $status_flags
702 cmp_attr => "return 1;",
708 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
709 emit => '. ror%M %binop',
712 modified_flags => $status_flags
717 reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] },
718 emit => '. rol%M %binop',
721 modified_flags => $status_flags
728 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
729 emit => '. neg%M %unop2',
730 ins => [ "base", "index", "val", "mem" ],
733 modified_flags => $status_flags
738 reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
745 outs => [ "low_res", "high_res" ],
747 modified_flags => $status_flags
752 cmp_attr => "return 1;",
758 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
759 emit => '. inc%M %unop2',
762 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
767 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
768 emit => '. dec%M %unop2',
771 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
776 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
777 ins => [ "base", "index", "val", "mem" ],
778 emit => '. not%M %unop2',
789 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
790 out => [ "none", "none"] },
791 ins => [ "base", "index", "left", "right", "mem" ],
792 outs => [ "false", "true" ],
794 init_attr => "attr->pn_code = pnc;",
796 units => [ "BRANCH" ],
802 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ],
803 out => [ "none", "none" ] },
804 ins => [ "base", "index", "left", "right", "mem" ],
805 outs => [ "false", "true" ],
807 init_attr => "attr->pn_code = pnc;",
809 units => [ "BRANCH" ],
815 reg_req => { in => [ "gp" ], out => [ "none" ] },
817 units => [ "BRANCH" ],
824 reg_req => { in => [ "gp", "gp", "gp", "none" ] },
825 ins => [ "base", "index", "val", "mem" ],
826 emit => '. jmp *%unop2',
827 units => [ "BRANCH" ],
835 reg_req => { out => [ "gp" ] },
844 reg_req => { out => [ "gp_UKNWN" ] },
854 reg_req => { out => [ "vfp_UKNWN" ] },
858 attr_type => "ia32_x87_attr_t",
865 reg_req => { out => [ "xmm_UKNWN" ] },
875 reg_req => { out => [ "gp_NOREG" ] },
885 reg_req => { out => [ "vfp_NOREG" ] },
889 attr_type => "ia32_x87_attr_t",
896 reg_req => { out => [ "xmm_NOREG" ] },
906 reg_req => { out => [ "fp_cw" ] },
910 modified_flags => $fpcw_flags
916 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
918 emit => ". fldcw %AM",
921 modified_flags => $fpcw_flags
927 reg_req => { in => [ "gp", "gp", "fp_cw", "none" ], out => [ "none" ] },
929 emit => ". fnstcw %AM",
935 # we should not rematrialize this node. It produces 2 results and has
936 # very strict constrains
937 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
938 ins => [ "val", "globbered" ],
946 # Note that we add additional latency values depending on address mode, so a
947 # lateny of 0 for load is correct
951 state => "exc_pinned",
952 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
953 ins => [ "base", "index", "mem" ],
954 outs => [ "res", "M" ],
956 emit => ". mov%SE%ME%.l %AM, %D0",
962 cmp_attr => "return 1;",
963 outs => [ "res", "M" ],
969 cmp_attr => "return 1;",
970 state => "exc_pinned",
977 state => "exc_pinned",
978 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "none" ] },
979 ins => [ "base", "index", "val", "mem" ],
980 emit => '. mov%M %binop',
988 state => "exc_pinned",
989 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => ["none" ] },
990 emit => '. mov%M %binop',
998 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
999 emit => '. leal %AM, %D0',
1003 modified_flags => [],
1007 reg_req => { in => [ "gp", "gp", "gp", "esp", "none" ], out => [ "esp", "none" ] },
1008 emit => '. push%M %unop2',
1009 ins => [ "base", "index", "val", "stack", "mem" ],
1010 outs => [ "stack:I|S", "M" ],
1013 modified_flags => [],
1017 reg_req => { in => [ "gp", "gp", "esp", "none" ], out => [ "esp", "gp", "none" ] },
1018 emit => '. pop%M %DAM1',
1019 outs => [ "stack:I|S", "res", "M" ],
1020 ins => [ "base", "index", "stack", "mem" ],
1021 latency => 3, # Pop is more expensive than Push on Athlon
1023 modified_flags => [],
1027 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1029 outs => [ "frame:I", "stack:I|S", "M" ],
1035 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1037 outs => [ "frame:I", "stack:I|S" ],
1044 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "none" ] },
1045 emit => '. addl %binop',
1046 outs => [ "stack:S", "M" ],
1048 modified_flags => $status_flags
1053 reg_req => { in => [ "gp", "gp", "esp", "gp", "none" ], out => [ "in_r3", "gp", "none" ] },
1054 emit => ". subl %binop\n".
1055 ". movl %%esp, %D1",
1056 outs => [ "stack:I|S", "addr", "M" ],
1058 modified_flags => $status_flags
1063 reg_req => { out => [ "gp" ] },
1067 # the int instruction
1069 reg_req => { in => [ "none" ], out => [ "none" ] },
1071 attr => "tarval *tv",
1072 init_attr => "\tset_ia32_Immop_tarval(res, tv);",
1075 cmp_attr => "return 1;",
1079 #-----------------------------------------------------------------------------#
1080 # _____ _____ ______ __ _ _ _ #
1081 # / ____/ ____| ____| / _| | | | | | #
1082 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1083 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1084 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1085 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1086 #-----------------------------------------------------------------------------#
1088 # commutative operations
1092 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1093 emit => '. add%XXM %binop',
1101 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1102 emit => '. mul%XXM %binop',
1110 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1111 emit => '. max%XXM %binop',
1119 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1120 emit => '. min%XXM %binop',
1128 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1129 emit => '. andp%XSD %binop',
1137 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1138 emit => '. orp%XSD %binop',
1145 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1146 emit => '. xorp%XSD %binop',
1152 # not commutative operations
1156 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1157 emit => '. andnp%XSD %binop',
1165 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3" ] },
1166 emit => '. sub%XXM %binop',
1174 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4", "none" ] },
1175 outs => [ "res", "M" ],
1176 emit => '. div%XXM %binop',
1185 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "in_r3 !in_r4" ] },
1193 op_flags => "L|X|Y",
1194 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "none", "none" ] },
1195 ins => [ "base", "index", "left", "right", "mem" ],
1196 outs => [ "false", "true" ],
1198 init_attr => "attr->pn_code = pnc;",
1206 reg_req => { out => [ "xmm" ] },
1207 emit => '. mov%XXM %C, %D0',
1217 state => "exc_pinned",
1218 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1219 emit => '. mov%XXM %AM, %D0',
1220 outs => [ "res", "M" ],
1227 state => "exc_pinned",
1228 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1229 emit => '. mov%XXM %binop',
1237 state => "exc_pinned",
1238 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
1239 ins => [ "base", "index", "val", "mem" ],
1240 emit => '. mov%XXM %S2, %AM',
1248 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1249 emit => '. cvtsi2ss %D0, %AM',
1257 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] },
1258 emit => '. cvtsi2sd %unop2',
1267 cmp_attr => "return 1;",
1273 cmp_attr => "return 1;",
1282 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1283 outs => [ "DST", "SRC", "CNT", "M" ],
1285 modified_flags => [ "DF" ]
1291 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1292 outs => [ "DST", "SRC", "M" ],
1294 modified_flags => [ "DF" ]
1300 state => "exc_pinned",
1301 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] },
1303 ins => [ "base", "index", "val", "mem" ],
1304 attr => "ir_mode *smaller_mode",
1305 init_attr => "attr->ls_mode = smaller_mode;",
1307 modified_flags => $status_flags
1311 state => "exc_pinned",
1312 reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] },
1313 ins => [ "base", "index", "val", "mem" ],
1315 attr => "ir_mode *smaller_mode",
1316 init_attr => "attr->ls_mode = smaller_mode;",
1318 modified_flags => $status_flags
1322 reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1329 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "gp", "none" ] },
1336 reg_req => { in => [ "gp", "gp", "xmm", "none" ], out => [ "xmm", "none" ] },
1344 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1345 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1346 attr => "pn_Cmp pn_code",
1347 init_attr => "attr->pn_code = pn_code;",
1355 reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] },
1356 ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ],
1357 attr => "pn_Cmp pn_code",
1358 init_attr => "attr->pn_code = pn_code;",
1366 reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] },
1374 reg_req => { in => [ "vfp", "vfp", "gp", "gp" ], out => [ "in_r4" ] },
1378 attr_type => "ia32_x87_attr_t",
1383 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1384 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1385 attr => "pn_Cmp pn_code",
1386 init_attr => "attr->pn_code = pn_code;",
1394 reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] },
1395 ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ],
1396 attr => "pn_Cmp pn_code",
1397 init_attr => "attr->pn_code = pn_code;",
1405 reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] },
1413 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] },
1417 attr_type => "ia32_x87_attr_t",
1422 reg_req => { in => [ "vfp", "vfp", "vfp", "vfp" ], out => [ "vfp" ] },
1426 attr_type => "ia32_x87_attr_t",
1429 #----------------------------------------------------------#
1431 # (_) | | | | / _| | | | #
1432 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1433 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1434 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1435 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1437 # _ __ ___ __| | ___ ___ #
1438 # | '_ \ / _ \ / _` |/ _ \/ __| #
1439 # | | | | (_) | (_| | __/\__ \ #
1440 # |_| |_|\___/ \__,_|\___||___/ #
1441 #----------------------------------------------------------#
1445 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1446 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1450 attr_type => "ia32_x87_attr_t",
1455 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1456 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1460 attr_type => "ia32_x87_attr_t",
1465 cmp_attr => "return 1;",
1471 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1472 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1476 attr_type => "ia32_x87_attr_t",
1480 cmp_attr => "return 1;",
1485 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp", "none" ] },
1486 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1487 outs => [ "res", "M" ],
1490 attr_type => "ia32_x87_attr_t",
1494 cmp_attr => "return 1;",
1495 outs => [ "res", "M" ],
1500 reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "fpcw" ], out => [ "vfp" ] },
1501 ins => [ "base", "index", "left", "right", "mem", "fpcw" ],
1505 attr_type => "ia32_x87_attr_t",
1509 cmp_attr => "return 1;",
1515 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1520 attr_type => "ia32_x87_attr_t",
1525 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1530 attr_type => "ia32_x87_attr_t",
1533 # virtual Load and Store
1537 state => "exc_pinned",
1538 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1539 ins => [ "base", "index", "mem" ],
1540 outs => [ "res", "M" ],
1541 attr => "ir_mode *store_mode",
1542 init_attr => "attr->attr.ls_mode = store_mode;",
1545 attr_type => "ia32_x87_attr_t",
1550 state => "exc_pinned",
1551 reg_req => { in => [ "gp", "gp", "vfp", "none" ] },
1552 ins => [ "base", "index", "val", "mem" ],
1553 attr => "ir_mode *store_mode",
1554 init_attr => "attr->attr.ls_mode = store_mode;",
1558 attr_type => "ia32_x87_attr_t",
1564 state => "exc_pinned",
1565 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1566 outs => [ "res", "M" ],
1567 ins => [ "base", "index", "mem" ],
1570 attr_type => "ia32_x87_attr_t",
1574 cmp_attr => "return 1;",
1575 outs => [ "res", "M" ],
1580 state => "exc_pinned",
1581 reg_req => { in => [ "gp", "gp", "vfp", "fpcw", "none" ] },
1582 ins => [ "base", "index", "val", "fpcw", "mem" ],
1586 attr_type => "ia32_x87_attr_t",
1590 cmp_attr => "return 1;",
1591 state => "exc_pinned",
1601 reg_req => { out => [ "vfp" ] },
1605 attr_type => "ia32_x87_attr_t",
1610 reg_req => { out => [ "vfp" ] },
1614 attr_type => "ia32_x87_attr_t",
1619 reg_req => { out => [ "vfp" ] },
1623 attr_type => "ia32_x87_attr_t",
1628 reg_req => { out => [ "vfp" ] },
1632 attr_type => "ia32_x87_attr_t",
1637 reg_req => { out => [ "vfp" ] },
1641 attr_type => "ia32_x87_attr_t",
1646 reg_req => { out => [ "vfp" ] },
1650 attr_type => "ia32_x87_attr_t",
1655 reg_req => { out => [ "vfp" ] },
1659 attr_type => "ia32_x87_attr_t",
1665 reg_req => { out => [ "vfp" ] },
1669 attr_type => "ia32_x87_attr_t",
1676 op_flags => "L|X|Y",
1677 reg_req => { in => [ "vfp", "vfp" ], out => [ "none", "none", "eax" ] },
1678 ins => [ "left", "right" ],
1679 outs => [ "false", "true", "temp_reg_eax" ],
1681 init_attr => "attr->attr.pn_code = pnc;",
1684 attr_type => "ia32_x87_attr_t",
1687 #------------------------------------------------------------------------#
1688 # ___ _____ __ _ _ _ #
1689 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1690 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1691 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1692 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1693 #------------------------------------------------------------------------#
1695 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1696 # are swapped, we work this around in the emitter...
1700 rd_constructor => "NONE",
1702 emit => '. fadd%XM %x87_binop',
1703 attr_type => "ia32_x87_attr_t",
1708 rd_constructor => "NONE",
1710 emit => '. faddp%XM %x87_binop',
1711 attr_type => "ia32_x87_attr_t",
1716 rd_constructor => "NONE",
1718 emit => '. fmul%XM %x87_binop',
1719 attr_type => "ia32_x87_attr_t",
1724 rd_constructor => "NONE",
1726 emit => '. fmulp%XM %x87_binop',,
1727 attr_type => "ia32_x87_attr_t",
1732 rd_constructor => "NONE",
1734 emit => '. fsub%XM %x87_binop',
1735 attr_type => "ia32_x87_attr_t",
1740 rd_constructor => "NONE",
1742 # see note about gas bugs
1743 emit => '. fsubrp%XM %x87_binop',
1744 attr_type => "ia32_x87_attr_t",
1749 rd_constructor => "NONE",
1752 emit => '. fsubr%XM %x87_binop',
1753 attr_type => "ia32_x87_attr_t",
1758 rd_constructor => "NONE",
1761 # see note about gas bugs
1762 emit => '. fsubp%XM %x87_binop',
1763 attr_type => "ia32_x87_attr_t",
1768 rd_constructor => "NONE",
1771 attr_type => "ia32_x87_attr_t",
1774 # this node is just here, to keep the simulator running
1775 # we can omit this when a fprem simulation function exists
1778 rd_constructor => "NONE",
1781 attr_type => "ia32_x87_attr_t",
1786 rd_constructor => "NONE",
1788 emit => '. fdiv%XM %x87_binop',
1789 attr_type => "ia32_x87_attr_t",
1794 rd_constructor => "NONE",
1796 # see note about gas bugs
1797 emit => '. fdivrp%XM %x87_binop',
1798 attr_type => "ia32_x87_attr_t",
1803 rd_constructor => "NONE",
1805 emit => '. fdivr%XM %x87_binop',
1806 attr_type => "ia32_x87_attr_t",
1811 rd_constructor => "NONE",
1813 # see note about gas bugs
1814 emit => '. fdivp%XM %x87_binop',
1815 attr_type => "ia32_x87_attr_t",
1820 rd_constructor => "NONE",
1823 attr_type => "ia32_x87_attr_t",
1828 rd_constructor => "NONE",
1831 attr_type => "ia32_x87_attr_t",
1834 # x87 Load and Store
1837 rd_constructor => "NONE",
1838 op_flags => "R|L|F",
1839 state => "exc_pinned",
1841 emit => '. fld%XM %AM',
1842 attr_type => "ia32_x87_attr_t",
1846 rd_constructor => "NONE",
1847 op_flags => "R|L|F",
1848 state => "exc_pinned",
1850 emit => '. fst%XM %AM',
1852 attr_type => "ia32_x87_attr_t",
1856 rd_constructor => "NONE",
1857 op_flags => "R|L|F",
1858 state => "exc_pinned",
1860 emit => '. fstp%XM %AM',
1862 attr_type => "ia32_x87_attr_t",
1869 rd_constructor => "NONE",
1871 emit => '. fild%XM %AM',
1872 attr_type => "ia32_x87_attr_t",
1877 state => "exc_pinned",
1878 rd_constructor => "NONE",
1880 emit => '. fist%XM %AM',
1882 attr_type => "ia32_x87_attr_t",
1887 state => "exc_pinned",
1888 rd_constructor => "NONE",
1890 emit => '. fistp%XM %AM',
1892 attr_type => "ia32_x87_attr_t",
1898 op_flags => "R|c|K",
1902 attr_type => "ia32_x87_attr_t",
1906 op_flags => "R|c|K",
1910 attr_type => "ia32_x87_attr_t",
1914 op_flags => "R|c|K",
1918 attr_type => "ia32_x87_attr_t",
1922 op_flags => "R|c|K",
1926 attr_type => "ia32_x87_attr_t",
1930 op_flags => "R|c|K",
1934 attr_type => "ia32_x87_attr_t",
1938 op_flags => "R|c|K",
1941 emit => '. fldll2t',
1942 attr_type => "ia32_x87_attr_t",
1946 op_flags => "R|c|K",
1950 attr_type => "ia32_x87_attr_t",
1954 # Note that it is NEVER allowed to do CSE on these nodes
1955 # Moreover, note the virtual register requierements!
1960 cmp_attr => "return 1;",
1961 emit => '. fxch %X0',
1962 attr_type => "ia32_x87_attr_t",
1968 cmp_attr => "return 1;",
1969 emit => '. fld %X0',
1970 attr_type => "ia32_x87_attr_t",
1975 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1976 cmp_attr => "return 1;",
1977 emit => '. fld %X0',
1978 attr_type => "ia32_x87_attr_t",
1984 cmp_attr => "return 1;",
1985 emit => '. fstp %X0',
1986 attr_type => "ia32_x87_attr_t",
1992 op_flags => "L|X|Y",
1994 attr_type => "ia32_x87_attr_t",
1998 op_flags => "L|X|Y",
2000 attr_type => "ia32_x87_attr_t",
2004 op_flags => "L|X|Y",
2006 attr_type => "ia32_x87_attr_t",
2010 op_flags => "L|X|Y",
2012 attr_type => "ia32_x87_attr_t",
2016 op_flags => "L|X|Y",
2018 attr_type => "ia32_x87_attr_t",
2022 op_flags => "L|X|Y",
2024 attr_type => "ia32_x87_attr_t",
2028 # -------------------------------------------------------------------------------- #
2029 # ____ ____ _____ _ _ #
2030 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2031 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2032 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2033 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2035 # -------------------------------------------------------------------------------- #
2038 # Spilling and reloading of SSE registers, hardcoded, not generated #
2042 state => "exc_pinned",
2043 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2044 emit => '. movdqu %D0, %AM',
2045 outs => [ "res", "M" ],
2051 state => "exc_pinned",
2052 reg_req => { in => [ "gp", "gp", "xmm", "none" ] },
2053 emit => '. movdqu %binop',
2060 # Include the generated SIMD node specification written by the SIMD optimization
2061 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2062 unless ($return = do $my_script_name) {
2063 warn "couldn't parse $my_script_name: $@" if $@;
2064 warn "couldn't do $my_script_name: $!" unless defined $return;
2065 warn "couldn't run $my_script_name" unless $return;