3 # This is the specification for the ia32 assembler Firm-operations
10 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
13 # The node description is done as a perl hash initializer with the
14 # following structure:
19 # op_flags => "N|L|C|X|I|F|Y|H|c|K",
20 # irn_flags => "R|N|I|S"
21 # arity => "0|1|2|3 ... |variable|dynamic|any",
22 # state => "floats|pinned|mem_pinned|exc_pinned",
24 # { type => "type 1", name => "name 1" },
25 # { type => "type 2", name => "name 2" },
28 # comment => "any comment for constructor",
29 # reg_req => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
30 # cmp_attr => "c source code for comparing node attributes",
31 # emit => "emit code with templates",
32 # attr => "attitional attribute arguments for constructor"
33 # init_attr => "emit attribute initialization template"
34 # rd_constructor => "c source code which constructs an ir_node"
35 # latency => "latency of this operation (can be float)"
36 # attr_type => "name of the attribute struct",
39 # ... # (all nodes you need to describe)
41 # ); # close the %nodes initializer
43 # op_flags: flags for the operation, OPTIONAL (default is "N")
44 # the op_flags correspond to the firm irop_flags:
47 # C irop_flag_commutative
48 # X irop_flag_cfopcode
49 # I irop_flag_ip_cfopcode
52 # H irop_flag_highlevel
53 # c irop_flag_constlike
56 # irn_flags: special node flags, OPTIONAL (default is 0)
57 # following irn_flags are supported:
60 # I ignore for register allocation
61 # S modifies stack pointer
63 # state: state of the operation, OPTIONAL (default is "floats")
65 # arity: arity of the operation, MUST NOT BE OMITTED
67 # args: the OPTIONAL arguments of the node constructor (debug, irg and block
68 # are always the first 3 arguments and are always autmatically
70 # If this key is missing the following arguments will be created:
71 # for i = 1 .. arity: ir_node *op_i
74 # outs: if a node defines more than one output, the names of the projections
75 # nodes having outs having automatically the mode mode_T
76 # One can also annotate some flags for each out, additional to irn_flags.
77 # They are separated from name with a colon ':', and concatenated by pipe '|'
78 # Only I and S are available at the moment (same meaning as in irn_flags).
79 # example: [ "frame:I", "stack:I|S", "M" ]
81 # comment: OPTIONAL comment for the node constructor
83 # rd_constructor: for every operation there will be a
84 # new_rd_<arch>_<op-name> function with the arguments from above
85 # which creates the ir_node corresponding to the defined operation
86 # you can either put the complete source code of this function here
88 # This key is OPTIONAL. If omitted, the following constructor will
90 # if (!op_<arch>_<op-name>) assert(0);
94 # res = new_ir_node(db, irg, block, op_<arch>_<op-name>, mode, arity, in)
97 # NOTE: rd_constructor and args are only optional if and only if arity is 0,1,2 or 3
99 # latency: the latency of the operation, default is 1
103 # 0 - no special type
104 # 1 - caller save (register must be saved by the caller of a function)
105 # 2 - callee save (register must be saved by the called function)
106 # 4 - ignore (do not assign this register)
107 # 8 - emitter can choose an arbitrary register of this class
108 # 16 - the register is a virtual one
109 # 32 - register represents a state
110 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
113 { name => "edx", type => 1 },
114 { name => "ecx", type => 1 },
115 { name => "eax", type => 1 },
116 { name => "ebx", type => 2 },
117 { name => "esi", type => 2 },
118 { name => "edi", type => 2 },
119 { name => "ebp", type => 2 },
120 { name => "esp", type => 4 },
121 { name => "gp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
122 { name => "gp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
123 { mode => "mode_Iu" }
126 { name => "mm0", type => 4 },
127 { name => "mm1", type => 4 },
128 { name => "mm2", type => 4 },
129 { name => "mm3", type => 4 },
130 { name => "mm4", type => 4 },
131 { name => "mm5", type => 4 },
132 { name => "mm6", type => 4 },
133 { name => "mm7", type => 4 },
134 { mode => "mode_E", flags => "manual_ra" }
137 { name => "xmm0", type => 1 },
138 { name => "xmm1", type => 1 },
139 { name => "xmm2", type => 1 },
140 { name => "xmm3", type => 1 },
141 { name => "xmm4", type => 1 },
142 { name => "xmm5", type => 1 },
143 { name => "xmm6", type => 1 },
144 { name => "xmm7", type => 1 },
145 { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes
146 { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes
150 { name => "vf0", type => 1 | 16 },
151 { name => "vf1", type => 1 | 16 },
152 { name => "vf2", type => 1 | 16 },
153 { name => "vf3", type => 1 | 16 },
154 { name => "vf4", type => 1 | 16 },
155 { name => "vf5", type => 1 | 16 },
156 { name => "vf6", type => 1 | 16 },
157 { name => "vf7", type => 1 | 16 },
158 { name => "vfp_NOREG", type => 4 | 8 | 16 }, # we need a dummy register for NoReg nodes
159 { name => "vfp_UKNWN", type => 4 | 8 | 16 }, # we need a dummy register for Unknown nodes
163 { name => "st0", realname => "st", type => 4 },
164 { name => "st1", realname => "st(1)", type => 4 },
165 { name => "st2", realname => "st(2)", type => 4 },
166 { name => "st3", realname => "st(3)", type => 4 },
167 { name => "st4", realname => "st(4)", type => 4 },
168 { name => "st5", realname => "st(5)", type => 4 },
169 { name => "st6", realname => "st(6)", type => 4 },
170 { name => "st7", realname => "st(7)", type => 4 },
171 { mode => "mode_E", flags => "manual_ra" }
173 fp_cw => [ # the floating point control word
174 { name => "fpcw", type => 4|32 },
175 { mode => "mode_fpcw", flags => "manual_ra|state" }
178 { name => "eflags", type => 0 },
179 { mode => "mode_Iu", flags => "manual_ra" }
184 GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ],
185 SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ],
186 VFP => [ 1, "VFP_VF0", "VFP_VF1", "VFP_VF2", "VFP_VF3", "VFP_VF4", "VFP_VF5", "VFP_VF6", "VFP_VF7" ],
187 BRANCH => [ 1, "BRANCH1", "BRANCH2" ],
192 bundels_per_cycle => 1
196 S0 => "${arch}_emit_source_register(node, 0);",
197 S1 => "${arch}_emit_source_register(node, 1);",
198 S2 => "${arch}_emit_source_register(node, 2);",
199 S3 => "${arch}_emit_source_register(node, 3);",
200 S4 => "${arch}_emit_source_register(node, 4);",
201 S5 => "${arch}_emit_source_register(node, 5);",
202 SB1 => "${arch}_emit_8bit_source_register_or_immediate(node, 1);",
203 SB2 => "${arch}_emit_8bit_source_register_or_immediate(node, 2);",
204 SB3 => "${arch}_emit_8bit_source_register_or_immediate(node, 3);",
205 SI0 => "${arch}_emit_source_register_or_immediate(node, 0);",
206 SI1 => "${arch}_emit_source_register_or_immediate(node, 1);",
207 SI2 => "${arch}_emit_source_register_or_immediate(node, 2);",
208 SI3 => "${arch}_emit_source_register_or_immediate(node, 3);",
209 D0 => "${arch}_emit_dest_register(node, 0);",
210 D1 => "${arch}_emit_dest_register(node, 1);",
211 D2 => "${arch}_emit_dest_register(node, 2);",
212 D3 => "${arch}_emit_dest_register(node, 3);",
213 D4 => "${arch}_emit_dest_register(node, 4);",
214 D5 => "${arch}_emit_dest_register(node, 5);",
215 DB0 => "${arch}_emit_8bit_dest_register(node, 0);",
216 X0 => "${arch}_emit_x87_register(node, 0);",
217 X1 => "${arch}_emit_x87_register(node, 1);",
218 X2 => "${arch}_emit_x87_register(node, 2);",
219 SE => "${arch}_emit_extend_suffix(get_ia32_ls_mode(node));",
220 ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
221 ia32_emit_mode_suffix(node);",
222 M => "${arch}_emit_mode_suffix(node);",
223 XM => "${arch}_emit_x87_mode_suffix(node);",
224 XXM => "${arch}_emit_xmm_mode_suffix(node);",
225 XSD => "${arch}_emit_xmm_mode_suffix_s(node);",
226 AM => "${arch}_emit_am(node);",
227 unop0 => "${arch}_emit_unop(node, 0);",
228 unop1 => "${arch}_emit_unop(node, 1);",
229 unop2 => "${arch}_emit_unop(node, 2);",
230 unop3 => "${arch}_emit_unop(node, 3);",
231 unop4 => "${arch}_emit_unop(node, 4);",
232 unop5 => "${arch}_emit_unop(node, 5);",
233 DAM0 => "${arch}_emit_am_or_dest_register(node, 0);",
234 DAM1 => "${arch}_emit_am_or_dest_register(node, 1);",
235 binop => "${arch}_emit_binop(node, 1);",
236 binop_nores => "${arch}_emit_binop(node, 0);",
237 x87_binop => "${arch}_emit_x87_binop(node);",
238 CMP0 => "${arch}_emit_cmp_suffix_node(node, 0);",
241 #--------------------------------------------------#
244 # _ __ _____ __ _ _ __ ___ _ __ ___ #
245 # | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
246 # | | | | __/\ V V / | | | | (_) | |_) \__ \ #
247 # |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
250 #--------------------------------------------------#
252 $default_attr_type = "ia32_attr_t";
253 $default_copy_attr = "ia32_copy_attr";
255 sub ia32_custom_init_attr {
259 if(defined($node->{modified_flags})) {
260 $res .= "\tset_ia32_flags(res, get_ia32_flags(res) | arch_irn_flags_modify_flags);\n";
262 if(defined($node->{am})) {
263 my $am = $node->{am};
264 if($am eq "full,binary") {
265 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_binary);";
266 } elsif($am eq "full,unary") {
267 $res .= "\tset_ia32_am_support(res, ia32_am_Full, ia32_am_unary);";
268 } elsif($am eq "source,binary") {
269 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_binary);";
270 } elsif($am eq "dest,unary") {
271 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_unary);";
272 } elsif($am eq "dest,binary") {
273 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_binary);";
274 } elsif($am eq "dest,ternary") {
275 $res .= "\tset_ia32_am_support(res, ia32_am_Dest, ia32_am_ternary);";
276 } elsif($am eq "source,ternary") {
277 $res .= "\tset_ia32_am_support(res, ia32_am_Source, ia32_am_ternary);";
278 } elsif($am eq "none") {
281 die("Invalid address mode '$am' specified on op $name");
286 $custom_init_attr_func = \&ia32_custom_init_attr;
289 ia32_attr_t => "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
291 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
292 "\tinit_ia32_x87_attributes(res);",
294 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
295 "\tinit_ia32_x87_attributes(res);".
296 "\tinit_ia32_asm_attributes(res);",
297 ia32_immediate_attr_t =>
298 "\tinit_ia32_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);\n".
299 "\tinit_ia32_immediate_attributes(res, symconst, symconst_sign, offset);"
303 ia32_attr_t => "ia32_compare_nodes_attr",
304 ia32_x87_attr_t => "ia32_compare_x87_attr",
305 ia32_asm_attr_t => "ia32_compare_asm_attr",
306 ia32_immediate_attr_t => "ia32_compare_immediate_attr",
312 $mode_xmm = "mode_E";
313 $mode_gp = "mode_Iu";
314 $mode_flags = "mode_Iu";
315 $mode_fpcw = "mode_fpcw";
316 $status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ];
317 $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM",
318 "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ];
326 reg_req => { out => [ "gp_NOREG" ] },
327 attr => "ir_entity *symconst, int symconst_sign, long offset",
328 attr_type => "ia32_immediate_attr_t",
336 out_arity => "variable",
337 attr_type => "ia32_asm_attr_t",
344 reg_req => { out => [ "gp" ] },
349 cmp_attr => "return 1;",
352 #-----------------------------------------------------------------#
355 # _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
356 # | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
357 # | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
358 # |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
361 #-----------------------------------------------------------------#
363 # commutative operations
367 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5", "none", "flags" ] },
368 ins => [ "base", "index", "mem", "left", "right" ],
369 emit => '. add%M %binop',
373 modified_flags => $status_flags
378 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
379 ins => [ "base", "index", "mem", "val" ],
380 emit => ". add%M %SI3, %AM",
383 modified_flags => $status_flags
388 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
389 ins => [ "base", "index", "mem", "val" ],
390 emit => ". add%M %SB3, %AM",
393 modified_flags => $status_flags
397 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "flags" ], out => [ "in_r4 in_r5" ] },
398 ins => [ "base", "index", "mem", "left", "right", "eflags" ],
399 emit => '. adc%M %binop',
403 modified_flags => $status_flags
408 reg_req => { in => [ "none", "none" ], out => [ "none" ] },
409 ins => [ "left", "right" ],
413 reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
414 ins => [ "left", "right", "eflags" ],
418 # we should not rematrialize this node. It produces 2 results and has
419 # very strict constrains
420 reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], out => [ "eax", "edx", "none" ] },
421 ins => [ "base", "index", "mem", "val_high", "val_low" ],
422 emit => '. mul%M %unop4',
423 outs => [ "EAX", "EDX", "M" ],
424 am => "source,binary",
427 modified_flags => $status_flags
431 # we should not rematrialize this node. It produces 2 results and has
432 # very strict constrains
434 cmp_attr => "return 1;",
435 outs => [ "EAX", "EDX", "M" ],
441 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5" ] },
442 ins => [ "base", "index", "mem", "left", "right" ],
443 emit => '. imul%M %binop',
444 am => "source,binary",
448 modified_flags => $status_flags
453 reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], out => [ "eax", "edx", "none" ] },
454 ins => [ "base", "index", "mem", "val_high", "val_low" ],
455 emit => '. imul%M %unop4',
456 outs => [ "EAX", "EDX", "M" ],
457 am => "source,binary",
460 modified_flags => $status_flags
464 # we should not rematrialize this node. It produces 2 results and has
465 # very strict constrains
467 cmp_attr => "return 1;",
468 outs => [ "EAX", "EDX", "M" ],
474 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5" ] },
475 ins => [ "base", "index", "mem", "left", "right" ],
477 emit => '. and%M %binop',
480 modified_flags => $status_flags
485 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
486 ins => [ "base", "index", "mem", "val" ],
487 emit => '. and%M %SI3, %AM',
490 modified_flags => $status_flags
495 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
496 ins => [ "base", "index", "mem", "val" ],
497 emit => '. and%M %SB3, %AM',
500 modified_flags => $status_flags
505 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5" ] },
506 ins => [ "base", "index", "mem", "left", "right" ],
508 emit => '. or%M %binop',
511 modified_flags => $status_flags
516 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
517 ins => [ "base", "index", "mem", "val" ],
518 emit => '. or%M %SI3, %AM',
521 modified_flags => $status_flags
526 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
527 ins => [ "base", "index", "mem", "val" ],
528 emit => '. or%M %SB3, %AM',
531 modified_flags => $status_flags
536 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5" ] },
537 ins => [ "base", "index", "mem", "left", "right" ],
539 emit => '. xor%M %binop',
542 modified_flags => $status_flags
547 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
548 ins => [ "base", "index", "mem", "val" ],
549 emit => '. xor%M %SI3, %AM',
552 modified_flags => $status_flags
557 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
558 ins => [ "base", "index", "mem", "val" ],
559 emit => '. xor%M %SB3, %AM',
562 modified_flags => $status_flags
565 # not commutative operations
569 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] },
570 ins => [ "base", "index", "mem", "left", "right" ],
572 emit => '. sub%M %binop',
575 modified_flags => $status_flags
580 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
581 ins => [ "base", "index", "mem", "val" ],
582 emit => '. sub%M %SI3, %AM',
585 modified_flags => $status_flags
590 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
591 ins => [ "base", "index", "mem", "val" ],
592 emit => '. sub%M %SB3, %AM',
595 modified_flags => $status_flags
599 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 !in_r5" ] },
600 ins => [ "base", "index", "mem", "left", "right" ],
602 emit => '. sbb%M %binop',
605 modified_flags => $status_flags
611 reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "!in", "!in" ] },
618 outs => [ "low_res", "high_res" ],
620 modified_flags => $status_flags
625 state => "exc_pinned",
626 reg_req => { in => [ "gp", "gp", "none", "eax", "edx", "gp" ], out => [ "eax", "edx", "none" ] },
627 ins => [ "base", "index", "mem", "left_low", "left_high", "right" ],
628 outs => [ "div_res", "mod_res", "M" ],
629 attr => "ia32_op_flavour_t dm_flav",
630 am => "source,ternary",
631 init_attr => "attr->data.op_flav = dm_flav;",
632 emit => ". idiv%M %unop5",
635 modified_flags => $status_flags
640 state => "exc_pinned",
641 reg_req => { in => [ "gp", "gp", "none", "eax", "edx", "gp" ], out => [ "eax", "edx", "none" ] },
642 ins => [ "base", "index", "mem", "left_low", "left_high", "right" ],
643 outs => [ "div_res", "mod_res", "M" ],
644 attr => "ia32_op_flavour_t dm_flav",
645 am => "source,ternary",
646 init_attr => "attr->data.op_flav = dm_flav;",
647 emit => ". div%M %unop5",
650 modified_flags => $status_flags
655 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
656 ins => [ "left", "right" ],
658 emit => '. shl %SB1, %S0',
661 modified_flags => $status_flags
666 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
667 ins => [ "base", "index", "mem", "count" ],
668 emit => '. shl%M %SB3, %AM',
671 modified_flags => $status_flags
675 cmp_attr => "return 1;",
676 # value, cnt, dependency
681 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shl
683 # Out requirements is: different from all in
684 # This is because, out must be different from LowPart and ShiftCount.
685 # We could say "!ecx !in_r4" but it can occur, that all values live through
686 # this Shift and the only value dying is the ShiftCount. Then there would be a
687 # register missing, as result must not be ecx and all other registers are
688 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
689 # (and probably never will). So we create artificial interferences of the result
690 # with all inputs, so the spiller can always assure a free register.
691 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
694 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
695 ins => [ "left_high", "left_low", "right" ],
696 am => "dest,ternary",
697 emit => '. shld%M %SB2, %S1, %S0',
701 modified_flags => $status_flags
705 cmp_attr => "return 1;",
711 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
712 ins => [ "val", "count" ],
714 emit => '. shr %SB1, %S0',
717 modified_flags => $status_flags
722 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
723 ins => [ "base", "index", "mem", "count" ],
724 emit => '. shr%M %SB3, %AM',
727 modified_flags => $status_flags
731 cmp_attr => "return 1;",
732 # value, cnt, dependency
737 # FIXME: WHY? the right requirement is in_r3 !in_r5, especially this is the same as in Shr
739 # Out requirements is: different from all in
740 # This is because, out must be different from LowPart and ShiftCount.
741 # We could say "!ecx !in_r4" but it can occur, that all values live through
742 # this Shift and the only value dying is the ShiftCount. Then there would be a
743 # register missing, as result must not be ecx and all other registers are
744 # occupied. What we should write is "!in_r4 !in_r5", but this is not supported
745 # (and probably never will). So we create artificial interferences of the result
746 # with all inputs, so the spiller can always assure a free register.
747 # reg_req => { in => [ "gp", "gp", "gp", "gp", "ecx", "none" ], out => [ "!in" ] },
750 reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r3" ] },
751 ins => [ "left_high", "left_low", "right" ],
752 am => "dest,ternary",
753 emit => '. shrd%M %SB2, %S1, %S0',
757 modified_flags => $status_flags
761 cmp_attr => "return 1;",
767 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
768 ins => [ "val", "count" ],
770 emit => '. sar %SB1, %S0',
773 modified_flags => $status_flags
778 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
779 ins => [ "base", "index", "mem", "count" ],
780 emit => '. sar%M %SB3, %AM',
783 modified_flags => $status_flags
787 cmp_attr => "return 1;",
793 cmp_attr => "return 1;",
794 # value, cnt, dependency
800 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
801 ins => [ "val", "count" ],
803 emit => '. ror %SB1, %S0',
806 modified_flags => $status_flags
811 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
812 ins => [ "base", "index", "mem", "count" ],
813 emit => '. ror%M %SB3, %AM',
816 modified_flags => $status_flags
821 reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2" ] },
822 ins => [ "val", "count" ],
824 emit => '. rol %SB1, %S0',
827 modified_flags => $status_flags
832 reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
833 ins => [ "base", "index", "mem", "count" ],
834 emit => '. rol%M %SB3, %AM',
837 modified_flags => $status_flags
844 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
850 modified_flags => $status_flags
855 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
856 ins => [ "base", "index", "mem" ],
857 emit => '. neg%M %AM',
860 modified_flags => $status_flags
865 reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "gp" ] },
866 outs => [ "low_res", "high_res" ],
868 modified_flags => $status_flags
873 cmp_attr => "return 1;",
879 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
884 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
889 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
890 ins => [ "base", "index", "mem" ],
891 emit => '. inc%M %AM',
894 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
899 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
904 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
909 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
910 ins => [ "base", "index", "mem" ],
911 emit => '. dec%M %AM',
914 modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ]
919 reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
929 reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
930 ins => [ "base", "index", "mem" ],
931 emit => '. not%M %AM',
940 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ] , out => [ "flags" ] },
941 ins => [ "base", "index", "mem", "left", "right" ],
942 outs => [ "eflags" ],
943 am => "source,binary",
944 emit => '. cmp%M %binop_nores',
945 attr => "int flipped, int cmp_unsigned",
946 init_attr => "attr->data.cmp_flipped = flipped;\n".
947 "\tattr->data.cmp_unsigned = cmp_unsigned;\n",
951 modified_flags => $status_flags
956 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] , out => [ "flags" ] },
957 ins => [ "base", "index", "mem", "left", "right" ],
958 outs => [ "eflags" ],
959 am => "source,binary",
960 emit => '. cmpb %binop_nores',
961 attr => "int flipped, int cmp_unsigned",
962 init_attr => "attr->data.cmp_flipped = flipped;\n".
963 "\tattr->data.cmp_unsigned = cmp_unsigned;\n",
967 modified_flags => $status_flags
972 reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ] , out => [ "flags" ] },
973 ins => [ "base", "index", "mem", "left", "right" ],
974 outs => [ "eflags" ],
975 am => "source,binary",
976 emit => '. test%M %binop_nores',
977 attr => "int flipped, int cmp_unsigned",
978 init_attr => "attr->data.cmp_flipped = flipped;\n".
979 "\tattr->data.cmp_unsigned = cmp_unsigned;\n",
983 modified_flags => $status_flags
988 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] , out => [ "flags" ] },
989 ins => [ "base", "index", "mem", "left", "right" ],
990 outs => [ "eflags" ],
991 am => "source,binary",
992 emit => '. testb %binop_nores',
993 attr => "int flipped, int cmp_unsigned",
994 init_attr => "attr->data.cmp_flipped = flipped;\n".
995 "\tattr->data.cmp_unsigned = cmp_unsigned;\n",
999 modified_flags => $status_flags
1004 reg_req => { in => [ "eflags" ], out => [ "eax ebx ecx edx" ] },
1005 ins => [ "eflags" ],
1007 attr => "pn_Cmp pnc",
1008 init_attr => "attr->pn_code = pnc;\nset_ia32_ls_mode(res, mode_Bu);\n",
1009 emit => '. set%CMP0 %DB0',
1017 # (note: leave the false,true order intact to make it compatible with other
1019 reg_req => { in => [ "gp", "gp", "none", "gp", "gp", "eflags" ], out => [ "in_r4" ] },
1020 ins => [ "base", "index", "mem", "val_false", "val_true", "eflags" ],
1021 am => "source,binary",
1022 attr => "pn_Cmp pn_code",
1023 init_attr => "attr->pn_code = pn_code;",
1031 op_flags => "L|X|Y",
1032 reg_req => { in => [ "eflags" ], out => [ "none", "none" ] },
1033 ins => [ "eflags" ],
1034 outs => [ "false", "true" ],
1035 attr => "pn_Cmp pnc",
1036 init_attr => "attr->pn_code = pnc;",
1038 units => [ "BRANCH" ],
1043 op_flags => "L|X|Y",
1044 reg_req => { in => [ "gp" ], out => [ "none" ] },
1046 units => [ "BRANCH" ],
1048 modified_flags => $status_flags
1054 reg_req => { in => [ "gp" ] },
1055 emit => '. jmp *%S0',
1056 units => [ "BRANCH" ],
1063 reg_req => { out => [ "gp" ] },
1065 attr => "ir_entity *symconst, int symconst_sign, long offset",
1066 attr_type => "ia32_immediate_attr_t",
1068 # depends on the const and is set in ia32_transform
1069 # modified_flags => $status_flags
1076 reg_req => { out => [ "gp_UKNWN" ] },
1086 reg_req => { out => [ "vfp_UKNWN" ] },
1090 attr_type => "ia32_x87_attr_t",
1097 reg_req => { out => [ "xmm_UKNWN" ] },
1107 reg_req => { out => [ "gp_NOREG" ] },
1117 reg_req => { out => [ "vfp_NOREG" ] },
1121 attr_type => "ia32_x87_attr_t",
1128 reg_req => { out => [ "xmm_NOREG" ] },
1138 reg_req => { out => [ "fp_cw" ] },
1142 modified_flags => $fpcw_flags
1148 reg_req => { in => [ "gp", "gp", "none" ], out => [ "fp_cw" ] },
1149 ins => [ "base", "index", "mem" ],
1151 emit => ". fldcw %AM",
1154 modified_flags => $fpcw_flags
1160 reg_req => { in => [ "gp", "gp", "none", "fp_cw" ], out => [ "none" ] },
1161 ins => [ "base", "index", "mem", "fpcw" ],
1163 emit => ". fnstcw %AM",
1169 # we should not rematrialize this node. It has very strict constraints.
1170 reg_req => { in => [ "eax", "edx" ], out => [ "edx" ] },
1171 ins => [ "val", "globbered" ],
1179 # Note that we add additional latency values depending on address mode, so a
1180 # lateny of 0 for load is correct
1184 state => "exc_pinned",
1185 reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none" ] },
1186 ins => [ "base", "index", "mem" ],
1187 outs => [ "res", "M" ],
1189 emit => ". mov%SE%ME%.l %AM, %D0",
1195 cmp_attr => "return 1;",
1196 outs => [ "res", "M" ],
1202 cmp_attr => "return 1;",
1203 state => "exc_pinned",
1210 state => "exc_pinned",
1211 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
1212 ins => [ "base", "index", "mem", "val" ],
1213 emit => '. mov%M %SI3, %AM',
1221 state => "exc_pinned",
1222 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => ["none" ] },
1223 ins => [ "base", "index", "mem", "val" ],
1224 emit => '. mov%M %SB3, %AM',
1232 reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
1233 ins => [ "base", "index" ],
1234 emit => '. leal %AM, %D0',
1238 # well this isn't true for Lea, but we often transform Lea back to Add, Inc
1239 # or Dec, so we set the flag
1240 modified_flags => 1,
1244 reg_req => { in => [ "gp", "gp", "none", "gp", "esp" ], out => [ "esp", "none" ] },
1245 ins => [ "base", "index", "mem", "val", "stack" ],
1246 emit => '. push%M %unop3',
1247 outs => [ "stack:I|S", "M" ],
1248 am => "source,binary",
1254 reg_req => { in => [ "gp", "gp", "none", "esp" ], out => [ "esp", "gp", "none" ] },
1255 emit => '. pop%M %DAM1',
1256 outs => [ "stack:I|S", "res", "M" ],
1257 ins => [ "base", "index", "mem", "stack" ],
1259 latency => 3, # Pop is more expensive than Push on Athlon
1264 reg_req => { in => [ "esp" ], out => [ "ebp", "esp", "none" ] },
1266 outs => [ "frame:I", "stack:I|S", "M" ],
1272 reg_req => { in => [ "esp", "ebp" ], out => [ "ebp", "esp" ] },
1274 outs => [ "frame:I", "stack:I|S" ],
1282 reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "in_r4", "none" ] },
1283 ins => [ "base", "index", "mem", "stack", "size" ],
1284 am => "source,binary",
1285 emit => '. addl %binop',
1286 outs => [ "stack:S", "M" ],
1288 modified_flags => $status_flags
1294 reg_req => { in => [ "gp", "gp", "none", "esp", "gp" ], out => [ "in_r4", "gp", "none" ] },
1295 ins => [ "base", "index", "mem", "stack", "size" ],
1296 am => "source,binary",
1297 emit => ". subl %binop\n".
1298 ". movl %%esp, %D1",
1299 outs => [ "stack:I|S", "addr", "M" ],
1301 modified_flags => $status_flags
1306 reg_req => { out => [ "gp" ] },
1310 # the int instruction
1312 reg_req => { in => [ "gp" ], out => [ "none" ] },
1314 emit => '. int %SI0',
1316 cmp_attr => "return 1;",
1320 #-----------------------------------------------------------------------------#
1321 # _____ _____ ______ __ _ _ _ #
1322 # / ____/ ____| ____| / _| | | | | | #
1323 # | (___| (___ | |__ | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1324 # \___ \\___ \| __| | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1325 # ____) |___) | |____ | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1326 # |_____/_____/|______| |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1327 #-----------------------------------------------------------------------------#
1331 reg_req => { out => [ "xmm" ] },
1332 emit => '. xorp%XSD %D1, %D1',
1338 # commutative operations
1342 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1343 ins => [ "base", "index", "mem", "left", "right" ],
1344 emit => '. add%XXM %binop',
1352 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1353 ins => [ "base", "index", "mem", "left", "right" ],
1354 emit => '. mul%XXM %binop',
1362 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1363 ins => [ "base", "index", "mem", "left", "right" ],
1364 emit => '. max%XXM %binop',
1372 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1373 ins => [ "base", "index", "mem", "left", "right" ],
1374 emit => '. min%XXM %binop',
1382 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1383 ins => [ "base", "index", "mem", "left", "right" ],
1384 emit => '. andp%XSD %binop',
1392 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1393 ins => [ "base", "index", "mem", "left", "right" ],
1394 emit => '. orp%XSD %binop',
1401 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5" ] },
1402 ins => [ "base", "index", "mem", "left", "right" ],
1403 emit => '. xorp%XSD %binop',
1409 # not commutative operations
1413 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5" ] },
1414 ins => [ "base", "index", "mem", "left", "right" ],
1415 emit => '. andnp%XSD %binop',
1423 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4" ] },
1424 ins => [ "base", "index", "mem", "left", "right" ],
1425 emit => '. sub%XXM %binop',
1433 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5", "none" ] },
1434 ins => [ "base", "index", "mem", "left", "right" ],
1435 outs => [ "res", "M" ],
1436 emit => '. div%XXM %binop',
1445 reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "eflags" ] },
1446 ins => [ "base", "index", "mem", "left", "right" ],
1447 outs => [ "flags" ],
1448 am => "source,binary",
1449 attr => "int flipped",
1450 init_attr => "attr->data.cmp_flipped = flipped;",
1451 emit => ' .ucomi%XXM %binop_nores',
1454 mode => $mode_flags,
1455 modified_flags => 1,
1462 state => "exc_pinned",
1463 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
1464 ins => [ "base", "index", "mem" ],
1465 emit => '. mov%XXM %AM, %D0',
1466 attr => "ir_mode *load_mode",
1467 init_attr => "attr->ls_mode = load_mode;",
1468 outs => [ "res", "M" ],
1475 state => "exc_pinned",
1476 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
1477 ins => [ "base", "index", "mem", "val" ],
1478 emit => '. mov%XXM %S3, %AM',
1486 state => "exc_pinned",
1487 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
1488 ins => [ "base", "index", "mem", "val" ],
1489 emit => '. mov%XXM %S3, %AM',
1497 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
1498 ins => [ "base", "index", "mem", "val" ],
1499 emit => '. cvtsi2ss %D0, %AM',
1507 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
1508 ins => [ "base", "index", "mem", "val" ],
1509 emit => '. cvtsi2sd %unop3',
1518 cmp_attr => "return 1;",
1524 cmp_attr => "return 1;",
1533 reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
1534 outs => [ "DST", "SRC", "CNT", "M" ],
1536 # we don't care about this flag, so no need to mark this node
1537 # modified_flags => [ "DF" ]
1543 reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
1544 outs => [ "DST", "SRC", "M" ],
1546 # we don't care about this flag, so no need to mark this node
1547 # modified_flags => [ "DF" ]
1553 state => "exc_pinned",
1554 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "gp", "none" ] },
1555 ins => [ "base", "index", "mem", "val" ],
1557 attr => "ir_mode *smaller_mode",
1558 init_attr => "attr->ls_mode = smaller_mode;",
1563 state => "exc_pinned",
1564 reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "gp", "none" ] },
1565 ins => [ "base", "index", "mem", "val" ],
1567 attr => "ir_mode *smaller_mode",
1568 init_attr => "attr->ls_mode = smaller_mode;",
1573 reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm", "none" ] },
1574 ins => [ "base", "index", "mem", "val" ],
1581 reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "gp", "none" ] },
1582 ins => [ "base", "index", "mem", "val" ],
1589 reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "xmm", "none" ] },
1590 ins => [ "base", "index", "mem", "val" ],
1596 #----------------------------------------------------------#
1598 # (_) | | | | / _| | | | #
1599 # __ ___ _ __| |_ _ _ __ _| | | |_| | ___ __ _| |_ #
1600 # \ \ / / | '__| __| | | |/ _` | | | _| |/ _ \ / _` | __| #
1601 # \ V /| | | | |_| |_| | (_| | | | | | | (_) | (_| | |_ #
1602 # \_/ |_|_| \__|\__,_|\__,_|_| |_| |_|\___/ \__,_|\__| #
1604 # _ __ ___ __| | ___ ___ #
1605 # | '_ \ / _ \ / _` |/ _ \/ __| #
1606 # | | | | (_) | (_| | __/\__ \ #
1607 # |_| |_|\___/ \__,_|\___||___/ #
1608 #----------------------------------------------------------#
1612 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1613 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1617 attr_type => "ia32_x87_attr_t",
1622 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1623 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1627 attr_type => "ia32_x87_attr_t",
1632 cmp_attr => "return 1;",
1638 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1639 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1643 attr_type => "ia32_x87_attr_t",
1647 cmp_attr => "return 1;",
1652 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp", "none" ] },
1653 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1654 outs => [ "res", "M" ],
1657 attr_type => "ia32_x87_attr_t",
1661 cmp_attr => "return 1;",
1662 outs => [ "res", "M" ],
1667 reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
1668 ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
1672 attr_type => "ia32_x87_attr_t",
1676 cmp_attr => "return 1;",
1682 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1687 attr_type => "ia32_x87_attr_t",
1692 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
1697 attr_type => "ia32_x87_attr_t",
1700 # virtual Load and Store
1704 state => "exc_pinned",
1705 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1706 ins => [ "base", "index", "mem" ],
1707 outs => [ "res", "M" ],
1708 attr => "ir_mode *load_mode",
1709 init_attr => "attr->attr.ls_mode = load_mode;",
1712 attr_type => "ia32_x87_attr_t",
1717 state => "exc_pinned",
1718 reg_req => { in => [ "gp", "gp", "none", "vfp" ] },
1719 ins => [ "base", "index", "mem", "val" ],
1720 attr => "ir_mode *store_mode",
1721 init_attr => "attr->attr.ls_mode = store_mode;",
1725 attr_type => "ia32_x87_attr_t",
1731 state => "exc_pinned",
1732 reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
1733 outs => [ "res", "M" ],
1734 ins => [ "base", "index", "mem" ],
1737 attr_type => "ia32_x87_attr_t",
1741 cmp_attr => "return 1;",
1742 outs => [ "res", "M" ],
1747 state => "exc_pinned",
1748 reg_req => { in => [ "gp", "gp", "none", "vfp", "fpcw" ] },
1749 ins => [ "base", "index", "mem", "val", "fpcw" ],
1753 attr_type => "ia32_x87_attr_t",
1757 cmp_attr => "return 1;",
1758 state => "exc_pinned",
1768 reg_req => { out => [ "vfp" ] },
1772 attr_type => "ia32_x87_attr_t",
1777 reg_req => { out => [ "vfp" ] },
1781 attr_type => "ia32_x87_attr_t",
1786 reg_req => { out => [ "vfp" ] },
1790 attr_type => "ia32_x87_attr_t",
1795 reg_req => { out => [ "vfp" ] },
1799 attr_type => "ia32_x87_attr_t",
1804 reg_req => { out => [ "vfp" ] },
1808 attr_type => "ia32_x87_attr_t",
1813 reg_req => { out => [ "vfp" ] },
1817 attr_type => "ia32_x87_attr_t",
1822 reg_req => { out => [ "vfp" ] },
1826 attr_type => "ia32_x87_attr_t",
1832 # we can't allow to rematerialize this node so we don't have
1833 # accidently produce Phi(Fucom, Fucom(flipped))
1835 reg_req => { in => [ "vfp", "vfp" ], out => [ "eax" ] },
1836 ins => [ "left", "right" ],
1837 outs => [ "flags" ],
1838 am => "source,binary",
1839 attr => "int flipped",
1840 init_attr => "attr->attr.data.cmp_flipped = flipped;",
1843 attr_type => "ia32_x87_attr_t",
1849 reg_req => { in => [ "eax" ], out => [ "eflags" ] },
1851 outs => [ "flags" ],
1854 mode => $mode_flags,
1857 #------------------------------------------------------------------------#
1858 # ___ _____ __ _ _ _ #
1859 # __ _( _ )___ | / _| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
1860 # \ \/ / _ \ / / | |_| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
1861 # > < (_) |/ / | _| | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
1862 # /_/\_\___//_/ |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
1863 #------------------------------------------------------------------------#
1865 # Note: gas is strangely buggy: fdivrp and fdivp as well as fsubrp and fsubp
1866 # are swapped, we work this around in the emitter...
1870 rd_constructor => "NONE",
1872 emit => '. fadd%XM %x87_binop',
1873 attr_type => "ia32_x87_attr_t",
1878 rd_constructor => "NONE",
1880 emit => '. faddp%XM %x87_binop',
1881 attr_type => "ia32_x87_attr_t",
1886 rd_constructor => "NONE",
1888 emit => '. fmul%XM %x87_binop',
1889 attr_type => "ia32_x87_attr_t",
1894 rd_constructor => "NONE",
1896 emit => '. fmulp%XM %x87_binop',,
1897 attr_type => "ia32_x87_attr_t",
1902 rd_constructor => "NONE",
1904 emit => '. fsub%XM %x87_binop',
1905 attr_type => "ia32_x87_attr_t",
1910 rd_constructor => "NONE",
1912 # see note about gas bugs
1913 emit => '. fsubrp%XM %x87_binop',
1914 attr_type => "ia32_x87_attr_t",
1919 rd_constructor => "NONE",
1922 emit => '. fsubr%XM %x87_binop',
1923 attr_type => "ia32_x87_attr_t",
1928 rd_constructor => "NONE",
1931 # see note about gas bugs
1932 emit => '. fsubp%XM %x87_binop',
1933 attr_type => "ia32_x87_attr_t",
1938 rd_constructor => "NONE",
1941 attr_type => "ia32_x87_attr_t",
1944 # this node is just here, to keep the simulator running
1945 # we can omit this when a fprem simulation function exists
1948 rd_constructor => "NONE",
1951 attr_type => "ia32_x87_attr_t",
1956 rd_constructor => "NONE",
1958 emit => '. fdiv%XM %x87_binop',
1959 attr_type => "ia32_x87_attr_t",
1964 rd_constructor => "NONE",
1966 # see note about gas bugs
1967 emit => '. fdivrp%XM %x87_binop',
1968 attr_type => "ia32_x87_attr_t",
1973 rd_constructor => "NONE",
1975 emit => '. fdivr%XM %x87_binop',
1976 attr_type => "ia32_x87_attr_t",
1981 rd_constructor => "NONE",
1983 # see note about gas bugs
1984 emit => '. fdivp%XM %x87_binop',
1985 attr_type => "ia32_x87_attr_t",
1990 rd_constructor => "NONE",
1993 attr_type => "ia32_x87_attr_t",
1998 rd_constructor => "NONE",
2001 attr_type => "ia32_x87_attr_t",
2004 # x87 Load and Store
2007 rd_constructor => "NONE",
2008 op_flags => "R|L|F",
2009 state => "exc_pinned",
2011 emit => '. fld%XM %AM',
2012 attr_type => "ia32_x87_attr_t",
2016 rd_constructor => "NONE",
2017 op_flags => "R|L|F",
2018 state => "exc_pinned",
2020 emit => '. fst%XM %AM',
2022 attr_type => "ia32_x87_attr_t",
2026 rd_constructor => "NONE",
2027 op_flags => "R|L|F",
2028 state => "exc_pinned",
2030 emit => '. fstp%XM %AM',
2032 attr_type => "ia32_x87_attr_t",
2039 rd_constructor => "NONE",
2041 emit => '. fild%M %AM',
2042 attr_type => "ia32_x87_attr_t",
2047 state => "exc_pinned",
2048 rd_constructor => "NONE",
2050 emit => '. fist%M %AM',
2052 attr_type => "ia32_x87_attr_t",
2057 state => "exc_pinned",
2058 rd_constructor => "NONE",
2060 emit => '. fistp%M %AM',
2062 attr_type => "ia32_x87_attr_t",
2068 op_flags => "R|c|K",
2072 attr_type => "ia32_x87_attr_t",
2076 op_flags => "R|c|K",
2080 attr_type => "ia32_x87_attr_t",
2084 op_flags => "R|c|K",
2088 attr_type => "ia32_x87_attr_t",
2092 op_flags => "R|c|K",
2096 attr_type => "ia32_x87_attr_t",
2100 op_flags => "R|c|K",
2104 attr_type => "ia32_x87_attr_t",
2108 op_flags => "R|c|K",
2111 emit => '. fldll2t',
2112 attr_type => "ia32_x87_attr_t",
2116 op_flags => "R|c|K",
2120 attr_type => "ia32_x87_attr_t",
2124 # Note that it is NEVER allowed to do CSE on these nodes
2125 # Moreover, note the virtual register requierements!
2130 cmp_attr => "return 1;",
2131 emit => '. fxch %X0',
2132 attr_type => "ia32_x87_attr_t",
2138 cmp_attr => "return 1;",
2139 emit => '. fld %X0',
2140 attr_type => "ia32_x87_attr_t",
2145 reg_req => { in => [ "vfp"], out => [ "vfp" ] },
2146 cmp_attr => "return 1;",
2147 emit => '. fld %X0',
2148 attr_type => "ia32_x87_attr_t",
2154 cmp_attr => "return 1;",
2155 emit => '. fstp %X0',
2156 attr_type => "ia32_x87_attr_t",
2162 cmp_attr => "return 1;",
2163 emit => '. ffreep %X0',
2164 attr_type => "ia32_x87_attr_t",
2170 cmp_attr => "return 1;",
2172 attr_type => "ia32_x87_attr_t",
2178 cmp_attr => "return 1;",
2180 attr_type => "ia32_x87_attr_t",
2188 emit => ". fucom %X1\n".
2190 attr_type => "ia32_x87_attr_t",
2196 emit => ". fucomp %X1\n".
2198 attr_type => "ia32_x87_attr_t",
2204 emit => ". fucompp\n".
2206 attr_type => "ia32_x87_attr_t",
2210 # -------------------------------------------------------------------------------- #
2211 # ____ ____ _____ _ _ #
2212 # / ___/ ___|| ____| __ _____ ___| |_ ___ _ __ _ __ ___ __| | ___ ___ #
2213 # \___ \___ \| _| \ \ / / _ \/ __| __/ _ \| '__| | '_ \ / _ \ / _` |/ _ \/ __| #
2214 # ___) |__) | |___ \ V / __/ (__| || (_) | | | | | | (_) | (_| | __/\__ \ #
2215 # |____/____/|_____| \_/ \___|\___|\__\___/|_| |_| |_|\___/ \__,_|\___||___/ #
2217 # -------------------------------------------------------------------------------- #
2220 # Spilling and reloading of SSE registers, hardcoded, not generated #
2224 state => "exc_pinned",
2225 reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
2226 emit => '. movdqu %D0, %AM',
2227 outs => [ "res", "M" ],
2233 state => "exc_pinned",
2234 reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
2235 ins => [ "base", "index", "mem", "val" ],
2236 emit => '. movdqu %binop',
2243 # Include the generated SIMD node specification written by the SIMD optimization
2244 $my_script_name = dirname($myname) . "/../ia32/ia32_simd_spec.pl";
2245 unless ($return = do $my_script_name) {
2246 warn "couldn't parse $my_script_name: $@" if $@;
2247 warn "couldn't do $my_script_name: $!" unless defined $return;
2248 warn "couldn't run $my_script_name" unless $return;