nsz Git - libfirm/blob - ir/be/ia32/ia32_optimize.c

   1 #ifdef HAVE_CONFIG_H
   2 #include "config.h"
   3 #endif
   4
   5 #include "irnode.h"
   6 #include "irprog_t.h"
   7 #include "ircons.h"
   8 #include "firm_types.h"
   9 #include "iredges.h"
  10 #include "tv.h"
  11 #include "irgmod.h"
  12
  13 #include "../be_t.h"
  14 #include "../beabi.h"
  15
  16 #include "ia32_new_nodes.h"
  17 #include "bearch_ia32_t.h"
  18 #include "gen_ia32_regalloc_if.h"     /* the generated interface (register type and class defenitions) */
  19
  20 #undef is_NoMem
  21 #define is_NoMem(irn) (get_irn_op(irn) == op_NoMem)
  22
  23 static int be_is_NoReg(be_abi_irg_t *babi, const ir_node *irn) {
  24         if (be_abi_get_callee_save_irn(babi, &ia32_gp_regs[REG_XXX]) == irn ||
  25                 be_abi_get_callee_save_irn(babi, &ia32_fp_regs[REG_XXXX]) == irn)
  26         {
  27                 return 1;
  28         }
  29
  30         return 0;
  31 }
  32
  33 /**
  34  * creates a unique ident by adding a number to a tag
  35  *
  36  * @param tag   the tag string, must contain a %d if a number
  37  *              should be added
  38  */
  39 static ident *unique_id(const char *tag)
  40 {
  41         static unsigned id = 0;
  42         char str[256];
  43
  44         snprintf(str, sizeof(str), tag, ++id);
  45         return new_id_from_str(str);
  46 }
  47
  48
  49
  50 /**
  51  * Transforms a SymConst.
  52  *
  53  * @param mod     the debug module
  54  * @param block   the block the new node should belong to
  55  * @param node    the ir SymConst node
  56  * @param mode    mode of the SymConst
  57  * @return the created ia32 Const node
  58  */
  59 static ir_node *gen_SymConst(ia32_transform_env_t *env) {
  60         ir_node  *cnst;
  61         dbg_info *dbg   = env->dbg;
  62         ir_mode  *mode  = env->mode;
  63         ir_graph *irg   = env->irg;
  64         ir_node  *block = env->block;
  65
  66         cnst = new_rd_ia32_Const(dbg, irg, block, mode);
  67         set_ia32_Const_attr(cnst, env->irn);
  68         return cnst;
  69 }
  70
  71 /**
  72  * Get a primitive type for a mode.
  73  */
  74 static ir_type *get_prim_type(pmap *types, ir_mode *mode)
  75 {
  76         pmap_entry *e = pmap_find(types, mode);
  77         ir_type *res;
  78
  79         if (! e) {
  80                 char buf[64];
  81                 snprintf(buf, sizeof(buf), "prim_type_%s", get_mode_name(mode));
  82                 res = new_type_primitive(new_id_from_str(buf), mode);
  83                 pmap_insert(types, mode, res);
  84         }
  85         else
  86                 res = e->value;
  87         return res;
  88 }
  89
  90 /**
  91  * Get an entity that is initialized with a tarval
  92  */
  93 static entity *get_entity_for_tv(ia32_code_gen_t *cg, ir_node *cnst)
  94 {
  95         tarval *tv    = get_Const_tarval(cnst);
  96         pmap_entry *e = pmap_find(cg->tv_ent, tv);
  97         entity *res;
  98         ir_graph *rem;
  99
 100         if (! e) {
 101                 ir_mode *mode = get_irn_mode(cnst);
 102                 ir_type *tp = get_Const_type(cnst);
 103                 if (tp == firm_unknown_type)
 104                         tp = get_prim_type(cg->types, mode);
 105
 106                 res = new_entity(get_glob_type(), unique_id("ia32FloatCnst_%u"), tp);
 107
 108                 set_entity_ld_ident(res, get_entity_ident(res));
 109                 set_entity_visibility(res, visibility_local);
 110                 set_entity_variability(res, variability_constant);
 111                 set_entity_allocation(res, allocation_static);
 112
 113                  /* we create a new entity here: It's initialization must resist on the
 114                     const code irg */
 115                 rem = current_ir_graph;
 116                 current_ir_graph = get_const_code_irg();
 117                 set_atomic_ent_value(res, new_Const_type(tv, tp));
 118                 current_ir_graph = rem;
 119         }
 120         else
 121                 res = e->value;
 122         return res;
 123 }
 124
 125 /**
 126  * Transforms a Const.
 127  *
 128  * @param mod     the debug module
 129  * @param block   the block the new node should belong to
 130  * @param node    the ir Const node
 131  * @param mode    mode of the Const
 132  * @return the created ia32 Const node
 133  */
 134 static ir_node *gen_Const(ia32_transform_env_t *env) {
 135         ir_node *cnst;
 136         symconst_symbol sym;
 137         ir_graph *irg   = env->irg;
 138         ir_node  *block = env->block;
 139         ir_node  *node  = env->irn;
 140         dbg_info *dbg   = env->dbg;
 141         ir_mode  *mode  = env->mode;
 142
 143         if (mode_is_float(mode)) {
 144                 sym.entity_p = get_entity_for_tv(env->cg, node);
 145
 146                 cnst = new_rd_SymConst(dbg, irg, block, sym, symconst_addr_ent);
 147                 env->irn = cnst;
 148                 cnst = gen_SymConst(env);
 149         }
 150         else {
 151                 cnst = new_rd_ia32_Const(dbg, irg, block, get_irn_mode(node));
 152                 set_ia32_Const_attr(cnst, node);
 153         }
 154         return cnst;
 155 }
 156
 157
 158
 159 /**
 160  * Transforms (all) Const's into ia32_Const and places them in the
 161  * block where they are used (or in the cfg-pred Block in case of Phi's)
 162  */
 163 void ia32_place_consts(ir_node *irn, void *env) {
 164         ia32_code_gen_t      *cg = env;
 165         ia32_transform_env_t  tenv;
 166         ir_mode              *mode;
 167         ir_node              *pred, *cnst;
 168         int                   i;
 169         opcode                opc;
 170
 171         if (is_Block(irn))
 172                 return;
 173
 174         mode = get_irn_mode(irn);
 175
 176         tenv.arch_env = cg->arch_env;
 177         tenv.block    = get_nodes_block(irn);
 178         tenv.cg       = cg;
 179         tenv.irg      = cg->irg;
 180         tenv.mod      = cg->mod;
 181
 182         /* Loop over all predecessors and check for Sym/Const nodes */
 183         for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
 184                 pred      = get_irn_n(irn, i);
 185                 cnst      = NULL;
 186                 opc       = get_irn_opcode(pred);
 187                 tenv.irn  = pred;
 188                 tenv.mode = get_irn_mode(pred);
 189                 tenv.dbg  = get_irn_dbg_info(pred);
 190
 191                 /* If it's a Phi, then we need to create the */
 192                 /* new Const in it's predecessor block       */
 193                 if (is_Phi(irn)) {
 194                         tenv.block = get_Block_cfgpred_block(get_nodes_block(irn), i);
 195                 }
 196
 197                 switch (opc) {
 198                         case iro_Const:
 199                                 cnst = gen_Const(&tenv);
 200                                 break;
 201                         case iro_SymConst:
 202                                 cnst = gen_SymConst(&tenv);
 203                                 break;
 204                         default:
 205                                 break;
 206                 }
 207
 208                 /* if we found a const, then set it */
 209                 if (cnst) {
 210                         set_irn_n(irn, i, cnst);
 211                 }
 212         }
 213 }
 214
 215
 216 /******************************************************************
 217  *              _     _                   __  __           _
 218  *     /\      | |   | |                 |  \/  |         | |
 219  *    /  \   __| | __| |_ __ ___  ___ ___| \  / | ___   __| | ___
 220  *   / /\ \ / _` |/ _` | '__/ _ \/ __/ __| |\/| |/ _ \ / _` |/ _ \
 221  *  / ____ \ (_| | (_| | | |  __/\__ \__ \ |  | | (_) | (_| |  __/
 222  * /_/    \_\__,_|\__,_|_|  \___||___/___/_|  |_|\___/ \__,_|\___|
 223  *
 224  ******************************************************************/
 225
 226 static int node_is_comm(const ir_node *irn) {
 227         if (is_ia32_Add(irn)  ||
 228                 is_ia32_fAdd(irn) ||
 229                 is_ia32_Mul(irn)  ||
 230                 is_ia32_Mulh(irn) ||
 231                 is_ia32_fMul(irn) ||
 232                 is_ia32_And(irn)  ||
 233                 is_ia32_fAnd(irn) ||
 234                 is_ia32_Or(irn)   ||
 235                 is_ia32_fOr(irn)  ||
 236                 is_ia32_Eor(irn)  ||
 237                 is_ia32_fEor(irn) ||
 238                 is_ia32_Min(irn)  ||
 239                 is_ia32_fMin(irn) ||
 240                 is_ia32_Max(irn)  ||
 241                 is_ia32_fMax(irn))
 242         {
 243                 return 1;
 244         }
 245
 246         return 0;
 247 }
 248
 249 static int ia32_get_irn_n_edges(const ir_node *irn) {
 250         const ir_edge_t *edge;
 251         int cnt = 0;
 252
 253         foreach_out_edge(irn, edge) {
 254                 cnt++;
 255         }
 256
 257         return cnt;
 258 }
 259
 260 /**
 261  * Returns the first mode_M Proj connected to irn.
 262  */
 263 static ir_node *get_mem_proj(const ir_node *irn) {
 264         const ir_edge_t *edge;
 265         ir_node         *src;
 266
 267         assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
 268
 269         foreach_out_edge(irn, edge) {
 270                 src = get_edge_src_irn(edge);
 271
 272                 assert(is_Proj(src) && "Proj expected");
 273
 274                 if (get_irn_mode(src) == mode_M)
 275                         return src;
 276         }
 277
 278         return NULL;
 279 }
 280
 281 /**
 282  * Returns the Proj with number 0 connected to irn.
 283  */
 284 static ir_node *get_res_proj(const ir_node *irn) {
 285         const ir_edge_t *edge;
 286         ir_node         *src;
 287
 288         assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
 289
 290         foreach_out_edge(irn, edge) {
 291                 src = get_edge_src_irn(edge);
 292
 293                 assert(is_Proj(src) && "Proj expected");
 294
 295                 if (get_Proj_proj(src) == 0)
 296                         return src;
 297         }
 298
 299         return NULL;
 300 }
 301
 302 /**
 303  * Determines if pred is a Proj and if is_op_func returns true for it's predecessor.
 304  *
 305  * @param pred       The node to be checked
 306  * @param is_op_func The check-function
 307  * @return 1 if conditions are fulfilled, 0 otherwise
 308  */
 309 static int pred_is_specific_node(const ir_node *pred, int (*is_op_func)(const ir_node *n)) {
 310         if (is_Proj(pred) && is_op_func(get_Proj_pred(pred))) {
 311                 return 1;
 312         }
 313
 314         return 0;
 315 }
 316
 317 /**
 318  * Determines if pred is a Proj and if is_op_func returns true for it's predecessor
 319  * and if the predecessor is in block bl.
 320  *
 321  * @param bl         The block
 322  * @param pred       The node to be checked
 323  * @param is_op_func The check-function
 324  * @return 1 if conditions are fulfilled, 0 otherwise
 325  */
 326 static int pred_is_specific_nodeblock(const ir_node *bl, const ir_node *pred,
 327         int (*is_op_func)(const ir_node *n))
 328 {
 329         if (is_Proj(pred)) {
 330                 pred = get_Proj_pred(pred);
 331                 if ((bl == get_nodes_block(pred)) && is_op_func(pred)) {
 332                         return 1;
 333                 }
 334         }
 335
 336         return 0;
 337 }
 338
 339 /**
 340  * Folds Add or Sub to LEA if possible
 341  */
 342 static ir_node *fold_addr(be_abi_irg_t *babi, ir_node *irn, firm_dbg_module_t *mod, ir_node *noreg) {
 343         ir_graph *irg       = get_irn_irg(irn);
 344         ir_mode  *mode      = get_irn_mode(irn);
 345         dbg_info *dbg       = get_irn_dbg_info(irn);
 346         ir_node  *block     = get_nodes_block(irn);
 347         ir_node  *res       = irn;
 348         char     *offs      = NULL;
 349         char     *offs_cnst = NULL;
 350         char     *offs_lea  = NULL;
 351         int       scale     = 0;
 352         int       isadd     = 0;
 353         int       dolea     = 0;
 354         ir_node  *left, *right, *temp;
 355         ir_node  *base, *index;
 356         ia32_am_flavour_t am_flav;
 357
 358         if (is_ia32_Add(irn))
 359                 isadd = 1;
 360
 361         left  = get_irn_n(irn, 2);
 362         right = get_irn_n(irn, 3);
 363
 364         base    = left;
 365         index   = noreg;
 366         offs    = NULL;
 367         scale   = 0;
 368         am_flav = 0;
 369
 370         /* "normalize" arguments in case of add with two operands */
 371         if  (isadd && ! be_is_NoReg(babi, right)) {
 372                 /* put LEA == ia32_am_O as right operand */
 373                 if (is_ia32_Lea(left) && get_ia32_am_flavour(left) == ia32_am_O) {
 374                         set_irn_n(irn, 2, right);
 375                         set_irn_n(irn, 3, left);
 376                         temp  = left;
 377                         left  = right;
 378                         right = temp;
 379                 }
 380
 381                 /* put LEA != ia32_am_O as left operand */
 382                 if (is_ia32_Lea(right) && get_ia32_am_flavour(right) != ia32_am_O) {
 383                         set_irn_n(irn, 2, right);
 384                         set_irn_n(irn, 3, left);
 385                         temp  = left;
 386                         left  = right;
 387                         right = temp;
 388                 }
 389
 390                 /* put SHL as left operand iff left is NOT a LEA */
 391                 if (! is_ia32_Lea(left) && pred_is_specific_node(right, is_ia32_Shl)) {
 392                         set_irn_n(irn, 2, right);
 393                         set_irn_n(irn, 3, left);
 394                         temp  = left;
 395                         left  = right;
 396                         right = temp;
 397                 }
 398         }
 399
 400         /* check if operand is either const */
 401         if (get_ia32_cnst(irn)) {
 402                 DBG((mod, LEVEL_1, "\tfound op with imm"));
 403
 404                 offs_cnst = get_ia32_cnst(irn);
 405                 dolea     = 1;
 406         }
 407
 408         /* determine the operand which needs to be checked */
 409         if (be_is_NoReg(babi, right)) {
 410                 temp = left;
 411         }
 412         else {
 413                 temp = right;
 414         }
 415
 416         /* check if right operand is AMConst (LEA with ia32_am_O) */
 417         if (is_ia32_Lea(temp) && get_ia32_am_flavour(temp) == ia32_am_O) {
 418                 DBG((mod, LEVEL_1, "\tgot op with LEA am_O"));
 419
 420                 offs_lea = get_ia32_am_offs(temp);
 421                 dolea    = 1;
 422         }
 423
 424         if (isadd) {
 425                 /* default for add -> make right operand to index */
 426                 index = right;
 427                 dolea = 1;
 428
 429                 DBG((mod, LEVEL_1, "\tgot LEA candidate with index %+F\n", index));
 430
 431                 /* determine the operand which needs to be checked */
 432                 temp = left;
 433                 if (is_ia32_Lea(left)) {
 434                         temp = right;
 435                 }
 436
 437                 /* check for SHL 1,2,3 */
 438                 if (pred_is_specific_node(temp, is_ia32_Shl)) {
 439                         temp = get_Proj_pred(temp);
 440
 441                         if (get_ia32_Immop_tarval(temp)) {
 442                                 scale = get_tarval_long(get_ia32_Immop_tarval(temp));
 443
 444                                 if (scale <= 3) {
 445                                         scale = 1 << scale;
 446                                         index = get_irn_n(temp, 2);
 447
 448                                         DBG((mod, LEVEL_1, "\tgot scaled index %+F\n", index));
 449                                 }
 450                         }
 451                 }
 452
 453                 /* fix base */
 454                 if (! be_is_NoReg(babi, index)) {
 455                         /* if we have index, but left == right -> no base */
 456                         if (left == right) {
 457                                 base = noreg;
 458                         }
 459                         else if (! is_ia32_Lea(left) && (index != right)) {
 460                                 /* index != right -> we found a good Shl           */
 461                                 /* left  != LEA   -> this Shl was the left operand */
 462                                 /* -> base is right operand                        */
 463                                 base = right;
 464                         }
 465                 }
 466         }
 467
 468         /* Try to assimilate a LEA as left operand */
 469         if (is_ia32_Lea(left) && (get_ia32_am_flavour(left) != ia32_am_O)) {
 470                 am_flav = get_ia32_am_flavour(left);
 471
 472                 /* If we have an Add with a real right operand (not NoReg) and  */
 473                 /* the LEA contains already an index calculation then we create */
 474                 /* a new LEA.                                                   */
 475                 if (isadd && !be_is_NoReg(babi, index) && (am_flav & ia32_am_I)) {
 476                         DBG((mod, LEVEL_1, "\tleave old LEA, creating new one\n"));
 477                 }
 478                 else {
 479                         DBG((mod, LEVEL_1, "\tgot LEA as left operand ... assimilating\n"));
 480                         offs  = get_ia32_am_offs(left);
 481                         base  = get_irn_n(left, 0);
 482                         index = get_irn_n(left, 1);
 483                         scale = get_ia32_am_scale(left);
 484                 }
 485         }
 486
 487         /* ok, we can create a new LEA */
 488         if (dolea) {
 489                 res = new_rd_ia32_Lea(dbg, irg, block, base, index, mode_Is);
 490
 491                 /* add the old offset of a previous LEA */
 492                 if (offs) {
 493                         add_ia32_am_offs(res, offs);
 494                 }
 495
 496                 /* add the new offset */
 497                 if (isadd) {
 498                         if (offs_cnst) {
 499                                 add_ia32_am_offs(res, offs_cnst);
 500                         }
 501                         if (offs_lea) {
 502                                 add_ia32_am_offs(res, offs_lea);
 503                         }
 504                 }
 505                 else {
 506                         /* either lea_O-cnst, -cnst or -lea_O  */
 507                         if (offs_cnst) {
 508                                 if (offs_lea) {
 509                                         add_ia32_am_offs(res, offs_lea);
 510                                 }
 511
 512                                 sub_ia32_am_offs(res, offs_cnst);
 513                         }
 514                         else {
 515                                 sub_ia32_am_offs(res, offs_lea);
 516                         }
 517                 }
 518
 519                 /* set scale */
 520                 set_ia32_am_scale(res, scale);
 521
 522                 am_flav = ia32_am_N;
 523                 /* determine new am flavour */
 524                 if (offs || offs_cnst || offs_lea) {
 525                         am_flav |= ia32_O;
 526                 }
 527                 if (! be_is_NoReg(babi, base)) {
 528                         am_flav |= ia32_B;
 529                 }
 530                 if (! be_is_NoReg(babi, index)) {
 531                         am_flav |= ia32_I;
 532                 }
 533                 if (scale > 0) {
 534                         am_flav |= ia32_S;
 535                 }
 536                 set_ia32_am_flavour(res, am_flav);
 537
 538                 set_ia32_op_type(res, ia32_AddrModeS);
 539
 540                 DBG((mod, LEVEL_1, "\tLEA [%+F + %+F * %d + %s]\n", base, index, scale, get_ia32_am_offs(res)));
 541
 542                 /* get the result Proj of the Add/Sub */
 543                 irn = get_res_proj(irn);
 544
 545                 assert(irn && "Couldn't find result proj");
 546
 547                 /* exchange the old op with the new LEA */
 548                 exchange(irn, res);
 549         }
 550
 551         return res;
 552 }
 553
 554 /**
 555  * Optimizes a pattern around irn to address mode if possible.
 556  */
 557 void ia32_optimize_am(ir_node *irn, void *env) {
 558         ia32_code_gen_t   *cg   = env;
 559         ir_graph          *irg  = cg->irg;
 560         firm_dbg_module_t *mod  = cg->mod;
 561         ir_node           *res  = irn;
 562         be_abi_irg_t      *babi = cg->birg->abi;
 563         dbg_info          *dbg;
 564         ir_mode           *mode;
 565         ir_node           *block, *noreg_gp, *noreg_fp;
 566         ir_node           *left, *right, *temp;
 567         ir_node           *store, *load, *mem_proj;
 568         ir_node           *succ, *addr_b, *addr_i;
 569         int                check_am_src = 0;
 570
 571         if (! is_ia32_irn(irn))
 572                 return;
 573
 574         dbg      = get_irn_dbg_info(irn);
 575         mode     = get_irn_mode(irn);
 576         block    = get_nodes_block(irn);
 577         noreg_gp = ia32_new_NoReg_gp(cg);
 578         noreg_fp = ia32_new_NoReg_fp(cg);
 579
 580         DBG((mod, LEVEL_1, "checking for AM\n"));
 581
 582         /* 1st part: check for address calculations and transform the into Lea */
 583
 584         /* Following cases can occur:                                  */
 585         /* - Sub (l, imm) -> LEA [base - offset]                       */
 586         /* - Sub (l, r == LEA with ia32_am_O)   -> LEA [base - offset] */
 587         /* - Add (l, imm) -> LEA [base + offset]                       */
 588         /* - Add (l, r == LEA with ia32_am_O)  -> LEA [base + offset]  */
 589         /* - Add (l == LEA with ia32_am_O, r)  -> LEA [base + offset]  */
 590         /* - Add (l, r) -> LEA [base + index * scale]                  */
 591         /*              with scale > 1 iff l/r == shl (1,2,3)          */
 592
 593         if (is_ia32_Sub(irn) || is_ia32_Add(irn)) {
 594                 left  = get_irn_n(irn, 2);
 595                 right = get_irn_n(irn, 3);
 596
 597             /* Do not try to create a LEA if one of the operands is a Load. */
 598                 if (! pred_is_specific_nodeblock(block, left,  is_ia32_Load)  &&
 599                         ! pred_is_specific_nodeblock(block, right, is_ia32_Load))
 600                 {
 601                         res = fold_addr(babi, irn, mod, noreg_gp);
 602                 }
 603         }
 604
 605         /* 2nd part: fold following patterns:                                               */
 606         /* - Load  -> LEA into Load  } TODO: If the LEA is used by more than one Load/Store */
 607         /* - Store -> LEA into Store }       it might be better to keep the LEA             */
 608         /* - op -> Load into AMop with am_Source                                            */
 609         /*   conditions:                                                                    */
 610         /*     - op is am_Source capable AND                                                */
 611         /*     - the Load is only used by this op AND                                       */
 612         /*     - the Load is in the same block                                              */
 613         /* - Store -> op -> Load  into AMop with am_Dest                                    */
 614         /*   conditions:                                                                    */
 615         /*     - op is am_Dest capable AND                                                  */
 616         /*     - the Store uses the same address as the Load AND                            */
 617         /*     - the Load is only used by this op AND                                       */
 618         /*     - the Load and Store are in the same block AND                               */
 619         /*     - nobody else uses the result of the op                                      */
 620
 621         if ((res == irn) && (get_ia32_am_support(irn) != ia32_am_None) && !is_ia32_Lea(irn)) {
 622                 /* 1st: check for Load/Store -> LEA   */
 623                 if (is_ia32_Ld(irn) || is_ia32_St(irn)) {
 624                         left = get_irn_n(irn, 0);
 625
 626                         if (is_ia32_Lea(left)) {
 627                                 /* get the AM attributes from the LEA */
 628                                 add_ia32_am_offs(irn, get_ia32_am_offs(left));
 629                                 set_ia32_am_scale(irn, get_ia32_am_scale(left));
 630                                 set_ia32_am_flavour(irn, get_ia32_am_flavour(left));
 631                                 set_ia32_op_type(irn, get_ia32_op_type(left));
 632
 633                                 /* set base and index */
 634                                 set_irn_n(irn, 0, get_irn_n(left, 0));
 635                                 set_irn_n(irn, 1, get_irn_n(left, 1));
 636                         }
 637                 }
 638                 /* check if at least one operand is a Load */
 639                 else if (pred_is_specific_nodeblock(block, get_irn_n(irn, 2), is_ia32_Ld) ||
 640                                  pred_is_specific_nodeblock(block, get_irn_n(irn, 3), is_ia32_Ld))
 641                 {
 642                         left  = get_irn_n(irn, 2);
 643                         if (get_irn_arity(irn) == 4) {
 644                                 /* it's an "unary" operation */
 645                                 right = left;
 646                         }
 647                         else {
 648                                 right = get_irn_n(irn, 3);
 649                         }
 650
 651                         /* normalize commutative ops */
 652                         if (node_is_comm(irn)) {
 653                                 /* Assure that right operand is always a Load if there is one    */
 654                                 /* because non-commutative ops can only use Dest AM if the right */
 655                                 /* operand is a load, so we only need to check right operand.    */
 656                                 if (pred_is_specific_nodeblock(block, left, is_ia32_Ld))
 657                                 {
 658                                         set_irn_n(irn, 2, right);
 659                                         set_irn_n(irn, 3, left);
 660
 661                                         temp  = left;
 662                                         left  = right;
 663                                         right = temp;
 664                                 }
 665                         }
 666
 667                         /* check for Store -> op -> Load */
 668
 669                         /* Store -> op -> Load optimization is only possible if supported by op */
 670                         /* and if right operand is a Load                                       */
 671                         if ((get_ia32_am_support(irn) & ia32_am_Dest) &&
 672                                  pred_is_specific_nodeblock(block, right, is_ia32_Ld))
 673                         {
 674
 675                                 /* An address mode capable op always has a result Proj.                  */
 676                                 /* If this Proj is used by more than one other node, we don't need to    */
 677                                 /* check further, otherwise we check for Store and remember the address, */
 678                                 /* the Store points to. */
 679
 680                                 succ = get_res_proj(irn);
 681                                 assert(succ && "Couldn't find result proj");
 682
 683                                 addr_b = NULL;
 684                                 addr_i = NULL;
 685                                 store  = NULL;
 686
 687                                 /* now check for users and Store */
 688                                 if (ia32_get_irn_n_edges(succ) == 1) {
 689                                         succ = get_edge_src_irn(get_irn_out_edge_first(succ));
 690
 691                                         if (is_ia32_fStore(succ) || is_ia32_Store(succ)) {
 692                                                 store  = succ;
 693                                                 addr_b = get_irn_n(store, 0);
 694
 695                                                 /* Could be that the Store is connected to the address    */
 696                                                 /* calculating LEA while the Load is already transformed. */
 697                                                 if (is_ia32_Lea(addr_b)) {
 698                                                         succ   = addr_b;
 699                                                         addr_b = get_irn_n(succ, 0);
 700                                                         addr_i = get_irn_n(succ, 1);
 701                                                 }
 702                                                 else {
 703                                                         addr_i = noreg_gp;
 704                                                 }
 705                                         }
 706                                 }
 707
 708                                 if (store) {
 709                                         /* we found a Store as single user: Now check for Load */
 710
 711                                         /* Extra check for commutative ops with two Loads */
 712                                         /* -> put the interesting Load right              */
 713                                         if (node_is_comm(irn) &&
 714                                                 pred_is_specific_nodeblock(block, left, is_ia32_Ld))
 715                                         {
 716                                                 if ((addr_b == get_irn_n(get_Proj_pred(left), 0)) &&
 717                                                         (addr_i == get_irn_n(get_Proj_pred(left), 1)))
 718                                                 {
 719                                                         /* We exchange left and right, so it's easier to kill     */
 720                                                         /* the correct Load later and to handle unary operations. */
 721                                                         set_irn_n(irn, 2, right);
 722                                                         set_irn_n(irn, 3, left);
 723
 724                                                         temp  = left;
 725                                                         left  = right;
 726                                                         right = temp;
 727                                                 }
 728                                         }
 729
 730                                         /* skip the Proj for easier access */
 731                                         load = get_Proj_pred(right);
 732
 733                                         /* Compare Load and Store address */
 734                                         if ((addr_b == get_irn_n(load, 0)) && (addr_i == get_irn_n(load, 1)))
 735                                         {
 736                                                 /* Right Load is from same address, so we can */
 737                                                 /* disconnect the Load and Store here        */
 738
 739                                                 /* set new base, index and attributes */
 740                                                 set_irn_n(irn, 0, addr_b);
 741                                                 set_irn_n(irn, 1, addr_i);
 742                                                 add_ia32_am_offs(irn, get_ia32_am_offs(load));
 743                                                 set_ia32_am_scale(irn, get_ia32_am_scale(load));
 744                                                 set_ia32_am_flavour(irn, get_ia32_am_flavour(load));
 745                                                 set_ia32_op_type(irn, ia32_AddrModeD);
 746
 747                                                 /* connect to Load memory and disconnect Load */
 748                                                 if (get_irn_arity(irn) == 5) {
 749                                                         /* binary AMop */
 750                                                         set_irn_n(irn, 4, get_irn_n(load, 2));
 751                                                         set_irn_n(irn, 3, noreg_gp);
 752                                                 }
 753                                                 else {
 754                                                         /* unary AMop */
 755                                                         set_irn_n(irn, 3, get_irn_n(load, 2));
 756                                                         set_irn_n(irn, 2, noreg_gp);
 757                                                 }
 758
 759                                                 /* connect the memory Proj of the Store to the op */
 760                                                 mem_proj = get_mem_proj(store);
 761                                                 set_Proj_pred(mem_proj, irn);
 762                                                 set_Proj_proj(mem_proj, 1);
 763                                         }
 764                                 } /* if (store) */
 765                                 else if (get_ia32_am_support(irn) & ia32_am_Source) {
 766                                         /* There was no store, check if we still can optimize for source address mode */
 767                                         check_am_src = 1;
 768                                 }
 769                         } /* if (support AM Dest) */
 770                         else if (get_ia32_am_support(irn) & ia32_am_Source) {
 771                                 /* op doesn't support am AM Dest -> check for AM Source */
 772                                 check_am_src = 1;
 773                         }
 774
 775                         /* normalize commutative ops */
 776                         if (node_is_comm(irn)) {
 777                                 /* Assure that left operand is always a Load if there is one */
 778                                 /* because non-commutative ops can only use Source AM if the */
 779                                 /* left operand is a Load, so we only need to check the left */
 780                                 /* operand afterwards.                                       */
 781                                 if (pred_is_specific_nodeblock(block, right, is_ia32_Ld))       {
 782                                         set_irn_n(irn, 2, right);
 783                                         set_irn_n(irn, 3, left);
 784
 785                                         temp  = left;
 786                                         left  = right;
 787                                         right = temp;
 788                                 }
 789                         }
 790
 791                         /* optimize op -> Load iff Load is only used by this op   */
 792                         /* and left operand is a Load which only used by this irn */
 793                         if (check_am_src                                        &&
 794                                 pred_is_specific_nodeblock(block, left, is_ia32_Ld) &&
 795                                 (ia32_get_irn_n_edges(left) == 1))
 796                         {
 797                                 left = get_Proj_pred(left);
 798
 799                                 addr_b = get_irn_n(left, 0);
 800                                 addr_i = get_irn_n(left, 1);
 801
 802                                 /* set new base, index and attributes */
 803                                 set_irn_n(irn, 0, addr_b);
 804                                 set_irn_n(irn, 1, addr_i);
 805                                 add_ia32_am_offs(irn, get_ia32_am_offs(left));
 806                                 set_ia32_am_scale(irn, get_ia32_am_scale(left));
 807                                 set_ia32_am_flavour(irn, get_ia32_am_flavour(left));
 808                                 set_ia32_op_type(irn, ia32_AddrModeS);
 809
 810                                 /* connect to Load memory */
 811                                 if (get_irn_arity(irn) == 5) {
 812                                         /* binary AMop */
 813                                         set_irn_n(irn, 4, get_irn_n(left, 2));
 814                                 }
 815                                 else {
 816                                         /* unary AMop */
 817                                         set_irn_n(irn, 3, get_irn_n(left, 2));
 818                                 }
 819
 820                                 /* disconnect from Load */
 821                                 set_irn_n(irn, 2, noreg_gp);
 822
 823                                 /* If Load has a memory Proj, connect it to the op */
 824                                 mem_proj = get_mem_proj(left);
 825                                 if (mem_proj) {
 826                                         set_Proj_pred(mem_proj, irn);
 827                                         set_Proj_proj(mem_proj, 1);
 828                                 }
 829                         }
 830                 }
 831         }
 832 }