8 #include "firm_types.h"
16 #include "ia32_new_nodes.h"
17 #include "bearch_ia32_t.h"
18 #include "gen_ia32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
21 #define is_NoMem(irn) (get_irn_op(irn) == op_NoMem)
23 static int be_is_NoReg(be_abi_irg_t *babi, const ir_node *irn) {
24 if (be_abi_get_callee_save_irn(babi, &ia32_gp_regs[REG_XXX]) == irn ||
25 be_abi_get_callee_save_irn(babi, &ia32_fp_regs[REG_XXXX]) == irn)
34 * creates a unique ident by adding a number to a tag
36 * @param tag the tag string, must contain a %d if a number
39 static ident *unique_id(const char *tag)
41 static unsigned id = 0;
44 snprintf(str, sizeof(str), tag, ++id);
45 return new_id_from_str(str);
51 * Transforms a SymConst.
53 * @param mod the debug module
54 * @param block the block the new node should belong to
55 * @param node the ir SymConst node
56 * @param mode mode of the SymConst
57 * @return the created ia32 Const node
59 static ir_node *gen_SymConst(ia32_transform_env_t *env) {
61 dbg_info *dbg = env->dbg;
62 ir_mode *mode = env->mode;
63 ir_graph *irg = env->irg;
64 ir_node *block = env->block;
66 cnst = new_rd_ia32_Const(dbg, irg, block, mode);
67 set_ia32_Const_attr(cnst, env->irn);
72 * Get a primitive type for a mode.
74 static ir_type *get_prim_type(pmap *types, ir_mode *mode)
76 pmap_entry *e = pmap_find(types, mode);
81 snprintf(buf, sizeof(buf), "prim_type_%s", get_mode_name(mode));
82 res = new_type_primitive(new_id_from_str(buf), mode);
83 pmap_insert(types, mode, res);
91 * Get an entity that is initialized with a tarval
93 static entity *get_entity_for_tv(ia32_code_gen_t *cg, ir_node *cnst)
95 tarval *tv = get_Const_tarval(cnst);
96 pmap_entry *e = pmap_find(cg->tv_ent, tv);
101 ir_mode *mode = get_irn_mode(cnst);
102 ir_type *tp = get_Const_type(cnst);
103 if (tp == firm_unknown_type)
104 tp = get_prim_type(cg->types, mode);
106 res = new_entity(get_glob_type(), unique_id("ia32FloatCnst_%u"), tp);
108 set_entity_ld_ident(res, get_entity_ident(res));
109 set_entity_visibility(res, visibility_local);
110 set_entity_variability(res, variability_constant);
111 set_entity_allocation(res, allocation_static);
113 /* we create a new entity here: It's initialization must resist on the
115 rem = current_ir_graph;
116 current_ir_graph = get_const_code_irg();
117 set_atomic_ent_value(res, new_Const_type(tv, tp));
118 current_ir_graph = rem;
126 * Transforms a Const.
128 * @param mod the debug module
129 * @param block the block the new node should belong to
130 * @param node the ir Const node
131 * @param mode mode of the Const
132 * @return the created ia32 Const node
134 static ir_node *gen_Const(ia32_transform_env_t *env) {
137 ir_graph *irg = env->irg;
138 ir_node *block = env->block;
139 ir_node *node = env->irn;
140 dbg_info *dbg = env->dbg;
141 ir_mode *mode = env->mode;
143 if (mode_is_float(mode)) {
144 sym.entity_p = get_entity_for_tv(env->cg, node);
146 cnst = new_rd_SymConst(dbg, irg, block, sym, symconst_addr_ent);
148 cnst = gen_SymConst(env);
151 cnst = new_rd_ia32_Const(dbg, irg, block, get_irn_mode(node));
152 set_ia32_Const_attr(cnst, node);
160 * Transforms (all) Const's into ia32_Const and places them in the
161 * block where they are used (or in the cfg-pred Block in case of Phi's)
163 void ia32_place_consts(ir_node *irn, void *env) {
164 ia32_code_gen_t *cg = env;
165 ia32_transform_env_t tenv;
167 ir_node *pred, *cnst;
174 mode = get_irn_mode(irn);
176 tenv.block = get_nodes_block(irn);
181 /* Loop over all predecessors and check for Sym/Const nodes */
182 for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
183 pred = get_irn_n(irn, i);
185 opc = get_irn_opcode(pred);
187 tenv.mode = get_irn_mode(pred);
188 tenv.dbg = get_irn_dbg_info(pred);
190 /* If it's a Phi, then we need to create the */
191 /* new Const in it's predecessor block */
193 tenv.block = get_Block_cfgpred_block(get_nodes_block(irn), i);
196 /* put the const into the block where the original const was */
197 if (! cg->opt.placecnst) {
198 tenv.block = get_nodes_block(pred);
203 cnst = gen_Const(&tenv);
206 cnst = gen_SymConst(&tenv);
212 /* if we found a const, then set it */
214 set_irn_n(irn, i, cnst);
220 /******************************************************************
222 * /\ | | | | | \/ | | |
223 * / \ __| | __| |_ __ ___ ___ ___| \ / | ___ __| | ___
224 * / /\ \ / _` |/ _` | '__/ _ \/ __/ __| |\/| |/ _ \ / _` |/ _ \
225 * / ____ \ (_| | (_| | | | __/\__ \__ \ | | | (_) | (_| | __/
226 * /_/ \_\__,_|\__,_|_| \___||___/___/_| |_|\___/ \__,_|\___|
228 ******************************************************************/
230 static int node_is_comm(const ir_node *irn) {
231 return is_ia32_irn(irn) ? is_ia32_commutative(irn) : 0;
234 static int ia32_get_irn_n_edges(const ir_node *irn) {
235 const ir_edge_t *edge;
238 foreach_out_edge(irn, edge) {
246 * Returns the first mode_M Proj connected to irn.
248 static ir_node *get_mem_proj(const ir_node *irn) {
249 const ir_edge_t *edge;
252 assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
254 foreach_out_edge(irn, edge) {
255 src = get_edge_src_irn(edge);
257 assert(is_Proj(src) && "Proj expected");
259 if (get_irn_mode(src) == mode_M)
267 * Returns the Proj with number 0 connected to irn.
269 static ir_node *get_res_proj(const ir_node *irn) {
270 const ir_edge_t *edge;
273 assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
275 foreach_out_edge(irn, edge) {
276 src = get_edge_src_irn(edge);
278 assert(is_Proj(src) && "Proj expected");
280 if (get_Proj_proj(src) == 0)
288 * Determines if pred is a Proj and if is_op_func returns true for it's predecessor.
290 * @param pred The node to be checked
291 * @param is_op_func The check-function
292 * @return 1 if conditions are fulfilled, 0 otherwise
294 static int pred_is_specific_node(const ir_node *pred, int (*is_op_func)(const ir_node *n)) {
295 if (is_Proj(pred) && is_op_func(get_Proj_pred(pred))) {
303 * Determines if pred is a Proj and if is_op_func returns true for it's predecessor
304 * and if the predecessor is in block bl.
306 * @param bl The block
307 * @param pred The node to be checked
308 * @param is_op_func The check-function
309 * @return 1 if conditions are fulfilled, 0 otherwise
311 static int pred_is_specific_nodeblock(const ir_node *bl, const ir_node *pred,
312 int (*is_op_func)(const ir_node *n))
315 pred = get_Proj_pred(pred);
316 if ((bl == get_nodes_block(pred)) && is_op_func(pred)) {
325 * Checks if irn is a candidate for address calculation or address mode.
327 * address calculation (AC):
328 * - none of the operand must be a Load within the same block OR
329 * - all Loads must have more than one user OR
330 * - the irn has a frame entity (it's a former FrameAddr)
333 * - at least one operand has to be a Load within the same block AND
334 * - the load must not have other users than the irn AND
335 * - the irn must not have a frame entity set
337 * @param block The block the Loads must/not be in
338 * @param irn The irn to check
339 * @param check_addr 1 if to check for address calculation, 0 otherwise
340 * return 1 if irn is a candidate for AC or AM, 0 otherwise
342 static int is_candidate(const ir_node *block, const ir_node *irn, int check_addr) {
344 int n, is_cand = check_addr;
346 if (pred_is_specific_nodeblock(block, get_irn_n(irn, 2), is_ia32_Load)) {
347 load_proj = get_irn_n(irn, 2);
348 n = ia32_get_irn_n_edges(load_proj);
349 is_cand = check_addr ? (n == 1 ? 0 : is_cand) : (n == 1 ? 1 : is_cand);
352 if (pred_is_specific_nodeblock(block, get_irn_n(irn, 3), is_ia32_Load)) {
353 load_proj = get_irn_n(irn, 3);
354 n = ia32_get_irn_n_edges(load_proj);
355 is_cand = check_addr ? (n == 1 ? 0 : is_cand) : (n == 1 ? 1 : is_cand);
358 is_cand = get_ia32_frame_ent(irn) ? (check_addr ? 1 : 0) : (check_addr ? 0 : 1);
364 * Compares the base and index addr and the load/store entities
365 * and returns 1 if they are equal.
367 static int load_store_addr_is_equal(const ir_node *load, const ir_node *store,
368 const ir_node *addr_b, const ir_node *addr_i)
370 int is_equal = (addr_b == get_irn_n(load, 0)) && (addr_i == get_irn_n(load, 1));
371 entity *lent = get_ia32_frame_ent(load);
372 entity *sent = get_ia32_frame_ent(store);
374 /* are both entities set and equal? */
375 is_equal = (lent && sent && (lent == sent)) ? 1 : is_equal;
381 * Folds Add or Sub to LEA if possible
383 static ir_node *fold_addr(be_abi_irg_t *babi, ir_node *irn, firm_dbg_module_t *mod, ir_node *noreg) {
384 ir_graph *irg = get_irn_irg(irn);
385 ir_mode *mode = get_irn_mode(irn);
386 dbg_info *dbg = get_irn_dbg_info(irn);
387 ir_node *block = get_nodes_block(irn);
390 char *offs_cnst = NULL;
391 char *offs_lea = NULL;
395 ir_node *left, *right, *temp;
396 ir_node *base, *index;
397 ia32_am_flavour_t am_flav;
399 if (is_ia32_Add(irn))
402 left = get_irn_n(irn, 2);
403 right = get_irn_n(irn, 3);
411 /* "normalize" arguments in case of add with two operands */
412 if (isadd && ! be_is_NoReg(babi, right)) {
413 /* put LEA == ia32_am_O as right operand */
414 if (is_ia32_Lea(left) && get_ia32_am_flavour(left) == ia32_am_O) {
415 set_irn_n(irn, 2, right);
416 set_irn_n(irn, 3, left);
422 /* put LEA != ia32_am_O as left operand */
423 if (is_ia32_Lea(right) && get_ia32_am_flavour(right) != ia32_am_O) {
424 set_irn_n(irn, 2, right);
425 set_irn_n(irn, 3, left);
431 /* put SHL as left operand iff left is NOT a LEA */
432 if (! is_ia32_Lea(left) && pred_is_specific_node(right, is_ia32_Shl)) {
433 set_irn_n(irn, 2, right);
434 set_irn_n(irn, 3, left);
441 /* check if operand is either const */
442 if (get_ia32_cnst(irn)) {
443 DBG((mod, LEVEL_1, "\tfound op with imm"));
445 offs_cnst = get_ia32_cnst(irn);
449 /* determine the operand which needs to be checked */
450 if (be_is_NoReg(babi, right)) {
457 /* check if right operand is AMConst (LEA with ia32_am_O) */
458 if (is_ia32_Lea(temp) && get_ia32_am_flavour(temp) == ia32_am_O) {
459 DBG((mod, LEVEL_1, "\tgot op with LEA am_O"));
461 offs_lea = get_ia32_am_offs(temp);
466 /* default for add -> make right operand to index */
470 DBG((mod, LEVEL_1, "\tgot LEA candidate with index %+F\n", index));
472 /* determine the operand which needs to be checked */
474 if (is_ia32_Lea(left)) {
478 /* check for SHL 1,2,3 */
479 if (pred_is_specific_node(temp, is_ia32_Shl)) {
480 temp = get_Proj_pred(temp);
482 if (get_ia32_Immop_tarval(temp)) {
483 scale = get_tarval_long(get_ia32_Immop_tarval(temp));
486 index = get_irn_n(temp, 2);
488 DBG((mod, LEVEL_1, "\tgot scaled index %+F\n", index));
494 if (! be_is_NoReg(babi, index)) {
495 /* if we have index, but left == right -> no base */
499 else if (! is_ia32_Lea(left) && (index != right)) {
500 /* index != right -> we found a good Shl */
501 /* left != LEA -> this Shl was the left operand */
502 /* -> base is right operand */
508 /* Try to assimilate a LEA as left operand */
509 if (is_ia32_Lea(left) && (get_ia32_am_flavour(left) != ia32_am_O)) {
510 am_flav = get_ia32_am_flavour(left);
512 /* If we have an Add with a real right operand (not NoReg) and */
513 /* the LEA contains already an index calculation then we create */
515 /* If the LEA contains already a frame_entity then we also */
516 /* create a new one otherwise we would loose it. */
517 if (isadd && ((!be_is_NoReg(babi, index) && (am_flav & ia32_am_I)) || get_ia32_frame_ent(left))) {
518 DBG((mod, LEVEL_1, "\tleave old LEA, creating new one\n"));
521 DBG((mod, LEVEL_1, "\tgot LEA as left operand ... assimilating\n"));
522 offs = get_ia32_am_offs(left);
523 base = get_irn_n(left, 0);
524 index = get_irn_n(left, 1);
525 scale = get_ia32_am_scale(left);
529 /* ok, we can create a new LEA */
531 res = new_rd_ia32_Lea(dbg, irg, block, base, index, mode_Is);
533 /* add the old offset of a previous LEA */
535 add_ia32_am_offs(res, offs);
538 /* add the new offset */
541 add_ia32_am_offs(res, offs_cnst);
544 add_ia32_am_offs(res, offs_lea);
548 /* either lea_O-cnst, -cnst or -lea_O */
551 add_ia32_am_offs(res, offs_lea);
554 sub_ia32_am_offs(res, offs_cnst);
557 sub_ia32_am_offs(res, offs_lea);
561 /* copy the frame entity (could be set in case of Add */
562 /* which was a FrameAddr) */
563 set_ia32_frame_ent(res, get_ia32_frame_ent(irn));
565 if (is_ia32_use_frame(irn))
566 set_ia32_use_frame(res);
569 set_ia32_am_scale(res, scale);
572 /* determine new am flavour */
573 if (offs || offs_cnst || offs_lea) {
576 if (! be_is_NoReg(babi, base)) {
579 if (! be_is_NoReg(babi, index)) {
585 set_ia32_am_flavour(res, am_flav);
587 set_ia32_op_type(res, ia32_AddrModeS);
589 DBG((mod, LEVEL_1, "\tLEA [%+F + %+F * %d + %s]\n", base, index, scale, get_ia32_am_offs(res)));
591 /* get the result Proj of the Add/Sub */
592 irn = get_res_proj(irn);
594 assert(irn && "Couldn't find result proj");
596 /* exchange the old op with the new LEA */
604 * Optimizes a pattern around irn to address mode if possible.
606 void ia32_optimize_am(ir_node *irn, void *env) {
607 ia32_code_gen_t *cg = env;
608 ir_graph *irg = cg->irg;
609 firm_dbg_module_t *mod = cg->mod;
611 be_abi_irg_t *babi = cg->birg->abi;
614 ir_node *block, *noreg_gp, *noreg_fp;
615 ir_node *left, *right, *temp;
616 ir_node *store, *load, *mem_proj;
617 ir_node *succ, *addr_b, *addr_i;
618 int check_am_src = 0;
620 if (! is_ia32_irn(irn))
623 dbg = get_irn_dbg_info(irn);
624 mode = get_irn_mode(irn);
625 block = get_nodes_block(irn);
626 noreg_gp = ia32_new_NoReg_gp(cg);
627 noreg_fp = ia32_new_NoReg_fp(cg);
629 DBG((mod, LEVEL_1, "checking for AM\n"));
631 /* 1st part: check for address calculations and transform the into Lea */
633 /* Following cases can occur: */
634 /* - Sub (l, imm) -> LEA [base - offset] */
635 /* - Sub (l, r == LEA with ia32_am_O) -> LEA [base - offset] */
636 /* - Add (l, imm) -> LEA [base + offset] */
637 /* - Add (l, r == LEA with ia32_am_O) -> LEA [base + offset] */
638 /* - Add (l == LEA with ia32_am_O, r) -> LEA [base + offset] */
639 /* - Add (l, r) -> LEA [base + index * scale] */
640 /* with scale > 1 iff l/r == shl (1,2,3) */
642 if (is_ia32_Sub(irn) || is_ia32_Add(irn)) {
643 left = get_irn_n(irn, 2);
644 right = get_irn_n(irn, 3);
646 /* Do not try to create a LEA if one of the operands is a Load. */
647 /* check is irn is a candidate for address calculation */
648 if (is_candidate(block, irn, 1)) {
649 res = fold_addr(babi, irn, mod, noreg_gp);
653 /* 2nd part: fold following patterns: */
654 /* - Load -> LEA into Load } TODO: If the LEA is used by more than one Load/Store */
655 /* - Store -> LEA into Store } it might be better to keep the LEA */
656 /* - op -> Load into AMop with am_Source */
658 /* - op is am_Source capable AND */
659 /* - the Load is only used by this op AND */
660 /* - the Load is in the same block */
661 /* - Store -> op -> Load into AMop with am_Dest */
663 /* - op is am_Dest capable AND */
664 /* - the Store uses the same address as the Load AND */
665 /* - the Load is only used by this op AND */
666 /* - the Load and Store are in the same block AND */
667 /* - nobody else uses the result of the op */
669 if ((res == irn) && (get_ia32_am_support(irn) != ia32_am_None) && !is_ia32_Lea(irn)) {
670 /* 1st: check for Load/Store -> LEA */
671 if (is_ia32_Ld(irn) || is_ia32_St(irn)) {
672 left = get_irn_n(irn, 0);
674 if (is_ia32_Lea(left)) {
675 /* get the AM attributes from the LEA */
676 add_ia32_am_offs(irn, get_ia32_am_offs(left));
677 set_ia32_am_scale(irn, get_ia32_am_scale(left));
678 set_ia32_am_flavour(irn, get_ia32_am_flavour(left));
680 set_ia32_op_type(irn, is_ia32_St(irn) ? ia32_AddrModeD : ia32_AddrModeS);
682 /* set base and index */
683 set_irn_n(irn, 0, get_irn_n(left, 0));
684 set_irn_n(irn, 1, get_irn_n(left, 1));
687 /* check if the node is an address mode candidate */
688 else if (is_candidate(block, irn, 0)) {
689 left = get_irn_n(irn, 2);
690 if (get_irn_arity(irn) == 4) {
691 /* it's an "unary" operation */
695 right = get_irn_n(irn, 3);
698 /* normalize commutative ops */
699 if (node_is_comm(irn)) {
700 /* Assure that right operand is always a Load if there is one */
701 /* because non-commutative ops can only use Dest AM if the right */
702 /* operand is a load, so we only need to check right operand. */
703 if (pred_is_specific_nodeblock(block, left, is_ia32_Ld))
705 set_irn_n(irn, 2, right);
706 set_irn_n(irn, 3, left);
714 /* check for Store -> op -> Load */
716 /* Store -> op -> Load optimization is only possible if supported by op */
717 /* and if right operand is a Load */
718 if ((get_ia32_am_support(irn) & ia32_am_Dest) &&
719 pred_is_specific_nodeblock(block, right, is_ia32_Ld))
722 /* An address mode capable op always has a result Proj. */
723 /* If this Proj is used by more than one other node, we don't need to */
724 /* check further, otherwise we check for Store and remember the address, */
725 /* the Store points to. */
727 succ = get_res_proj(irn);
728 assert(succ && "Couldn't find result proj");
734 /* now check for users and Store */
735 if (ia32_get_irn_n_edges(succ) == 1) {
736 succ = get_edge_src_irn(get_irn_out_edge_first(succ));
738 if (is_ia32_fStore(succ) || is_ia32_Store(succ)) {
740 addr_b = get_irn_n(store, 0);
742 /* Could be that the Store is connected to the address */
743 /* calculating LEA while the Load is already transformed. */
744 if (is_ia32_Lea(addr_b)) {
746 addr_b = get_irn_n(succ, 0);
747 addr_i = get_irn_n(succ, 1);
756 /* we found a Store as single user: Now check for Load */
758 /* Extra check for commutative ops with two Loads */
759 /* -> put the interesting Load right */
760 if (node_is_comm(irn) &&
761 pred_is_specific_nodeblock(block, left, is_ia32_Ld))
763 if ((addr_b == get_irn_n(get_Proj_pred(left), 0)) &&
764 (addr_i == get_irn_n(get_Proj_pred(left), 1)))
766 /* We exchange left and right, so it's easier to kill */
767 /* the correct Load later and to handle unary operations. */
768 set_irn_n(irn, 2, right);
769 set_irn_n(irn, 3, left);
777 /* skip the Proj for easier access */
778 load = get_Proj_pred(right);
780 /* Compare Load and Store address */
781 if (load_store_addr_is_equal(load, store, addr_b, addr_i)) {
782 /* Right Load is from same address, so we can */
783 /* disconnect the Load and Store here */
785 /* set new base, index and attributes */
786 set_irn_n(irn, 0, addr_b);
787 set_irn_n(irn, 1, addr_i);
788 add_ia32_am_offs(irn, get_ia32_am_offs(load));
789 set_ia32_am_scale(irn, get_ia32_am_scale(load));
790 set_ia32_am_flavour(irn, get_ia32_am_flavour(load));
791 set_ia32_op_type(irn, ia32_AddrModeD);
792 set_ia32_frame_ent(irn, get_ia32_frame_ent(load));
793 set_ia32_ls_mode(irn, get_ia32_ls_mode(load));
795 if (is_ia32_use_frame(load))
796 set_ia32_use_frame(irn);
798 /* connect to Load memory and disconnect Load */
799 if (get_irn_arity(irn) == 5) {
801 set_irn_n(irn, 4, get_irn_n(load, 2));
802 set_irn_n(irn, 3, noreg_gp);
806 set_irn_n(irn, 3, get_irn_n(load, 2));
807 set_irn_n(irn, 2, noreg_gp);
810 /* connect the memory Proj of the Store to the op */
811 mem_proj = get_mem_proj(store);
812 set_Proj_pred(mem_proj, irn);
813 set_Proj_proj(mem_proj, 1);
816 else if (get_ia32_am_support(irn) & ia32_am_Source) {
817 /* There was no store, check if we still can optimize for source address mode */
820 } /* if (support AM Dest) */
821 else if (get_ia32_am_support(irn) & ia32_am_Source) {
822 /* op doesn't support am AM Dest -> check for AM Source */
826 /* normalize commutative ops */
827 if (node_is_comm(irn)) {
828 /* Assure that left operand is always a Load if there is one */
829 /* because non-commutative ops can only use Source AM if the */
830 /* left operand is a Load, so we only need to check the left */
831 /* operand afterwards. */
832 if (pred_is_specific_nodeblock(block, right, is_ia32_Ld)) {
833 set_irn_n(irn, 2, right);
834 set_irn_n(irn, 3, left);
842 /* optimize op -> Load iff Load is only used by this op */
843 /* and left operand is a Load which only used by this irn */
845 pred_is_specific_nodeblock(block, left, is_ia32_Ld) &&
846 (ia32_get_irn_n_edges(left) == 1))
848 left = get_Proj_pred(left);
850 addr_b = get_irn_n(left, 0);
851 addr_i = get_irn_n(left, 1);
853 /* set new base, index and attributes */
854 set_irn_n(irn, 0, addr_b);
855 set_irn_n(irn, 1, addr_i);
856 add_ia32_am_offs(irn, get_ia32_am_offs(left));
857 set_ia32_am_scale(irn, get_ia32_am_scale(left));
858 set_ia32_am_flavour(irn, get_ia32_am_flavour(left));
859 set_ia32_op_type(irn, ia32_AddrModeS);
860 set_ia32_frame_ent(irn, get_ia32_frame_ent(left));
861 set_ia32_ls_mode(irn, get_ia32_ls_mode(left));
863 if (is_ia32_use_frame(left))
864 set_ia32_use_frame(irn);
866 /* connect to Load memory */
867 if (get_irn_arity(irn) == 5) {
869 set_irn_n(irn, 4, get_irn_n(left, 2));
873 set_irn_n(irn, 3, get_irn_n(left, 2));
876 /* disconnect from Load */
877 set_irn_n(irn, 2, noreg_gp);
879 /* If Load has a memory Proj, connect it to the op */
880 mem_proj = get_mem_proj(left);
882 set_Proj_pred(mem_proj, irn);
883 set_Proj_proj(mem_proj, 1);