nsz Git - libfirm/blob - ir/be/ia32/ia32_optimize.c

   1 #ifdef HAVE_CONFIG_H
   2 #include "config.h"
   3 #endif
   4
   5 #include "irnode.h"
   6 #include "irprog_t.h"
   7 #include "ircons.h"
   8 #include "firm_types.h"
   9 #include "iredges.h"
  10 #include "tv.h"
  11 #include "irgmod.h"
  12
  13 #include "../benode_t.h"
  14
  15 #include "ia32_new_nodes.h"
  16 #include "bearch_ia32_t.h"
  17
  18 #undef is_NoMem
  19 #define is_NoMem(irn) (get_irn_op(irn) == op_NoMem)
  20
  21 /**
  22  * creates a unique ident by adding a number to a tag
  23  *
  24  * @param tag   the tag string, must contain a %d if a number
  25  *              should be added
  26  */
  27 static ident *unique_id(const char *tag)
  28 {
  29         static unsigned id = 0;
  30         char str[256];
  31
  32         snprintf(str, sizeof(str), tag, ++id);
  33         return new_id_from_str(str);
  34 }
  35
  36
  37
  38 /**
  39  * Transforms a SymConst.
  40  *
  41  * @param mod     the debug module
  42  * @param block   the block the new node should belong to
  43  * @param node    the ir SymConst node
  44  * @param mode    mode of the SymConst
  45  * @return the created ia32 Const node
  46  */
  47 static ir_node *gen_SymConst(ia32_transform_env_t *env) {
  48         ir_node  *cnst;
  49         dbg_info *dbg   = env->dbg;
  50         ir_mode  *mode  = env->mode;
  51         ir_graph *irg   = env->irg;
  52         ir_node  *block = env->block;
  53
  54         cnst = new_rd_ia32_Const(dbg, irg, block, mode);
  55         set_ia32_Const_attr(cnst, env->irn);
  56         return cnst;
  57 }
  58
  59 /**
  60  * Get a primitive type for a mode.
  61  */
  62 static ir_type *get_prim_type(pmap *types, ir_mode *mode)
  63 {
  64         pmap_entry *e = pmap_find(types, mode);
  65         ir_type *res;
  66
  67         if (! e) {
  68                 char buf[64];
  69                 snprintf(buf, sizeof(buf), "prim_type_%s", get_mode_name(mode));
  70                 res = new_type_primitive(new_id_from_str(buf), mode);
  71                 pmap_insert(types, mode, res);
  72         }
  73         else
  74                 res = e->value;
  75         return res;
  76 }
  77
  78 /**
  79  * Get an entity that is initialized with a tarval
  80  */
  81 static entity *get_entity_for_tv(ia32_code_gen_t *cg, ir_node *cnst)
  82 {
  83         tarval *tv    = get_Const_tarval(cnst);
  84         pmap_entry *e = pmap_find(cg->tv_ent, tv);
  85         entity *res;
  86         ir_graph *rem;
  87
  88         if (! e) {
  89                 ir_mode *mode = get_irn_mode(cnst);
  90                 ir_type *tp = get_Const_type(cnst);
  91                 if (tp == firm_unknown_type)
  92                         tp = get_prim_type(cg->types, mode);
  93
  94                 res = new_entity(get_glob_type(), unique_id("ia32FloatCnst_%u"), tp);
  95
  96                 set_entity_ld_ident(res, get_entity_ident(res));
  97                 set_entity_visibility(res, visibility_local);
  98                 set_entity_variability(res, variability_constant);
  99                 set_entity_allocation(res, allocation_static);
 100
 101                  /* we create a new entity here: It's initialization must resist on the
 102                     const code irg */
 103                 rem = current_ir_graph;
 104                 current_ir_graph = get_const_code_irg();
 105                 set_atomic_ent_value(res, new_Const_type(tv, tp));
 106                 current_ir_graph = rem;
 107         }
 108         else
 109                 res = e->value;
 110         return res;
 111 }
 112
 113 /**
 114  * Transforms a Const.
 115  *
 116  * @param mod     the debug module
 117  * @param block   the block the new node should belong to
 118  * @param node    the ir Const node
 119  * @param mode    mode of the Const
 120  * @return the created ia32 Const node
 121  */
 122 static ir_node *gen_Const(ia32_transform_env_t *env) {
 123         ir_node *cnst;
 124         symconst_symbol sym;
 125         ir_graph *irg   = env->irg;
 126         ir_node  *block = env->block;
 127         ir_node  *node  = env->irn;
 128         dbg_info *dbg   = env->dbg;
 129         ir_mode  *mode  = env->mode;
 130
 131         if (mode_is_float(mode)) {
 132                 sym.entity_p = get_entity_for_tv(env->cg, node);
 133
 134                 cnst = new_rd_SymConst(dbg, irg, block, sym, symconst_addr_ent);
 135                 env->irn = cnst;
 136                 cnst = gen_SymConst(env);
 137         }
 138         else {
 139                 cnst = new_rd_ia32_Const(dbg, irg, block, get_irn_mode(node));
 140                 set_ia32_Const_attr(cnst, node);
 141         }
 142         return cnst;
 143 }
 144
 145
 146
 147 /**
 148  * Transforms (all) Const's into ia32_Const and places them in the
 149  * block where they are used (or in the cfg-pred Block in case of Phi's)
 150  */
 151 void ia32_place_consts(ir_node *irn, void *env) {
 152         ia32_code_gen_t      *cg = env;
 153         ia32_transform_env_t  tenv;
 154         ir_mode              *mode;
 155         ir_node              *pred, *cnst;
 156         int                   i;
 157         opcode                opc;
 158
 159         if (is_Block(irn))
 160                 return;
 161
 162         mode = get_irn_mode(irn);
 163
 164         tenv.arch_env = cg->arch_env;
 165         tenv.block    = get_nodes_block(irn);
 166         tenv.cg       = cg;
 167         tenv.irg      = cg->irg;
 168         tenv.mod      = cg->mod;
 169
 170         /* Loop over all predecessors and check for Sym/Const nodes */
 171         for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
 172                 pred      = get_irn_n(irn, i);
 173                 cnst      = NULL;
 174                 opc       = get_irn_opcode(pred);
 175                 tenv.irn  = pred;
 176                 tenv.mode = get_irn_mode(pred);
 177                 tenv.dbg  = get_irn_dbg_info(pred);
 178
 179                 /* If it's a Phi, then we need to create the */
 180                 /* new Const in it's predecessor block       */
 181                 if (is_Phi(irn)) {
 182                         tenv.block = get_Block_cfgpred_block(get_nodes_block(irn), i);
 183                 }
 184
 185                 switch (opc) {
 186                         case iro_Const:
 187                                 cnst = gen_Const(&tenv);
 188                                 break;
 189                         case iro_SymConst:
 190                                 cnst = gen_SymConst(&tenv);
 191                                 break;
 192                         default:
 193                                 break;
 194                 }
 195
 196                 /* if we found a const, then set it */
 197                 if (cnst) {
 198                         set_irn_n(irn, i, cnst);
 199                 }
 200         }
 201 }
 202
 203
 204 /******************************************************************
 205  *              _     _                   __  __           _
 206  *     /\      | |   | |                 |  \/  |         | |
 207  *    /  \   __| | __| |_ __ ___  ___ ___| \  / | ___   __| | ___
 208  *   / /\ \ / _` |/ _` | '__/ _ \/ __/ __| |\/| |/ _ \ / _` |/ _ \
 209  *  / ____ \ (_| | (_| | | |  __/\__ \__ \ |  | | (_) | (_| |  __/
 210  * /_/    \_\__,_|\__,_|_|  \___||___/___/_|  |_|\___/ \__,_|\___|
 211  *
 212  ******************************************************************/
 213
 214 static int node_is_comm(const ir_node *irn) {
 215         if (is_ia32_Add(irn)  ||
 216                 is_ia32_fAdd(irn) ||
 217                 is_ia32_Mul(irn)  ||
 218                 is_ia32_Mulh(irn) ||
 219                 is_ia32_fMul(irn) ||
 220                 is_ia32_And(irn)  ||
 221                 is_ia32_fAnd(irn) ||
 222                 is_ia32_Or(irn)   ||
 223                 is_ia32_fOr(irn)  ||
 224                 is_ia32_Eor(irn)  ||
 225                 is_ia32_fEor(irn) ||
 226                 is_ia32_Min(irn)  ||
 227                 is_ia32_fMin(irn) ||
 228                 is_ia32_Max(irn)  ||
 229                 is_ia32_fMax(irn))
 230         {
 231                 return 1;
 232         }
 233
 234         return 0;
 235 }
 236
 237 static int ia32_get_irn_n_edges(const ir_node *irn) {
 238         const ir_edge_t *edge;
 239         int cnt = 0;
 240
 241         foreach_out_edge(irn, edge) {
 242                 cnt++;
 243         }
 244
 245         return cnt;
 246 }
 247
 248 /**
 249  * Returns the first mode_M Proj connected to irn.
 250  */
 251 static ir_node *get_mem_proj(const ir_node *irn) {
 252         const ir_edge_t *edge;
 253         ir_node         *src;
 254
 255         assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
 256
 257         foreach_out_edge(irn, edge) {
 258                 src = get_edge_src_irn(edge);
 259
 260                 assert(is_Proj(src) && "Proj expected");
 261
 262                 if (get_irn_mode(src) == mode_M)
 263                         return src;
 264         }
 265
 266         return NULL;
 267 }
 268
 269 /**
 270  * Returns the Proj with number 0 connected to irn.
 271  */
 272 static ir_node *get_res_proj(const ir_node *irn) {
 273         const ir_edge_t *edge;
 274         ir_node         *src;
 275
 276         assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
 277
 278         foreach_out_edge(irn, edge) {
 279                 src = get_edge_src_irn(edge);
 280
 281                 assert(is_Proj(src) && "Proj expected");
 282
 283                 if (get_Proj_proj(src) == 0)
 284                         return src;
 285         }
 286
 287         return NULL;
 288 }
 289
 290
 291 /**
 292  * Determines if irn is a Proj and if is_op_func returns true for it's predecessor.
 293  */
 294 static int pred_is_specific_node(const ir_node *irn, int (*is_op_func)(const ir_node *n)) {
 295         if (is_Proj(irn) && is_op_func(get_Proj_pred(irn))) {
 296                 return 1;
 297         }
 298
 299         return 0;
 300 }
 301
 302 /**
 303  * Folds Add or Sub to LEA if possible
 304  */
 305 static ir_node *fold_addr(ir_node *irn, firm_dbg_module_t *mod, ir_node *noreg) {
 306         ir_graph *irg      = get_irn_irg(irn);
 307         ir_mode  *mode     = get_irn_mode(irn);
 308         dbg_info *dbg      = get_irn_dbg_info(irn);
 309         ir_node  *block    = get_nodes_block(irn);
 310         ir_node  *res      = irn;
 311         char     *offs     = NULL;
 312         char     *new_offs = NULL;
 313         int       scale    = 0;
 314         int       isadd    = 0;
 315         int       dolea    = 0;
 316         ir_node  *left, *right, *temp;
 317         ir_node  *base, *index;
 318         ia32_am_flavour_t am_flav;
 319
 320         if (is_ia32_Add(irn))
 321                 isadd = 1;
 322
 323         left  = get_irn_n(irn, 2);
 324         right = get_irn_n(irn, 3);
 325
 326         /* "normalize" arguments in case of add */
 327         if  (isadd) {
 328                 /* put LEA == ia32_am_O as right operand */
 329                 if (is_ia32_Lea(left) && get_ia32_am_flavour(left) == ia32_am_O) {
 330                         set_irn_n(irn, 2, right);
 331                         set_irn_n(irn, 3, left);
 332                         temp  = left;
 333                         left  = right;
 334                         right = temp;
 335                 }
 336
 337                 /* put LEA != ia32_am_O as left operand */
 338                 if (is_ia32_Lea(right) && get_ia32_am_flavour(right) != ia32_am_O) {
 339                         set_irn_n(irn, 2, right);
 340                         set_irn_n(irn, 3, left);
 341                         temp  = left;
 342                         left  = right;
 343                         right = temp;
 344                 }
 345
 346                 /* put SHL as right operand */
 347                 if (pred_is_specific_node(left, is_ia32_Shl)) {
 348                         set_irn_n(irn, 2, right);
 349                         set_irn_n(irn, 3, left);
 350                         temp  = left;
 351                         left  = right;
 352                         right = temp;
 353                 }
 354         }
 355
 356         /* Left operand could already be a LEA */
 357         if (is_ia32_Lea(left)) {
 358                 DBG((mod, LEVEL_1, "\tgot LEA as left operand\n"));
 359
 360                 base  = get_irn_n(left, 0);
 361                 index = get_irn_n(left, 1);
 362                 offs  = get_ia32_am_offs(left);
 363                 scale = get_ia32_am_scale(left);
 364         }
 365         else {
 366                 base  = left;
 367                 index = noreg;
 368                 offs  = NULL;
 369                 scale = 0;
 370
 371         }
 372
 373         /* check if operand is either const or right operand is AMConst (LEA with ia32_am_O) */
 374         if (get_ia32_cnst(irn)) {
 375                 DBG((mod, LEVEL_1, "\tfound op with imm"));
 376
 377                 new_offs = get_ia32_cnst(irn);
 378                 dolea    = 1;
 379         }
 380         else if (is_ia32_Lea(right) && get_ia32_am_flavour(right) == ia32_am_O) {
 381                 DBG((mod, LEVEL_1, "\tgot op with LEA am_O"));
 382
 383                 new_offs = get_ia32_am_offs(right);
 384                 dolea    = 1;
 385         }
 386         /* we can only get an additional index if there isn't already one */
 387         else if (isadd && be_is_NoReg(index)) {
 388                 /* default for add -> make right operand to index */
 389                 index = right;
 390                 dolea = 1;
 391
 392                 DBG((mod, LEVEL_1, "\tgot LEA candidate with index %+F\n", index));
 393                 /* check for SHL 1,2,3 */
 394                 if (pred_is_specific_node(right, is_ia32_Shl)) {
 395                         temp = get_Proj_pred(right);
 396
 397                         if (get_ia32_Immop_tarval(temp)) {
 398                                 scale = get_tarval_long(get_ia32_Immop_tarval(temp));
 399
 400                                 if (scale <= 3) {
 401                                         scale = 1 << scale;
 402                                         index = get_irn_n(temp, 2);
 403
 404                                         DBG((mod, LEVEL_1, "\tgot scaled index %+F\n", index));
 405                                 }
 406                         }
 407                 }
 408         }
 409
 410         /* ok, we can create a new LEA */
 411         if (dolea) {
 412                 res = new_rd_ia32_Lea(dbg, irg, block, base, index, mode_Is);
 413
 414                 /* add the old offset of a previous LEA */
 415                 if (offs) {
 416                         add_ia32_am_offs(res, offs);
 417                 }
 418
 419                 /* add the new offset */
 420                 if (isadd) {
 421                         if (new_offs) {
 422                                 add_ia32_am_offs(res, new_offs);
 423                         }
 424                 }
 425                 else {
 426                         sub_ia32_am_offs(res, new_offs);
 427                 }
 428
 429                 /* set scale */
 430                 set_ia32_am_scale(res, scale);
 431
 432                 am_flav = ia32_am_N;
 433                 /* determine new am flavour */
 434                 if (offs || new_offs) {
 435                         am_flav |= ia32_O;
 436                 }
 437                 if (! be_is_NoReg(base)) {
 438                         am_flav |= ia32_B;
 439                 }
 440                 if (! be_is_NoReg(index)) {
 441                         am_flav |= ia32_I;
 442                 }
 443                 if (scale > 0) {
 444                         am_flav |= ia32_S;
 445                 }
 446                 set_ia32_am_flavour(res, am_flav);
 447
 448                 set_ia32_op_type(res, ia32_AddrModeS);
 449
 450                 DBG((mod, LEVEL_1, "\tLEA [%+F + %+F * %d + %s]\n", base, index, scale, get_ia32_am_offs(res)));
 451
 452                 /* get the result Proj of the Add/Sub */
 453                 irn = get_res_proj(irn);
 454
 455                 assert(irn && "Couldn't find result proj");
 456
 457                 /* exchange the old op with the new LEA */
 458                 exchange(irn, res);
 459         }
 460
 461         return res;
 462 }
 463
 464 /**
 465  * Optimizes a pattern around irn to address mode if possible.
 466  */
 467 void ia32_optimize_am(ir_node *irn, void *env) {
 468         ia32_code_gen_t   *cg  = env;
 469         ir_graph          *irg = cg->irg;
 470         firm_dbg_module_t *mod = cg->mod;
 471         ir_node           *res = irn;
 472         dbg_info          *dbg;
 473         ir_mode           *mode;
 474         ir_node           *block, *noreg_gp, *noreg_fp;
 475         ir_node           *left, *right, *temp;
 476         ir_node           *store, *mem_proj;
 477         ir_node           *succ, *addr_b, *addr_i;
 478         int                check_am_src = 0;
 479
 480         if (! is_ia32_irn(irn))
 481                 return;
 482
 483         dbg      = get_irn_dbg_info(irn);
 484         mode     = get_irn_mode(irn);
 485         block    = get_nodes_block(irn);
 486         noreg_gp = ia32_new_NoReg_gp(cg);
 487         noreg_fp = ia32_new_NoReg_fp(cg);
 488
 489         DBG((mod, LEVEL_1, "checking for AM\n"));
 490
 491         /* 1st part: check for address calculations and transform the into Lea */
 492
 493         /* Following cases can occur:                                  */
 494         /* - Sub (l, imm) -> LEA [base - offset]                       */
 495         /* - Sub (l, r == LEA with ia32_am_O)   -> LEA [base - offset] */
 496         /* - Add (l, imm) -> LEA [base + offset]                       */
 497         /* - Add (l, r == LEA with ia32_am_O)  -> LEA [base + offset]  */
 498         /* - Add (l == LEA with ia32_am_O, r)  -> LEA [base + offset]  */
 499         /* - Add (l, r) -> LEA [base + index * scale]                  */
 500         /*              with scale > 1 iff l/r == shl (1,2,3)          */
 501
 502         if (is_ia32_Sub(irn) || is_ia32_Add(irn)) {
 503                 left  = get_irn_n(irn, 2);
 504                 right = get_irn_n(irn, 3);
 505
 506             /* Do not try to create a LEA if one of the operands is a Load. */
 507                 if (! pred_is_specific_node(left,  is_ia32_Load)  &&
 508                         ! pred_is_specific_node(right, is_ia32_Load))
 509                 {
 510                         res = fold_addr(irn, mod, noreg_gp);
 511                 }
 512         }
 513
 514         /* 2nd part: fold following patterns:                                               */
 515         /* - Load  -> LEA into Load  } TODO: If the LEA is used by more than one Load/Store */
 516         /* - Store -> LEA into Store }       it might be better to keep the LEA             */
 517         /* - op -> Load into AMop with am_Source                                            */
 518         /*   conditions:                                                                    */
 519         /*     - op is am_Source capable AND                                                */
 520         /*     - the Load is only used by this op AND                                       */
 521         /*     - the Load is in the same block                                              */
 522         /* - Store -> op -> Load  into AMop with am_Dest                                    */
 523         /*   conditions:                                                                    */
 524         /*     - op is am_Dest capable AND                                                  */
 525         /*     - the Store uses the same address as the Load AND                            */
 526         /*     - the Load is only used by this op AND                                       */
 527         /*     - the Load and Store are in the same block AND                               */
 528         /*     - nobody else uses the result of the op                                      */
 529
 530         if ((res == irn) && (get_ia32_am_support(irn) != ia32_am_None) && !is_ia32_Lea(irn)) {
 531                 /* 1st: check for Load/Store -> LEA   */
 532                 if (is_ia32_Load(irn)  || is_ia32_fLoad(irn) ||
 533                         is_ia32_Store(irn) || is_ia32_fStore(irn))
 534                 {
 535                         left = get_irn_n(irn, 0);
 536
 537                         if (is_ia32_Lea(left)) {
 538                                 /* get the AM attributes from the LEA */
 539                                 add_ia32_am_offs(irn, get_ia32_am_offs(left));
 540                                 set_ia32_am_scale(irn, get_ia32_am_scale(left));
 541                                 set_ia32_am_flavour(irn, get_ia32_am_flavour(left));
 542                                 set_ia32_op_type(irn, get_ia32_op_type(left));
 543
 544                                 /* set base and index */
 545                                 set_irn_n(irn, 0, get_irn_n(left, 0));
 546                                 set_irn_n(irn, 1, get_irn_n(left, 1));
 547                         }
 548                 }
 549                 /* check if at least one operand is a Load */
 550                 else if (pred_is_specific_node(get_irn_n(irn, 2), is_ia32_Load)  ||
 551                                  pred_is_specific_node(get_irn_n(irn, 2), is_ia32_fLoad) ||
 552                                  pred_is_specific_node(get_irn_n(irn, 3), is_ia32_Load)  ||
 553                                  pred_is_specific_node(get_irn_n(irn, 3), is_ia32_fLoad))
 554                 {
 555
 556                         /* normalize commutative ops */
 557                         if (node_is_comm(irn)) {
 558                                 left  = get_irn_n(irn, 2);
 559                                 right = get_irn_n(irn, 3);
 560
 561                                 /* Assure that right operand is always a Load if there is one    */
 562                                 /* because non-commutative ops can only use Dest AM if the right */
 563                                 /* operand is a load, so we only need to check right operand.    */
 564                                 if (pred_is_specific_node(left, is_ia32_Load) ||
 565                                         pred_is_specific_node(left, is_ia32_fLoad))
 566                                 {
 567                                         set_irn_n(irn, 2, right);
 568                                         set_irn_n(irn, 3, left);
 569
 570                                         temp  = left;
 571                                         left  = right;
 572                                         right = temp;
 573                                 }
 574                         }
 575
 576                         /* check for Store -> op -> Load */
 577
 578                         /* Store -> op -> Load optimization is only possible if supported by op */
 579                         /* and if right operand is a Load                                       */
 580                         if (get_ia32_am_support(irn) & ia32_am_Dest &&
 581                                 (pred_is_specific_node(right, is_ia32_Load)
 582                                  || pred_is_specific_node(right, is_ia32_fLoad)))
 583                         {
 584
 585                                 /* An address mode capable op always has a result Proj.                  */
 586                                 /* If this Proj is used by more than one other node, we don't need to    */
 587                                 /* check further, otherwise we check for Store and remember the address, */
 588                                 /* the Store points to. */
 589
 590                                 succ = get_res_proj(irn);
 591                                 assert(succ && "Couldn't find result proj");
 592
 593                                 addr_b = NULL;
 594                                 addr_i = NULL;
 595                                 store  = NULL;
 596
 597                                 /* now check for users and Store */
 598                                 if (ia32_get_irn_n_edges(succ) == 1) {
 599                                         succ = get_edge_src_irn(get_irn_out_edge_first(succ));
 600
 601                                         if (is_ia32_fStore(succ) || is_ia32_Store(succ)) {
 602                                                 store  = succ;
 603                                                 addr_b = get_irn_n(store, 0);
 604
 605                                                 /* Could be that the Store is connected to the address    */
 606                                                 /* calculating LEA while the Load is already transformed. */
 607                                                 if (is_ia32_Lea(addr_b)) {
 608                                                         succ   = addr_b;
 609                                                         addr_b = get_irn_n(succ, 0);
 610                                                         addr_i = get_irn_n(succ, 1);
 611                                                 }
 612                                                 else {
 613                                                         addr_i = noreg_gp;
 614                                                 }
 615                                         }
 616                                 }
 617
 618                                 if (store) {
 619                                         /* we found a Store as single user: Now check for Load */
 620                                         left  = get_irn_n(irn, 2);
 621                                         right = get_irn_n(irn, 3);
 622
 623                                         /* Extra check for commutative ops: put the interesting load right */
 624
 625                                         /* right != NoMem means, we have a "binary" operation */
 626                                         if (node_is_comm(irn) &&
 627                                                 ! is_NoMem(left)  &&
 628                                                 (pred_is_specific_node(left, is_ia32_Load) ||
 629                                                  pred_is_specific_node(left, is_ia32_fLoad)))
 630                                         {
 631                                                 if ((addr_b == get_irn_n(get_Proj_pred(left), 0)) &&
 632                                                         (addr_i == get_irn_n(get_Proj_pred(left), 1)))
 633                                                 {
 634                                                         /* We exchange left and right, so it's easier to kill     */
 635                                                         /* the correct Load later and to handle unary operations. */
 636                                                         set_irn_n(irn, 2, right);
 637                                                         set_irn_n(irn, 3, left);
 638
 639                                                         temp  = left;
 640                                                         left  = right;
 641                                                         right = temp;
 642                                                 }
 643                                         }
 644
 645                                         /* skip the Proj for easier access */
 646                                         right = get_Proj_pred(right);
 647
 648                                         /* Compare Load and Store address */
 649                                         if ((addr_b == get_irn_n(left, 0)) && (addr_i == get_irn_n(left, 1)))
 650                                         {
 651                                                 /* Left Load is from same address, so we can */
 652                                                 /* disconnect the Load and Store here        */
 653
 654                                                 /* set new base, index and attributes */
 655                                                 set_irn_n(irn, 0, addr_b);
 656                                                 set_irn_n(irn, 1, addr_i);
 657                                                 add_ia32_am_offs(irn, get_ia32_am_offs(left));
 658                                                 set_ia32_am_scale(irn, get_ia32_am_scale(left));
 659                                                 set_ia32_am_flavour(irn, get_ia32_am_flavour(left));
 660                                                 set_ia32_op_type(irn, ia32_AddrModeD);
 661
 662                                                 /* connect to Load memory */
 663                                                 if (get_irn_arity(irn) == 5) {
 664                                                         /* binary AMop */
 665                                                         set_irn_n(irn, 4, get_irn_n(left, 2));
 666                                                 }
 667                                                 else {
 668                                                         /* unary AMop */
 669                                                         set_irn_n(irn, 3, get_irn_n(left, 2));
 670                                                 }
 671
 672                                                 /* disconnect from Load */
 673                                                 set_irn_n(irn, 2, noreg_gp);
 674
 675                                                 /* connect the memory Proj of the Store to the op */
 676                                                 mem_proj = get_mem_proj(store);
 677                                                 set_Proj_pred(mem_proj, irn);
 678                                                 set_Proj_proj(mem_proj, 1);
 679                                         }
 680                                 } /* if (store) */
 681                                 else if (get_ia32_am_support(irn) & ia32_am_Source) {
 682                                         /* There was no store, check if we still can optimize for source address mode */
 683                                         check_am_src = 1;
 684                                 }
 685                         } /* if (support AM Dest) */
 686                         else {
 687                                 /* op doesn't support am AM Dest -> check for AM Source */
 688                                 check_am_src = 1;
 689                         }
 690
 691                         left  = get_irn_n(irn, 2);
 692                         right = get_irn_n(irn, 3);
 693
 694                         /* normalize commutative ops */
 695                         if (node_is_comm(irn)) {
 696                                 /* Assure that left operand is always a Load if there is one */
 697                                 /* because non-commutative ops can only use Source AM if the */
 698                                 /* left operand is a Load, so we only need to check the left */
 699                                 /* operand afterwards.                                       */
 700                                 if (pred_is_specific_node(right, is_ia32_Load) ||
 701                                         pred_is_specific_node(right, is_ia32_fLoad))
 702                                 {
 703                                         set_irn_n(irn, 2, right);
 704                                         set_irn_n(irn, 3, left);
 705
 706                                         temp  = left;
 707                                         left  = right;
 708                                         right = temp;
 709                                 }
 710                         }
 711
 712                         /* optimize op -> Load iff Load is only used by this op   */
 713                         /* and left operand is a Load which only used by this irn */
 714                         if (check_am_src &&
 715                                 (pred_is_specific_node(left, is_ia32_Load)
 716                                  || pred_is_specific_node(left, is_ia32_fLoad)) &&
 717                                 (ia32_get_irn_n_edges(left) == 1))
 718                         {
 719                                 left = get_Proj_pred(left);
 720
 721                                 addr_b = get_irn_n(left, 0);
 722                                 addr_i = get_irn_n(left, 1);
 723
 724                                 /* set new base, index and attributes */
 725                                 set_irn_n(irn, 0, addr_b);
 726                                 set_irn_n(irn, 1, addr_i);
 727                                 add_ia32_am_offs(irn, get_ia32_am_offs(left));
 728                                 set_ia32_am_scale(irn, get_ia32_am_scale(left));
 729                                 set_ia32_am_flavour(irn, get_ia32_am_flavour(left));
 730                                 set_ia32_op_type(irn, ia32_AddrModeS);
 731
 732                                 /* connect to Load memory */
 733                                 if (get_irn_arity(irn) == 5) {
 734                                         /* binary AMop */
 735                                         set_irn_n(irn, 4, get_irn_n(left, 2));
 736                                 }
 737                                 else {
 738                                         /* unary AMop */
 739                                         set_irn_n(irn, 3, get_irn_n(left, 2));
 740                                 }
 741
 742                                 /* disconnect from Load */
 743                                 set_irn_n(irn, 2, noreg_gp);
 744
 745                                 /* If Load has a memory Proj, connect it to the op */
 746                                 mem_proj = get_mem_proj(left);
 747                                 if (mem_proj) {
 748                                         set_Proj_pred(mem_proj, irn);
 749                                         set_Proj_proj(mem_proj, 1);
 750                                 }
 751                         }
 752                 }
 753         }
 754 }