8 #include "firm_types.h"
16 #include "ia32_new_nodes.h"
17 #include "bearch_ia32_t.h"
18 #include "gen_ia32_regalloc_if.h" /* the generated interface (register type and class defenitions) */
21 #define is_NoMem(irn) (get_irn_op(irn) == op_NoMem)
23 static int be_is_NoReg(be_abi_irg_t *babi, const ir_node *irn) {
24 if (be_abi_get_callee_save_irn(babi, &ia32_gp_regs[REG_XXX]) == irn ||
25 be_abi_get_callee_save_irn(babi, &ia32_fp_regs[REG_XXXX]) == irn)
34 * creates a unique ident by adding a number to a tag
36 * @param tag the tag string, must contain a %d if a number
39 static ident *unique_id(const char *tag)
41 static unsigned id = 0;
44 snprintf(str, sizeof(str), tag, ++id);
45 return new_id_from_str(str);
51 * Transforms a SymConst.
53 * @param mod the debug module
54 * @param block the block the new node should belong to
55 * @param node the ir SymConst node
56 * @param mode mode of the SymConst
57 * @return the created ia32 Const node
59 static ir_node *gen_SymConst(ia32_transform_env_t *env) {
61 dbg_info *dbg = env->dbg;
62 ir_mode *mode = env->mode;
63 ir_graph *irg = env->irg;
64 ir_node *block = env->block;
66 cnst = new_rd_ia32_Const(dbg, irg, block, mode);
67 set_ia32_Const_attr(cnst, env->irn);
72 * Get a primitive type for a mode.
74 static ir_type *get_prim_type(pmap *types, ir_mode *mode)
76 pmap_entry *e = pmap_find(types, mode);
81 snprintf(buf, sizeof(buf), "prim_type_%s", get_mode_name(mode));
82 res = new_type_primitive(new_id_from_str(buf), mode);
83 pmap_insert(types, mode, res);
91 * Get an entity that is initialized with a tarval
93 static entity *get_entity_for_tv(ia32_code_gen_t *cg, ir_node *cnst)
95 tarval *tv = get_Const_tarval(cnst);
96 pmap_entry *e = pmap_find(cg->tv_ent, tv);
101 ir_mode *mode = get_irn_mode(cnst);
102 ir_type *tp = get_Const_type(cnst);
103 if (tp == firm_unknown_type)
104 tp = get_prim_type(cg->types, mode);
106 res = new_entity(get_glob_type(), unique_id("ia32FloatCnst_%u"), tp);
108 set_entity_ld_ident(res, get_entity_ident(res));
109 set_entity_visibility(res, visibility_local);
110 set_entity_variability(res, variability_constant);
111 set_entity_allocation(res, allocation_static);
113 /* we create a new entity here: It's initialization must resist on the
115 rem = current_ir_graph;
116 current_ir_graph = get_const_code_irg();
117 set_atomic_ent_value(res, new_Const_type(tv, tp));
118 current_ir_graph = rem;
126 * Transforms a Const.
128 * @param mod the debug module
129 * @param block the block the new node should belong to
130 * @param node the ir Const node
131 * @param mode mode of the Const
132 * @return the created ia32 Const node
134 static ir_node *gen_Const(ia32_transform_env_t *env) {
137 ir_graph *irg = env->irg;
138 ir_node *block = env->block;
139 ir_node *node = env->irn;
140 dbg_info *dbg = env->dbg;
141 ir_mode *mode = env->mode;
143 if (mode_is_float(mode)) {
144 sym.entity_p = get_entity_for_tv(env->cg, node);
146 cnst = new_rd_SymConst(dbg, irg, block, sym, symconst_addr_ent);
148 cnst = gen_SymConst(env);
151 cnst = new_rd_ia32_Const(dbg, irg, block, get_irn_mode(node));
152 set_ia32_Const_attr(cnst, node);
160 * Transforms (all) Const's into ia32_Const and places them in the
161 * block where they are used (or in the cfg-pred Block in case of Phi's)
163 void ia32_place_consts(ir_node *irn, void *env) {
164 ia32_code_gen_t *cg = env;
165 ia32_transform_env_t tenv;
167 ir_node *pred, *cnst;
174 mode = get_irn_mode(irn);
176 tenv.block = get_nodes_block(irn);
181 /* Loop over all predecessors and check for Sym/Const nodes */
182 for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
183 pred = get_irn_n(irn, i);
185 opc = get_irn_opcode(pred);
187 tenv.mode = get_irn_mode(pred);
188 tenv.dbg = get_irn_dbg_info(pred);
190 /* If it's a Phi, then we need to create the */
191 /* new Const in it's predecessor block */
193 tenv.block = get_Block_cfgpred_block(get_nodes_block(irn), i);
198 cnst = gen_Const(&tenv);
201 cnst = gen_SymConst(&tenv);
207 /* if we found a const, then set it */
209 set_irn_n(irn, i, cnst);
215 /******************************************************************
217 * /\ | | | | | \/ | | |
218 * / \ __| | __| |_ __ ___ ___ ___| \ / | ___ __| | ___
219 * / /\ \ / _` |/ _` | '__/ _ \/ __/ __| |\/| |/ _ \ / _` |/ _ \
220 * / ____ \ (_| | (_| | | | __/\__ \__ \ | | | (_) | (_| | __/
221 * /_/ \_\__,_|\__,_|_| \___||___/___/_| |_|\___/ \__,_|\___|
223 ******************************************************************/
225 static int node_is_comm(const ir_node *irn) {
226 if (is_ia32_Add(irn) ||
248 static int ia32_get_irn_n_edges(const ir_node *irn) {
249 const ir_edge_t *edge;
252 foreach_out_edge(irn, edge) {
260 * Returns the first mode_M Proj connected to irn.
262 static ir_node *get_mem_proj(const ir_node *irn) {
263 const ir_edge_t *edge;
266 assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
268 foreach_out_edge(irn, edge) {
269 src = get_edge_src_irn(edge);
271 assert(is_Proj(src) && "Proj expected");
273 if (get_irn_mode(src) == mode_M)
281 * Returns the Proj with number 0 connected to irn.
283 static ir_node *get_res_proj(const ir_node *irn) {
284 const ir_edge_t *edge;
287 assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
289 foreach_out_edge(irn, edge) {
290 src = get_edge_src_irn(edge);
292 assert(is_Proj(src) && "Proj expected");
294 if (get_Proj_proj(src) == 0)
302 * Determines if pred is a Proj and if is_op_func returns true for it's predecessor.
304 * @param pred The node to be checked
305 * @param is_op_func The check-function
306 * @return 1 if conditions are fulfilled, 0 otherwise
308 static int pred_is_specific_node(const ir_node *pred, int (*is_op_func)(const ir_node *n)) {
309 if (is_Proj(pred) && is_op_func(get_Proj_pred(pred))) {
317 * Determines if pred is a Proj and if is_op_func returns true for it's predecessor
318 * and if the predecessor is in block bl.
320 * @param bl The block
321 * @param pred The node to be checked
322 * @param is_op_func The check-function
323 * @return 1 if conditions are fulfilled, 0 otherwise
325 static int pred_is_specific_nodeblock(const ir_node *bl, const ir_node *pred,
326 int (*is_op_func)(const ir_node *n))
329 pred = get_Proj_pred(pred);
330 if ((bl == get_nodes_block(pred)) && is_op_func(pred)) {
339 * Folds Add or Sub to LEA if possible
341 static ir_node *fold_addr(be_abi_irg_t *babi, ir_node *irn, firm_dbg_module_t *mod, ir_node *noreg) {
342 ir_graph *irg = get_irn_irg(irn);
343 ir_mode *mode = get_irn_mode(irn);
344 dbg_info *dbg = get_irn_dbg_info(irn);
345 ir_node *block = get_nodes_block(irn);
348 char *offs_cnst = NULL;
349 char *offs_lea = NULL;
353 ir_node *left, *right, *temp;
354 ir_node *base, *index;
355 ia32_am_flavour_t am_flav;
357 if (is_ia32_Add(irn))
360 left = get_irn_n(irn, 2);
361 right = get_irn_n(irn, 3);
369 /* "normalize" arguments in case of add with two operands */
370 if (isadd && ! be_is_NoReg(babi, right)) {
371 /* put LEA == ia32_am_O as right operand */
372 if (is_ia32_Lea(left) && get_ia32_am_flavour(left) == ia32_am_O) {
373 set_irn_n(irn, 2, right);
374 set_irn_n(irn, 3, left);
380 /* put LEA != ia32_am_O as left operand */
381 if (is_ia32_Lea(right) && get_ia32_am_flavour(right) != ia32_am_O) {
382 set_irn_n(irn, 2, right);
383 set_irn_n(irn, 3, left);
389 /* put SHL as left operand iff left is NOT a LEA */
390 if (! is_ia32_Lea(left) && pred_is_specific_node(right, is_ia32_Shl)) {
391 set_irn_n(irn, 2, right);
392 set_irn_n(irn, 3, left);
399 /* check if operand is either const */
400 if (get_ia32_cnst(irn)) {
401 DBG((mod, LEVEL_1, "\tfound op with imm"));
403 offs_cnst = get_ia32_cnst(irn);
407 /* determine the operand which needs to be checked */
408 if (be_is_NoReg(babi, right)) {
415 /* check if right operand is AMConst (LEA with ia32_am_O) */
416 if (is_ia32_Lea(temp) && get_ia32_am_flavour(temp) == ia32_am_O) {
417 DBG((mod, LEVEL_1, "\tgot op with LEA am_O"));
419 offs_lea = get_ia32_am_offs(temp);
424 /* default for add -> make right operand to index */
428 DBG((mod, LEVEL_1, "\tgot LEA candidate with index %+F\n", index));
430 /* determine the operand which needs to be checked */
432 if (is_ia32_Lea(left)) {
436 /* check for SHL 1,2,3 */
437 if (pred_is_specific_node(temp, is_ia32_Shl)) {
438 temp = get_Proj_pred(temp);
440 if (get_ia32_Immop_tarval(temp)) {
441 scale = get_tarval_long(get_ia32_Immop_tarval(temp));
444 index = get_irn_n(temp, 2);
446 DBG((mod, LEVEL_1, "\tgot scaled index %+F\n", index));
452 if (! be_is_NoReg(babi, index)) {
453 /* if we have index, but left == right -> no base */
457 else if (! is_ia32_Lea(left) && (index != right)) {
458 /* index != right -> we found a good Shl */
459 /* left != LEA -> this Shl was the left operand */
460 /* -> base is right operand */
466 /* Try to assimilate a LEA as left operand */
467 if (is_ia32_Lea(left) && (get_ia32_am_flavour(left) != ia32_am_O)) {
468 am_flav = get_ia32_am_flavour(left);
470 /* If we have an Add with a real right operand (not NoReg) and */
471 /* the LEA contains already an index calculation then we create */
473 if (isadd && !be_is_NoReg(babi, index) && (am_flav & ia32_am_I)) {
474 DBG((mod, LEVEL_1, "\tleave old LEA, creating new one\n"));
477 DBG((mod, LEVEL_1, "\tgot LEA as left operand ... assimilating\n"));
478 offs = get_ia32_am_offs(left);
479 base = get_irn_n(left, 0);
480 index = get_irn_n(left, 1);
481 scale = get_ia32_am_scale(left);
485 /* ok, we can create a new LEA */
487 res = new_rd_ia32_Lea(dbg, irg, block, base, index, mode_Is);
489 /* add the old offset of a previous LEA */
491 add_ia32_am_offs(res, offs);
494 /* add the new offset */
497 add_ia32_am_offs(res, offs_cnst);
500 add_ia32_am_offs(res, offs_lea);
504 /* either lea_O-cnst, -cnst or -lea_O */
507 add_ia32_am_offs(res, offs_lea);
510 sub_ia32_am_offs(res, offs_cnst);
513 sub_ia32_am_offs(res, offs_lea);
518 set_ia32_am_scale(res, scale);
521 /* determine new am flavour */
522 if (offs || offs_cnst || offs_lea) {
525 if (! be_is_NoReg(babi, base)) {
528 if (! be_is_NoReg(babi, index)) {
534 set_ia32_am_flavour(res, am_flav);
536 set_ia32_op_type(res, ia32_AddrModeS);
538 DBG((mod, LEVEL_1, "\tLEA [%+F + %+F * %d + %s]\n", base, index, scale, get_ia32_am_offs(res)));
540 /* get the result Proj of the Add/Sub */
541 irn = get_res_proj(irn);
543 assert(irn && "Couldn't find result proj");
545 /* exchange the old op with the new LEA */
553 * Optimizes a pattern around irn to address mode if possible.
555 void ia32_optimize_am(ir_node *irn, void *env) {
556 ia32_code_gen_t *cg = env;
557 ir_graph *irg = cg->irg;
558 firm_dbg_module_t *mod = cg->mod;
560 be_abi_irg_t *babi = cg->birg->abi;
563 ir_node *block, *noreg_gp, *noreg_fp;
564 ir_node *left, *right, *temp;
565 ir_node *store, *load, *mem_proj;
566 ir_node *succ, *addr_b, *addr_i;
567 int check_am_src = 0;
569 if (! is_ia32_irn(irn))
572 dbg = get_irn_dbg_info(irn);
573 mode = get_irn_mode(irn);
574 block = get_nodes_block(irn);
575 noreg_gp = ia32_new_NoReg_gp(cg);
576 noreg_fp = ia32_new_NoReg_fp(cg);
578 DBG((mod, LEVEL_1, "checking for AM\n"));
580 /* 1st part: check for address calculations and transform the into Lea */
582 /* Following cases can occur: */
583 /* - Sub (l, imm) -> LEA [base - offset] */
584 /* - Sub (l, r == LEA with ia32_am_O) -> LEA [base - offset] */
585 /* - Add (l, imm) -> LEA [base + offset] */
586 /* - Add (l, r == LEA with ia32_am_O) -> LEA [base + offset] */
587 /* - Add (l == LEA with ia32_am_O, r) -> LEA [base + offset] */
588 /* - Add (l, r) -> LEA [base + index * scale] */
589 /* with scale > 1 iff l/r == shl (1,2,3) */
591 if (is_ia32_Sub(irn) || is_ia32_Add(irn)) {
592 left = get_irn_n(irn, 2);
593 right = get_irn_n(irn, 3);
595 /* Do not try to create a LEA if one of the operands is a Load. */
596 if (! pred_is_specific_nodeblock(block, left, is_ia32_Load) &&
597 ! pred_is_specific_nodeblock(block, right, is_ia32_Load))
599 res = fold_addr(babi, irn, mod, noreg_gp);
603 /* 2nd part: fold following patterns: */
604 /* - Load -> LEA into Load } TODO: If the LEA is used by more than one Load/Store */
605 /* - Store -> LEA into Store } it might be better to keep the LEA */
606 /* - op -> Load into AMop with am_Source */
608 /* - op is am_Source capable AND */
609 /* - the Load is only used by this op AND */
610 /* - the Load is in the same block */
611 /* - Store -> op -> Load into AMop with am_Dest */
613 /* - op is am_Dest capable AND */
614 /* - the Store uses the same address as the Load AND */
615 /* - the Load is only used by this op AND */
616 /* - the Load and Store are in the same block AND */
617 /* - nobody else uses the result of the op */
619 if ((res == irn) && (get_ia32_am_support(irn) != ia32_am_None) && !is_ia32_Lea(irn)) {
620 /* 1st: check for Load/Store -> LEA */
621 if (is_ia32_Ld(irn) || is_ia32_St(irn)) {
622 left = get_irn_n(irn, 0);
624 if (is_ia32_Lea(left)) {
625 /* get the AM attributes from the LEA */
626 add_ia32_am_offs(irn, get_ia32_am_offs(left));
627 set_ia32_am_scale(irn, get_ia32_am_scale(left));
628 set_ia32_am_flavour(irn, get_ia32_am_flavour(left));
629 set_ia32_op_type(irn, get_ia32_op_type(left));
631 /* set base and index */
632 set_irn_n(irn, 0, get_irn_n(left, 0));
633 set_irn_n(irn, 1, get_irn_n(left, 1));
636 /* check if at least one operand is a Load */
637 else if (pred_is_specific_nodeblock(block, get_irn_n(irn, 2), is_ia32_Ld) ||
638 pred_is_specific_nodeblock(block, get_irn_n(irn, 3), is_ia32_Ld))
640 left = get_irn_n(irn, 2);
641 if (get_irn_arity(irn) == 4) {
642 /* it's an "unary" operation */
646 right = get_irn_n(irn, 3);
649 /* normalize commutative ops */
650 if (node_is_comm(irn)) {
651 /* Assure that right operand is always a Load if there is one */
652 /* because non-commutative ops can only use Dest AM if the right */
653 /* operand is a load, so we only need to check right operand. */
654 if (pred_is_specific_nodeblock(block, left, is_ia32_Ld))
656 set_irn_n(irn, 2, right);
657 set_irn_n(irn, 3, left);
665 /* check for Store -> op -> Load */
667 /* Store -> op -> Load optimization is only possible if supported by op */
668 /* and if right operand is a Load */
669 if ((get_ia32_am_support(irn) & ia32_am_Dest) &&
670 pred_is_specific_nodeblock(block, right, is_ia32_Ld))
673 /* An address mode capable op always has a result Proj. */
674 /* If this Proj is used by more than one other node, we don't need to */
675 /* check further, otherwise we check for Store and remember the address, */
676 /* the Store points to. */
678 succ = get_res_proj(irn);
679 assert(succ && "Couldn't find result proj");
685 /* now check for users and Store */
686 if (ia32_get_irn_n_edges(succ) == 1) {
687 succ = get_edge_src_irn(get_irn_out_edge_first(succ));
689 if (is_ia32_fStore(succ) || is_ia32_Store(succ)) {
691 addr_b = get_irn_n(store, 0);
693 /* Could be that the Store is connected to the address */
694 /* calculating LEA while the Load is already transformed. */
695 if (is_ia32_Lea(addr_b)) {
697 addr_b = get_irn_n(succ, 0);
698 addr_i = get_irn_n(succ, 1);
707 /* we found a Store as single user: Now check for Load */
709 /* Extra check for commutative ops with two Loads */
710 /* -> put the interesting Load right */
711 if (node_is_comm(irn) &&
712 pred_is_specific_nodeblock(block, left, is_ia32_Ld))
714 if ((addr_b == get_irn_n(get_Proj_pred(left), 0)) &&
715 (addr_i == get_irn_n(get_Proj_pred(left), 1)))
717 /* We exchange left and right, so it's easier to kill */
718 /* the correct Load later and to handle unary operations. */
719 set_irn_n(irn, 2, right);
720 set_irn_n(irn, 3, left);
728 /* skip the Proj for easier access */
729 load = get_Proj_pred(right);
731 /* Compare Load and Store address */
732 if ((addr_b == get_irn_n(load, 0)) && (addr_i == get_irn_n(load, 1)))
734 /* Right Load is from same address, so we can */
735 /* disconnect the Load and Store here */
737 /* set new base, index and attributes */
738 set_irn_n(irn, 0, addr_b);
739 set_irn_n(irn, 1, addr_i);
740 add_ia32_am_offs(irn, get_ia32_am_offs(load));
741 set_ia32_am_scale(irn, get_ia32_am_scale(load));
742 set_ia32_am_flavour(irn, get_ia32_am_flavour(load));
743 set_ia32_op_type(irn, ia32_AddrModeD);
745 /* connect to Load memory and disconnect Load */
746 if (get_irn_arity(irn) == 5) {
748 set_irn_n(irn, 4, get_irn_n(load, 2));
749 set_irn_n(irn, 3, noreg_gp);
753 set_irn_n(irn, 3, get_irn_n(load, 2));
754 set_irn_n(irn, 2, noreg_gp);
757 /* connect the memory Proj of the Store to the op */
758 mem_proj = get_mem_proj(store);
759 set_Proj_pred(mem_proj, irn);
760 set_Proj_proj(mem_proj, 1);
763 else if (get_ia32_am_support(irn) & ia32_am_Source) {
764 /* There was no store, check if we still can optimize for source address mode */
767 } /* if (support AM Dest) */
768 else if (get_ia32_am_support(irn) & ia32_am_Source) {
769 /* op doesn't support am AM Dest -> check for AM Source */
773 /* normalize commutative ops */
774 if (node_is_comm(irn)) {
775 /* Assure that left operand is always a Load if there is one */
776 /* because non-commutative ops can only use Source AM if the */
777 /* left operand is a Load, so we only need to check the left */
778 /* operand afterwards. */
779 if (pred_is_specific_nodeblock(block, right, is_ia32_Ld)) {
780 set_irn_n(irn, 2, right);
781 set_irn_n(irn, 3, left);
789 /* optimize op -> Load iff Load is only used by this op */
790 /* and left operand is a Load which only used by this irn */
792 pred_is_specific_nodeblock(block, left, is_ia32_Ld) &&
793 (ia32_get_irn_n_edges(left) == 1))
795 left = get_Proj_pred(left);
797 addr_b = get_irn_n(left, 0);
798 addr_i = get_irn_n(left, 1);
800 /* set new base, index and attributes */
801 set_irn_n(irn, 0, addr_b);
802 set_irn_n(irn, 1, addr_i);
803 add_ia32_am_offs(irn, get_ia32_am_offs(left));
804 set_ia32_am_scale(irn, get_ia32_am_scale(left));
805 set_ia32_am_flavour(irn, get_ia32_am_flavour(left));
806 set_ia32_op_type(irn, ia32_AddrModeS);
808 /* connect to Load memory */
809 if (get_irn_arity(irn) == 5) {
811 set_irn_n(irn, 4, get_irn_n(left, 2));
815 set_irn_n(irn, 3, get_irn_n(left, 2));
818 /* disconnect from Load */
819 set_irn_n(irn, 2, noreg_gp);
821 /* If Load has a memory Proj, connect it to the op */
822 mem_proj = get_mem_proj(left);
824 set_Proj_pred(mem_proj, irn);
825 set_Proj_proj(mem_proj, 1);