nsz Git - libfirm/blob - ir/be/ia32/ia32_optimize.c

   1 #ifdef HAVE_CONFIG_H
   2 #include "config.h"
   3 #endif
   4
   5 #include "irnode.h"
   6 #include "irprog_t.h"
   7 #include "ircons.h"
   8 #include "firm_types.h"
   9 #include "iredges.h"
  10 #include "tv.h"
  11 #include "irgmod.h"
  12
  13 #include "../be_t.h"
  14 #include "../beabi.h"
  15
  16 #include "ia32_new_nodes.h"
  17 #include "bearch_ia32_t.h"
  18 #include "gen_ia32_regalloc_if.h"     /* the generated interface (register type and class defenitions) */
  19
  20 #undef is_NoMem
  21 #define is_NoMem(irn) (get_irn_op(irn) == op_NoMem)
  22
  23 static int be_is_NoReg(be_abi_irg_t *babi, const ir_node *irn) {
  24         if (be_abi_get_callee_save_irn(babi, &ia32_gp_regs[REG_XXX]) == irn ||
  25                 be_abi_get_callee_save_irn(babi, &ia32_fp_regs[REG_XXXX]) == irn)
  26         {
  27                 return 1;
  28         }
  29
  30         return 0;
  31 }
  32
  33 /**
  34  * creates a unique ident by adding a number to a tag
  35  *
  36  * @param tag   the tag string, must contain a %d if a number
  37  *              should be added
  38  */
  39 static ident *unique_id(const char *tag)
  40 {
  41         static unsigned id = 0;
  42         char str[256];
  43
  44         snprintf(str, sizeof(str), tag, ++id);
  45         return new_id_from_str(str);
  46 }
  47
  48
  49
  50 /**
  51  * Transforms a SymConst.
  52  *
  53  * @param mod     the debug module
  54  * @param block   the block the new node should belong to
  55  * @param node    the ir SymConst node
  56  * @param mode    mode of the SymConst
  57  * @return the created ia32 Const node
  58  */
  59 static ir_node *gen_SymConst(ia32_transform_env_t *env) {
  60         ir_node  *cnst;
  61         dbg_info *dbg   = env->dbg;
  62         ir_mode  *mode  = env->mode;
  63         ir_graph *irg   = env->irg;
  64         ir_node  *block = env->block;
  65
  66         cnst = new_rd_ia32_Const(dbg, irg, block, mode);
  67         set_ia32_Const_attr(cnst, env->irn);
  68         return cnst;
  69 }
  70
  71 /**
  72  * Get a primitive type for a mode.
  73  */
  74 static ir_type *get_prim_type(pmap *types, ir_mode *mode)
  75 {
  76         pmap_entry *e = pmap_find(types, mode);
  77         ir_type *res;
  78
  79         if (! e) {
  80                 char buf[64];
  81                 snprintf(buf, sizeof(buf), "prim_type_%s", get_mode_name(mode));
  82                 res = new_type_primitive(new_id_from_str(buf), mode);
  83                 pmap_insert(types, mode, res);
  84         }
  85         else
  86                 res = e->value;
  87         return res;
  88 }
  89
  90 /**
  91  * Get an entity that is initialized with a tarval
  92  */
  93 static entity *get_entity_for_tv(ia32_code_gen_t *cg, ir_node *cnst)
  94 {
  95         tarval *tv    = get_Const_tarval(cnst);
  96         pmap_entry *e = pmap_find(cg->tv_ent, tv);
  97         entity *res;
  98         ir_graph *rem;
  99
 100         if (! e) {
 101                 ir_mode *mode = get_irn_mode(cnst);
 102                 ir_type *tp = get_Const_type(cnst);
 103                 if (tp == firm_unknown_type)
 104                         tp = get_prim_type(cg->types, mode);
 105
 106                 res = new_entity(get_glob_type(), unique_id("ia32FloatCnst_%u"), tp);
 107
 108                 set_entity_ld_ident(res, get_entity_ident(res));
 109                 set_entity_visibility(res, visibility_local);
 110                 set_entity_variability(res, variability_constant);
 111                 set_entity_allocation(res, allocation_static);
 112
 113                  /* we create a new entity here: It's initialization must resist on the
 114                     const code irg */
 115                 rem = current_ir_graph;
 116                 current_ir_graph = get_const_code_irg();
 117                 set_atomic_ent_value(res, new_Const_type(tv, tp));
 118                 current_ir_graph = rem;
 119         }
 120         else
 121                 res = e->value;
 122         return res;
 123 }
 124
 125 /**
 126  * Transforms a Const.
 127  *
 128  * @param mod     the debug module
 129  * @param block   the block the new node should belong to
 130  * @param node    the ir Const node
 131  * @param mode    mode of the Const
 132  * @return the created ia32 Const node
 133  */
 134 static ir_node *gen_Const(ia32_transform_env_t *env) {
 135         ir_node *cnst;
 136         symconst_symbol sym;
 137         ir_graph *irg   = env->irg;
 138         ir_node  *block = env->block;
 139         ir_node  *node  = env->irn;
 140         dbg_info *dbg   = env->dbg;
 141         ir_mode  *mode  = env->mode;
 142
 143         if (mode_is_float(mode)) {
 144                 sym.entity_p = get_entity_for_tv(env->cg, node);
 145
 146                 cnst = new_rd_SymConst(dbg, irg, block, sym, symconst_addr_ent);
 147                 env->irn = cnst;
 148                 cnst = gen_SymConst(env);
 149         }
 150         else {
 151                 cnst = new_rd_ia32_Const(dbg, irg, block, get_irn_mode(node));
 152                 set_ia32_Const_attr(cnst, node);
 153         }
 154         return cnst;
 155 }
 156
 157
 158
 159 /**
 160  * Transforms (all) Const's into ia32_Const and places them in the
 161  * block where they are used (or in the cfg-pred Block in case of Phi's)
 162  */
 163 void ia32_place_consts(ir_node *irn, void *env) {
 164         ia32_code_gen_t      *cg = env;
 165         ia32_transform_env_t  tenv;
 166         ir_mode              *mode;
 167         ir_node              *pred, *cnst;
 168         int                   i;
 169         opcode                opc;
 170
 171         if (is_Block(irn))
 172                 return;
 173
 174         mode = get_irn_mode(irn);
 175
 176         tenv.block    = get_nodes_block(irn);
 177         tenv.cg       = cg;
 178         tenv.irg      = cg->irg;
 179         tenv.mod      = cg->mod;
 180
 181         /* Loop over all predecessors and check for Sym/Const nodes */
 182         for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
 183                 pred      = get_irn_n(irn, i);
 184                 cnst      = NULL;
 185                 opc       = get_irn_opcode(pred);
 186                 tenv.irn  = pred;
 187                 tenv.mode = get_irn_mode(pred);
 188                 tenv.dbg  = get_irn_dbg_info(pred);
 189
 190                 /* If it's a Phi, then we need to create the */
 191                 /* new Const in it's predecessor block       */
 192                 if (is_Phi(irn)) {
 193                         tenv.block = get_Block_cfgpred_block(get_nodes_block(irn), i);
 194                 }
 195
 196                 switch (opc) {
 197                         case iro_Const:
 198                                 cnst = gen_Const(&tenv);
 199                                 break;
 200                         case iro_SymConst:
 201                                 cnst = gen_SymConst(&tenv);
 202                                 break;
 203                         default:
 204                                 break;
 205                 }
 206
 207                 /* if we found a const, then set it */
 208                 if (cnst) {
 209                         set_irn_n(irn, i, cnst);
 210                 }
 211         }
 212 }
 213
 214
 215 /******************************************************************
 216  *              _     _                   __  __           _
 217  *     /\      | |   | |                 |  \/  |         | |
 218  *    /  \   __| | __| |_ __ ___  ___ ___| \  / | ___   __| | ___
 219  *   / /\ \ / _` |/ _` | '__/ _ \/ __/ __| |\/| |/ _ \ / _` |/ _ \
 220  *  / ____ \ (_| | (_| | | |  __/\__ \__ \ |  | | (_) | (_| |  __/
 221  * /_/    \_\__,_|\__,_|_|  \___||___/___/_|  |_|\___/ \__,_|\___|
 222  *
 223  ******************************************************************/
 224
 225 static int node_is_comm(const ir_node *irn) {
 226         return is_ia32_irn(irn) ? is_ia32_commutative(irn) : 0;
 227 }
 228
 229 static int ia32_get_irn_n_edges(const ir_node *irn) {
 230         const ir_edge_t *edge;
 231         int cnt = 0;
 232
 233         foreach_out_edge(irn, edge) {
 234                 cnt++;
 235         }
 236
 237         return cnt;
 238 }
 239
 240 /**
 241  * Returns the first mode_M Proj connected to irn.
 242  */
 243 static ir_node *get_mem_proj(const ir_node *irn) {
 244         const ir_edge_t *edge;
 245         ir_node         *src;
 246
 247         assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
 248
 249         foreach_out_edge(irn, edge) {
 250                 src = get_edge_src_irn(edge);
 251
 252                 assert(is_Proj(src) && "Proj expected");
 253
 254                 if (get_irn_mode(src) == mode_M)
 255                         return src;
 256         }
 257
 258         return NULL;
 259 }
 260
 261 /**
 262  * Returns the Proj with number 0 connected to irn.
 263  */
 264 static ir_node *get_res_proj(const ir_node *irn) {
 265         const ir_edge_t *edge;
 266         ir_node         *src;
 267
 268         assert(get_irn_mode(irn) == mode_T && "expected mode_T node");
 269
 270         foreach_out_edge(irn, edge) {
 271                 src = get_edge_src_irn(edge);
 272
 273                 assert(is_Proj(src) && "Proj expected");
 274
 275                 if (get_Proj_proj(src) == 0)
 276                         return src;
 277         }
 278
 279         return NULL;
 280 }
 281
 282 /**
 283  * Determines if pred is a Proj and if is_op_func returns true for it's predecessor.
 284  *
 285  * @param pred       The node to be checked
 286  * @param is_op_func The check-function
 287  * @return 1 if conditions are fulfilled, 0 otherwise
 288  */
 289 static int pred_is_specific_node(const ir_node *pred, int (*is_op_func)(const ir_node *n)) {
 290         if (is_Proj(pred) && is_op_func(get_Proj_pred(pred))) {
 291                 return 1;
 292         }
 293
 294         return 0;
 295 }
 296
 297 /**
 298  * Determines if pred is a Proj and if is_op_func returns true for it's predecessor
 299  * and if the predecessor is in block bl.
 300  *
 301  * @param bl         The block
 302  * @param pred       The node to be checked
 303  * @param is_op_func The check-function
 304  * @return 1 if conditions are fulfilled, 0 otherwise
 305  */
 306 static int pred_is_specific_nodeblock(const ir_node *bl, const ir_node *pred,
 307         int (*is_op_func)(const ir_node *n))
 308 {
 309         if (is_Proj(pred)) {
 310                 pred = get_Proj_pred(pred);
 311                 if ((bl == get_nodes_block(pred)) && is_op_func(pred)) {
 312                         return 1;
 313                 }
 314         }
 315
 316         return 0;
 317 }
 318
 319 /**
 320  * Folds Add or Sub to LEA if possible
 321  */
 322 static ir_node *fold_addr(be_abi_irg_t *babi, ir_node *irn, firm_dbg_module_t *mod, ir_node *noreg) {
 323         ir_graph *irg       = get_irn_irg(irn);
 324         ir_mode  *mode      = get_irn_mode(irn);
 325         dbg_info *dbg       = get_irn_dbg_info(irn);
 326         ir_node  *block     = get_nodes_block(irn);
 327         ir_node  *res       = irn;
 328         char     *offs      = NULL;
 329         char     *offs_cnst = NULL;
 330         char     *offs_lea  = NULL;
 331         int       scale     = 0;
 332         int       isadd     = 0;
 333         int       dolea     = 0;
 334         ir_node  *left, *right, *temp;
 335         ir_node  *base, *index;
 336         ia32_am_flavour_t am_flav;
 337
 338         if (is_ia32_Add(irn))
 339                 isadd = 1;
 340
 341         left  = get_irn_n(irn, 2);
 342         right = get_irn_n(irn, 3);
 343
 344         base    = left;
 345         index   = noreg;
 346         offs    = NULL;
 347         scale   = 0;
 348         am_flav = 0;
 349
 350         /* "normalize" arguments in case of add with two operands */
 351         if  (isadd && ! be_is_NoReg(babi, right)) {
 352                 /* put LEA == ia32_am_O as right operand */
 353                 if (is_ia32_Lea(left) && get_ia32_am_flavour(left) == ia32_am_O) {
 354                         set_irn_n(irn, 2, right);
 355                         set_irn_n(irn, 3, left);
 356                         temp  = left;
 357                         left  = right;
 358                         right = temp;
 359                 }
 360
 361                 /* put LEA != ia32_am_O as left operand */
 362                 if (is_ia32_Lea(right) && get_ia32_am_flavour(right) != ia32_am_O) {
 363                         set_irn_n(irn, 2, right);
 364                         set_irn_n(irn, 3, left);
 365                         temp  = left;
 366                         left  = right;
 367                         right = temp;
 368                 }
 369
 370                 /* put SHL as left operand iff left is NOT a LEA */
 371                 if (! is_ia32_Lea(left) && pred_is_specific_node(right, is_ia32_Shl)) {
 372                         set_irn_n(irn, 2, right);
 373                         set_irn_n(irn, 3, left);
 374                         temp  = left;
 375                         left  = right;
 376                         right = temp;
 377                 }
 378         }
 379
 380         /* check if operand is either const */
 381         if (get_ia32_cnst(irn)) {
 382                 DBG((mod, LEVEL_1, "\tfound op with imm"));
 383
 384                 offs_cnst = get_ia32_cnst(irn);
 385                 dolea     = 1;
 386         }
 387
 388         /* determine the operand which needs to be checked */
 389         if (be_is_NoReg(babi, right)) {
 390                 temp = left;
 391         }
 392         else {
 393                 temp = right;
 394         }
 395
 396         /* check if right operand is AMConst (LEA with ia32_am_O) */
 397         if (is_ia32_Lea(temp) && get_ia32_am_flavour(temp) == ia32_am_O) {
 398                 DBG((mod, LEVEL_1, "\tgot op with LEA am_O"));
 399
 400                 offs_lea = get_ia32_am_offs(temp);
 401                 dolea    = 1;
 402         }
 403
 404         if (isadd) {
 405                 /* default for add -> make right operand to index */
 406                 index = right;
 407                 dolea = 1;
 408
 409                 DBG((mod, LEVEL_1, "\tgot LEA candidate with index %+F\n", index));
 410
 411                 /* determine the operand which needs to be checked */
 412                 temp = left;
 413                 if (is_ia32_Lea(left)) {
 414                         temp = right;
 415                 }
 416
 417                 /* check for SHL 1,2,3 */
 418                 if (pred_is_specific_node(temp, is_ia32_Shl)) {
 419                         temp = get_Proj_pred(temp);
 420
 421                         if (get_ia32_Immop_tarval(temp)) {
 422                                 scale = get_tarval_long(get_ia32_Immop_tarval(temp));
 423
 424                                 if (scale <= 3) {
 425                                         index = get_irn_n(temp, 2);
 426
 427                                         DBG((mod, LEVEL_1, "\tgot scaled index %+F\n", index));
 428                                 }
 429                         }
 430                 }
 431
 432                 /* fix base */
 433                 if (! be_is_NoReg(babi, index)) {
 434                         /* if we have index, but left == right -> no base */
 435                         if (left == right) {
 436                                 base = noreg;
 437                         }
 438                         else if (! is_ia32_Lea(left) && (index != right)) {
 439                                 /* index != right -> we found a good Shl           */
 440                                 /* left  != LEA   -> this Shl was the left operand */
 441                                 /* -> base is right operand                        */
 442                                 base = right;
 443                         }
 444                 }
 445         }
 446
 447         /* Try to assimilate a LEA as left operand */
 448         if (is_ia32_Lea(left) && (get_ia32_am_flavour(left) != ia32_am_O)) {
 449                 am_flav = get_ia32_am_flavour(left);
 450
 451                 /* If we have an Add with a real right operand (not NoReg) and  */
 452                 /* the LEA contains already an index calculation then we create */
 453                 /* a new LEA.                                                   */
 454                 if (isadd && !be_is_NoReg(babi, index) && (am_flav & ia32_am_I)) {
 455                         DBG((mod, LEVEL_1, "\tleave old LEA, creating new one\n"));
 456                 }
 457                 else {
 458                         DBG((mod, LEVEL_1, "\tgot LEA as left operand ... assimilating\n"));
 459                         offs  = get_ia32_am_offs(left);
 460                         base  = get_irn_n(left, 0);
 461                         index = get_irn_n(left, 1);
 462                         scale = get_ia32_am_scale(left);
 463                 }
 464         }
 465
 466         /* ok, we can create a new LEA */
 467         if (dolea) {
 468                 res = new_rd_ia32_Lea(dbg, irg, block, base, index, mode_Is);
 469
 470                 /* add the old offset of a previous LEA */
 471                 if (offs) {
 472                         add_ia32_am_offs(res, offs);
 473                 }
 474
 475                 /* add the new offset */
 476                 if (isadd) {
 477                         if (offs_cnst) {
 478                                 add_ia32_am_offs(res, offs_cnst);
 479                         }
 480                         if (offs_lea) {
 481                                 add_ia32_am_offs(res, offs_lea);
 482                         }
 483                 }
 484                 else {
 485                         /* either lea_O-cnst, -cnst or -lea_O  */
 486                         if (offs_cnst) {
 487                                 if (offs_lea) {
 488                                         add_ia32_am_offs(res, offs_lea);
 489                                 }
 490
 491                                 sub_ia32_am_offs(res, offs_cnst);
 492                         }
 493                         else {
 494                                 sub_ia32_am_offs(res, offs_lea);
 495                         }
 496                 }
 497
 498                 /* set scale */
 499                 set_ia32_am_scale(res, scale);
 500
 501                 am_flav = ia32_am_N;
 502                 /* determine new am flavour */
 503                 if (offs || offs_cnst || offs_lea) {
 504                         am_flav |= ia32_O;
 505                 }
 506                 if (! be_is_NoReg(babi, base)) {
 507                         am_flav |= ia32_B;
 508                 }
 509                 if (! be_is_NoReg(babi, index)) {
 510                         am_flav |= ia32_I;
 511                 }
 512                 if (scale > 0) {
 513                         am_flav |= ia32_S;
 514                 }
 515                 set_ia32_am_flavour(res, am_flav);
 516
 517                 set_ia32_op_type(res, ia32_AddrModeS);
 518
 519                 DBG((mod, LEVEL_1, "\tLEA [%+F + %+F * %d + %s]\n", base, index, scale, get_ia32_am_offs(res)));
 520
 521                 /* get the result Proj of the Add/Sub */
 522                 irn = get_res_proj(irn);
 523
 524                 assert(irn && "Couldn't find result proj");
 525
 526                 /* exchange the old op with the new LEA */
 527                 exchange(irn, res);
 528         }
 529
 530         return res;
 531 }
 532
 533 /**
 534  * Optimizes a pattern around irn to address mode if possible.
 535  */
 536 void ia32_optimize_am(ir_node *irn, void *env) {
 537         ia32_code_gen_t   *cg   = env;
 538         ir_graph          *irg  = cg->irg;
 539         firm_dbg_module_t *mod  = cg->mod;
 540         ir_node           *res  = irn;
 541         be_abi_irg_t      *babi = cg->birg->abi;
 542         dbg_info          *dbg;
 543         ir_mode           *mode;
 544         ir_node           *block, *noreg_gp, *noreg_fp;
 545         ir_node           *left, *right, *temp;
 546         ir_node           *store, *load, *mem_proj;
 547         ir_node           *succ, *addr_b, *addr_i;
 548         int                check_am_src = 0;
 549
 550         if (! is_ia32_irn(irn))
 551                 return;
 552
 553         dbg      = get_irn_dbg_info(irn);
 554         mode     = get_irn_mode(irn);
 555         block    = get_nodes_block(irn);
 556         noreg_gp = ia32_new_NoReg_gp(cg);
 557         noreg_fp = ia32_new_NoReg_fp(cg);
 558
 559         DBG((mod, LEVEL_1, "checking for AM\n"));
 560
 561         /* 1st part: check for address calculations and transform the into Lea */
 562
 563         /* Following cases can occur:                                  */
 564         /* - Sub (l, imm) -> LEA [base - offset]                       */
 565         /* - Sub (l, r == LEA with ia32_am_O)   -> LEA [base - offset] */
 566         /* - Add (l, imm) -> LEA [base + offset]                       */
 567         /* - Add (l, r == LEA with ia32_am_O)  -> LEA [base + offset]  */
 568         /* - Add (l == LEA with ia32_am_O, r)  -> LEA [base + offset]  */
 569         /* - Add (l, r) -> LEA [base + index * scale]                  */
 570         /*              with scale > 1 iff l/r == shl (1,2,3)          */
 571
 572         if (is_ia32_Sub(irn) || is_ia32_Add(irn)) {
 573                 left  = get_irn_n(irn, 2);
 574                 right = get_irn_n(irn, 3);
 575
 576             /* Do not try to create a LEA if one of the operands is a Load. */
 577                 if (! pred_is_specific_nodeblock(block, left,  is_ia32_Load)  &&
 578                         ! pred_is_specific_nodeblock(block, right, is_ia32_Load))
 579                 {
 580                         res = fold_addr(babi, irn, mod, noreg_gp);
 581                 }
 582         }
 583
 584         /* 2nd part: fold following patterns:                                               */
 585         /* - Load  -> LEA into Load  } TODO: If the LEA is used by more than one Load/Store */
 586         /* - Store -> LEA into Store }       it might be better to keep the LEA             */
 587         /* - op -> Load into AMop with am_Source                                            */
 588         /*   conditions:                                                                    */
 589         /*     - op is am_Source capable AND                                                */
 590         /*     - the Load is only used by this op AND                                       */
 591         /*     - the Load is in the same block                                              */
 592         /* - Store -> op -> Load  into AMop with am_Dest                                    */
 593         /*   conditions:                                                                    */
 594         /*     - op is am_Dest capable AND                                                  */
 595         /*     - the Store uses the same address as the Load AND                            */
 596         /*     - the Load is only used by this op AND                                       */
 597         /*     - the Load and Store are in the same block AND                               */
 598         /*     - nobody else uses the result of the op                                      */
 599
 600         if ((res == irn) && (get_ia32_am_support(irn) != ia32_am_None) && !is_ia32_Lea(irn)) {
 601                 /* 1st: check for Load/Store -> LEA   */
 602                 if (is_ia32_Ld(irn) || is_ia32_St(irn)) {
 603                         left = get_irn_n(irn, 0);
 604
 605                         if (is_ia32_Lea(left)) {
 606                                 /* get the AM attributes from the LEA */
 607                                 add_ia32_am_offs(irn, get_ia32_am_offs(left));
 608                                 set_ia32_am_scale(irn, get_ia32_am_scale(left));
 609                                 set_ia32_am_flavour(irn, get_ia32_am_flavour(left));
 610
 611                                 set_ia32_op_type(irn, is_ia32_St(irn) ? ia32_AddrModeD : ia32_AddrModeS);
 612
 613                                 /* set base and index */
 614                                 set_irn_n(irn, 0, get_irn_n(left, 0));
 615                                 set_irn_n(irn, 1, get_irn_n(left, 1));
 616                         }
 617                 }
 618                 /* check if at least one operand is a Load */
 619                 else if (pred_is_specific_nodeblock(block, get_irn_n(irn, 2), is_ia32_Ld) ||
 620                                  pred_is_specific_nodeblock(block, get_irn_n(irn, 3), is_ia32_Ld))
 621                 {
 622                         left  = get_irn_n(irn, 2);
 623                         if (get_irn_arity(irn) == 4) {
 624                                 /* it's an "unary" operation */
 625                                 right = left;
 626                         }
 627                         else {
 628                                 right = get_irn_n(irn, 3);
 629                         }
 630
 631                         /* normalize commutative ops */
 632                         if (node_is_comm(irn)) {
 633                                 /* Assure that right operand is always a Load if there is one    */
 634                                 /* because non-commutative ops can only use Dest AM if the right */
 635                                 /* operand is a load, so we only need to check right operand.    */
 636                                 if (pred_is_specific_nodeblock(block, left, is_ia32_Ld))
 637                                 {
 638                                         set_irn_n(irn, 2, right);
 639                                         set_irn_n(irn, 3, left);
 640
 641                                         temp  = left;
 642                                         left  = right;
 643                                         right = temp;
 644                                 }
 645                         }
 646
 647                         /* check for Store -> op -> Load */
 648
 649                         /* Store -> op -> Load optimization is only possible if supported by op */
 650                         /* and if right operand is a Load                                       */
 651                         if ((get_ia32_am_support(irn) & ia32_am_Dest) &&
 652                                  pred_is_specific_nodeblock(block, right, is_ia32_Ld))
 653                         {
 654
 655                                 /* An address mode capable op always has a result Proj.                  */
 656                                 /* If this Proj is used by more than one other node, we don't need to    */
 657                                 /* check further, otherwise we check for Store and remember the address, */
 658                                 /* the Store points to. */
 659
 660                                 succ = get_res_proj(irn);
 661                                 assert(succ && "Couldn't find result proj");
 662
 663                                 addr_b = NULL;
 664                                 addr_i = NULL;
 665                                 store  = NULL;
 666
 667                                 /* now check for users and Store */
 668                                 if (ia32_get_irn_n_edges(succ) == 1) {
 669                                         succ = get_edge_src_irn(get_irn_out_edge_first(succ));
 670
 671                                         if (is_ia32_fStore(succ) || is_ia32_Store(succ)) {
 672                                                 store  = succ;
 673                                                 addr_b = get_irn_n(store, 0);
 674
 675                                                 /* Could be that the Store is connected to the address    */
 676                                                 /* calculating LEA while the Load is already transformed. */
 677                                                 if (is_ia32_Lea(addr_b)) {
 678                                                         succ   = addr_b;
 679                                                         addr_b = get_irn_n(succ, 0);
 680                                                         addr_i = get_irn_n(succ, 1);
 681                                                 }
 682                                                 else {
 683                                                         addr_i = noreg_gp;
 684                                                 }
 685                                         }
 686                                 }
 687
 688                                 if (store) {
 689                                         /* we found a Store as single user: Now check for Load */
 690
 691                                         /* Extra check for commutative ops with two Loads */
 692                                         /* -> put the interesting Load right              */
 693                                         if (node_is_comm(irn) &&
 694                                                 pred_is_specific_nodeblock(block, left, is_ia32_Ld))
 695                                         {
 696                                                 if ((addr_b == get_irn_n(get_Proj_pred(left), 0)) &&
 697                                                         (addr_i == get_irn_n(get_Proj_pred(left), 1)))
 698                                                 {
 699                                                         /* We exchange left and right, so it's easier to kill     */
 700                                                         /* the correct Load later and to handle unary operations. */
 701                                                         set_irn_n(irn, 2, right);
 702                                                         set_irn_n(irn, 3, left);
 703
 704                                                         temp  = left;
 705                                                         left  = right;
 706                                                         right = temp;
 707                                                 }
 708                                         }
 709
 710                                         /* skip the Proj for easier access */
 711                                         load = get_Proj_pred(right);
 712
 713                                         /* Compare Load and Store address */
 714                                         if ((addr_b == get_irn_n(load, 0)) && (addr_i == get_irn_n(load, 1)))
 715                                         {
 716                                                 /* Right Load is from same address, so we can */
 717                                                 /* disconnect the Load and Store here        */
 718
 719                                                 /* set new base, index and attributes */
 720                                                 set_irn_n(irn, 0, addr_b);
 721                                                 set_irn_n(irn, 1, addr_i);
 722                                                 add_ia32_am_offs(irn, get_ia32_am_offs(load));
 723                                                 set_ia32_am_scale(irn, get_ia32_am_scale(load));
 724                                                 set_ia32_am_flavour(irn, get_ia32_am_flavour(load));
 725                                                 set_ia32_op_type(irn, ia32_AddrModeD);
 726
 727                                                 /* connect to Load memory and disconnect Load */
 728                                                 if (get_irn_arity(irn) == 5) {
 729                                                         /* binary AMop */
 730                                                         set_irn_n(irn, 4, get_irn_n(load, 2));
 731                                                         set_irn_n(irn, 3, noreg_gp);
 732                                                 }
 733                                                 else {
 734                                                         /* unary AMop */
 735                                                         set_irn_n(irn, 3, get_irn_n(load, 2));
 736                                                         set_irn_n(irn, 2, noreg_gp);
 737                                                 }
 738
 739                                                 /* connect the memory Proj of the Store to the op */
 740                                                 mem_proj = get_mem_proj(store);
 741                                                 set_Proj_pred(mem_proj, irn);
 742                                                 set_Proj_proj(mem_proj, 1);
 743                                         }
 744                                 } /* if (store) */
 745                                 else if (get_ia32_am_support(irn) & ia32_am_Source) {
 746                                         /* There was no store, check if we still can optimize for source address mode */
 747                                         check_am_src = 1;
 748                                 }
 749                         } /* if (support AM Dest) */
 750                         else if (get_ia32_am_support(irn) & ia32_am_Source) {
 751                                 /* op doesn't support am AM Dest -> check for AM Source */
 752                                 check_am_src = 1;
 753                         }
 754
 755                         /* normalize commutative ops */
 756                         if (node_is_comm(irn)) {
 757                                 /* Assure that left operand is always a Load if there is one */
 758                                 /* because non-commutative ops can only use Source AM if the */
 759                                 /* left operand is a Load, so we only need to check the left */
 760                                 /* operand afterwards.                                       */
 761                                 if (pred_is_specific_nodeblock(block, right, is_ia32_Ld))       {
 762                                         set_irn_n(irn, 2, right);
 763                                         set_irn_n(irn, 3, left);
 764
 765                                         temp  = left;
 766                                         left  = right;
 767                                         right = temp;
 768                                 }
 769                         }
 770
 771                         /* optimize op -> Load iff Load is only used by this op   */
 772                         /* and left operand is a Load which only used by this irn */
 773                         if (check_am_src                                        &&
 774                                 pred_is_specific_nodeblock(block, left, is_ia32_Ld) &&
 775                                 (ia32_get_irn_n_edges(left) == 1))
 776                         {
 777                                 left = get_Proj_pred(left);
 778
 779                                 addr_b = get_irn_n(left, 0);
 780                                 addr_i = get_irn_n(left, 1);
 781
 782                                 /* set new base, index and attributes */
 783                                 set_irn_n(irn, 0, addr_b);
 784                                 set_irn_n(irn, 1, addr_i);
 785                                 add_ia32_am_offs(irn, get_ia32_am_offs(left));
 786                                 set_ia32_am_scale(irn, get_ia32_am_scale(left));
 787                                 set_ia32_am_flavour(irn, get_ia32_am_flavour(left));
 788                                 set_ia32_op_type(irn, ia32_AddrModeS);
 789
 790                                 /* connect to Load memory */
 791                                 if (get_irn_arity(irn) == 5) {
 792                                         /* binary AMop */
 793                                         set_irn_n(irn, 4, get_irn_n(left, 2));
 794                                 }
 795                                 else {
 796                                         /* unary AMop */
 797                                         set_irn_n(irn, 3, get_irn_n(left, 2));
 798                                 }
 799
 800                                 /* disconnect from Load */
 801                                 set_irn_n(irn, 2, noreg_gp);
 802
 803                                 /* If Load has a memory Proj, connect it to the op */
 804                                 mem_proj = get_mem_proj(left);
 805                                 if (mem_proj) {
 806                                         set_Proj_pred(mem_proj, irn);
 807                                         set_Proj_proj(mem_proj, 1);
 808                                 }
 809                         }
 810                 }
 811         }
 812 }