2 * This file implements the creation of the achitecture specific firm opcodes
3 * and the coresponding node constructors for the ia32 assembler irg.
4 * @author Christian Wuerdig
22 #include "irgraph_t.h"
28 #include "firm_common_t.h"
33 #include "raw_bitset.h"
35 #include "../bearch.h"
37 #include "ia32_nodes_attr.h"
38 #include "ia32_new_nodes.h"
39 #include "gen_ia32_regalloc_if.h"
40 #include "gen_ia32_machine.h"
43 * Returns the ident of an entity
44 * @param ent The entity
45 * @return The ident of the entity
47 ident *ia32_get_ent_ident(ir_entity *ent) {
48 ir_type *owner = get_entity_owner(ent);
49 ident *id = get_entity_ld_ident(ent);
51 if (owner == get_tls_type()) {
52 if (get_entity_visibility(ent) == visibility_external_allocated)
53 id = mangle(id, new_id_from_chars("@INDNTPOFF", 10));
55 id = mangle(id, new_id_from_chars("@NTPOFF", 7));
61 * Returns the ident of a SymConst.
62 * @param symc The SymConst
63 * @return The ident of the SymConst
65 static ident *get_sc_ident(ir_node *symc) {
66 switch (get_SymConst_kind(symc)) {
67 case symconst_addr_name:
68 return get_SymConst_name(symc);
70 case symconst_addr_ent:
71 return ia32_get_ent_ident(get_SymConst_entity(symc));
74 assert(0 && "Unsupported SymConst");
81 * returns true if a node has x87 registers
83 int ia32_has_x87_register(const ir_node *n) {
84 assert(is_ia32_irn(n) && "Need ia32 node.");
85 return is_irn_machine_user(n, 0);
88 /***********************************************************************************
91 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
92 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
93 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
94 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
97 ***********************************************************************************/
100 * Dumps the register requirements for either in or out.
102 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
104 char *dir = inout ? "out" : "in";
105 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
109 memset(buf, 0, sizeof(buf));
112 for (i = 0; i < max; i++) {
113 fprintf(F, "%sreq #%d =", dir, i);
115 if (reqs[i]->type == arch_register_req_type_none) {
119 if (reqs[i]->type & arch_register_req_type_normal) {
120 fprintf(F, " %s", reqs[i]->cls->name);
123 if (reqs[i]->type & arch_register_req_type_limited) {
125 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
128 if (reqs[i]->type & arch_register_req_type_should_be_same) {
129 ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same));
132 if (reqs[i]->type & arch_register_req_type_should_be_different) {
133 ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different));
142 fprintf(F, "%sreq = N/A\n", dir);
147 * Dumper interface for dumping ia32 nodes in vcg.
148 * @param n the node to dump
149 * @param F the output file
150 * @param reason indicates which kind of information should be dumped
151 * @return 0 on success or != 0 on failure
153 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
154 ir_mode *mode = NULL;
156 int i, n_res, am_flav, flags;
157 const arch_register_req_t **reqs;
158 const arch_register_t **slots;
161 case dump_node_opcode_txt:
162 fprintf(F, "%s", get_irn_opname(n));
165 case dump_node_mode_txt:
166 mode = get_irn_mode(n);
168 if (is_ia32_Ld(n) || is_ia32_St(n)) {
169 mode = get_ia32_ls_mode(n);
172 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
175 case dump_node_nodeattr_txt:
176 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
177 if(is_ia32_ImmSymConst(n)) {
178 ident *id = get_ia32_Immop_symconst(n);
179 fprintf(F, "[SymC %s]", get_id_str(id));
182 tarval *tv = get_ia32_Immop_tarval(n);
184 tarval_snprintf(buf, sizeof(buf), tv);
185 fprintf(F, "[%s]", buf);
189 if (! is_ia32_Lea(n)) {
190 if (is_ia32_AddrModeS(n)) {
191 fprintf(F, "[AM S] ");
193 else if (is_ia32_AddrModeD(n)) {
194 fprintf(F, "[AM D] ");
200 case dump_node_info_txt:
201 n_res = get_ia32_n_res(n);
202 fprintf(F, "=== IA32 attr begin ===\n");
204 /* dump IN requirements */
205 if (get_irn_arity(n) > 0) {
206 reqs = get_ia32_in_req_all(n);
207 dump_reg_req(F, n, reqs, 0);
210 /* dump OUT requirements */
212 reqs = get_ia32_out_req_all(n);
213 dump_reg_req(F, n, reqs, 1);
216 /* dump assigned registers */
217 slots = get_ia32_slots(n);
218 if (slots && n_res > 0) {
219 for (i = 0; i < n_res; i++) {
220 const arch_register_t *reg;
222 /* retrieve "real" x87 register */
223 if (ia32_has_x87_register(n))
224 reg = get_ia32_attr(n)->x87[i + 2];
228 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
235 switch (get_ia32_op_type(n)) {
237 fprintf(F, "Normal");
240 fprintf(F, "AM Dest (Load+Store)");
243 fprintf(F, "AM Source (Load)");
246 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
251 /* dump immop type */
252 fprintf(F, "immediate = ");
253 switch (get_ia32_immop_type(n)) {
260 case ia32_ImmSymConst:
261 fprintf(F, "SymConst");
264 fprintf(F, "unknown (%d)", get_ia32_immop_type(n));
269 /* dump supported am */
270 fprintf(F, "AM support = ");
271 switch (get_ia32_am_support(n)) {
276 fprintf(F, "source only (Load)");
279 fprintf(F, "dest only (Load+Store)");
285 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
290 /* dump am flavour */
291 fprintf(F, "AM flavour =");
292 am_flav = get_ia32_am_flavour(n);
293 if (am_flav == ia32_am_N) {
297 if (am_flav & ia32_O) {
300 if (am_flav & ia32_B) {
303 if (am_flav & ia32_I) {
306 if (am_flav & ia32_S) {
310 fprintf(F, " (%d)\n", am_flav);
313 if(get_ia32_am_offs_int(n) != 0) {
314 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
317 /* dump AM symconst */
318 if(get_ia32_am_sc(n) != NULL) {
319 fprintf(F, "AM symconst = %s\n", get_id_str(get_ia32_am_sc(n)));
323 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
326 if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) {
327 fprintf(F, "pn_code = %d (%s, unsigned)\n", get_ia32_pncode(n),
328 get_pnc_string(get_ia32_pncode(n) & ~ia32_pn_Cmp_Unsigned));
330 fprintf(F, "pn_code = %d (%s)\n", get_ia32_pncode(n),
331 get_pnc_string(get_ia32_pncode(n)));
335 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
338 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
341 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
344 fprintf(F, "emit cl instead of ecx = %d\n", is_ia32_emit_cl(n));
347 fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
350 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
353 fprintf(F, "latency = %d\n", get_ia32_latency(n));
356 fprintf(F, "flags =");
357 flags = get_ia32_flags(n);
358 if (flags == arch_irn_flags_none) {
362 if (flags & arch_irn_flags_dont_spill) {
363 fprintf(F, " unspillable");
365 if (flags & arch_irn_flags_rematerializable) {
366 fprintf(F, " remat");
368 if (flags & arch_irn_flags_ignore) {
369 fprintf(F, " ignore");
371 if (flags & arch_irn_flags_modify_sp) {
372 fprintf(F, " modify_sp");
375 fprintf(F, " (%d)\n", flags);
377 /* dump frame entity */
378 fprintf(F, "frame entity = ");
379 if (get_ia32_frame_ent(n)) {
380 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
388 fprintf(F, "ls_mode = ");
389 if (get_ia32_ls_mode(n)) {
390 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
398 /* dump original ir node name */
399 fprintf(F, "orig node = ");
400 if (get_ia32_orig_node(n)) {
401 fprintf(F, "%s", get_ia32_orig_node(n));
409 fprintf(F, "=== IA32 attr end ===\n");
410 /* end of: case dump_node_info_txt */
419 /***************************************************************************************************
421 * | | | | | | / / | | | | | | | |
422 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
423 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
424 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
425 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
428 ***************************************************************************************************/
431 * Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast.
432 * Firm was made by people hating const :-(
434 ia32_attr_t *get_ia32_attr(const ir_node *node) {
435 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
436 return (ia32_attr_t *)get_irn_generic_attr((ir_node *)node);
440 * Gets the type of an ia32 node.
442 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
443 ia32_attr_t *attr = get_ia32_attr(node);
444 return attr->data.tp;
448 * Sets the type of an ia32 node.
450 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
451 ia32_attr_t *attr = get_ia32_attr(node);
456 * Gets the immediate op type of an ia32 node.
458 ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
459 ia32_attr_t *attr = get_ia32_attr(node);
460 return attr->data.imm_tp;
464 * Gets the supported addrmode of an ia32 node
466 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
467 ia32_attr_t *attr = get_ia32_attr(node);
468 return attr->data.am_support;
472 * Sets the supported addrmode of an ia32 node
474 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) {
475 ia32_attr_t *attr = get_ia32_attr(node);
476 attr->data.am_support = am_tp;
480 * Gets the addrmode flavour of an ia32 node
482 ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) {
483 ia32_attr_t *attr = get_ia32_attr(node);
484 return attr->data.am_flavour;
488 * Sets the addrmode flavour of an ia32 node
490 void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) {
491 ia32_attr_t *attr = get_ia32_attr(node);
492 attr->data.am_flavour = am_flavour;
496 * Gets the addressmode offset as int.
498 int get_ia32_am_offs_int(const ir_node *node) {
499 ia32_attr_t *attr = get_ia32_attr(node);
500 return attr->am_offs;
504 * Sets the addressmode offset from an int.
506 void set_ia32_am_offs_int(ir_node *node, int offset) {
507 ia32_attr_t *attr = get_ia32_attr(node);
508 attr->am_offs = offset;
511 void add_ia32_am_offs_int(ir_node *node, int offset) {
512 ia32_attr_t *attr = get_ia32_attr(node);
513 attr->am_offs += offset;
517 * Returns the symconst ident associated to addrmode.
519 ident *get_ia32_am_sc(const ir_node *node) {
520 ia32_attr_t *attr = get_ia32_attr(node);
525 * Sets the symconst ident associated to addrmode.
527 void set_ia32_am_sc(ir_node *node, ident *sc) {
528 ia32_attr_t *attr = get_ia32_attr(node);
533 * Sets the sign bit for address mode symconst.
535 void set_ia32_am_sc_sign(ir_node *node) {
536 ia32_attr_t *attr = get_ia32_attr(node);
537 attr->data.am_sc_sign = 1;
541 * Clears the sign bit for address mode symconst.
543 void clear_ia32_am_sc_sign(ir_node *node) {
544 ia32_attr_t *attr = get_ia32_attr(node);
545 attr->data.am_sc_sign = 0;
549 * Returns the sign bit for address mode symconst.
551 int is_ia32_am_sc_sign(const ir_node *node) {
552 ia32_attr_t *attr = get_ia32_attr(node);
553 return attr->data.am_sc_sign;
557 * Gets the addr mode const.
559 int get_ia32_am_scale(const ir_node *node) {
560 ia32_attr_t *attr = get_ia32_attr(node);
561 return attr->data.am_scale;
565 * Sets the index register scale for addrmode.
567 void set_ia32_am_scale(ir_node *node, int scale) {
568 ia32_attr_t *attr = get_ia32_attr(node);
569 attr->data.am_scale = scale;
573 * Return the tarval of an immediate operation or NULL in case of SymConst
575 tarval *get_ia32_Immop_tarval(const ir_node *node) {
576 ia32_attr_t *attr = get_ia32_attr(node);
577 assert(attr->data.imm_tp == ia32_ImmConst);
578 return attr->cnst_val.tv;
582 * Sets the attributes of an immediate operation to the specified tarval
584 void set_ia32_Immop_tarval(ir_node *node, tarval *tv) {
585 ia32_attr_t *attr = get_ia32_attr(node);
586 attr->data.imm_tp = ia32_ImmConst;
587 attr->cnst_val.tv = tv;
590 void set_ia32_Immop_symconst(ir_node *node, ident *ident) {
591 ia32_attr_t *attr = get_ia32_attr(node);
592 attr->data.imm_tp = ia32_ImmSymConst;
593 attr->cnst_val.sc = ident;
596 ident *get_ia32_Immop_symconst(const ir_node *node) {
597 ia32_attr_t *attr = get_ia32_attr(node);
598 assert(attr->data.imm_tp == ia32_ImmSymConst);
599 return attr->cnst_val.sc;
603 * Sets the uses_frame flag.
605 void set_ia32_use_frame(ir_node *node) {
606 ia32_attr_t *attr = get_ia32_attr(node);
607 attr->data.use_frame = 1;
611 * Clears the uses_frame flag.
613 void clear_ia32_use_frame(ir_node *node) {
614 ia32_attr_t *attr = get_ia32_attr(node);
615 attr->data.use_frame = 0;
619 * Gets the uses_frame flag.
621 int is_ia32_use_frame(const ir_node *node) {
622 ia32_attr_t *attr = get_ia32_attr(node);
623 return attr->data.use_frame;
627 * Sets node to commutative.
629 void set_ia32_commutative(ir_node *node) {
630 ia32_attr_t *attr = get_ia32_attr(node);
631 attr->data.is_commutative = 1;
635 * Sets node to non-commutative.
637 void clear_ia32_commutative(ir_node *node) {
638 ia32_attr_t *attr = get_ia32_attr(node);
639 attr->data.is_commutative = 0;
643 * Checks if node is commutative.
645 int is_ia32_commutative(const ir_node *node) {
646 ia32_attr_t *attr = get_ia32_attr(node);
647 return attr->data.is_commutative;
653 void set_ia32_emit_cl(ir_node *node) {
654 ia32_attr_t *attr = get_ia32_attr(node);
655 attr->data.emit_cl = 1;
659 * Clears node emit_cl.
661 void clear_ia32_emit_cl(ir_node *node) {
662 ia32_attr_t *attr = get_ia32_attr(node);
663 attr->data.emit_cl = 0;
667 * Checks if node needs %cl.
669 int is_ia32_emit_cl(const ir_node *node) {
670 ia32_attr_t *attr = get_ia32_attr(node);
671 return attr->data.emit_cl;
677 void set_ia32_got_lea(ir_node *node) {
678 ia32_attr_t *attr = get_ia32_attr(node);
679 attr->data.got_lea = 1;
683 * Clears node got_lea.
685 void clear_ia32_got_lea(ir_node *node) {
686 ia32_attr_t *attr = get_ia32_attr(node);
687 attr->data.got_lea = 0;
691 * Checks if node got lea.
693 int is_ia32_got_lea(const ir_node *node) {
694 ia32_attr_t *attr = get_ia32_attr(node);
695 return attr->data.got_lea;
698 void set_ia32_need_stackent(ir_node *node) {
699 ia32_attr_t *attr = get_ia32_attr(node);
700 attr->data.need_stackent = 1;
703 void clear_ia32_need_stackent(ir_node *node) {
704 ia32_attr_t *attr = get_ia32_attr(node);
705 attr->data.need_stackent = 0;
708 int is_ia32_need_stackent(const ir_node *node) {
709 ia32_attr_t *attr = get_ia32_attr(node);
710 return attr->data.need_stackent;
714 * Gets the mode of the stored/loaded value (only set for Store/Load)
716 ir_mode *get_ia32_ls_mode(const ir_node *node) {
717 ia32_attr_t *attr = get_ia32_attr(node);
718 return attr->ls_mode;
722 * Sets the mode of the stored/loaded value (only set for Store/Load)
724 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
725 ia32_attr_t *attr = get_ia32_attr(node);
726 attr->ls_mode = mode;
730 * Gets the frame entity assigned to this node.
732 ir_entity *get_ia32_frame_ent(const ir_node *node) {
733 ia32_attr_t *attr = get_ia32_attr(node);
734 return attr->frame_ent;
738 * Sets the frame entity for this node.
740 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
741 ia32_attr_t *attr = get_ia32_attr(node);
742 attr->frame_ent = ent;
744 set_ia32_use_frame(node);
746 clear_ia32_use_frame(node);
751 * Gets the instruction latency.
753 unsigned get_ia32_latency(const ir_node *node) {
754 ia32_attr_t *attr = get_ia32_attr(node);
755 return attr->latency;
759 * Sets the instruction latency.
761 void set_ia32_latency(ir_node *node, unsigned latency) {
762 ia32_attr_t *attr = get_ia32_attr(node);
763 attr->latency = latency;
767 * Returns the argument register requirements of an ia32 node.
769 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
770 ia32_attr_t *attr = get_ia32_attr(node);
775 * Sets the argument register requirements of an ia32 node.
777 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
778 ia32_attr_t *attr = get_ia32_attr(node);
783 * Returns the result register requirements of an ia32 node.
785 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
786 ia32_attr_t *attr = get_ia32_attr(node);
787 return attr->out_req;
791 * Sets the result register requirements of an ia32 node.
793 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
794 ia32_attr_t *attr = get_ia32_attr(node);
795 attr->out_req = reqs;
799 * Returns the argument register requirement at position pos of an ia32 node.
801 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
802 ia32_attr_t *attr = get_ia32_attr(node);
803 if(attr->in_req == NULL)
804 return arch_no_register_req;
806 return attr->in_req[pos];
810 * Returns the result register requirement at position pos of an ia32 node.
812 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
813 ia32_attr_t *attr = get_ia32_attr(node);
814 if(attr->out_req == NULL)
815 return arch_no_register_req;
817 return attr->out_req[pos];
821 * Sets the OUT register requirements at position pos.
823 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
824 ia32_attr_t *attr = get_ia32_attr(node);
825 attr->out_req[pos] = req;
829 * Sets the IN register requirements at position pos.
831 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
832 ia32_attr_t *attr = get_ia32_attr(node);
833 attr->in_req[pos] = req;
837 * Returns the register flag of an ia32 node.
839 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
840 ia32_attr_t *attr = get_ia32_attr(node);
841 return attr->data.flags;
845 * Sets the register flag of an ia32 node.
847 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
848 ia32_attr_t *attr = get_ia32_attr(node);
849 attr->data.flags = flags;
853 * Returns the result register slots of an ia32 node.
855 const arch_register_t **get_ia32_slots(const ir_node *node) {
856 ia32_attr_t *attr = get_ia32_attr(node);
861 * Sets the number of results.
863 void set_ia32_n_res(ir_node *node, int n_res) {
864 ia32_attr_t *attr = get_ia32_attr(node);
865 attr->data.n_res = n_res;
869 * Returns the number of results.
871 int get_ia32_n_res(const ir_node *node) {
872 ia32_attr_t *attr = get_ia32_attr(node);
873 return attr->data.n_res;
877 * Returns the flavour of an ia32 node,
879 ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
880 ia32_attr_t *attr = get_ia32_attr(node);
881 return attr->data.op_flav;
885 * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
887 void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) {
888 ia32_attr_t *attr = get_ia32_attr(node);
889 attr->data.op_flav = op_flav;
893 * Returns the projnum code.
895 pn_Cmp get_ia32_pncode(const ir_node *node) {
896 ia32_attr_t *attr = get_ia32_attr(node);
897 return attr->pn_code;
901 * Sets the projnum code
903 void set_ia32_pncode(ir_node *node, pn_Cmp code) {
904 ia32_attr_t *attr = get_ia32_attr(node);
905 attr->pn_code = code;
909 * Sets the flags for the n'th out.
911 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
912 ia32_attr_t *attr = get_ia32_attr(node);
913 assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
914 attr->out_flags[pos] = flags;
918 * Gets the flags for the n'th out.
920 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
921 ia32_attr_t *attr = get_ia32_attr(node);
922 return pos < (int)attr->data.n_res ? attr->out_flags[pos] : arch_irn_flags_none;
926 * Get the list of available execution units.
928 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
929 ia32_attr_t *attr = get_ia32_attr(node);
930 return attr->exec_units;
936 * Returns the name of the original ir node.
938 const char *get_ia32_orig_node(const ir_node *node) {
939 ia32_attr_t *attr = get_ia32_attr(node);
940 return attr->orig_node;
944 * Sets the name of the original ir node.
946 void set_ia32_orig_node(ir_node *node, const char *name) {
947 ia32_attr_t *attr = get_ia32_attr(node);
948 attr->orig_node = name;
953 /******************************************************************************************************
955 * (_) | | | | | | / _| | | (_)
956 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
957 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
958 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
959 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
962 ******************************************************************************************************/
965 * Copy the attributes from an ia32_Const to an Immop (Add_i, Sub_i, ...) node
967 void copy_ia32_Immop_attr(ir_node *node, ir_node *from) {
968 ia32_immop_type_t immop_type = get_ia32_immop_type(from);
970 if(immop_type == ia32_ImmConst) {
971 set_ia32_Immop_tarval(node, get_ia32_Immop_tarval(from));
972 } else if(immop_type == ia32_ImmSymConst) {
973 set_ia32_Immop_symconst(node, get_ia32_Immop_symconst(from));
975 ia32_attr_t *attr = get_ia32_attr(node);
976 assert(immop_type == ia32_ImmNone);
977 attr->data.imm_tp = ia32_ImmNone;
982 * Copy the attributes from a Firm Const/SymConst to an ia32_Const
984 void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) {
985 assert(is_ia32_Cnst(ia32_cnst) && "Need ia32_Const to set Const attr");
987 switch (get_irn_opcode(cnst)) {
989 set_ia32_Const_tarval(ia32_cnst, get_Const_tarval(cnst));
992 set_ia32_Immop_symconst(ia32_cnst, get_sc_ident(cnst));
995 assert(0 && "Unknown Const NYI");
998 assert(0 && "Cannot create ia32_Const for this opcode");
1002 void set_ia32_Const_tarval(ir_node *ia32_cnst, tarval *tv) {
1003 if(mode_is_reference(get_tarval_mode(tv))) {
1004 if(tarval_is_null(tv)) {
1005 tv = get_tarval_null(mode_Iu);
1007 panic("Can't convert reference tarval to mode_Iu at %+F", ia32_cnst);
1010 tv = tarval_convert_to(tv, mode_Iu);
1013 assert(tv != get_tarval_bad() && tv != get_tarval_undefined()
1015 set_ia32_Immop_tarval(ia32_cnst, tv);
1020 * Sets the AddrMode(S|D) attribute
1022 void set_ia32_AddrMode(ir_node *node, char direction) {
1023 ia32_attr_t *attr = get_ia32_attr(node);
1025 switch (direction) {
1027 attr->data.tp = ia32_AddrModeD;
1030 attr->data.tp = ia32_AddrModeS;
1033 assert(0 && "wrong AM type");
1038 * Returns whether or not the node is an immediate operation with Const.
1040 int is_ia32_ImmConst(const ir_node *node) {
1041 ia32_attr_t *attr = get_ia32_attr(node);
1042 return (attr->data.imm_tp == ia32_ImmConst);
1046 * Returns whether or not the node is an immediate operation with SymConst.
1048 int is_ia32_ImmSymConst(const ir_node *node) {
1049 ia32_attr_t *attr = get_ia32_attr(node);
1050 return (attr->data.imm_tp == ia32_ImmSymConst);
1054 * Returns whether or not the node is an AddrModeS node.
1056 int is_ia32_AddrModeS(const ir_node *node) {
1057 ia32_attr_t *attr = get_ia32_attr(node);
1058 return (attr->data.tp == ia32_AddrModeS);
1062 * Returns whether or not the node is an AddrModeD node.
1064 int is_ia32_AddrModeD(const ir_node *node) {
1065 ia32_attr_t *attr = get_ia32_attr(node);
1066 return (attr->data.tp == ia32_AddrModeD);
1070 * Checks if node is a Load or xLoad/vfLoad.
1072 int is_ia32_Ld(const ir_node *node) {
1073 int op = get_ia32_irn_opcode(node);
1074 return op == iro_ia32_Load || op == iro_ia32_xLoad || op == iro_ia32_vfld || op == iro_ia32_fld;
1078 * Checks if node is a Store or xStore/vfStore.
1080 int is_ia32_St(const ir_node *node) {
1081 int op = get_ia32_irn_opcode(node);
1082 return op == iro_ia32_Store || op == iro_ia32_xStore || op == iro_ia32_vfst || op == iro_ia32_fst || op == iro_ia32_fstp;
1086 * Checks if node is a Const or xConst/vfConst.
1088 int is_ia32_Cnst(const ir_node *node) {
1089 int op = get_ia32_irn_opcode(node);
1090 return op == iro_ia32_Const || op == iro_ia32_xConst || op == iro_ia32_vfConst;
1094 * Returns the name of the OUT register at position pos.
1096 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
1097 ia32_attr_t *attr = get_ia32_attr(node);
1099 assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
1100 assert(attr->slots[pos] && "No register assigned");
1102 return arch_register_get_name(attr->slots[pos]);
1106 * Returns the index of the OUT register at position pos within its register class.
1108 int get_ia32_out_regnr(const ir_node *node, int pos) {
1109 ia32_attr_t *attr = get_ia32_attr(node);
1111 assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
1112 assert(attr->slots[pos] && "No register assigned");
1114 return arch_register_get_index(attr->slots[pos]);
1118 * Returns the OUT register at position pos.
1120 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
1121 ia32_attr_t *attr = get_ia32_attr(node);
1123 assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
1124 assert(attr->slots[pos] && "No register assigned");
1126 return attr->slots[pos];
1130 * Initializes the nodes attributes.
1132 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1133 const arch_register_req_t **in_reqs,
1134 const arch_register_req_t **out_reqs,
1135 const be_execution_unit_t ***execution_units,
1136 int n_res, unsigned latency)
1138 ia32_attr_t *attr = get_ia32_attr(node);
1140 set_ia32_flags(node, flags);
1141 set_ia32_in_req_all(node, in_reqs);
1142 set_ia32_out_req_all(node, out_reqs);
1143 set_ia32_latency(node, latency);
1144 set_ia32_n_res(node, n_res);
1146 attr->exec_units = execution_units;
1148 attr->out_flags = NEW_ARR_D(int, get_irg_obstack(get_irn_irg(node)), n_res);
1149 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1151 memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
1154 ir_node *get_ia32_result_proj(const ir_node *node)
1156 const ir_edge_t *edge;
1158 foreach_out_edge(node, edge) {
1159 ir_node *proj = get_edge_src_irn(edge);
1160 if(get_Proj_proj(proj) == 0) {
1167 /***************************************************************************************
1170 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1171 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1172 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1173 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1175 ***************************************************************************************/
1177 /* default compare operation to compare attributes */
1178 int ia32_compare_attr(ia32_attr_t *a, ia32_attr_t *b) {
1179 if (a->data.tp != b->data.tp
1180 || a->data.imm_tp != b->data.imm_tp)
1183 if (a->data.imm_tp == ia32_ImmConst
1184 && a->cnst_val.tv != b->cnst_val.tv)
1187 if (a->data.imm_tp == ia32_ImmSymConst
1188 && a->cnst_val.sc != b->cnst_val.sc)
1191 if (a->data.am_flavour != b->data.am_flavour
1192 || a->data.am_scale != b->data.am_scale
1193 || a->data.offs_sign != b->data.offs_sign
1194 || a->data.am_sc_sign != b->data.am_sc_sign
1195 || a->am_offs != b->am_offs
1196 || a->am_sc != b->am_sc
1197 || a->ls_mode != b->ls_mode)
1200 if (a->data.use_frame != b->data.use_frame
1201 || a->data.use_frame != b->data.use_frame
1202 || a->frame_ent != b->frame_ent)
1205 if(a->pn_code != b->pn_code)
1208 if (a->data.tp != b->data.tp
1209 || a->data.op_flav != b->data.op_flav)
1215 /* copies the ia32 attributes */
1216 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) {
1217 ia32_attr_t *attr_old = get_ia32_attr(old_node);
1218 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1220 /* copy the attributes */
1221 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1223 /* copy out flags */
1224 attr_new->out_flags =
1225 DUP_ARR_D(int, get_irg_obstack(get_irn_irg(new_node)), attr_old->out_flags);
1229 * Registers the ia32_copy_attr function for all ia32 opcodes.
1231 void ia32_register_copy_attr_func(void) {
1232 unsigned i, f = get_ia32_opcode_first(), l = get_ia32_opcode_last();
1234 for (i = f; i < l; i++) {
1235 ir_op *op = get_irp_opcode(i);
1236 op->ops.copy_attr = ia32_copy_attr;
1240 /* Include the generated constructor functions */
1241 #include "gen_ia32_new_nodes.c.inl"