2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the coresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same));
102 if (reqs[i]->type & arch_register_req_type_should_be_different) {
103 ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different));
112 fprintf(F, "%sreq = N/A\n", dir);
117 * Dumper interface for dumping ia32 nodes in vcg.
118 * @param n the node to dump
119 * @param F the output file
120 * @param reason indicates which kind of information should be dumped
121 * @return 0 on success or != 0 on failure
123 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
124 ir_mode *mode = NULL;
127 const arch_register_req_t **reqs;
128 const arch_register_t **slots;
131 case dump_node_opcode_txt:
132 fprintf(F, "%s", get_irn_opname(n));
134 if(is_ia32_Immediate(n) || is_ia32_Const(n)) {
135 const ia32_immediate_attr_t *attr
136 = get_ia32_immediate_attr_const(n);
140 if(attr->attr.data.am_sc_sign) {
143 fputs(get_entity_name(attr->symconst), F);
145 if(attr->offset != 0 || attr->symconst == NULL) {
146 if(attr->offset > 0 && attr->symconst != NULL) {
149 fprintf(F, "%ld", attr->offset);
154 const ia32_attr_t *attr = get_ia32_attr_const(n);
156 if(attr->am_sc != NULL || attr->am_offs != 0)
159 if(attr->am_sc != NULL) {
160 if(attr->data.am_sc_sign) {
163 fputs(get_entity_name(attr->am_sc), F);
165 if(attr->am_offs != 0) {
166 if(attr->am_offs > 0 && attr->am_sc != NULL) {
169 fprintf(F, "%d", attr->am_offs);
172 if(attr->am_sc != NULL || attr->am_offs != 0)
177 case dump_node_mode_txt:
178 if (is_ia32_Ld(n) || is_ia32_St(n)) {
179 mode = get_ia32_ls_mode(n);
180 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
184 case dump_node_nodeattr_txt:
185 if (! is_ia32_Lea(n)) {
186 if (is_ia32_AddrModeS(n)) {
187 fprintf(F, "[AM S] ");
188 } else if (is_ia32_AddrModeD(n)) {
189 fprintf(F, "[AM D] ");
195 case dump_node_info_txt:
196 n_res = get_ia32_n_res(n);
197 fprintf(F, "=== IA32 attr begin ===\n");
199 /* dump IN requirements */
200 if (get_irn_arity(n) > 0) {
201 reqs = get_ia32_in_req_all(n);
202 dump_reg_req(F, n, reqs, 0);
205 /* dump OUT requirements */
207 reqs = get_ia32_out_req_all(n);
208 dump_reg_req(F, n, reqs, 1);
211 /* dump assigned registers */
212 slots = get_ia32_slots(n);
213 if (slots && n_res > 0) {
214 for (i = 0; i < n_res; i++) {
215 const arch_register_t *reg;
219 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
226 switch (get_ia32_op_type(n)) {
228 fprintf(F, "Normal");
231 fprintf(F, "AM Dest (Load+Store)");
234 fprintf(F, "AM Source (Load)");
237 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
242 /* dump supported am */
243 fprintf(F, "AM support = ");
244 switch (get_ia32_am_support(n)) {
249 fprintf(F, "source only (Load)");
252 fprintf(F, "dest only (Load+Store)");
258 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
264 if(get_ia32_am_offs_int(n) != 0) {
265 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
268 /* dump AM symconst */
269 if(get_ia32_am_sc(n) != NULL) {
270 ir_entity *ent = get_ia32_am_sc(n);
271 ident *id = get_entity_ld_ident(ent);
272 fprintf(F, "AM symconst = %s\n", get_id_str(id));
276 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
279 if(is_ia32_SwitchJmp(n) || is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
280 fprintf(F, "pn_code = %ld\n", get_ia32_pncode(n));
282 fprintf(F, "pn_code = %ld (%s)\n", get_ia32_pncode(n),
283 get_pnc_string(get_ia32_pncode(n)));
287 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
290 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
293 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
296 fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
299 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
302 fprintf(F, "latency = %d\n", get_ia32_latency(n));
305 fprintf(F, "flags =");
306 flags = get_ia32_flags(n);
307 if (flags == arch_irn_flags_none) {
311 if (flags & arch_irn_flags_dont_spill) {
312 fprintf(F, " unspillable");
314 if (flags & arch_irn_flags_rematerializable) {
315 fprintf(F, " remat");
317 if (flags & arch_irn_flags_ignore) {
318 fprintf(F, " ignore");
320 if (flags & arch_irn_flags_modify_sp) {
321 fprintf(F, " modify_sp");
324 fprintf(F, " (%d)\n", flags);
326 /* dump frame entity */
327 fprintf(F, "frame entity = ");
328 if (get_ia32_frame_ent(n)) {
329 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
337 fprintf(F, "ls_mode = ");
338 if (get_ia32_ls_mode(n)) {
339 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
347 /* dump original ir node name */
348 fprintf(F, "orig node = ");
349 if (get_ia32_orig_node(n)) {
350 fprintf(F, "%s", get_ia32_orig_node(n));
358 fprintf(F, "=== IA32 attr end ===\n");
359 /* end of: case dump_node_info_txt */
368 /***************************************************************************************************
370 * | | | | | | / / | | | | | | | |
371 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
372 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
373 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
374 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
377 ***************************************************************************************************/
379 ia32_attr_t *get_ia32_attr(ir_node *node) {
380 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
381 return (ia32_attr_t *)get_irn_generic_attr(node);
384 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
385 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
386 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
389 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
390 ia32_attr_t *attr = get_ia32_attr(node);
391 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
395 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
396 const ia32_attr_t *attr = get_ia32_attr_const(node);
397 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
401 const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
402 const ia32_attr_t *attr = get_ia32_attr_const(node);
403 const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
408 const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
410 const ia32_attr_t *attr = get_ia32_attr_const(node);
411 const ia32_immediate_attr_t *immediate_attr
412 = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
414 return immediate_attr;
418 * Gets the type of an ia32 node.
420 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
421 const ia32_attr_t *attr = get_ia32_attr_const(node);
422 return attr->data.tp;
426 * Sets the type of an ia32 node.
428 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
429 ia32_attr_t *attr = get_ia32_attr(node);
434 * Gets the supported address mode of an ia32 node
436 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
437 const ia32_attr_t *attr = get_ia32_attr_const(node);
438 return attr->data.am_support;
441 ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
442 const ia32_attr_t *attr = get_ia32_attr_const(node);
443 return attr->data.am_arity;
447 * Sets the supported address mode of an ia32 node
449 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
450 ia32_am_arity_t arity) {
451 ia32_attr_t *attr = get_ia32_attr(node);
452 attr->data.am_support = am_tp;
453 attr->data.am_arity = arity;
455 assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
456 (am_tp != ia32_am_None &&
457 ((arity == ia32_am_unary) || (arity == ia32_am_binary) || (arity == ia32_am_ternary))));
461 * Gets the address mode offset as int.
463 int get_ia32_am_offs_int(const ir_node *node) {
464 const ia32_attr_t *attr = get_ia32_attr_const(node);
465 return attr->am_offs;
469 * Sets the address mode offset from an int.
471 void set_ia32_am_offs_int(ir_node *node, int offset) {
472 ia32_attr_t *attr = get_ia32_attr(node);
473 attr->am_offs = offset;
476 void add_ia32_am_offs_int(ir_node *node, int offset) {
477 ia32_attr_t *attr = get_ia32_attr(node);
478 attr->am_offs += offset;
482 * Returns the symconst entity associated to address mode.
484 ir_entity *get_ia32_am_sc(const ir_node *node) {
485 const ia32_attr_t *attr = get_ia32_attr_const(node);
490 * Sets the symconst entity associated to address mode.
492 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
493 ia32_attr_t *attr = get_ia32_attr(node);
494 attr->am_sc = entity;
498 * Sets the sign bit for address mode symconst.
500 void set_ia32_am_sc_sign(ir_node *node) {
501 ia32_attr_t *attr = get_ia32_attr(node);
502 attr->data.am_sc_sign = 1;
506 * Clears the sign bit for address mode symconst.
508 void clear_ia32_am_sc_sign(ir_node *node) {
509 ia32_attr_t *attr = get_ia32_attr(node);
510 attr->data.am_sc_sign = 0;
514 * Returns the sign bit for address mode symconst.
516 int is_ia32_am_sc_sign(const ir_node *node) {
517 const ia32_attr_t *attr = get_ia32_attr_const(node);
518 return attr->data.am_sc_sign;
522 * Gets the addr mode const.
524 int get_ia32_am_scale(const ir_node *node) {
525 const ia32_attr_t *attr = get_ia32_attr_const(node);
526 return attr->data.am_scale;
530 * Sets the index register scale for address mode.
532 void set_ia32_am_scale(ir_node *node, int scale) {
533 ia32_attr_t *attr = get_ia32_attr(node);
534 attr->data.am_scale = scale;
537 void ia32_copy_am_attrs(ir_node *to, const ir_node *from)
539 set_ia32_ls_mode(to, get_ia32_ls_mode(from));
540 set_ia32_am_scale(to, get_ia32_am_scale(from));
541 set_ia32_am_sc(to, get_ia32_am_sc(from));
542 if(is_ia32_am_sc_sign(from))
543 set_ia32_am_sc_sign(to);
544 add_ia32_am_offs_int(to, get_ia32_am_offs_int(from));
545 set_ia32_frame_ent(to, get_ia32_frame_ent(from));
546 if (is_ia32_use_frame(from))
547 set_ia32_use_frame(to);
551 * Sets the uses_frame flag.
553 void set_ia32_use_frame(ir_node *node) {
554 ia32_attr_t *attr = get_ia32_attr(node);
555 attr->data.use_frame = 1;
559 * Clears the uses_frame flag.
561 void clear_ia32_use_frame(ir_node *node) {
562 ia32_attr_t *attr = get_ia32_attr(node);
563 attr->data.use_frame = 0;
567 * Gets the uses_frame flag.
569 int is_ia32_use_frame(const ir_node *node) {
570 const ia32_attr_t *attr = get_ia32_attr_const(node);
571 return attr->data.use_frame;
575 * Sets node to commutative.
577 void set_ia32_commutative(ir_node *node) {
578 ia32_attr_t *attr = get_ia32_attr(node);
579 attr->data.is_commutative = 1;
583 * Sets node to non-commutative.
585 void clear_ia32_commutative(ir_node *node) {
586 ia32_attr_t *attr = get_ia32_attr(node);
587 attr->data.is_commutative = 0;
591 * Checks if node is commutative.
593 int is_ia32_commutative(const ir_node *node) {
594 const ia32_attr_t *attr = get_ia32_attr_const(node);
595 return attr->data.is_commutative;
601 void set_ia32_got_lea(ir_node *node) {
602 ia32_attr_t *attr = get_ia32_attr(node);
603 attr->data.got_lea = 1;
607 * Clears node got_lea.
609 void clear_ia32_got_lea(ir_node *node) {
610 ia32_attr_t *attr = get_ia32_attr(node);
611 attr->data.got_lea = 0;
615 * Checks if node got lea.
617 int is_ia32_got_lea(const ir_node *node) {
618 const ia32_attr_t *attr = get_ia32_attr_const(node);
619 return attr->data.got_lea;
622 void set_ia32_need_stackent(ir_node *node) {
623 ia32_attr_t *attr = get_ia32_attr(node);
624 attr->data.need_stackent = 1;
627 void clear_ia32_need_stackent(ir_node *node) {
628 ia32_attr_t *attr = get_ia32_attr(node);
629 attr->data.need_stackent = 0;
632 int is_ia32_need_stackent(const ir_node *node) {
633 const ia32_attr_t *attr = get_ia32_attr_const(node);
634 return attr->data.need_stackent;
638 * Gets the mode of the stored/loaded value (only set for Store/Load)
640 ir_mode *get_ia32_ls_mode(const ir_node *node) {
641 const ia32_attr_t *attr = get_ia32_attr_const(node);
642 return attr->ls_mode;
646 * Sets the mode of the stored/loaded value (only set for Store/Load)
648 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
649 ia32_attr_t *attr = get_ia32_attr(node);
650 attr->ls_mode = mode;
654 * Gets the frame entity assigned to this node.
656 ir_entity *get_ia32_frame_ent(const ir_node *node) {
657 const ia32_attr_t *attr = get_ia32_attr_const(node);
658 return attr->frame_ent;
662 * Sets the frame entity for this node.
664 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
665 ia32_attr_t *attr = get_ia32_attr(node);
666 attr->frame_ent = ent;
668 set_ia32_use_frame(node);
670 clear_ia32_use_frame(node);
675 * Gets the instruction latency.
677 unsigned get_ia32_latency(const ir_node *node) {
678 const ia32_attr_t *attr = get_ia32_attr_const(node);
679 return attr->latency;
683 * Sets the instruction latency.
685 void set_ia32_latency(ir_node *node, unsigned latency) {
686 ia32_attr_t *attr = get_ia32_attr(node);
687 attr->latency = latency;
691 * Returns the argument register requirements of an ia32 node.
693 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
694 const ia32_attr_t *attr = get_ia32_attr_const(node);
699 * Sets the argument register requirements of an ia32 node.
701 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
702 ia32_attr_t *attr = get_ia32_attr(node);
707 * Returns the result register requirements of an ia32 node.
709 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
710 const ia32_attr_t *attr = get_ia32_attr_const(node);
711 return attr->out_req;
715 * Sets the result register requirements of an ia32 node.
717 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
718 ia32_attr_t *attr = get_ia32_attr(node);
719 attr->out_req = reqs;
723 * Returns the argument register requirement at position pos of an ia32 node.
725 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
726 const ia32_attr_t *attr = get_ia32_attr_const(node);
727 if(attr->in_req == NULL)
728 return arch_no_register_req;
730 return attr->in_req[pos];
734 * Returns the result register requirement at position pos of an ia32 node.
736 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
737 const ia32_attr_t *attr = get_ia32_attr_const(node);
738 if(attr->out_req == NULL)
739 return arch_no_register_req;
741 return attr->out_req[pos];
745 * Sets the OUT register requirements at position pos.
747 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
748 ia32_attr_t *attr = get_ia32_attr(node);
749 attr->out_req[pos] = req;
753 * Sets the IN register requirements at position pos.
755 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
756 ia32_attr_t *attr = get_ia32_attr(node);
757 attr->in_req[pos] = req;
761 * Returns the register flag of an ia32 node.
763 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
764 const ia32_attr_t *attr = get_ia32_attr_const(node);
765 return attr->data.flags;
769 * Sets the register flag of an ia32 node.
771 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
772 ia32_attr_t *attr = get_ia32_attr(node);
773 attr->data.flags = flags;
777 * Returns the result register slots of an ia32 node.
779 const arch_register_t **get_ia32_slots(const ir_node *node) {
780 const ia32_attr_t *attr = get_ia32_attr_const(node);
785 * Returns the number of results.
787 int get_ia32_n_res(const ir_node *node) {
788 const ia32_attr_t *attr = get_ia32_attr_const(node);
789 return ARR_LEN(attr->slots);
793 * Returns the flavour of an ia32 node,
795 ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
796 const ia32_attr_t *attr = get_ia32_attr_const(node);
797 return attr->data.op_flav;
801 * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
803 void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) {
804 ia32_attr_t *attr = get_ia32_attr(node);
805 attr->data.op_flav = op_flav;
809 * Returns the projnum code.
811 long get_ia32_pncode(const ir_node *node)
813 const ia32_attr_t *attr = get_ia32_attr_const(node);
814 return attr->pn_code;
818 * Sets the projnum code
820 void set_ia32_pncode(ir_node *node, long code)
822 ia32_attr_t *attr = get_ia32_attr(node);
823 attr->pn_code = code;
827 * Sets the flags for the n'th out.
829 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
830 ia32_attr_t *attr = get_ia32_attr(node);
831 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
832 attr->out_flags[pos] = flags;
836 * Gets the flags for the n'th out.
838 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
839 const ia32_attr_t *attr = get_ia32_attr_const(node);
840 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
841 return attr->out_flags[pos];
845 * Get the list of available execution units.
847 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
848 const ia32_attr_t *attr = get_ia32_attr_const(node);
849 return attr->exec_units;
853 * Get the exception label attribute.
855 unsigned get_ia32_exc_label(const ir_node *node) {
856 const ia32_attr_t *attr = get_ia32_attr_const(node);
857 return attr->data.except_label;
861 * Set the exception label attribute.
863 void set_ia32_exc_label(ir_node *node, unsigned flag) {
864 ia32_attr_t *attr = get_ia32_attr(node);
865 attr->data.except_label = flag;
871 * Returns the name of the original ir node.
873 const char *get_ia32_orig_node(const ir_node *node) {
874 const ia32_attr_t *attr = get_ia32_attr_const(node);
875 return attr->orig_node;
879 * Sets the name of the original ir node.
881 void set_ia32_orig_node(ir_node *node, const char *name) {
882 ia32_attr_t *attr = get_ia32_attr(node);
883 attr->orig_node = name;
888 /******************************************************************************************************
890 * (_) | | | | | | / _| | | (_)
891 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
892 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
893 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
894 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
897 ******************************************************************************************************/
900 * Sets the AddrMode(S|D) attribute
902 void set_ia32_AddrMode(ir_node *node, char direction) {
903 ia32_attr_t *attr = get_ia32_attr(node);
907 attr->data.tp = ia32_AddrModeD;
910 attr->data.tp = ia32_AddrModeS;
913 assert(0 && "wrong AM type");
918 * Returns whether or not the node is an AddrModeS node.
920 int is_ia32_AddrModeS(const ir_node *node) {
921 const ia32_attr_t *attr = get_ia32_attr_const(node);
922 return (attr->data.tp == ia32_AddrModeS);
926 * Returns whether or not the node is an AddrModeD node.
928 int is_ia32_AddrModeD(const ir_node *node) {
929 const ia32_attr_t *attr = get_ia32_attr_const(node);
930 return (attr->data.tp == ia32_AddrModeD);
934 * Checks if node is a Load or xLoad/vfLoad.
936 int is_ia32_Ld(const ir_node *node) {
937 int op = get_ia32_irn_opcode(node);
938 return op == iro_ia32_Load ||
939 op == iro_ia32_xLoad ||
940 op == iro_ia32_vfld ||
945 * Checks if node is a Store or xStore/vfStore.
947 int is_ia32_St(const ir_node *node) {
948 int op = get_ia32_irn_opcode(node);
949 return op == iro_ia32_Store ||
950 op == iro_ia32_Store8Bit ||
951 op == iro_ia32_xStore ||
952 op == iro_ia32_vfst ||
953 op == iro_ia32_fst ||
958 * Returns the name of the OUT register at position pos.
960 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
961 const ia32_attr_t *attr = get_ia32_attr_const(node);
963 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
964 assert(attr->slots[pos] && "No register assigned");
966 return arch_register_get_name(attr->slots[pos]);
970 * Returns the index of the OUT register at position pos within its register class.
972 int get_ia32_out_regnr(const ir_node *node, int pos) {
973 const ia32_attr_t *attr = get_ia32_attr_const(node);
975 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
976 assert(attr->slots[pos] && "No register assigned");
978 return arch_register_get_index(attr->slots[pos]);
981 void ia32_swap_left_right(ir_node *node)
983 ia32_attr_t *attr = get_ia32_attr(node);
984 ir_node *left = get_irn_n(node, n_ia32_binary_left);
985 ir_node *right = get_irn_n(node, n_ia32_binary_right);
987 attr->data.cmp_flipped = !attr->data.cmp_flipped;
988 assert(is_ia32_commutative(node));
989 set_irn_n(node, n_ia32_binary_left, right);
990 set_irn_n(node, n_ia32_binary_right, left);
991 set_ia32_pncode(node, get_inversed_pnc(get_ia32_pncode(node)));
995 * Returns the OUT register at position pos.
997 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
998 const ia32_attr_t *attr = get_ia32_attr_const(node);
1000 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1001 assert(attr->slots[pos] && "No register assigned");
1003 return attr->slots[pos];
1007 * Initializes the nodes attributes.
1009 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1010 const arch_register_req_t **in_reqs,
1011 const arch_register_req_t **out_reqs,
1012 const be_execution_unit_t ***execution_units,
1013 int n_res, unsigned latency)
1015 ir_graph *irg = get_irn_irg(node);
1016 struct obstack *obst = get_irg_obstack(irg);
1017 ia32_attr_t *attr = get_ia32_attr(node);
1019 set_ia32_flags(node, flags);
1020 set_ia32_in_req_all(node, in_reqs);
1021 set_ia32_out_req_all(node, out_reqs);
1022 set_ia32_latency(node, latency);
1024 attr->exec_units = execution_units;
1026 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1029 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1030 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1032 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
1033 /* void* cast to suppress an incorrect warning on MSVC */
1034 memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0]));
1038 init_ia32_x87_attributes(ir_node *res)
1041 ia32_attr_t *attr = get_ia32_attr(res);
1042 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1044 ia32_current_cg->do_x87_sim = 1;
1048 init_ia32_asm_attributes(ir_node *res)
1051 ia32_attr_t *attr = get_ia32_attr(res);
1052 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1057 init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
1058 int symconst_sign, long offset)
1060 ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
1063 attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
1065 attr->symconst = symconst;
1066 attr->attr.data.am_sc_sign = symconst_sign;
1067 attr->offset = offset;
1070 ir_node *get_ia32_result_proj(const ir_node *node)
1072 const ir_edge_t *edge;
1074 foreach_out_edge(node, edge) {
1075 ir_node *proj = get_edge_src_irn(edge);
1076 if(get_Proj_proj(proj) == 0) {
1083 /***************************************************************************************
1086 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1087 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1088 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1089 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1091 ***************************************************************************************/
1093 /* default compare operation to compare attributes */
1094 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1095 if (a->data.tp != b->data.tp)
1098 if (a->data.am_scale != b->data.am_scale
1099 || a->data.am_sc_sign != b->data.am_sc_sign
1100 || a->am_offs != b->am_offs
1101 || a->am_sc != b->am_sc
1102 || a->ls_mode != b->ls_mode)
1105 /* nodes with not yet assigned entities shouldn't be CSEd (important for
1106 * unsigned int -> double conversions */
1107 if(a->data.use_frame && a->frame_ent == NULL)
1109 if(b->data.use_frame && b->frame_ent == NULL)
1112 if (a->data.use_frame != b->data.use_frame
1113 || a->frame_ent != b->frame_ent)
1116 if(a->pn_code != b->pn_code)
1119 if (a->data.tp != b->data.tp
1120 || a->data.op_flav != b->data.op_flav)
1123 if (a->data.except_label != b->data.except_label)
1126 if (a->data.cmp_flipped != b->data.cmp_flipped
1127 || a->data.cmp_unsigned != b->data.cmp_unsigned)
1134 int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
1136 const ia32_attr_t* attr_a = get_ia32_attr_const(a);
1137 const ia32_attr_t* attr_b = get_ia32_attr_const(b);
1139 return ia32_compare_attr(attr_a, attr_b);
1143 int ia32_compare_x87_attr(ir_node *a, ir_node *b)
1145 return ia32_compare_nodes_attr(a, b);
1149 int ia32_compare_asm_attr(ir_node *a, ir_node *b)
1151 const ia32_asm_attr_t *attr_a;
1152 const ia32_asm_attr_t *attr_b;
1154 if(ia32_compare_nodes_attr(a, b))
1157 attr_a = get_ia32_asm_attr_const(a);
1158 attr_b = get_ia32_asm_attr_const(b);
1160 if(attr_a->asm_text != attr_b->asm_text)
1167 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
1169 const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
1170 const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
1172 if(attr_a->symconst != attr_b->symconst ||
1173 attr_a->attr.data.am_sc_sign != attr_b->attr.data.am_sc_sign ||
1174 attr_a->offset != attr_b->offset)
1180 /* copies the ia32 attributes */
1181 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1183 ir_graph *irg = get_irn_irg(new_node);
1184 struct obstack *obst = get_irg_obstack(irg);
1185 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1186 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1188 /* copy the attributes */
1189 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1191 /* copy out flags */
1192 attr_new->out_flags =
1193 DUP_ARR_D(int, obst, attr_old->out_flags);
1194 /* copy register assignments */
1196 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
1199 /* Include the generated constructor functions */
1200 #include "gen_ia32_new_nodes.c.inl"