2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the corresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 unsigned other = reqs[i]->other_same;
102 ir_fprintf(F, " same as");
103 for (i = 0; 1U << i <= other; ++i) {
104 if (other & (1U << i)) {
105 ir_fprintf(F, " %+F", get_irn_n(n, i));
110 if (reqs[i]->type & arch_register_req_type_should_be_different) {
111 unsigned other = reqs[i]->other_different;
114 ir_fprintf(F, " different from");
115 for (i = 0; 1U << i <= other; ++i) {
116 if (other & (1U << i)) {
117 ir_fprintf(F, " %+F", get_irn_n(n, i));
128 fprintf(F, "%sreq = N/A\n", dir);
133 * Dumper interface for dumping ia32 nodes in vcg.
134 * @param n the node to dump
135 * @param F the output file
136 * @param reason indicates which kind of information should be dumped
137 * @return 0 on success or != 0 on failure
139 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
140 ir_mode *mode = NULL;
143 const arch_register_req_t **reqs;
144 const arch_register_t **slots;
147 case dump_node_opcode_txt:
148 fprintf(F, "%s", get_irn_opname(n));
150 if(is_ia32_Immediate(n) || is_ia32_Const(n)) {
151 const ia32_immediate_attr_t *attr
152 = get_ia32_immediate_attr_const(n);
159 fputs(get_entity_name(attr->symconst), F);
161 if(attr->offset != 0 || attr->symconst == NULL) {
162 if(attr->offset > 0 && attr->symconst != NULL) {
165 fprintf(F, "%ld", attr->offset);
169 const ia32_attr_t *attr = get_ia32_attr_const(n);
171 if(attr->am_sc != NULL || attr->am_offs != 0)
174 if(attr->am_sc != NULL) {
175 if(attr->data.am_sc_sign) {
178 fputs(get_entity_name(attr->am_sc), F);
180 if(attr->am_offs != 0) {
181 if(attr->am_offs > 0 && attr->am_sc != NULL) {
184 fprintf(F, "%d", attr->am_offs);
187 if(attr->am_sc != NULL || attr->am_offs != 0)
192 case dump_node_mode_txt:
193 if (is_ia32_Ld(n) || is_ia32_St(n)) {
194 mode = get_ia32_ls_mode(n);
195 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
199 case dump_node_nodeattr_txt:
200 if (! is_ia32_Lea(n)) {
201 if (is_ia32_AddrModeS(n)) {
202 fprintf(F, "[AM S] ");
203 } else if (is_ia32_AddrModeD(n)) {
204 fprintf(F, "[AM D] ");
210 case dump_node_info_txt:
211 n_res = get_ia32_n_res(n);
212 fprintf(F, "=== IA32 attr begin ===\n");
214 /* dump IN requirements */
215 if (get_irn_arity(n) > 0) {
216 reqs = get_ia32_in_req_all(n);
217 dump_reg_req(F, n, reqs, 0);
220 /* dump OUT requirements */
222 reqs = get_ia32_out_req_all(n);
223 dump_reg_req(F, n, reqs, 1);
226 /* dump assigned registers */
227 slots = get_ia32_slots(n);
228 if (slots && n_res > 0) {
229 for (i = 0; i < n_res; i++) {
230 const arch_register_t *reg;
234 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
241 switch (get_ia32_op_type(n)) {
243 fprintf(F, "Normal");
246 fprintf(F, "AM Dest (Load+Store)");
249 fprintf(F, "AM Source (Load)");
252 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
257 /* dump supported am */
258 fprintf(F, "AM support = ");
259 switch (get_ia32_am_support(n)) {
264 fprintf(F, "source only (Load)");
267 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
273 if(get_ia32_am_offs_int(n) != 0) {
274 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
277 /* dump AM symconst */
278 if(get_ia32_am_sc(n) != NULL) {
279 ir_entity *ent = get_ia32_am_sc(n);
280 ident *id = get_entity_ld_ident(ent);
281 fprintf(F, "AM symconst = %s\n", get_id_str(id));
285 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
288 if (is_ia32_SwitchJmp(n)) {
289 fprintf(F, "pn_code = %ld\n", get_ia32_condcode(n));
290 } else if (is_ia32_CMov(n) || is_ia32_Set(n) || is_ia32_Jcc(n)) {
291 long pnc = get_ia32_condcode(n);
292 fprintf(F, "pn_code = 0x%X (%s)\n", pnc, get_pnc_string(pnc & pn_Cmp_True));
294 else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
295 fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
299 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
302 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
305 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
308 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
311 fprintf(F, "latency = %d\n", get_ia32_latency(n));
314 fprintf(F, "flags =");
315 flags = get_ia32_flags(n);
316 if (flags == arch_irn_flags_none) {
320 if (flags & arch_irn_flags_dont_spill) {
321 fprintf(F, " unspillable");
323 if (flags & arch_irn_flags_rematerializable) {
324 fprintf(F, " remat");
326 if (flags & arch_irn_flags_ignore) {
327 fprintf(F, " ignore");
329 if (flags & arch_irn_flags_modify_sp) {
330 fprintf(F, " modify_sp");
333 fprintf(F, " (%d)\n", flags);
335 /* dump frame entity */
336 fprintf(F, "frame entity = ");
337 if (get_ia32_frame_ent(n)) {
338 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
346 fprintf(F, "ls_mode = ");
347 if (get_ia32_ls_mode(n)) {
348 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
356 /* dump original ir node name */
357 fprintf(F, "orig node = ");
358 if (get_ia32_orig_node(n)) {
359 fprintf(F, "%s", get_ia32_orig_node(n));
367 fprintf(F, "=== IA32 attr end ===\n");
368 /* end of: case dump_node_info_txt */
377 /***************************************************************************************************
379 * | | | | | | / / | | | | | | | |
380 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
381 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
382 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
383 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
386 ***************************************************************************************************/
388 ia32_attr_t *get_ia32_attr(ir_node *node) {
389 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
390 return (ia32_attr_t *)get_irn_generic_attr(node);
393 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
394 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
395 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
398 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
399 ia32_attr_t *attr = get_ia32_attr(node);
400 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
404 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
405 const ia32_attr_t *attr = get_ia32_attr_const(node);
406 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
410 const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
411 const ia32_attr_t *attr = get_ia32_attr_const(node);
412 const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
417 ia32_immediate_attr_t *get_ia32_immediate_attr(ir_node *node) {
418 ia32_attr_t *attr = get_ia32_attr(node);
419 ia32_immediate_attr_t *imm_attr = CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
424 const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
426 const ia32_attr_t *attr = get_ia32_attr_const(node);
427 const ia32_immediate_attr_t *imm_attr = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
432 ia32_condcode_attr_t *get_ia32_condcode_attr(ir_node *node) {
433 ia32_attr_t *attr = get_ia32_attr(node);
434 ia32_condcode_attr_t *cc_attr = CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
439 const ia32_condcode_attr_t *get_ia32_condcode_attr_const(const ir_node *node) {
440 const ia32_attr_t *attr = get_ia32_attr_const(node);
441 const ia32_condcode_attr_t *cc_attr = CONST_CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
446 ia32_copyb_attr_t *get_ia32_copyb_attr(ir_node *node) {
447 ia32_attr_t *attr = get_ia32_attr(node);
448 ia32_copyb_attr_t *copyb_attr = CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
453 const ia32_copyb_attr_t *get_ia32_copyb_attr_const(const ir_node *node) {
454 const ia32_attr_t *attr = get_ia32_attr_const(node);
455 const ia32_copyb_attr_t *copyb_attr = CONST_CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
461 * Gets the type of an ia32 node.
463 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
464 const ia32_attr_t *attr = get_ia32_attr_const(node);
465 return attr->data.tp;
469 * Sets the type of an ia32 node.
471 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
472 ia32_attr_t *attr = get_ia32_attr(node);
477 * Gets the supported address mode of an ia32 node
479 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
480 const ia32_attr_t *attr = get_ia32_attr_const(node);
481 return attr->data.am_support;
484 ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
485 const ia32_attr_t *attr = get_ia32_attr_const(node);
486 return attr->data.am_arity;
490 * Sets the supported address mode of an ia32 node
492 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
493 ia32_am_arity_t arity) {
494 ia32_attr_t *attr = get_ia32_attr(node);
495 attr->data.am_support = am_tp;
496 attr->data.am_arity = arity;
498 assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
499 (am_tp != ia32_am_None &&
500 ((arity == ia32_am_unary) || (arity == ia32_am_binary) || (arity == ia32_am_ternary))));
504 * Gets the address mode offset as int.
506 int get_ia32_am_offs_int(const ir_node *node) {
507 const ia32_attr_t *attr = get_ia32_attr_const(node);
508 return attr->am_offs;
512 * Sets the address mode offset from an int.
514 void set_ia32_am_offs_int(ir_node *node, int offset) {
515 ia32_attr_t *attr = get_ia32_attr(node);
516 attr->am_offs = offset;
519 void add_ia32_am_offs_int(ir_node *node, int offset) {
520 ia32_attr_t *attr = get_ia32_attr(node);
521 attr->am_offs += offset;
525 * Returns the symconst entity associated to address mode.
527 ir_entity *get_ia32_am_sc(const ir_node *node) {
528 const ia32_attr_t *attr = get_ia32_attr_const(node);
533 * Sets the symconst entity associated to address mode.
535 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
536 ia32_attr_t *attr = get_ia32_attr(node);
537 attr->am_sc = entity;
541 * Sets the sign bit for address mode symconst.
543 void set_ia32_am_sc_sign(ir_node *node) {
544 ia32_attr_t *attr = get_ia32_attr(node);
545 attr->data.am_sc_sign = 1;
549 * Clears the sign bit for address mode symconst.
551 void clear_ia32_am_sc_sign(ir_node *node) {
552 ia32_attr_t *attr = get_ia32_attr(node);
553 attr->data.am_sc_sign = 0;
557 * Returns the sign bit for address mode symconst.
559 int is_ia32_am_sc_sign(const ir_node *node) {
560 const ia32_attr_t *attr = get_ia32_attr_const(node);
561 return attr->data.am_sc_sign;
565 * Gets the addr mode const.
567 int get_ia32_am_scale(const ir_node *node) {
568 const ia32_attr_t *attr = get_ia32_attr_const(node);
569 return attr->data.am_scale;
573 * Sets the index register scale for address mode.
575 void set_ia32_am_scale(ir_node *node, int scale) {
576 ia32_attr_t *attr = get_ia32_attr(node);
577 attr->data.am_scale = scale;
580 void ia32_copy_am_attrs(ir_node *to, const ir_node *from)
582 set_ia32_ls_mode(to, get_ia32_ls_mode(from));
583 set_ia32_am_scale(to, get_ia32_am_scale(from));
584 set_ia32_am_sc(to, get_ia32_am_sc(from));
585 if(is_ia32_am_sc_sign(from))
586 set_ia32_am_sc_sign(to);
587 add_ia32_am_offs_int(to, get_ia32_am_offs_int(from));
588 set_ia32_frame_ent(to, get_ia32_frame_ent(from));
589 if (is_ia32_use_frame(from))
590 set_ia32_use_frame(to);
594 * Sets the uses_frame flag.
596 void set_ia32_use_frame(ir_node *node) {
597 ia32_attr_t *attr = get_ia32_attr(node);
598 attr->data.use_frame = 1;
602 * Clears the uses_frame flag.
604 void clear_ia32_use_frame(ir_node *node) {
605 ia32_attr_t *attr = get_ia32_attr(node);
606 attr->data.use_frame = 0;
610 * Gets the uses_frame flag.
612 int is_ia32_use_frame(const ir_node *node) {
613 const ia32_attr_t *attr = get_ia32_attr_const(node);
614 return attr->data.use_frame;
618 * Sets node to commutative.
620 void set_ia32_commutative(ir_node *node) {
621 ia32_attr_t *attr = get_ia32_attr(node);
622 attr->data.is_commutative = 1;
626 * Sets node to non-commutative.
628 void clear_ia32_commutative(ir_node *node) {
629 ia32_attr_t *attr = get_ia32_attr(node);
630 attr->data.is_commutative = 0;
634 * Checks if node is commutative.
636 int is_ia32_commutative(const ir_node *node) {
637 const ia32_attr_t *attr = get_ia32_attr_const(node);
638 return attr->data.is_commutative;
641 void set_ia32_need_stackent(ir_node *node) {
642 ia32_attr_t *attr = get_ia32_attr(node);
643 attr->data.need_stackent = 1;
646 void clear_ia32_need_stackent(ir_node *node) {
647 ia32_attr_t *attr = get_ia32_attr(node);
648 attr->data.need_stackent = 0;
651 int is_ia32_need_stackent(const ir_node *node) {
652 const ia32_attr_t *attr = get_ia32_attr_const(node);
653 return attr->data.need_stackent;
657 * Gets the mode of the stored/loaded value (only set for Store/Load)
659 ir_mode *get_ia32_ls_mode(const ir_node *node) {
660 const ia32_attr_t *attr = get_ia32_attr_const(node);
661 return attr->ls_mode;
665 * Sets the mode of the stored/loaded value (only set for Store/Load)
667 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
668 ia32_attr_t *attr = get_ia32_attr(node);
669 attr->ls_mode = mode;
673 * Gets the frame entity assigned to this node.
675 ir_entity *get_ia32_frame_ent(const ir_node *node) {
676 const ia32_attr_t *attr = get_ia32_attr_const(node);
677 return attr->frame_ent;
681 * Sets the frame entity for this node.
683 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
684 ia32_attr_t *attr = get_ia32_attr(node);
685 attr->frame_ent = ent;
687 set_ia32_use_frame(node);
689 clear_ia32_use_frame(node);
694 * Gets the instruction latency.
696 unsigned get_ia32_latency(const ir_node *node) {
697 const ir_op *op = get_irn_op(node);
698 const ia32_op_attr_t *op_attr = (ia32_op_attr_t*) get_op_attr(op);
699 return op_attr->latency;
703 * Returns the argument register requirements of an ia32 node.
705 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
706 const ia32_attr_t *attr = get_ia32_attr_const(node);
711 * Sets the argument register requirements of an ia32 node.
713 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
714 ia32_attr_t *attr = get_ia32_attr(node);
719 * Returns the result register requirements of an ia32 node.
721 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
722 const ia32_attr_t *attr = get_ia32_attr_const(node);
723 return attr->out_req;
727 * Sets the result register requirements of an ia32 node.
729 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
730 ia32_attr_t *attr = get_ia32_attr(node);
731 attr->out_req = reqs;
735 * Returns the argument register requirement at position pos of an ia32 node.
737 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
738 const ia32_attr_t *attr = get_ia32_attr_const(node);
739 if(attr->in_req == NULL)
740 return arch_no_register_req;
742 return attr->in_req[pos];
746 * Returns the result register requirement at position pos of an ia32 node.
748 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
749 const ia32_attr_t *attr = get_ia32_attr_const(node);
750 if(attr->out_req == NULL)
751 return arch_no_register_req;
753 return attr->out_req[pos];
757 * Sets the OUT register requirements at position pos.
759 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
760 ia32_attr_t *attr = get_ia32_attr(node);
761 attr->out_req[pos] = req;
765 * Sets the IN register requirements at position pos.
767 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
768 ia32_attr_t *attr = get_ia32_attr(node);
769 attr->in_req[pos] = req;
773 * Returns the register flag of an ia32 node.
775 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
776 const ia32_attr_t *attr = get_ia32_attr_const(node);
777 return attr->data.flags;
781 * Sets the register flag of an ia32 node.
783 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
784 ia32_attr_t *attr = get_ia32_attr(node);
785 attr->data.flags = flags;
788 void add_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
789 ia32_attr_t *attr = get_ia32_attr(node);
790 attr->data.flags |= flags;
794 * Returns the result register slots of an ia32 node.
796 const arch_register_t **get_ia32_slots(const ir_node *node) {
797 const ia32_attr_t *attr = get_ia32_attr_const(node);
802 * Returns the number of results.
804 int get_ia32_n_res(const ir_node *node) {
805 const ia32_attr_t *attr = get_ia32_attr_const(node);
806 return ARR_LEN(attr->slots);
810 * Returns the condition code of a node.
812 long get_ia32_condcode(const ir_node *node)
814 const ia32_condcode_attr_t *attr = get_ia32_condcode_attr_const(node);
815 return attr->pn_code;
819 * Sets the condition code of a node
821 void set_ia32_condcode(ir_node *node, long code)
823 ia32_condcode_attr_t *attr = get_ia32_condcode_attr(node);
824 attr->pn_code = code;
828 * Returns the condition code of a node.
830 unsigned get_ia32_copyb_size(const ir_node *node)
832 const ia32_copyb_attr_t *attr = get_ia32_copyb_attr_const(node);
837 * Sets the flags for the n'th out.
839 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
840 ia32_attr_t *attr = get_ia32_attr(node);
841 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
842 attr->out_flags[pos] = flags;
846 * Gets the flags for the n'th out.
848 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
849 const ia32_attr_t *attr = get_ia32_attr_const(node);
850 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
851 return attr->out_flags[pos];
855 * Get the list of available execution units.
857 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
858 const ia32_attr_t *attr = get_ia32_attr_const(node);
859 return attr->exec_units;
863 * Get the exception label attribute.
865 unsigned get_ia32_exc_label(const ir_node *node) {
866 const ia32_attr_t *attr = get_ia32_attr_const(node);
867 return attr->data.has_except_label;
871 * Set the exception label attribute.
873 void set_ia32_exc_label(ir_node *node, unsigned flag) {
874 ia32_attr_t *attr = get_ia32_attr(node);
875 attr->data.has_except_label = flag;
879 * Return the exception label id.
881 ir_label_t get_ia32_exc_label_id(const ir_node *node) {
882 const ia32_attr_t *attr = get_ia32_attr_const(node);
884 assert(attr->data.has_except_label);
885 return attr->exc_label;
889 * Assign the exception label id.
891 void set_ia32_exc_label_id(ir_node *node, ir_label_t id) {
892 ia32_attr_t *attr = get_ia32_attr(node);
894 assert(attr->data.has_except_label);
895 attr->exc_label = id;
901 * Returns the name of the original ir node.
903 const char *get_ia32_orig_node(const ir_node *node) {
904 const ia32_attr_t *attr = get_ia32_attr_const(node);
905 return attr->orig_node;
909 * Sets the name of the original ir node.
911 void set_ia32_orig_node(ir_node *node, const char *name) {
912 ia32_attr_t *attr = get_ia32_attr(node);
913 attr->orig_node = name;
918 /******************************************************************************************************
920 * (_) | | | | | | / _| | | (_)
921 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
922 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
923 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
924 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
927 ******************************************************************************************************/
930 * Returns whether or not the node is an AddrModeS node.
932 int is_ia32_AddrModeS(const ir_node *node) {
933 const ia32_attr_t *attr = get_ia32_attr_const(node);
934 return (attr->data.tp == ia32_AddrModeS);
938 * Returns whether or not the node is an AddrModeD node.
940 int is_ia32_AddrModeD(const ir_node *node) {
941 const ia32_attr_t *attr = get_ia32_attr_const(node);
942 return (attr->data.tp == ia32_AddrModeD);
946 * Checks if node is a Load or xLoad/vfLoad.
948 int is_ia32_Ld(const ir_node *node) {
949 int op = get_ia32_irn_opcode(node);
950 return op == iro_ia32_Load ||
951 op == iro_ia32_xLoad ||
952 op == iro_ia32_vfld ||
957 * Checks if node is a Store or xStore/vfStore.
959 int is_ia32_St(const ir_node *node) {
960 int op = get_ia32_irn_opcode(node);
961 return op == iro_ia32_Store ||
962 op == iro_ia32_Store8Bit ||
963 op == iro_ia32_xStore ||
964 op == iro_ia32_vfst ||
965 op == iro_ia32_fst ||
970 * Returns the name of the OUT register at position pos.
972 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
973 const ia32_attr_t *attr = get_ia32_attr_const(node);
975 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
976 assert(attr->slots[pos] && "No register assigned");
978 return arch_register_get_name(attr->slots[pos]);
982 * Returns the index of the OUT register at position pos within its register class.
984 int get_ia32_out_regnr(const ir_node *node, int pos) {
985 const ia32_attr_t *attr = get_ia32_attr_const(node);
987 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
988 assert(attr->slots[pos] && "No register assigned");
990 return arch_register_get_index(attr->slots[pos]);
993 void ia32_swap_left_right(ir_node *node)
995 ia32_attr_t *attr = get_ia32_attr(node);
996 ir_node *left = get_irn_n(node, n_ia32_binary_left);
997 ir_node *right = get_irn_n(node, n_ia32_binary_right);
999 assert(is_ia32_commutative(node));
1000 attr->data.ins_permuted = !attr->data.ins_permuted;
1001 set_irn_n(node, n_ia32_binary_left, right);
1002 set_irn_n(node, n_ia32_binary_right, left);
1006 * Returns the OUT register at position pos.
1008 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
1009 const ia32_attr_t *attr = get_ia32_attr_const(node);
1011 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1012 assert(attr->slots[pos] && "No register assigned");
1014 return attr->slots[pos];
1018 * Initializes the nodes attributes.
1020 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1021 const arch_register_req_t **in_reqs,
1022 const arch_register_req_t **out_reqs,
1023 const be_execution_unit_t ***execution_units,
1026 ir_graph *irg = get_irn_irg(node);
1027 struct obstack *obst = get_irg_obstack(irg);
1028 ia32_attr_t *attr = get_ia32_attr(node);
1030 set_ia32_flags(node, flags);
1031 set_ia32_in_req_all(node, in_reqs);
1032 set_ia32_out_req_all(node, out_reqs);
1034 attr->exec_units = execution_units;
1036 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1039 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1040 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1042 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
1043 /* void* cast to suppress an incorrect warning on MSVC */
1044 memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0]));
1048 init_ia32_x87_attributes(ir_node *res)
1051 ia32_attr_t *attr = get_ia32_attr(res);
1052 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1056 ia32_current_cg->do_x87_sim = 1;
1060 init_ia32_asm_attributes(ir_node *res)
1063 ia32_attr_t *attr = get_ia32_attr(res);
1064 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1071 init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
1072 int symconst_sign, long offset)
1074 ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
1077 attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
1079 attr->symconst = symconst;
1080 attr->sc_sign = symconst_sign;
1081 attr->offset = offset;
1085 init_ia32_copyb_attributes(ir_node *res, unsigned size) {
1086 ia32_copyb_attr_t *attr = get_irn_generic_attr(res);
1089 attr->attr.attr_type |= IA32_ATTR_ia32_copyb_attr_t;
1095 init_ia32_condcode_attributes(ir_node *res, long pnc) {
1096 ia32_condcode_attr_t *attr = get_irn_generic_attr(res);
1099 attr->attr.attr_type |= IA32_ATTR_ia32_condcode_attr_t;
1101 attr->pn_code = pnc;
1104 ir_node *get_ia32_result_proj(const ir_node *node)
1106 const ir_edge_t *edge;
1108 foreach_out_edge(node, edge) {
1109 ir_node *proj = get_edge_src_irn(edge);
1110 if(get_Proj_proj(proj) == 0) {
1117 /***************************************************************************************
1120 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1121 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1122 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1123 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1125 ***************************************************************************************/
1127 /* default compare operation to compare attributes */
1128 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1129 if (a->data.tp != b->data.tp)
1132 if (a->data.am_scale != b->data.am_scale
1133 || a->data.am_sc_sign != b->data.am_sc_sign
1134 || a->am_offs != b->am_offs
1135 || a->am_sc != b->am_sc
1136 || a->ls_mode != b->ls_mode)
1139 /* nodes with not yet assigned entities shouldn't be CSEd (important for
1140 * unsigned int -> double conversions */
1141 if(a->data.use_frame && a->frame_ent == NULL)
1143 if(b->data.use_frame && b->frame_ent == NULL)
1146 if (a->data.use_frame != b->data.use_frame
1147 || a->frame_ent != b->frame_ent)
1150 if (a->data.tp != b->data.tp)
1153 if (a->data.has_except_label != b->data.has_except_label)
1156 if (a->data.ins_permuted != b->data.ins_permuted
1157 || a->data.cmp_unsigned != b->data.cmp_unsigned)
1163 /** Compare nodes attributes for all "normal" nodes. */
1165 int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
1167 const ia32_attr_t* attr_a = get_ia32_attr_const(a);
1168 const ia32_attr_t* attr_b = get_ia32_attr_const(b);
1170 return ia32_compare_attr(attr_a, attr_b);
1173 /** Compare node attributes for nodes with condition code. */
1175 int ia32_compare_condcode_attr(ir_node *a, ir_node *b)
1177 const ia32_condcode_attr_t *attr_a;
1178 const ia32_condcode_attr_t *attr_b;
1180 if (ia32_compare_nodes_attr(a, b))
1183 attr_a = get_ia32_condcode_attr_const(a);
1184 attr_b = get_ia32_condcode_attr_const(b);
1186 if(attr_a->pn_code != attr_b->pn_code)
1192 /** Compare node attributes for CopyB nodes. */
1194 int ia32_compare_copyb_attr(ir_node *a, ir_node *b)
1196 const ia32_copyb_attr_t *attr_a;
1197 const ia32_copyb_attr_t *attr_b;
1199 if (ia32_compare_nodes_attr(a, b))
1202 attr_a = get_ia32_copyb_attr_const(a);
1203 attr_b = get_ia32_copyb_attr_const(b);
1205 if(attr_a->size != attr_b->size)
1212 /** Compare ASM node attributes. */
1214 int ia32_compare_asm_attr(ir_node *a, ir_node *b)
1216 const ia32_asm_attr_t *attr_a;
1217 const ia32_asm_attr_t *attr_b;
1219 if(ia32_compare_nodes_attr(a, b))
1222 attr_a = get_ia32_asm_attr_const(a);
1223 attr_b = get_ia32_asm_attr_const(b);
1225 if(attr_a->asm_text != attr_b->asm_text)
1231 /** Compare node attributes for Immediates. */
1233 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
1235 const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
1236 const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
1238 if(attr_a->symconst != attr_b->symconst ||
1239 attr_a->sc_sign != attr_b->sc_sign ||
1240 attr_a->offset != attr_b->offset)
1246 /** Compare node attributes for x87 nodes. */
1248 int ia32_compare_x87_attr(ir_node *a, ir_node *b)
1250 return ia32_compare_nodes_attr(a, b);
1254 /* copies the ia32 attributes */
1255 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1257 ir_graph *irg = get_irn_irg(new_node);
1258 struct obstack *obst = get_irg_obstack(irg);
1259 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1260 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1262 /* copy the attributes */
1263 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1265 /* copy out flags */
1266 attr_new->out_flags =
1267 DUP_ARR_D(int, obst, attr_old->out_flags);
1268 /* copy register assignments */
1270 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
1273 /* Include the generated constructor functions */
1274 #include "gen_ia32_new_nodes.c.inl"