2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the coresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same));
102 if (reqs[i]->type & arch_register_req_type_should_be_different) {
103 ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different));
112 fprintf(F, "%sreq = N/A\n", dir);
117 * Dumper interface for dumping ia32 nodes in vcg.
118 * @param n the node to dump
119 * @param F the output file
120 * @param reason indicates which kind of information should be dumped
121 * @return 0 on success or != 0 on failure
123 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
124 ir_mode *mode = NULL;
126 int i, n_res, am_flav, flags;
127 const arch_register_req_t **reqs;
128 const arch_register_t **slots;
131 case dump_node_opcode_txt:
132 fprintf(F, "%s", get_irn_opname(n));
135 case dump_node_mode_txt:
136 if (is_ia32_Ld(n) || is_ia32_St(n)) {
137 mode = get_ia32_ls_mode(n);
138 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
141 if(is_ia32_Immediate(n)) {
142 const ia32_immediate_attr_t *attr
143 = get_ia32_immediate_attr_const(n);
147 if(attr->attr.data.am_sc_sign) {
150 fputs(get_entity_name(attr->symconst), F);
152 if(attr->offset != 0) {
153 if(attr->offset > 0 && attr->symconst != NULL) {
156 fprintf(F, "%ld", attr->offset);
162 case dump_node_nodeattr_txt:
163 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
164 if(is_ia32_ImmSymConst(n)) {
165 ir_entity *ent = get_ia32_Immop_symconst(n);
166 ident *id = get_entity_ld_ident(ent);
167 fprintf(F, "[SymC %s]", get_id_str(id));
170 tarval *tv = get_ia32_Immop_tarval(n);
172 tarval_snprintf(buf, sizeof(buf), tv);
173 fprintf(F, "[%s]", buf);
177 if (! is_ia32_Lea(n)) {
178 if (is_ia32_AddrModeS(n)) {
179 fprintf(F, "[AM S] ");
181 else if (is_ia32_AddrModeD(n)) {
182 fprintf(F, "[AM D] ");
188 case dump_node_info_txt:
189 n_res = get_ia32_n_res(n);
190 fprintf(F, "=== IA32 attr begin ===\n");
192 /* dump IN requirements */
193 if (get_irn_arity(n) > 0) {
194 reqs = get_ia32_in_req_all(n);
195 dump_reg_req(F, n, reqs, 0);
198 /* dump OUT requirements */
200 reqs = get_ia32_out_req_all(n);
201 dump_reg_req(F, n, reqs, 1);
204 /* dump assigned registers */
205 slots = get_ia32_slots(n);
206 if (slots && n_res > 0) {
207 for (i = 0; i < n_res; i++) {
208 const arch_register_t *reg;
212 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
219 switch (get_ia32_op_type(n)) {
221 fprintf(F, "Normal");
224 fprintf(F, "AM Dest (Load+Store)");
227 fprintf(F, "AM Source (Load)");
230 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
235 /* dump immop type */
236 fprintf(F, "immediate = ");
237 switch (get_ia32_immop_type(n)) {
244 case ia32_ImmSymConst:
245 fprintf(F, "SymConst");
248 fprintf(F, "unknown (%d)", get_ia32_immop_type(n));
253 /* dump supported am */
254 fprintf(F, "AM support = ");
255 switch (get_ia32_am_support(n)) {
260 fprintf(F, "source only (Load)");
263 fprintf(F, "dest only (Load+Store)");
269 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
274 /* dump am flavour */
275 fprintf(F, "AM flavour =");
276 am_flav = get_ia32_am_flavour(n);
277 if (am_flav == ia32_am_N) {
281 if (am_flav & ia32_O) {
284 if (am_flav & ia32_B) {
287 if (am_flav & ia32_I) {
290 if (am_flav & ia32_S) {
294 fprintf(F, " (%d)\n", am_flav);
297 if(get_ia32_am_offs_int(n) != 0) {
298 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
301 /* dump AM symconst */
302 if(get_ia32_am_sc(n) != NULL) {
303 ir_entity *ent = get_ia32_am_sc(n);
304 ident *id = get_entity_ld_ident(ent);
305 fprintf(F, "AM symconst = %s\n", get_id_str(id));
309 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
312 if(is_ia32_SwitchJmp(n)) {
313 fprintf(F, "pn_code = %ld\n", get_ia32_pncode(n));
315 if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) {
316 long pnc = get_ia32_pncode(n);
317 fprintf(F, "pn_code = %ld (%s, unsigned)\n",
318 pnc, get_pnc_string(pnc & ~ia32_pn_Cmp_Unsigned));
320 fprintf(F, "pn_code = %ld (%s)\n", get_ia32_pncode(n),
321 get_pnc_string(get_ia32_pncode(n)));
326 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
329 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
332 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
335 fprintf(F, "emit cl instead of ecx = %d\n", is_ia32_emit_cl(n));
338 fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
341 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
344 fprintf(F, "latency = %d\n", get_ia32_latency(n));
347 fprintf(F, "flags =");
348 flags = get_ia32_flags(n);
349 if (flags == arch_irn_flags_none) {
353 if (flags & arch_irn_flags_dont_spill) {
354 fprintf(F, " unspillable");
356 if (flags & arch_irn_flags_rematerializable) {
357 fprintf(F, " remat");
359 if (flags & arch_irn_flags_ignore) {
360 fprintf(F, " ignore");
362 if (flags & arch_irn_flags_modify_sp) {
363 fprintf(F, " modify_sp");
366 fprintf(F, " (%d)\n", flags);
368 /* dump frame entity */
369 fprintf(F, "frame entity = ");
370 if (get_ia32_frame_ent(n)) {
371 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
379 fprintf(F, "ls_mode = ");
380 if (get_ia32_ls_mode(n)) {
381 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
389 /* dump original ir node name */
390 fprintf(F, "orig node = ");
391 if (get_ia32_orig_node(n)) {
392 fprintf(F, "%s", get_ia32_orig_node(n));
400 fprintf(F, "=== IA32 attr end ===\n");
401 /* end of: case dump_node_info_txt */
410 /***************************************************************************************************
412 * | | | | | | / / | | | | | | | |
413 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
414 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
415 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
416 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
419 ***************************************************************************************************/
421 ia32_attr_t *get_ia32_attr(ir_node *node) {
422 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
423 return (ia32_attr_t *)get_irn_generic_attr(node);
426 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
427 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
428 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
431 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
432 ia32_attr_t *attr = get_ia32_attr(node);
433 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
437 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
438 const ia32_attr_t *attr = get_ia32_attr_const(node);
439 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
443 const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
444 const ia32_attr_t *attr = get_ia32_attr_const(node);
445 const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
450 const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
452 const ia32_attr_t *attr = get_ia32_attr_const(node);
453 const ia32_immediate_attr_t *immediate_attr
454 = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
456 return immediate_attr;
460 * Gets the type of an ia32 node.
462 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
463 const ia32_attr_t *attr = get_ia32_attr_const(node);
464 return attr->data.tp;
468 * Sets the type of an ia32 node.
470 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
471 ia32_attr_t *attr = get_ia32_attr(node);
476 * Gets the immediate op type of an ia32 node.
478 ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
479 const ia32_attr_t *attr = get_ia32_attr_const(node);
480 return attr->data.imm_tp;
484 * Gets the supported address mode of an ia32 node
486 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
487 const ia32_attr_t *attr = get_ia32_attr_const(node);
488 return attr->data.am_support;
491 ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
492 const ia32_attr_t *attr = get_ia32_attr_const(node);
493 return attr->data.am_arity;
497 * Sets the supported address mode of an ia32 node
499 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
500 ia32_am_arity_t arity) {
501 ia32_attr_t *attr = get_ia32_attr(node);
502 attr->data.am_support = am_tp;
503 attr->data.am_arity = arity;
505 assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
506 (am_tp != ia32_am_None &&
507 ((arity == ia32_am_unary) || (arity == ia32_am_binary))));
511 * Gets the address mode flavour of an ia32 node
513 ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) {
514 const ia32_attr_t *attr = get_ia32_attr_const(node);
515 return attr->data.am_flavour;
519 * Sets the address mode flavour of an ia32 node
521 void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) {
522 ia32_attr_t *attr = get_ia32_attr(node);
523 attr->data.am_flavour = am_flavour;
527 * Gets the address mode offset as int.
529 int get_ia32_am_offs_int(const ir_node *node) {
530 const ia32_attr_t *attr = get_ia32_attr_const(node);
531 return attr->am_offs;
535 * Sets the address mode offset from an int.
537 void set_ia32_am_offs_int(ir_node *node, int offset) {
538 ia32_attr_t *attr = get_ia32_attr(node);
539 attr->am_offs = offset;
542 void add_ia32_am_offs_int(ir_node *node, int offset) {
543 ia32_attr_t *attr = get_ia32_attr(node);
544 attr->am_offs += offset;
548 * Returns the symconst entity associated to address mode.
550 ir_entity *get_ia32_am_sc(const ir_node *node) {
551 const ia32_attr_t *attr = get_ia32_attr_const(node);
556 * Sets the symconst entity associated to address mode.
558 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
559 ia32_attr_t *attr = get_ia32_attr(node);
560 attr->am_sc = entity;
564 * Sets the sign bit for address mode symconst.
566 void set_ia32_am_sc_sign(ir_node *node) {
567 ia32_attr_t *attr = get_ia32_attr(node);
568 attr->data.am_sc_sign = 1;
572 * Clears the sign bit for address mode symconst.
574 void clear_ia32_am_sc_sign(ir_node *node) {
575 ia32_attr_t *attr = get_ia32_attr(node);
576 attr->data.am_sc_sign = 0;
580 * Returns the sign bit for address mode symconst.
582 int is_ia32_am_sc_sign(const ir_node *node) {
583 const ia32_attr_t *attr = get_ia32_attr_const(node);
584 return attr->data.am_sc_sign;
588 * Gets the addr mode const.
590 int get_ia32_am_scale(const ir_node *node) {
591 const ia32_attr_t *attr = get_ia32_attr_const(node);
592 return attr->data.am_scale;
596 * Sets the index register scale for address mode.
598 void set_ia32_am_scale(ir_node *node, int scale) {
599 ia32_attr_t *attr = get_ia32_attr(node);
600 attr->data.am_scale = scale;
604 * Return the tarval of an immediate operation or NULL in case of SymConst
606 tarval *get_ia32_Immop_tarval(const ir_node *node) {
607 const ia32_attr_t *attr = get_ia32_attr_const(node);
608 assert(attr->data.imm_tp == ia32_ImmConst);
609 return attr->cnst_val.tv;
613 * Sets the attributes of an immediate operation to the specified tarval
615 void set_ia32_Immop_tarval(ir_node *node, tarval *tv) {
616 ia32_attr_t *attr = get_ia32_attr(node);
617 attr->data.imm_tp = ia32_ImmConst;
618 attr->cnst_val.tv = tv;
621 void set_ia32_Immop_symconst(ir_node *node, ir_entity *entity) {
622 ia32_attr_t *attr = get_ia32_attr(node);
623 attr->data.imm_tp = ia32_ImmSymConst;
624 attr->cnst_val.sc = entity;
627 ir_entity *get_ia32_Immop_symconst(const ir_node *node) {
628 const ia32_attr_t *attr = get_ia32_attr_const(node);
629 assert(attr->data.imm_tp == ia32_ImmSymConst);
630 return attr->cnst_val.sc;
634 * Sets the uses_frame flag.
636 void set_ia32_use_frame(ir_node *node) {
637 ia32_attr_t *attr = get_ia32_attr(node);
638 attr->data.use_frame = 1;
642 * Clears the uses_frame flag.
644 void clear_ia32_use_frame(ir_node *node) {
645 ia32_attr_t *attr = get_ia32_attr(node);
646 attr->data.use_frame = 0;
650 * Gets the uses_frame flag.
652 int is_ia32_use_frame(const ir_node *node) {
653 const ia32_attr_t *attr = get_ia32_attr_const(node);
654 return attr->data.use_frame;
658 * Sets node to commutative.
660 void set_ia32_commutative(ir_node *node) {
661 ia32_attr_t *attr = get_ia32_attr(node);
662 attr->data.is_commutative = 1;
666 * Sets node to non-commutative.
668 void clear_ia32_commutative(ir_node *node) {
669 ia32_attr_t *attr = get_ia32_attr(node);
670 attr->data.is_commutative = 0;
674 * Checks if node is commutative.
676 int is_ia32_commutative(const ir_node *node) {
677 const ia32_attr_t *attr = get_ia32_attr_const(node);
678 return attr->data.is_commutative;
684 void set_ia32_emit_cl(ir_node *node) {
685 ia32_attr_t *attr = get_ia32_attr(node);
686 attr->data.emit_cl = 1;
690 * Clears node emit_cl.
692 void clear_ia32_emit_cl(ir_node *node) {
693 ia32_attr_t *attr = get_ia32_attr(node);
694 attr->data.emit_cl = 0;
698 * Checks if node needs %cl.
700 int is_ia32_emit_cl(const ir_node *node) {
701 const ia32_attr_t *attr = get_ia32_attr_const(node);
702 return attr->data.emit_cl;
708 void set_ia32_got_lea(ir_node *node) {
709 ia32_attr_t *attr = get_ia32_attr(node);
710 attr->data.got_lea = 1;
714 * Clears node got_lea.
716 void clear_ia32_got_lea(ir_node *node) {
717 ia32_attr_t *attr = get_ia32_attr(node);
718 attr->data.got_lea = 0;
722 * Checks if node got lea.
724 int is_ia32_got_lea(const ir_node *node) {
725 const ia32_attr_t *attr = get_ia32_attr_const(node);
726 return attr->data.got_lea;
729 void set_ia32_need_stackent(ir_node *node) {
730 ia32_attr_t *attr = get_ia32_attr(node);
731 attr->data.need_stackent = 1;
734 void clear_ia32_need_stackent(ir_node *node) {
735 ia32_attr_t *attr = get_ia32_attr(node);
736 attr->data.need_stackent = 0;
739 int is_ia32_need_stackent(const ir_node *node) {
740 const ia32_attr_t *attr = get_ia32_attr_const(node);
741 return attr->data.need_stackent;
745 * Gets the mode of the stored/loaded value (only set for Store/Load)
747 ir_mode *get_ia32_ls_mode(const ir_node *node) {
748 const ia32_attr_t *attr = get_ia32_attr_const(node);
749 return attr->ls_mode;
753 * Sets the mode of the stored/loaded value (only set for Store/Load)
755 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
756 ia32_attr_t *attr = get_ia32_attr(node);
757 attr->ls_mode = mode;
761 * Gets the frame entity assigned to this node.
763 ir_entity *get_ia32_frame_ent(const ir_node *node) {
764 const ia32_attr_t *attr = get_ia32_attr_const(node);
765 return attr->frame_ent;
769 * Sets the frame entity for this node.
771 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
772 ia32_attr_t *attr = get_ia32_attr(node);
773 attr->frame_ent = ent;
775 set_ia32_use_frame(node);
777 clear_ia32_use_frame(node);
782 * Gets the instruction latency.
784 unsigned get_ia32_latency(const ir_node *node) {
785 const ia32_attr_t *attr = get_ia32_attr_const(node);
786 return attr->latency;
790 * Sets the instruction latency.
792 void set_ia32_latency(ir_node *node, unsigned latency) {
793 ia32_attr_t *attr = get_ia32_attr(node);
794 attr->latency = latency;
798 * Returns the argument register requirements of an ia32 node.
800 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
801 const ia32_attr_t *attr = get_ia32_attr_const(node);
806 * Sets the argument register requirements of an ia32 node.
808 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
809 ia32_attr_t *attr = get_ia32_attr(node);
814 * Returns the result register requirements of an ia32 node.
816 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
817 const ia32_attr_t *attr = get_ia32_attr_const(node);
818 return attr->out_req;
822 * Sets the result register requirements of an ia32 node.
824 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
825 ia32_attr_t *attr = get_ia32_attr(node);
826 attr->out_req = reqs;
830 * Returns the argument register requirement at position pos of an ia32 node.
832 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
833 const ia32_attr_t *attr = get_ia32_attr_const(node);
834 if(attr->in_req == NULL)
835 return arch_no_register_req;
837 return attr->in_req[pos];
841 * Returns the result register requirement at position pos of an ia32 node.
843 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
844 const ia32_attr_t *attr = get_ia32_attr_const(node);
845 if(attr->out_req == NULL)
846 return arch_no_register_req;
848 return attr->out_req[pos];
852 * Sets the OUT register requirements at position pos.
854 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
855 ia32_attr_t *attr = get_ia32_attr(node);
856 attr->out_req[pos] = req;
860 * Sets the IN register requirements at position pos.
862 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
863 ia32_attr_t *attr = get_ia32_attr(node);
864 attr->in_req[pos] = req;
868 * Returns the register flag of an ia32 node.
870 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
871 const ia32_attr_t *attr = get_ia32_attr_const(node);
872 return attr->data.flags;
876 * Sets the register flag of an ia32 node.
878 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
879 ia32_attr_t *attr = get_ia32_attr(node);
880 attr->data.flags = flags;
884 * Returns the result register slots of an ia32 node.
886 const arch_register_t **get_ia32_slots(const ir_node *node) {
887 const ia32_attr_t *attr = get_ia32_attr_const(node);
892 * Returns the number of results.
894 int get_ia32_n_res(const ir_node *node) {
895 const ia32_attr_t *attr = get_ia32_attr_const(node);
896 return ARR_LEN(attr->slots);
900 * Returns the flavour of an ia32 node,
902 ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
903 const ia32_attr_t *attr = get_ia32_attr_const(node);
904 return attr->data.op_flav;
908 * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
910 void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) {
911 ia32_attr_t *attr = get_ia32_attr(node);
912 attr->data.op_flav = op_flav;
916 * Returns the projnum code.
918 long get_ia32_pncode(const ir_node *node)
920 const ia32_attr_t *attr = get_ia32_attr_const(node);
921 return attr->pn_code;
925 * Sets the projnum code
927 void set_ia32_pncode(ir_node *node, long code)
929 ia32_attr_t *attr = get_ia32_attr(node);
930 attr->pn_code = code;
934 * Sets the flags for the n'th out.
936 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
937 ia32_attr_t *attr = get_ia32_attr(node);
938 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
939 attr->out_flags[pos] = flags;
943 * Gets the flags for the n'th out.
945 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
946 const ia32_attr_t *attr = get_ia32_attr_const(node);
947 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
948 return attr->out_flags[pos];
952 * Get the list of available execution units.
954 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
955 const ia32_attr_t *attr = get_ia32_attr_const(node);
956 return attr->exec_units;
960 * Get the exception label attribute.
962 unsigned get_ia32_exc_label(const ir_node *node) {
963 const ia32_attr_t *attr = get_ia32_attr_const(node);
964 return attr->data.except_label;
968 * Set the exception label attribute.
970 void set_ia32_exc_label(ir_node *node, unsigned flag) {
971 ia32_attr_t *attr = get_ia32_attr(node);
972 attr->data.except_label = flag;
978 * Returns the name of the original ir node.
980 const char *get_ia32_orig_node(const ir_node *node) {
981 const ia32_attr_t *attr = get_ia32_attr_const(node);
982 return attr->orig_node;
986 * Sets the name of the original ir node.
988 void set_ia32_orig_node(ir_node *node, const char *name) {
989 ia32_attr_t *attr = get_ia32_attr(node);
990 attr->orig_node = name;
995 /******************************************************************************************************
997 * (_) | | | | | | / _| | | (_)
998 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
999 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
1000 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
1001 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
1004 ******************************************************************************************************/
1007 * Copy the attributes from an ia32_Const to an Immop (Add_i, Sub_i, ...) node
1009 void copy_ia32_Immop_attr(ir_node *node, ir_node *from) {
1010 ia32_immop_type_t immop_type = get_ia32_immop_type(from);
1012 if(immop_type == ia32_ImmConst) {
1013 set_ia32_Immop_tarval(node, get_ia32_Immop_tarval(from));
1014 } else if(immop_type == ia32_ImmSymConst) {
1015 set_ia32_Immop_symconst(node, get_ia32_Immop_symconst(from));
1017 ia32_attr_t *attr = get_ia32_attr(node);
1018 assert(immop_type == ia32_ImmNone);
1019 attr->data.imm_tp = ia32_ImmNone;
1024 * Copy the attributes from a Firm Const/SymConst to an ia32_Const
1026 void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) {
1027 assert(is_ia32_Cnst(ia32_cnst) && "Need ia32_Const to set Const attr");
1029 switch (get_irn_opcode(cnst)) {
1031 set_ia32_Const_tarval(ia32_cnst, get_Const_tarval(cnst));
1034 assert(get_SymConst_kind(cnst) == symconst_addr_ent);
1035 set_ia32_Immop_symconst(ia32_cnst, get_SymConst_entity(cnst));
1038 assert(0 && "Unknown Const NYI");
1041 assert(0 && "Cannot create ia32_Const for this opcode");
1045 void set_ia32_Const_tarval(ir_node *ia32_cnst, tarval *tv) {
1047 if(mode_is_reference(get_tarval_mode(tv))) {
1048 if(tarval_is_null(tv)) {
1049 tv = get_tarval_null(mode_Iu);
1053 if(!tarval_is_long(tv))
1054 panic("Can't convert reference tarval to mode_Iu at %+F", ia32_cnst);
1055 val = get_tarval_long(tv);
1056 tv = new_tarval_from_long(val, mode_Iu);
1059 tv = tarval_convert_to(tv, mode_Iu);
1062 tv = tarval_convert_to(tv, mode_Iu);
1065 assert(tv != get_tarval_bad() && tv != get_tarval_undefined()
1067 set_ia32_Immop_tarval(ia32_cnst, tv);
1072 * Sets the AddrMode(S|D) attribute
1074 void set_ia32_AddrMode(ir_node *node, char direction) {
1075 ia32_attr_t *attr = get_ia32_attr(node);
1077 switch (direction) {
1079 attr->data.tp = ia32_AddrModeD;
1082 attr->data.tp = ia32_AddrModeS;
1085 assert(0 && "wrong AM type");
1090 * Returns whether or not the node is an immediate operation with Const.
1092 int is_ia32_ImmConst(const ir_node *node) {
1093 const ia32_attr_t *attr = get_ia32_attr_const(node);
1094 return (attr->data.imm_tp == ia32_ImmConst);
1098 * Returns whether or not the node is an immediate operation with SymConst.
1100 int is_ia32_ImmSymConst(const ir_node *node) {
1101 const ia32_attr_t *attr = get_ia32_attr_const(node);
1102 return (attr->data.imm_tp == ia32_ImmSymConst);
1106 * Returns whether or not the node is an AddrModeS node.
1108 int is_ia32_AddrModeS(const ir_node *node) {
1109 const ia32_attr_t *attr = get_ia32_attr_const(node);
1110 return (attr->data.tp == ia32_AddrModeS);
1114 * Returns whether or not the node is an AddrModeD node.
1116 int is_ia32_AddrModeD(const ir_node *node) {
1117 const ia32_attr_t *attr = get_ia32_attr_const(node);
1118 return (attr->data.tp == ia32_AddrModeD);
1122 * Checks if node is a Load or xLoad/vfLoad.
1124 int is_ia32_Ld(const ir_node *node) {
1125 int op = get_ia32_irn_opcode(node);
1126 return op == iro_ia32_Load ||
1127 op == iro_ia32_xLoad ||
1128 op == iro_ia32_vfld ||
1133 * Checks if node is a Store or xStore/vfStore.
1135 int is_ia32_St(const ir_node *node) {
1136 int op = get_ia32_irn_opcode(node);
1137 return op == iro_ia32_Store ||
1138 op == iro_ia32_Store8Bit ||
1139 op == iro_ia32_xStore ||
1140 op == iro_ia32_vfst ||
1141 op == iro_ia32_fst ||
1142 op == iro_ia32_fstp;
1146 * Checks if node is a Const or xConst/vfConst.
1148 int is_ia32_Cnst(const ir_node *node) {
1149 int op = get_ia32_irn_opcode(node);
1150 return op == iro_ia32_Const || op == iro_ia32_xConst || op == iro_ia32_vfConst;
1154 * Returns the name of the OUT register at position pos.
1156 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
1157 const ia32_attr_t *attr = get_ia32_attr_const(node);
1159 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1160 assert(attr->slots[pos] && "No register assigned");
1162 return arch_register_get_name(attr->slots[pos]);
1166 * Returns the index of the OUT register at position pos within its register class.
1168 int get_ia32_out_regnr(const ir_node *node, int pos) {
1169 const ia32_attr_t *attr = get_ia32_attr_const(node);
1171 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1172 assert(attr->slots[pos] && "No register assigned");
1174 return arch_register_get_index(attr->slots[pos]);
1178 * Returns the OUT register at position pos.
1180 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
1181 const ia32_attr_t *attr = get_ia32_attr_const(node);
1183 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1184 assert(attr->slots[pos] && "No register assigned");
1186 return attr->slots[pos];
1190 * Initializes the nodes attributes.
1192 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1193 const arch_register_req_t **in_reqs,
1194 const arch_register_req_t **out_reqs,
1195 const be_execution_unit_t ***execution_units,
1196 int n_res, unsigned latency)
1198 ir_graph *irg = get_irn_irg(node);
1199 struct obstack *obst = get_irg_obstack(irg);
1200 ia32_attr_t *attr = get_ia32_attr(node);
1202 set_ia32_flags(node, flags);
1203 set_ia32_in_req_all(node, in_reqs);
1204 set_ia32_out_req_all(node, out_reqs);
1205 set_ia32_latency(node, latency);
1207 attr->exec_units = execution_units;
1209 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1212 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1213 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1215 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
1216 memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
1220 init_ia32_x87_attributes(ir_node *res)
1223 ia32_attr_t *attr = get_ia32_attr(res);
1224 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1229 init_ia32_asm_attributes(ir_node *res)
1232 ia32_attr_t *attr = get_ia32_attr(res);
1233 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1238 init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
1239 int symconst_sign, long offset)
1241 ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
1244 attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
1246 attr->symconst = symconst;
1247 attr->attr.data.am_sc_sign = symconst_sign;
1248 attr->offset = offset;
1251 ir_node *get_ia32_result_proj(const ir_node *node)
1253 const ir_edge_t *edge;
1255 foreach_out_edge(node, edge) {
1256 ir_node *proj = get_edge_src_irn(edge);
1257 if(get_Proj_proj(proj) == 0) {
1264 /***************************************************************************************
1267 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1268 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1269 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1270 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1272 ***************************************************************************************/
1274 /* default compare operation to compare attributes */
1275 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1276 if (a->data.tp != b->data.tp
1277 || a->data.imm_tp != b->data.imm_tp)
1280 if (a->data.imm_tp == ia32_ImmConst
1281 && a->cnst_val.tv != b->cnst_val.tv)
1284 if (a->data.imm_tp == ia32_ImmSymConst
1285 && a->cnst_val.sc != b->cnst_val.sc)
1288 if (a->data.am_flavour != b->data.am_flavour
1289 || a->data.am_scale != b->data.am_scale
1290 || a->data.am_sc_sign != b->data.am_sc_sign
1291 || a->am_offs != b->am_offs
1292 || a->am_sc != b->am_sc
1293 || a->ls_mode != b->ls_mode)
1296 if (a->data.use_frame != b->data.use_frame
1297 || a->data.use_frame != b->data.use_frame
1298 || a->frame_ent != b->frame_ent)
1301 if(a->pn_code != b->pn_code)
1304 if (a->data.tp != b->data.tp
1305 || a->data.op_flav != b->data.op_flav)
1308 if (a->data.except_label != b->data.except_label)
1315 int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
1317 const ia32_attr_t* attr_a = get_ia32_attr_const(a);
1318 const ia32_attr_t* attr_b = get_ia32_attr_const(b);
1320 return ia32_compare_attr(attr_a, attr_b);
1324 int ia32_compare_x87_attr(ir_node *a, ir_node *b)
1326 return ia32_compare_nodes_attr(a, b);
1330 int ia32_compare_asm_attr(ir_node *a, ir_node *b)
1332 const ia32_asm_attr_t *attr_a;
1333 const ia32_asm_attr_t *attr_b;
1335 if(ia32_compare_nodes_attr(a, b))
1338 attr_a = get_ia32_asm_attr_const(a);
1339 attr_b = get_ia32_asm_attr_const(b);
1341 if(attr_a->asm_text != attr_b->asm_text)
1348 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
1350 const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
1351 const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
1353 if(attr_a->symconst != attr_b->symconst ||
1354 attr_a->attr.data.am_sc_sign != attr_b->attr.data.am_sc_sign ||
1355 attr_a->offset != attr_b->offset)
1361 /* copies the ia32 attributes */
1362 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1364 ir_graph *irg = get_irn_irg(new_node);
1365 struct obstack *obst = get_irg_obstack(irg);
1366 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1367 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1369 /* copy the attributes */
1370 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1372 /* copy out flags */
1373 attr_new->out_flags =
1374 DUP_ARR_D(int, obst, attr_old->out_flags);
1375 /* copy register assignments */
1377 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
1380 /* Include the generated constructor functions */
1381 #include "gen_ia32_new_nodes.c.inl"