2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the corresponding node constructors for the ia32 assembler irg.
34 #include "irgraph_t.h"
40 #include "firm_common_t.h"
45 #include "raw_bitset.h"
48 #include "../bearch_t.h"
50 #include "bearch_ia32_t.h"
51 #include "ia32_nodes_attr.h"
52 #include "ia32_new_nodes.h"
53 #include "gen_ia32_regalloc_if.h"
54 #include "gen_ia32_machine.h"
56 /***********************************************************************************
59 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
60 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
61 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
62 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
65 ***********************************************************************************/
68 * Dumps the register requirements for either in or out.
70 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
72 char *dir = inout ? "out" : "in";
73 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
77 memset(buf, 0, sizeof(buf));
80 for (i = 0; i < max; i++) {
81 fprintf(F, "%sreq #%d =", dir, i);
83 if (reqs[i]->type == arch_register_req_type_none) {
87 if (reqs[i]->type & arch_register_req_type_normal) {
88 fprintf(F, " %s", reqs[i]->cls->name);
91 if (reqs[i]->type & arch_register_req_type_limited) {
93 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
96 if (reqs[i]->type & arch_register_req_type_should_be_same) {
97 unsigned other = reqs[i]->other_same;
100 ir_fprintf(F, " same as");
101 for (i = 0; 1U << i <= other; ++i) {
102 if (other & (1U << i)) {
103 ir_fprintf(F, " %+F", get_irn_n(n, i));
108 if (reqs[i]->type & arch_register_req_type_must_be_different) {
109 unsigned other = reqs[i]->other_different;
112 ir_fprintf(F, " different from");
113 for (i = 0; 1U << i <= other; ++i) {
114 if (other & (1U << i)) {
115 ir_fprintf(F, " %+F", get_irn_n(n, i));
126 fprintf(F, "%sreq = N/A\n", dir);
131 * Dumper interface for dumping ia32 nodes in vcg.
132 * @param n the node to dump
133 * @param F the output file
134 * @param reason indicates which kind of information should be dumped
135 * @return 0 on success or != 0 on failure
137 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
138 ir_mode *mode = NULL;
141 const arch_register_req_t **reqs;
142 const arch_register_t **slots;
145 case dump_node_opcode_txt:
146 fprintf(F, "%s", get_irn_opname(n));
148 if(is_ia32_Immediate(n) || is_ia32_Const(n)) {
149 const ia32_immediate_attr_t *attr
150 = get_ia32_immediate_attr_const(n);
157 fputs(get_entity_name(attr->symconst), F);
159 if(attr->offset != 0 || attr->symconst == NULL) {
160 if(attr->offset > 0 && attr->symconst != NULL) {
163 fprintf(F, "%ld", attr->offset);
167 const ia32_attr_t *attr = get_ia32_attr_const(n);
169 if(attr->am_sc != NULL || attr->am_offs != 0)
172 if(attr->am_sc != NULL) {
173 if(attr->data.am_sc_sign) {
176 fputs(get_entity_name(attr->am_sc), F);
178 if(attr->am_offs != 0) {
179 if(attr->am_offs > 0 && attr->am_sc != NULL) {
182 fprintf(F, "%d", attr->am_offs);
185 if(attr->am_sc != NULL || attr->am_offs != 0)
190 case dump_node_mode_txt:
191 if (is_ia32_Ld(n) || is_ia32_St(n)) {
192 mode = get_ia32_ls_mode(n);
193 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
197 case dump_node_nodeattr_txt:
198 if (! is_ia32_Lea(n)) {
199 if (is_ia32_AddrModeS(n)) {
200 fprintf(F, "[AM S] ");
201 } else if (is_ia32_AddrModeD(n)) {
202 fprintf(F, "[AM D] ");
208 case dump_node_info_txt:
209 n_res = get_ia32_n_res(n);
210 fprintf(F, "=== IA32 attr begin ===\n");
212 /* dump IN requirements */
213 if (get_irn_arity(n) > 0) {
214 reqs = get_ia32_in_req_all(n);
215 dump_reg_req(F, n, reqs, 0);
218 /* dump OUT requirements */
220 reqs = get_ia32_out_req_all(n);
221 dump_reg_req(F, n, reqs, 1);
224 /* dump assigned registers */
225 slots = get_ia32_slots(n);
226 if (slots && n_res > 0) {
227 for (i = 0; i < n_res; i++) {
228 const arch_register_t *reg;
232 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
239 switch (get_ia32_op_type(n)) {
241 fprintf(F, "Normal");
244 fprintf(F, "AM Dest (Load+Store)");
247 fprintf(F, "AM Source (Load)");
250 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
255 /* dump supported am */
256 fprintf(F, "AM support = ");
257 switch (get_ia32_am_support(n)) {
258 case ia32_am_none: fputs("none\n", F); break;
259 case ia32_am_unary: fputs("source (unary)\n", F); break;
260 case ia32_am_binary: fputs("source (binary)\n", F); break;
263 fprintf(F, "unknown (%d)\n", get_ia32_am_support(n));
268 if(get_ia32_am_offs_int(n) != 0) {
269 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
272 /* dump AM symconst */
273 if(get_ia32_am_sc(n) != NULL) {
274 ir_entity *ent = get_ia32_am_sc(n);
275 ident *id = get_entity_ld_ident(ent);
276 fprintf(F, "AM symconst = %s\n", get_id_str(id));
280 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
283 if (is_ia32_SwitchJmp(n)) {
284 fprintf(F, "pn_code = %ld\n", get_ia32_condcode(n));
285 } else if (is_ia32_CMov(n) || is_ia32_Set(n) || is_ia32_Jcc(n)) {
286 ia32_attr_t *attr = get_ia32_attr(n);
287 long pnc = get_ia32_condcode(n);
288 fprintf(F, "pn_code = 0x%lX (%s)\n", pnc, get_pnc_string(pnc & pn_Cmp_True));
289 fprintf(F, "ins_permuted = %u \n", attr->data.ins_permuted);
290 fprintf(F, "cmp_unsigned = %u \n", attr->data.cmp_unsigned);
292 else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
293 fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
296 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
297 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
298 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
299 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
300 fprintf(F, "is reload = %d\n", is_ia32_is_reload(n));
301 fprintf(F, "latency = %d\n", get_ia32_latency(n));
304 fprintf(F, "flags =");
305 flags = get_ia32_flags(n);
306 if (flags == arch_irn_flags_none) {
310 if (flags & arch_irn_flags_dont_spill) {
311 fprintf(F, " unspillable");
313 if (flags & arch_irn_flags_rematerializable) {
314 fprintf(F, " remat");
316 if (flags & arch_irn_flags_ignore) {
317 fprintf(F, " ignore");
319 if (flags & arch_irn_flags_modify_sp) {
320 fprintf(F, " modify_sp");
322 if (flags & arch_irn_flags_modify_flags) {
323 fprintf(F, " modify_flags");
326 fprintf(F, " (%d)\n", flags);
328 /* dump frame entity */
329 fprintf(F, "frame entity = ");
330 if (get_ia32_frame_ent(n)) {
331 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
339 fprintf(F, "ls_mode = ");
340 if (get_ia32_ls_mode(n)) {
341 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
349 /* dump original ir node name */
350 fprintf(F, "orig node = ");
351 if (get_ia32_orig_node(n)) {
352 fprintf(F, "%s", get_ia32_orig_node(n));
360 fprintf(F, "=== IA32 attr end ===\n");
361 /* end of: case dump_node_info_txt */
370 /***************************************************************************************************
372 * | | | | | | / / | | | | | | | |
373 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
374 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
375 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
376 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
379 ***************************************************************************************************/
381 ia32_attr_t *get_ia32_attr(ir_node *node) {
382 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
383 return (ia32_attr_t *)get_irn_generic_attr(node);
386 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
387 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
388 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
391 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
392 ia32_attr_t *attr = get_ia32_attr(node);
393 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
397 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
398 const ia32_attr_t *attr = get_ia32_attr_const(node);
399 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
403 const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
404 const ia32_attr_t *attr = get_ia32_attr_const(node);
405 const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
410 ia32_immediate_attr_t *get_ia32_immediate_attr(ir_node *node) {
411 ia32_attr_t *attr = get_ia32_attr(node);
412 ia32_immediate_attr_t *imm_attr = CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
417 const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
419 const ia32_attr_t *attr = get_ia32_attr_const(node);
420 const ia32_immediate_attr_t *imm_attr = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
425 ia32_condcode_attr_t *get_ia32_condcode_attr(ir_node *node) {
426 ia32_attr_t *attr = get_ia32_attr(node);
427 ia32_condcode_attr_t *cc_attr = CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
432 const ia32_condcode_attr_t *get_ia32_condcode_attr_const(const ir_node *node) {
433 const ia32_attr_t *attr = get_ia32_attr_const(node);
434 const ia32_condcode_attr_t *cc_attr = CONST_CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
439 ia32_call_attr_t *get_ia32_call_attr(ir_node *node)
441 ia32_attr_t *attr = get_ia32_attr(node);
442 ia32_call_attr_t *call_attr = CAST_IA32_ATTR(ia32_call_attr_t, attr);
447 const ia32_call_attr_t *get_ia32_call_attr_const(const ir_node *node)
449 const ia32_attr_t *attr = get_ia32_attr_const(node);
450 const ia32_call_attr_t *call_attr = CONST_CAST_IA32_ATTR(ia32_call_attr_t, attr);
455 ia32_copyb_attr_t *get_ia32_copyb_attr(ir_node *node) {
456 ia32_attr_t *attr = get_ia32_attr(node);
457 ia32_copyb_attr_t *copyb_attr = CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
462 const ia32_copyb_attr_t *get_ia32_copyb_attr_const(const ir_node *node) {
463 const ia32_attr_t *attr = get_ia32_attr_const(node);
464 const ia32_copyb_attr_t *copyb_attr = CONST_CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
470 * Gets the type of an ia32 node.
472 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
473 const ia32_attr_t *attr = get_ia32_attr_const(node);
474 return attr->data.tp;
478 * Sets the type of an ia32 node.
480 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
481 ia32_attr_t *attr = get_ia32_attr(node);
485 ia32_am_type_t get_ia32_am_support(const ir_node *node)
487 const ia32_attr_t *attr = get_ia32_attr_const(node);
488 return attr->data.am_arity;
492 * Sets the supported address mode of an ia32 node
494 void set_ia32_am_support(ir_node *node, ia32_am_type_t arity)
496 ia32_attr_t *attr = get_ia32_attr(node);
497 attr->data.am_arity = arity;
501 * Gets the address mode offset as int.
503 int get_ia32_am_offs_int(const ir_node *node) {
504 const ia32_attr_t *attr = get_ia32_attr_const(node);
505 return attr->am_offs;
509 * Sets the address mode offset from an int.
511 void set_ia32_am_offs_int(ir_node *node, int offset) {
512 ia32_attr_t *attr = get_ia32_attr(node);
513 attr->am_offs = offset;
516 void add_ia32_am_offs_int(ir_node *node, int offset) {
517 ia32_attr_t *attr = get_ia32_attr(node);
518 attr->am_offs += offset;
522 * Returns the symconst entity associated to address mode.
524 ir_entity *get_ia32_am_sc(const ir_node *node) {
525 const ia32_attr_t *attr = get_ia32_attr_const(node);
530 * Sets the symconst entity associated to address mode.
532 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
533 ia32_attr_t *attr = get_ia32_attr(node);
534 attr->am_sc = entity;
538 * Sets the sign bit for address mode symconst.
540 void set_ia32_am_sc_sign(ir_node *node) {
541 ia32_attr_t *attr = get_ia32_attr(node);
542 attr->data.am_sc_sign = 1;
546 * Clears the sign bit for address mode symconst.
548 void clear_ia32_am_sc_sign(ir_node *node) {
549 ia32_attr_t *attr = get_ia32_attr(node);
550 attr->data.am_sc_sign = 0;
554 * Returns the sign bit for address mode symconst.
556 int is_ia32_am_sc_sign(const ir_node *node) {
557 const ia32_attr_t *attr = get_ia32_attr_const(node);
558 return attr->data.am_sc_sign;
562 * Gets the addr mode const.
564 int get_ia32_am_scale(const ir_node *node) {
565 const ia32_attr_t *attr = get_ia32_attr_const(node);
566 return attr->data.am_scale;
570 * Sets the index register scale for address mode.
572 void set_ia32_am_scale(ir_node *node, int scale) {
573 ia32_attr_t *attr = get_ia32_attr(node);
574 assert(0 <= scale && scale < 4 && "AM scale out of range");
575 attr->data.am_scale = scale;
578 void ia32_copy_am_attrs(ir_node *to, const ir_node *from)
580 set_ia32_ls_mode(to, get_ia32_ls_mode(from));
581 set_ia32_am_scale(to, get_ia32_am_scale(from));
582 set_ia32_am_sc(to, get_ia32_am_sc(from));
583 if(is_ia32_am_sc_sign(from))
584 set_ia32_am_sc_sign(to);
585 add_ia32_am_offs_int(to, get_ia32_am_offs_int(from));
586 set_ia32_frame_ent(to, get_ia32_frame_ent(from));
587 if (is_ia32_use_frame(from))
588 set_ia32_use_frame(to);
592 * Sets the uses_frame flag.
594 void set_ia32_use_frame(ir_node *node) {
595 ia32_attr_t *attr = get_ia32_attr(node);
596 attr->data.use_frame = 1;
600 * Clears the uses_frame flag.
602 void clear_ia32_use_frame(ir_node *node) {
603 ia32_attr_t *attr = get_ia32_attr(node);
604 attr->data.use_frame = 0;
608 * Gets the uses_frame flag.
610 int is_ia32_use_frame(const ir_node *node) {
611 const ia32_attr_t *attr = get_ia32_attr_const(node);
612 return attr->data.use_frame;
616 * Sets node to commutative.
618 void set_ia32_commutative(ir_node *node) {
619 ia32_attr_t *attr = get_ia32_attr(node);
620 attr->data.is_commutative = 1;
624 * Sets node to non-commutative.
626 void clear_ia32_commutative(ir_node *node) {
627 ia32_attr_t *attr = get_ia32_attr(node);
628 attr->data.is_commutative = 0;
632 * Checks if node is commutative.
634 int is_ia32_commutative(const ir_node *node) {
635 const ia32_attr_t *attr = get_ia32_attr_const(node);
636 return attr->data.is_commutative;
639 void set_ia32_need_stackent(ir_node *node) {
640 ia32_attr_t *attr = get_ia32_attr(node);
641 attr->data.need_stackent = 1;
644 void clear_ia32_need_stackent(ir_node *node) {
645 ia32_attr_t *attr = get_ia32_attr(node);
646 attr->data.need_stackent = 0;
649 int is_ia32_need_stackent(const ir_node *node) {
650 const ia32_attr_t *attr = get_ia32_attr_const(node);
651 return attr->data.need_stackent;
654 void set_ia32_is_reload(ir_node *node) {
655 ia32_attr_t *attr = get_ia32_attr(node);
656 attr->data.is_reload = 1;
659 int is_ia32_is_reload(const ir_node *node) {
660 const ia32_attr_t *attr = get_ia32_attr_const(node);
661 return attr->data.is_reload;
664 void set_ia32_is_spill(ir_node *node) {
665 ia32_attr_t *attr = get_ia32_attr(node);
666 attr->data.is_spill = 1;
669 int is_ia32_is_spill(const ir_node *node) {
670 const ia32_attr_t *attr = get_ia32_attr_const(node);
671 return attr->data.is_spill;
674 void set_ia32_is_remat(ir_node *node) {
675 ia32_attr_t *attr = get_ia32_attr(node);
676 attr->data.is_remat = 1;
679 int is_ia32_is_remat(const ir_node *node) {
680 const ia32_attr_t *attr = get_ia32_attr_const(node);
681 return attr->data.is_remat;
685 * Gets the mode of the stored/loaded value (only set for Store/Load)
687 ir_mode *get_ia32_ls_mode(const ir_node *node) {
688 const ia32_attr_t *attr = get_ia32_attr_const(node);
689 return attr->ls_mode;
693 * Sets the mode of the stored/loaded value (only set for Store/Load)
695 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
696 ia32_attr_t *attr = get_ia32_attr(node);
697 attr->ls_mode = mode;
701 * Gets the frame entity assigned to this node.
703 ir_entity *get_ia32_frame_ent(const ir_node *node) {
704 const ia32_attr_t *attr = get_ia32_attr_const(node);
705 return attr->frame_ent;
709 * Sets the frame entity for this node.
711 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
712 ia32_attr_t *attr = get_ia32_attr(node);
713 attr->frame_ent = ent;
715 set_ia32_use_frame(node);
717 clear_ia32_use_frame(node);
722 * Gets the instruction latency.
724 unsigned get_ia32_latency(const ir_node *node) {
725 const ir_op *op = get_irn_op(node);
726 const ia32_op_attr_t *op_attr = (ia32_op_attr_t*) get_op_attr(op);
727 return op_attr->latency;
731 * Returns the argument register requirements of an ia32 node.
733 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
734 const ia32_attr_t *attr = get_ia32_attr_const(node);
739 * Sets the argument register requirements of an ia32 node.
741 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
742 ia32_attr_t *attr = get_ia32_attr(node);
747 * Returns the result register requirements of an ia32 node.
749 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
750 const ia32_attr_t *attr = get_ia32_attr_const(node);
751 return attr->out_req;
755 * Sets the result register requirements of an ia32 node.
757 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
758 ia32_attr_t *attr = get_ia32_attr(node);
759 attr->out_req = reqs;
763 * Returns the argument register requirement at position pos of an ia32 node.
765 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
766 const ia32_attr_t *attr = get_ia32_attr_const(node);
767 if(attr->in_req == NULL)
768 return arch_no_register_req;
770 return attr->in_req[pos];
774 * Returns the result register requirement at position pos of an ia32 node.
776 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
777 const ia32_attr_t *attr = get_ia32_attr_const(node);
778 if(attr->out_req == NULL)
779 return arch_no_register_req;
781 return attr->out_req[pos];
785 * Sets the OUT register requirements at position pos.
787 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
788 ia32_attr_t *attr = get_ia32_attr(node);
789 attr->out_req[pos] = req;
793 * Sets the IN register requirements at position pos.
795 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
796 ia32_attr_t *attr = get_ia32_attr(node);
797 attr->in_req[pos] = req;
801 * Returns the register flag of an ia32 node.
803 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
804 const ia32_attr_t *attr = get_ia32_attr_const(node);
805 return attr->data.flags;
809 * Sets the register flag of an ia32 node.
811 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
812 ia32_attr_t *attr = get_ia32_attr(node);
813 attr->data.flags = flags;
816 void add_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
817 ia32_attr_t *attr = get_ia32_attr(node);
818 attr->data.flags |= flags;
822 * Returns the result register slots of an ia32 node.
824 const arch_register_t **get_ia32_slots(const ir_node *node) {
825 const ia32_attr_t *attr = get_ia32_attr_const(node);
830 * Returns the number of results.
832 int get_ia32_n_res(const ir_node *node) {
833 const ia32_attr_t *attr = get_ia32_attr_const(node);
834 return ARR_LEN(attr->slots);
838 * Returns the condition code of a node.
840 long get_ia32_condcode(const ir_node *node)
842 const ia32_condcode_attr_t *attr = get_ia32_condcode_attr_const(node);
843 return attr->pn_code;
847 * Sets the condition code of a node
849 void set_ia32_condcode(ir_node *node, long code)
851 ia32_condcode_attr_t *attr = get_ia32_condcode_attr(node);
852 attr->pn_code = code;
856 * Returns the condition code of a node.
858 unsigned get_ia32_copyb_size(const ir_node *node)
860 const ia32_copyb_attr_t *attr = get_ia32_copyb_attr_const(node);
865 * Sets the flags for the n'th out.
867 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
868 ia32_attr_t *attr = get_ia32_attr(node);
869 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
870 attr->out_flags[pos] = flags;
874 * Gets the flags for the n'th out.
876 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
877 const ia32_attr_t *attr = get_ia32_attr_const(node);
878 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
879 return attr->out_flags[pos];
883 * Get the list of available execution units.
885 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
886 const ia32_attr_t *attr = get_ia32_attr_const(node);
887 return attr->exec_units;
891 * Get the exception label attribute.
893 unsigned get_ia32_exc_label(const ir_node *node) {
894 const ia32_attr_t *attr = get_ia32_attr_const(node);
895 return attr->data.has_except_label;
899 * Set the exception label attribute.
901 void set_ia32_exc_label(ir_node *node, unsigned flag) {
902 ia32_attr_t *attr = get_ia32_attr(node);
903 attr->data.has_except_label = flag;
907 * Return the exception label id.
909 ir_label_t get_ia32_exc_label_id(const ir_node *node) {
910 const ia32_attr_t *attr = get_ia32_attr_const(node);
912 assert(attr->data.has_except_label);
913 return attr->exc_label;
917 * Assign the exception label id.
919 void set_ia32_exc_label_id(ir_node *node, ir_label_t id) {
920 ia32_attr_t *attr = get_ia32_attr(node);
922 assert(attr->data.has_except_label);
923 attr->exc_label = id;
929 * Returns the name of the original ir node.
931 const char *get_ia32_orig_node(const ir_node *node) {
932 const ia32_attr_t *attr = get_ia32_attr_const(node);
933 return attr->orig_node;
937 * Sets the name of the original ir node.
939 void set_ia32_orig_node(ir_node *node, const char *name) {
940 ia32_attr_t *attr = get_ia32_attr(node);
941 attr->orig_node = name;
946 /******************************************************************************************************
948 * (_) | | | | | | / _| | | (_)
949 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
950 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
951 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
952 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
955 ******************************************************************************************************/
958 * Returns whether or not the node is an AddrModeS node.
960 int is_ia32_AddrModeS(const ir_node *node) {
961 const ia32_attr_t *attr = get_ia32_attr_const(node);
962 return (attr->data.tp == ia32_AddrModeS);
966 * Returns whether or not the node is an AddrModeD node.
968 int is_ia32_AddrModeD(const ir_node *node) {
969 const ia32_attr_t *attr = get_ia32_attr_const(node);
970 return (attr->data.tp == ia32_AddrModeD);
974 * Checks if node is a Load or xLoad/vfLoad.
976 int is_ia32_Ld(const ir_node *node) {
977 int op = get_ia32_irn_opcode(node);
978 return op == iro_ia32_Load ||
979 op == iro_ia32_xLoad ||
980 op == iro_ia32_vfld ||
985 * Checks if node is a Store or xStore/vfStore.
987 int is_ia32_St(const ir_node *node) {
988 int op = get_ia32_irn_opcode(node);
989 return op == iro_ia32_Store ||
990 op == iro_ia32_Store8Bit ||
991 op == iro_ia32_xStore ||
992 op == iro_ia32_vfst ||
993 op == iro_ia32_fst ||
998 * Returns the name of the OUT register at position pos.
1000 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
1001 const ia32_attr_t *attr = get_ia32_attr_const(node);
1003 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1004 assert(attr->slots[pos] && "No register assigned");
1006 return arch_register_get_name(attr->slots[pos]);
1009 void ia32_swap_left_right(ir_node *node)
1011 ia32_attr_t *attr = get_ia32_attr(node);
1012 ir_node *left = get_irn_n(node, n_ia32_binary_left);
1013 ir_node *right = get_irn_n(node, n_ia32_binary_right);
1015 assert(is_ia32_commutative(node));
1016 attr->data.ins_permuted = !attr->data.ins_permuted;
1017 set_irn_n(node, n_ia32_binary_left, right);
1018 set_irn_n(node, n_ia32_binary_right, left);
1022 * Returns the OUT register at position pos.
1024 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
1025 const ia32_attr_t *attr = get_ia32_attr_const(node);
1027 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1028 assert(attr->slots[pos] && "No register assigned");
1030 return attr->slots[pos];
1034 * Initializes the nodes attributes.
1036 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1037 const arch_register_req_t **in_reqs,
1038 const arch_register_req_t **out_reqs,
1039 const be_execution_unit_t ***execution_units,
1042 ir_graph *irg = get_irn_irg(node);
1043 struct obstack *obst = get_irg_obstack(irg);
1044 ia32_attr_t *attr = get_ia32_attr(node);
1046 set_ia32_flags(node, flags);
1047 set_ia32_in_req_all(node, in_reqs);
1048 set_ia32_out_req_all(node, out_reqs);
1050 attr->exec_units = execution_units;
1052 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1055 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1056 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1058 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
1059 /* void* cast to suppress an incorrect warning on MSVC */
1060 memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0]));
1064 init_ia32_x87_attributes(ir_node *res)
1067 ia32_attr_t *attr = get_ia32_attr(res);
1068 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1072 ia32_current_cg->do_x87_sim = 1;
1076 init_ia32_asm_attributes(ir_node *res)
1079 ia32_attr_t *attr = get_ia32_attr(res);
1080 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1087 init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
1088 int symconst_sign, long offset)
1090 ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
1093 attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
1095 attr->symconst = symconst;
1096 attr->sc_sign = symconst_sign;
1097 attr->offset = offset;
1100 void init_ia32_call_attributes(ir_node *const res, unsigned const pop, ir_type *const call_tp)
1102 ia32_call_attr_t *attr = get_irn_generic_attr(res);
1105 attr->attr.attr_type |= IA32_ATTR_ia32_call_attr_t;
1108 attr->call_tp = call_tp;
1112 init_ia32_copyb_attributes(ir_node *res, unsigned size) {
1113 ia32_copyb_attr_t *attr = get_irn_generic_attr(res);
1116 attr->attr.attr_type |= IA32_ATTR_ia32_copyb_attr_t;
1122 init_ia32_condcode_attributes(ir_node *res, long pnc) {
1123 ia32_condcode_attr_t *attr = get_irn_generic_attr(res);
1126 attr->attr.attr_type |= IA32_ATTR_ia32_condcode_attr_t;
1128 attr->pn_code = pnc;
1131 /***************************************************************************************
1134 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1135 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1136 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1137 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1139 ***************************************************************************************/
1141 /* default compare operation to compare attributes */
1142 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1143 if (a->data.tp != b->data.tp)
1146 if (a->data.am_scale != b->data.am_scale
1147 || a->data.am_sc_sign != b->data.am_sc_sign
1148 || a->am_offs != b->am_offs
1149 || a->am_sc != b->am_sc
1150 || a->ls_mode != b->ls_mode)
1153 /* nodes with not yet assigned entities shouldn't be CSEd (important for
1154 * unsigned int -> double conversions */
1155 if(a->data.use_frame && a->frame_ent == NULL)
1157 if(b->data.use_frame && b->frame_ent == NULL)
1160 if (a->data.use_frame != b->data.use_frame
1161 || a->frame_ent != b->frame_ent)
1164 if (a->data.tp != b->data.tp)
1167 if (a->data.has_except_label != b->data.has_except_label)
1170 if (a->data.ins_permuted != b->data.ins_permuted
1171 || a->data.cmp_unsigned != b->data.cmp_unsigned)
1177 /** Compare nodes attributes for all "normal" nodes. */
1179 int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
1181 const ia32_attr_t* attr_a = get_ia32_attr_const(a);
1182 const ia32_attr_t* attr_b = get_ia32_attr_const(b);
1184 return ia32_compare_attr(attr_a, attr_b);
1187 /** Compare node attributes for nodes with condition code. */
1189 int ia32_compare_condcode_attr(ir_node *a, ir_node *b)
1191 const ia32_condcode_attr_t *attr_a;
1192 const ia32_condcode_attr_t *attr_b;
1194 if (ia32_compare_nodes_attr(a, b))
1197 attr_a = get_ia32_condcode_attr_const(a);
1198 attr_b = get_ia32_condcode_attr_const(b);
1200 if(attr_a->pn_code != attr_b->pn_code)
1206 static int ia32_compare_call_attr(ir_node *a, ir_node *b)
1208 const ia32_call_attr_t *attr_a;
1209 const ia32_call_attr_t *attr_b;
1211 if (ia32_compare_nodes_attr(a, b))
1214 attr_a = get_ia32_call_attr_const(a);
1215 attr_b = get_ia32_call_attr_const(b);
1217 if (attr_a->pop != attr_b->pop)
1220 if (attr_a->call_tp != attr_b->call_tp)
1226 /** Compare node attributes for CopyB nodes. */
1228 int ia32_compare_copyb_attr(ir_node *a, ir_node *b)
1230 const ia32_copyb_attr_t *attr_a;
1231 const ia32_copyb_attr_t *attr_b;
1233 if (ia32_compare_nodes_attr(a, b))
1236 attr_a = get_ia32_copyb_attr_const(a);
1237 attr_b = get_ia32_copyb_attr_const(b);
1239 if(attr_a->size != attr_b->size)
1246 /** Compare ASM node attributes. */
1248 int ia32_compare_asm_attr(ir_node *a, ir_node *b)
1250 const ia32_asm_attr_t *attr_a;
1251 const ia32_asm_attr_t *attr_b;
1253 if(ia32_compare_nodes_attr(a, b))
1256 attr_a = get_ia32_asm_attr_const(a);
1257 attr_b = get_ia32_asm_attr_const(b);
1259 if(attr_a->asm_text != attr_b->asm_text)
1266 * Hash function for Immediates
1268 static unsigned ia32_hash_Immediate(const ir_node *irn) {
1269 const ia32_immediate_attr_t *a = get_ia32_immediate_attr_const(irn);
1271 return HASH_PTR(a->symconst) + (a->sc_sign << 16) + a->offset;
1274 /** Compare node attributes for Immediates. */
1276 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
1278 const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
1279 const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
1281 if(attr_a->symconst != attr_b->symconst ||
1282 attr_a->sc_sign != attr_b->sc_sign ||
1283 attr_a->offset != attr_b->offset)
1289 /** Compare node attributes for x87 nodes. */
1291 int ia32_compare_x87_attr(ir_node *a, ir_node *b)
1293 return ia32_compare_nodes_attr(a, b);
1297 /* copies the ia32 attributes */
1298 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1300 ir_graph *irg = get_irn_irg(new_node);
1301 struct obstack *obst = get_irg_obstack(irg);
1302 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1303 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1305 /* copy the attributes */
1306 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1308 /* copy out flags */
1309 attr_new->out_flags =
1310 DUP_ARR_D(int, obst, attr_old->out_flags);
1311 /* copy register assignments */
1313 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
1316 /* Include the generated constructor functions */
1317 #include "gen_ia32_new_nodes.c.inl"