2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the corresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same[0]));
100 if (reqs[i]->other_same[1] != -1)
101 ir_fprintf(F, " or %+F", get_irn_n(n, reqs[i]->other_same[1]));
104 if (reqs[i]->type & arch_register_req_type_should_be_different) {
105 ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different));
114 fprintf(F, "%sreq = N/A\n", dir);
119 * Dumper interface for dumping ia32 nodes in vcg.
120 * @param n the node to dump
121 * @param F the output file
122 * @param reason indicates which kind of information should be dumped
123 * @return 0 on success or != 0 on failure
125 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
126 ir_mode *mode = NULL;
129 const arch_register_req_t **reqs;
130 const arch_register_t **slots;
133 case dump_node_opcode_txt:
134 fprintf(F, "%s", get_irn_opname(n));
136 if(is_ia32_Immediate(n) || is_ia32_Const(n)) {
137 const ia32_immediate_attr_t *attr
138 = get_ia32_immediate_attr_const(n);
142 if(attr->attr.data.am_sc_sign) {
145 fputs(get_entity_name(attr->symconst), F);
147 if(attr->offset != 0 || attr->symconst == NULL) {
148 if(attr->offset > 0 && attr->symconst != NULL) {
151 fprintf(F, "%ld", attr->offset);
156 const ia32_attr_t *attr = get_ia32_attr_const(n);
158 if(attr->am_sc != NULL || attr->am_offs != 0)
161 if(attr->am_sc != NULL) {
162 if(attr->data.am_sc_sign) {
165 fputs(get_entity_name(attr->am_sc), F);
167 if(attr->am_offs != 0) {
168 if(attr->am_offs > 0 && attr->am_sc != NULL) {
171 fprintf(F, "%d", attr->am_offs);
174 if(attr->am_sc != NULL || attr->am_offs != 0)
179 case dump_node_mode_txt:
180 if (is_ia32_Ld(n) || is_ia32_St(n)) {
181 mode = get_ia32_ls_mode(n);
182 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
186 case dump_node_nodeattr_txt:
187 if (! is_ia32_Lea(n)) {
188 if (is_ia32_AddrModeS(n)) {
189 fprintf(F, "[AM S] ");
190 } else if (is_ia32_AddrModeD(n)) {
191 fprintf(F, "[AM D] ");
197 case dump_node_info_txt:
198 n_res = get_ia32_n_res(n);
199 fprintf(F, "=== IA32 attr begin ===\n");
201 /* dump IN requirements */
202 if (get_irn_arity(n) > 0) {
203 reqs = get_ia32_in_req_all(n);
204 dump_reg_req(F, n, reqs, 0);
207 /* dump OUT requirements */
209 reqs = get_ia32_out_req_all(n);
210 dump_reg_req(F, n, reqs, 1);
213 /* dump assigned registers */
214 slots = get_ia32_slots(n);
215 if (slots && n_res > 0) {
216 for (i = 0; i < n_res; i++) {
217 const arch_register_t *reg;
221 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
228 switch (get_ia32_op_type(n)) {
230 fprintf(F, "Normal");
233 fprintf(F, "AM Dest (Load+Store)");
236 fprintf(F, "AM Source (Load)");
239 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
244 /* dump supported am */
245 fprintf(F, "AM support = ");
246 switch (get_ia32_am_support(n)) {
251 fprintf(F, "source only (Load)");
254 fprintf(F, "dest only (Load+Store)");
260 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
266 if(get_ia32_am_offs_int(n) != 0) {
267 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
270 /* dump AM symconst */
271 if(get_ia32_am_sc(n) != NULL) {
272 ir_entity *ent = get_ia32_am_sc(n);
273 ident *id = get_entity_ld_ident(ent);
274 fprintf(F, "AM symconst = %s\n", get_id_str(id));
278 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
281 if(is_ia32_SwitchJmp(n) || is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
282 fprintf(F, "pn_code = %ld\n", get_ia32_pncode(n));
284 fprintf(F, "pn_code = %ld (%s)\n", get_ia32_pncode(n),
285 get_pnc_string(get_ia32_pncode(n)));
289 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
292 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
295 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
298 fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
301 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
304 fprintf(F, "latency = %d\n", get_ia32_latency(n));
307 fprintf(F, "flags =");
308 flags = get_ia32_flags(n);
309 if (flags == arch_irn_flags_none) {
313 if (flags & arch_irn_flags_dont_spill) {
314 fprintf(F, " unspillable");
316 if (flags & arch_irn_flags_rematerializable) {
317 fprintf(F, " remat");
319 if (flags & arch_irn_flags_ignore) {
320 fprintf(F, " ignore");
322 if (flags & arch_irn_flags_modify_sp) {
323 fprintf(F, " modify_sp");
326 fprintf(F, " (%d)\n", flags);
328 /* dump frame entity */
329 fprintf(F, "frame entity = ");
330 if (get_ia32_frame_ent(n)) {
331 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
339 fprintf(F, "ls_mode = ");
340 if (get_ia32_ls_mode(n)) {
341 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
349 /* dump original ir node name */
350 fprintf(F, "orig node = ");
351 if (get_ia32_orig_node(n)) {
352 fprintf(F, "%s", get_ia32_orig_node(n));
360 fprintf(F, "=== IA32 attr end ===\n");
361 /* end of: case dump_node_info_txt */
370 /***************************************************************************************************
372 * | | | | | | / / | | | | | | | |
373 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
374 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
375 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
376 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
379 ***************************************************************************************************/
381 ia32_attr_t *get_ia32_attr(ir_node *node) {
382 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
383 return (ia32_attr_t *)get_irn_generic_attr(node);
386 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
387 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
388 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
391 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
392 ia32_attr_t *attr = get_ia32_attr(node);
393 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
397 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
398 const ia32_attr_t *attr = get_ia32_attr_const(node);
399 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
403 const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
404 const ia32_attr_t *attr = get_ia32_attr_const(node);
405 const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
410 const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
412 const ia32_attr_t *attr = get_ia32_attr_const(node);
413 const ia32_immediate_attr_t *immediate_attr
414 = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
416 return immediate_attr;
420 * Gets the type of an ia32 node.
422 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
423 const ia32_attr_t *attr = get_ia32_attr_const(node);
424 return attr->data.tp;
428 * Sets the type of an ia32 node.
430 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
431 ia32_attr_t *attr = get_ia32_attr(node);
436 * Gets the supported address mode of an ia32 node
438 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
439 const ia32_attr_t *attr = get_ia32_attr_const(node);
440 return attr->data.am_support;
443 ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
444 const ia32_attr_t *attr = get_ia32_attr_const(node);
445 return attr->data.am_arity;
449 * Sets the supported address mode of an ia32 node
451 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
452 ia32_am_arity_t arity) {
453 ia32_attr_t *attr = get_ia32_attr(node);
454 attr->data.am_support = am_tp;
455 attr->data.am_arity = arity;
457 assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
458 (am_tp != ia32_am_None &&
459 ((arity == ia32_am_unary) || (arity == ia32_am_binary) || (arity == ia32_am_ternary))));
463 * Gets the address mode offset as int.
465 int get_ia32_am_offs_int(const ir_node *node) {
466 const ia32_attr_t *attr = get_ia32_attr_const(node);
467 return attr->am_offs;
471 * Sets the address mode offset from an int.
473 void set_ia32_am_offs_int(ir_node *node, int offset) {
474 ia32_attr_t *attr = get_ia32_attr(node);
475 attr->am_offs = offset;
478 void add_ia32_am_offs_int(ir_node *node, int offset) {
479 ia32_attr_t *attr = get_ia32_attr(node);
480 attr->am_offs += offset;
484 * Returns the symconst entity associated to address mode.
486 ir_entity *get_ia32_am_sc(const ir_node *node) {
487 const ia32_attr_t *attr = get_ia32_attr_const(node);
492 * Sets the symconst entity associated to address mode.
494 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
495 ia32_attr_t *attr = get_ia32_attr(node);
496 attr->am_sc = entity;
500 * Sets the sign bit for address mode symconst.
502 void set_ia32_am_sc_sign(ir_node *node) {
503 ia32_attr_t *attr = get_ia32_attr(node);
504 attr->data.am_sc_sign = 1;
508 * Clears the sign bit for address mode symconst.
510 void clear_ia32_am_sc_sign(ir_node *node) {
511 ia32_attr_t *attr = get_ia32_attr(node);
512 attr->data.am_sc_sign = 0;
516 * Returns the sign bit for address mode symconst.
518 int is_ia32_am_sc_sign(const ir_node *node) {
519 const ia32_attr_t *attr = get_ia32_attr_const(node);
520 return attr->data.am_sc_sign;
524 * Gets the addr mode const.
526 int get_ia32_am_scale(const ir_node *node) {
527 const ia32_attr_t *attr = get_ia32_attr_const(node);
528 return attr->data.am_scale;
532 * Sets the index register scale for address mode.
534 void set_ia32_am_scale(ir_node *node, int scale) {
535 ia32_attr_t *attr = get_ia32_attr(node);
536 attr->data.am_scale = scale;
539 void ia32_copy_am_attrs(ir_node *to, const ir_node *from)
541 set_ia32_ls_mode(to, get_ia32_ls_mode(from));
542 set_ia32_am_scale(to, get_ia32_am_scale(from));
543 set_ia32_am_sc(to, get_ia32_am_sc(from));
544 if(is_ia32_am_sc_sign(from))
545 set_ia32_am_sc_sign(to);
546 add_ia32_am_offs_int(to, get_ia32_am_offs_int(from));
547 set_ia32_frame_ent(to, get_ia32_frame_ent(from));
548 if (is_ia32_use_frame(from))
549 set_ia32_use_frame(to);
553 * Sets the uses_frame flag.
555 void set_ia32_use_frame(ir_node *node) {
556 ia32_attr_t *attr = get_ia32_attr(node);
557 attr->data.use_frame = 1;
561 * Clears the uses_frame flag.
563 void clear_ia32_use_frame(ir_node *node) {
564 ia32_attr_t *attr = get_ia32_attr(node);
565 attr->data.use_frame = 0;
569 * Gets the uses_frame flag.
571 int is_ia32_use_frame(const ir_node *node) {
572 const ia32_attr_t *attr = get_ia32_attr_const(node);
573 return attr->data.use_frame;
577 * Sets node to commutative.
579 void set_ia32_commutative(ir_node *node) {
580 ia32_attr_t *attr = get_ia32_attr(node);
581 attr->data.is_commutative = 1;
585 * Sets node to non-commutative.
587 void clear_ia32_commutative(ir_node *node) {
588 ia32_attr_t *attr = get_ia32_attr(node);
589 attr->data.is_commutative = 0;
593 * Checks if node is commutative.
595 int is_ia32_commutative(const ir_node *node) {
596 const ia32_attr_t *attr = get_ia32_attr_const(node);
597 return attr->data.is_commutative;
603 void set_ia32_got_lea(ir_node *node) {
604 ia32_attr_t *attr = get_ia32_attr(node);
605 attr->data.got_lea = 1;
609 * Clears node got_lea.
611 void clear_ia32_got_lea(ir_node *node) {
612 ia32_attr_t *attr = get_ia32_attr(node);
613 attr->data.got_lea = 0;
617 * Checks if node got lea.
619 int is_ia32_got_lea(const ir_node *node) {
620 const ia32_attr_t *attr = get_ia32_attr_const(node);
621 return attr->data.got_lea;
624 void set_ia32_need_stackent(ir_node *node) {
625 ia32_attr_t *attr = get_ia32_attr(node);
626 attr->data.need_stackent = 1;
629 void clear_ia32_need_stackent(ir_node *node) {
630 ia32_attr_t *attr = get_ia32_attr(node);
631 attr->data.need_stackent = 0;
634 int is_ia32_need_stackent(const ir_node *node) {
635 const ia32_attr_t *attr = get_ia32_attr_const(node);
636 return attr->data.need_stackent;
640 * Gets the mode of the stored/loaded value (only set for Store/Load)
642 ir_mode *get_ia32_ls_mode(const ir_node *node) {
643 const ia32_attr_t *attr = get_ia32_attr_const(node);
644 return attr->ls_mode;
648 * Sets the mode of the stored/loaded value (only set for Store/Load)
650 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
651 ia32_attr_t *attr = get_ia32_attr(node);
652 attr->ls_mode = mode;
656 * Gets the frame entity assigned to this node.
658 ir_entity *get_ia32_frame_ent(const ir_node *node) {
659 const ia32_attr_t *attr = get_ia32_attr_const(node);
660 return attr->frame_ent;
664 * Sets the frame entity for this node.
666 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
667 ia32_attr_t *attr = get_ia32_attr(node);
668 attr->frame_ent = ent;
670 set_ia32_use_frame(node);
672 clear_ia32_use_frame(node);
677 * Gets the instruction latency.
679 unsigned get_ia32_latency(const ir_node *node) {
680 const ia32_attr_t *attr = get_ia32_attr_const(node);
681 return attr->latency;
685 * Sets the instruction latency.
687 void set_ia32_latency(ir_node *node, unsigned latency) {
688 ia32_attr_t *attr = get_ia32_attr(node);
689 attr->latency = latency;
693 * Returns the argument register requirements of an ia32 node.
695 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
696 const ia32_attr_t *attr = get_ia32_attr_const(node);
701 * Sets the argument register requirements of an ia32 node.
703 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
704 ia32_attr_t *attr = get_ia32_attr(node);
709 * Returns the result register requirements of an ia32 node.
711 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
712 const ia32_attr_t *attr = get_ia32_attr_const(node);
713 return attr->out_req;
717 * Sets the result register requirements of an ia32 node.
719 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
720 ia32_attr_t *attr = get_ia32_attr(node);
721 attr->out_req = reqs;
725 * Returns the argument register requirement at position pos of an ia32 node.
727 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
728 const ia32_attr_t *attr = get_ia32_attr_const(node);
729 if(attr->in_req == NULL)
730 return arch_no_register_req;
732 return attr->in_req[pos];
736 * Returns the result register requirement at position pos of an ia32 node.
738 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
739 const ia32_attr_t *attr = get_ia32_attr_const(node);
740 if(attr->out_req == NULL)
741 return arch_no_register_req;
743 return attr->out_req[pos];
747 * Sets the OUT register requirements at position pos.
749 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
750 ia32_attr_t *attr = get_ia32_attr(node);
751 attr->out_req[pos] = req;
755 * Sets the IN register requirements at position pos.
757 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
758 ia32_attr_t *attr = get_ia32_attr(node);
759 attr->in_req[pos] = req;
763 * Returns the register flag of an ia32 node.
765 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
766 const ia32_attr_t *attr = get_ia32_attr_const(node);
767 return attr->data.flags;
771 * Sets the register flag of an ia32 node.
773 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
774 ia32_attr_t *attr = get_ia32_attr(node);
775 attr->data.flags = flags;
779 * Returns the result register slots of an ia32 node.
781 const arch_register_t **get_ia32_slots(const ir_node *node) {
782 const ia32_attr_t *attr = get_ia32_attr_const(node);
787 * Returns the number of results.
789 int get_ia32_n_res(const ir_node *node) {
790 const ia32_attr_t *attr = get_ia32_attr_const(node);
791 return ARR_LEN(attr->slots);
795 * Returns the projnum code.
797 long get_ia32_pncode(const ir_node *node)
799 const ia32_attr_t *attr = get_ia32_attr_const(node);
800 return attr->pn_code;
804 * Sets the projnum code
806 void set_ia32_pncode(ir_node *node, long code)
808 ia32_attr_t *attr = get_ia32_attr(node);
809 attr->pn_code = code;
813 * Sets the flags for the n'th out.
815 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
816 ia32_attr_t *attr = get_ia32_attr(node);
817 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
818 attr->out_flags[pos] = flags;
822 * Gets the flags for the n'th out.
824 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
825 const ia32_attr_t *attr = get_ia32_attr_const(node);
826 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
827 return attr->out_flags[pos];
831 * Get the list of available execution units.
833 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
834 const ia32_attr_t *attr = get_ia32_attr_const(node);
835 return attr->exec_units;
839 * Get the exception label attribute.
841 unsigned get_ia32_exc_label(const ir_node *node) {
842 const ia32_attr_t *attr = get_ia32_attr_const(node);
843 return attr->data.except_label;
847 * Set the exception label attribute.
849 void set_ia32_exc_label(ir_node *node, unsigned flag) {
850 ia32_attr_t *attr = get_ia32_attr(node);
851 attr->data.except_label = flag;
857 * Returns the name of the original ir node.
859 const char *get_ia32_orig_node(const ir_node *node) {
860 const ia32_attr_t *attr = get_ia32_attr_const(node);
861 return attr->orig_node;
865 * Sets the name of the original ir node.
867 void set_ia32_orig_node(ir_node *node, const char *name) {
868 ia32_attr_t *attr = get_ia32_attr(node);
869 attr->orig_node = name;
874 /******************************************************************************************************
876 * (_) | | | | | | / _| | | (_)
877 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
878 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
879 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
880 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
883 ******************************************************************************************************/
886 * Sets the AddrMode(S|D) attribute
888 void set_ia32_AddrMode(ir_node *node, char direction) {
889 ia32_attr_t *attr = get_ia32_attr(node);
893 attr->data.tp = ia32_AddrModeD;
896 attr->data.tp = ia32_AddrModeS;
899 assert(0 && "wrong AM type");
904 * Returns whether or not the node is an AddrModeS node.
906 int is_ia32_AddrModeS(const ir_node *node) {
907 const ia32_attr_t *attr = get_ia32_attr_const(node);
908 return (attr->data.tp == ia32_AddrModeS);
912 * Returns whether or not the node is an AddrModeD node.
914 int is_ia32_AddrModeD(const ir_node *node) {
915 const ia32_attr_t *attr = get_ia32_attr_const(node);
916 return (attr->data.tp == ia32_AddrModeD);
920 * Checks if node is a Load or xLoad/vfLoad.
922 int is_ia32_Ld(const ir_node *node) {
923 int op = get_ia32_irn_opcode(node);
924 return op == iro_ia32_Load ||
925 op == iro_ia32_xLoad ||
926 op == iro_ia32_vfld ||
931 * Checks if node is a Store or xStore/vfStore.
933 int is_ia32_St(const ir_node *node) {
934 int op = get_ia32_irn_opcode(node);
935 return op == iro_ia32_Store ||
936 op == iro_ia32_Store8Bit ||
937 op == iro_ia32_xStore ||
938 op == iro_ia32_vfst ||
939 op == iro_ia32_fst ||
944 * Returns the name of the OUT register at position pos.
946 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
947 const ia32_attr_t *attr = get_ia32_attr_const(node);
949 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
950 assert(attr->slots[pos] && "No register assigned");
952 return arch_register_get_name(attr->slots[pos]);
956 * Returns the index of the OUT register at position pos within its register class.
958 int get_ia32_out_regnr(const ir_node *node, int pos) {
959 const ia32_attr_t *attr = get_ia32_attr_const(node);
961 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
962 assert(attr->slots[pos] && "No register assigned");
964 return arch_register_get_index(attr->slots[pos]);
967 void ia32_swap_left_right(ir_node *node)
969 ia32_attr_t *attr = get_ia32_attr(node);
970 ir_node *left = get_irn_n(node, n_ia32_binary_left);
971 ir_node *right = get_irn_n(node, n_ia32_binary_right);
973 assert(is_ia32_commutative(node));
974 attr->data.ins_permuted = !attr->data.ins_permuted;
975 set_irn_n(node, n_ia32_binary_left, right);
976 set_irn_n(node, n_ia32_binary_right, left);
980 * Returns the OUT register at position pos.
982 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
983 const ia32_attr_t *attr = get_ia32_attr_const(node);
985 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
986 assert(attr->slots[pos] && "No register assigned");
988 return attr->slots[pos];
992 * Initializes the nodes attributes.
994 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
995 const arch_register_req_t **in_reqs,
996 const arch_register_req_t **out_reqs,
997 const be_execution_unit_t ***execution_units,
998 int n_res, unsigned latency)
1000 ir_graph *irg = get_irn_irg(node);
1001 struct obstack *obst = get_irg_obstack(irg);
1002 ia32_attr_t *attr = get_ia32_attr(node);
1004 set_ia32_flags(node, flags);
1005 set_ia32_in_req_all(node, in_reqs);
1006 set_ia32_out_req_all(node, out_reqs);
1007 set_ia32_latency(node, latency);
1009 attr->exec_units = execution_units;
1011 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1014 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1015 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1017 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
1018 /* void* cast to suppress an incorrect warning on MSVC */
1019 memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0]));
1023 init_ia32_x87_attributes(ir_node *res)
1026 ia32_attr_t *attr = get_ia32_attr(res);
1027 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1029 ia32_current_cg->do_x87_sim = 1;
1033 init_ia32_asm_attributes(ir_node *res)
1036 ia32_attr_t *attr = get_ia32_attr(res);
1037 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1042 init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
1043 int symconst_sign, long offset)
1045 ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
1048 attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
1050 attr->symconst = symconst;
1051 attr->attr.data.am_sc_sign = symconst_sign;
1052 attr->offset = offset;
1055 ir_node *get_ia32_result_proj(const ir_node *node)
1057 const ir_edge_t *edge;
1059 foreach_out_edge(node, edge) {
1060 ir_node *proj = get_edge_src_irn(edge);
1061 if(get_Proj_proj(proj) == 0) {
1068 /***************************************************************************************
1071 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1072 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1073 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1074 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1076 ***************************************************************************************/
1078 /* default compare operation to compare attributes */
1079 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1080 if (a->data.tp != b->data.tp)
1083 if (a->data.am_scale != b->data.am_scale
1084 || a->data.am_sc_sign != b->data.am_sc_sign
1085 || a->am_offs != b->am_offs
1086 || a->am_sc != b->am_sc
1087 || a->ls_mode != b->ls_mode)
1090 /* nodes with not yet assigned entities shouldn't be CSEd (important for
1091 * unsigned int -> double conversions */
1092 if(a->data.use_frame && a->frame_ent == NULL)
1094 if(b->data.use_frame && b->frame_ent == NULL)
1097 if (a->data.use_frame != b->data.use_frame
1098 || a->frame_ent != b->frame_ent)
1101 if(a->pn_code != b->pn_code)
1104 if (a->data.tp != b->data.tp)
1107 if (a->data.except_label != b->data.except_label)
1110 if (a->data.ins_permuted != b->data.ins_permuted
1111 || a->data.cmp_unsigned != b->data.cmp_unsigned)
1118 int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
1120 const ia32_attr_t* attr_a = get_ia32_attr_const(a);
1121 const ia32_attr_t* attr_b = get_ia32_attr_const(b);
1123 return ia32_compare_attr(attr_a, attr_b);
1127 int ia32_compare_x87_attr(ir_node *a, ir_node *b)
1129 return ia32_compare_nodes_attr(a, b);
1133 int ia32_compare_asm_attr(ir_node *a, ir_node *b)
1135 const ia32_asm_attr_t *attr_a;
1136 const ia32_asm_attr_t *attr_b;
1138 if(ia32_compare_nodes_attr(a, b))
1141 attr_a = get_ia32_asm_attr_const(a);
1142 attr_b = get_ia32_asm_attr_const(b);
1144 if(attr_a->asm_text != attr_b->asm_text)
1151 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
1153 const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
1154 const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
1156 if(attr_a->symconst != attr_b->symconst ||
1157 attr_a->attr.data.am_sc_sign != attr_b->attr.data.am_sc_sign ||
1158 attr_a->offset != attr_b->offset)
1164 /* copies the ia32 attributes */
1165 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1167 ir_graph *irg = get_irn_irg(new_node);
1168 struct obstack *obst = get_irg_obstack(irg);
1169 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1170 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1172 /* copy the attributes */
1173 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1175 /* copy out flags */
1176 attr_new->out_flags =
1177 DUP_ARR_D(int, obst, attr_old->out_flags);
1178 /* copy register assignments */
1180 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
1183 /* Include the generated constructor functions */
1184 #include "gen_ia32_new_nodes.c.inl"