2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the corresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 unsigned other = reqs[i]->other_same;
102 ir_fprintf(F, " same as");
103 for (i = 0; 1U << i <= other; ++i) {
104 if (other & (1U << i)) {
105 ir_fprintf(F, " %+F", get_irn_n(n, i));
110 if (reqs[i]->type & arch_register_req_type_must_be_different) {
111 unsigned other = reqs[i]->other_different;
114 ir_fprintf(F, " different from");
115 for (i = 0; 1U << i <= other; ++i) {
116 if (other & (1U << i)) {
117 ir_fprintf(F, " %+F", get_irn_n(n, i));
128 fprintf(F, "%sreq = N/A\n", dir);
133 * Dumper interface for dumping ia32 nodes in vcg.
134 * @param n the node to dump
135 * @param F the output file
136 * @param reason indicates which kind of information should be dumped
137 * @return 0 on success or != 0 on failure
139 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
140 ir_mode *mode = NULL;
143 const arch_register_req_t **reqs;
144 const arch_register_t **slots;
147 case dump_node_opcode_txt:
148 fprintf(F, "%s", get_irn_opname(n));
150 if(is_ia32_Immediate(n) || is_ia32_Const(n)) {
151 const ia32_immediate_attr_t *attr
152 = get_ia32_immediate_attr_const(n);
159 fputs(get_entity_name(attr->symconst), F);
161 if(attr->offset != 0 || attr->symconst == NULL) {
162 if(attr->offset > 0 && attr->symconst != NULL) {
165 fprintf(F, "%ld", attr->offset);
169 const ia32_attr_t *attr = get_ia32_attr_const(n);
171 if(attr->am_sc != NULL || attr->am_offs != 0)
174 if(attr->am_sc != NULL) {
175 if(attr->data.am_sc_sign) {
178 fputs(get_entity_name(attr->am_sc), F);
180 if(attr->am_offs != 0) {
181 if(attr->am_offs > 0 && attr->am_sc != NULL) {
184 fprintf(F, "%d", attr->am_offs);
187 if(attr->am_sc != NULL || attr->am_offs != 0)
192 case dump_node_mode_txt:
193 if (is_ia32_Ld(n) || is_ia32_St(n)) {
194 mode = get_ia32_ls_mode(n);
195 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
199 case dump_node_nodeattr_txt:
200 if (! is_ia32_Lea(n)) {
201 if (is_ia32_AddrModeS(n)) {
202 fprintf(F, "[AM S] ");
203 } else if (is_ia32_AddrModeD(n)) {
204 fprintf(F, "[AM D] ");
210 case dump_node_info_txt:
211 n_res = get_ia32_n_res(n);
212 fprintf(F, "=== IA32 attr begin ===\n");
214 /* dump IN requirements */
215 if (get_irn_arity(n) > 0) {
216 reqs = get_ia32_in_req_all(n);
217 dump_reg_req(F, n, reqs, 0);
220 /* dump OUT requirements */
222 reqs = get_ia32_out_req_all(n);
223 dump_reg_req(F, n, reqs, 1);
226 /* dump assigned registers */
227 slots = get_ia32_slots(n);
228 if (slots && n_res > 0) {
229 for (i = 0; i < n_res; i++) {
230 const arch_register_t *reg;
234 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
241 switch (get_ia32_op_type(n)) {
243 fprintf(F, "Normal");
246 fprintf(F, "AM Dest (Load+Store)");
249 fprintf(F, "AM Source (Load)");
252 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
257 /* dump supported am */
258 fprintf(F, "AM support = ");
259 switch (get_ia32_am_support(n)) {
264 fprintf(F, "source only (Load)");
267 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
273 if(get_ia32_am_offs_int(n) != 0) {
274 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
277 /* dump AM symconst */
278 if(get_ia32_am_sc(n) != NULL) {
279 ir_entity *ent = get_ia32_am_sc(n);
280 ident *id = get_entity_ld_ident(ent);
281 fprintf(F, "AM symconst = %s\n", get_id_str(id));
285 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
288 if (is_ia32_SwitchJmp(n)) {
289 fprintf(F, "pn_code = %ld\n", get_ia32_condcode(n));
290 } else if (is_ia32_CMov(n) || is_ia32_Set(n) || is_ia32_Jcc(n)) {
291 ia32_attr_t *attr = get_ia32_attr(n);
292 long pnc = get_ia32_condcode(n);
293 fprintf(F, "pn_code = 0x%lX (%s)\n", pnc, get_pnc_string(pnc & pn_Cmp_True));
294 fprintf(F, "ins_permuted = %u \n", attr->data.ins_permuted);
295 fprintf(F, "cmp_unsigned = %u \n", attr->data.cmp_unsigned);
297 else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
298 fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
301 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
302 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
303 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
304 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
305 fprintf(F, "is reload = %d\n", is_ia32_is_reload(n));
306 fprintf(F, "latency = %d\n", get_ia32_latency(n));
309 fprintf(F, "flags =");
310 flags = get_ia32_flags(n);
311 if (flags == arch_irn_flags_none) {
315 if (flags & arch_irn_flags_dont_spill) {
316 fprintf(F, " unspillable");
318 if (flags & arch_irn_flags_rematerializable) {
319 fprintf(F, " remat");
321 if (flags & arch_irn_flags_ignore) {
322 fprintf(F, " ignore");
324 if (flags & arch_irn_flags_modify_sp) {
325 fprintf(F, " modify_sp");
327 if (flags & arch_irn_flags_modify_flags) {
328 fprintf(F, " modify_flags");
331 fprintf(F, " (%d)\n", flags);
333 /* dump frame entity */
334 fprintf(F, "frame entity = ");
335 if (get_ia32_frame_ent(n)) {
336 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
344 fprintf(F, "ls_mode = ");
345 if (get_ia32_ls_mode(n)) {
346 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
354 /* dump original ir node name */
355 fprintf(F, "orig node = ");
356 if (get_ia32_orig_node(n)) {
357 fprintf(F, "%s", get_ia32_orig_node(n));
365 fprintf(F, "=== IA32 attr end ===\n");
366 /* end of: case dump_node_info_txt */
375 /***************************************************************************************************
377 * | | | | | | / / | | | | | | | |
378 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
379 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
380 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
381 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
384 ***************************************************************************************************/
386 ia32_attr_t *get_ia32_attr(ir_node *node) {
387 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
388 return (ia32_attr_t *)get_irn_generic_attr(node);
391 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
392 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
393 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
396 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
397 ia32_attr_t *attr = get_ia32_attr(node);
398 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
402 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
403 const ia32_attr_t *attr = get_ia32_attr_const(node);
404 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
408 const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
409 const ia32_attr_t *attr = get_ia32_attr_const(node);
410 const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
415 ia32_immediate_attr_t *get_ia32_immediate_attr(ir_node *node) {
416 ia32_attr_t *attr = get_ia32_attr(node);
417 ia32_immediate_attr_t *imm_attr = CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
422 const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
424 const ia32_attr_t *attr = get_ia32_attr_const(node);
425 const ia32_immediate_attr_t *imm_attr = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
430 ia32_condcode_attr_t *get_ia32_condcode_attr(ir_node *node) {
431 ia32_attr_t *attr = get_ia32_attr(node);
432 ia32_condcode_attr_t *cc_attr = CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
437 const ia32_condcode_attr_t *get_ia32_condcode_attr_const(const ir_node *node) {
438 const ia32_attr_t *attr = get_ia32_attr_const(node);
439 const ia32_condcode_attr_t *cc_attr = CONST_CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
444 ia32_copyb_attr_t *get_ia32_copyb_attr(ir_node *node) {
445 ia32_attr_t *attr = get_ia32_attr(node);
446 ia32_copyb_attr_t *copyb_attr = CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
451 const ia32_copyb_attr_t *get_ia32_copyb_attr_const(const ir_node *node) {
452 const ia32_attr_t *attr = get_ia32_attr_const(node);
453 const ia32_copyb_attr_t *copyb_attr = CONST_CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
459 * Gets the type of an ia32 node.
461 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
462 const ia32_attr_t *attr = get_ia32_attr_const(node);
463 return attr->data.tp;
467 * Sets the type of an ia32 node.
469 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
470 ia32_attr_t *attr = get_ia32_attr(node);
475 * Gets the supported address mode of an ia32 node
477 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
478 const ia32_attr_t *attr = get_ia32_attr_const(node);
479 return attr->data.am_support;
482 ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
483 const ia32_attr_t *attr = get_ia32_attr_const(node);
484 return attr->data.am_arity;
488 * Sets the supported address mode of an ia32 node
490 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
491 ia32_am_arity_t arity) {
492 ia32_attr_t *attr = get_ia32_attr(node);
493 attr->data.am_support = am_tp;
494 attr->data.am_arity = arity;
496 assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
497 (am_tp != ia32_am_None &&
498 ((arity == ia32_am_unary) || (arity == ia32_am_binary) || (arity == ia32_am_ternary))));
502 * Gets the address mode offset as int.
504 int get_ia32_am_offs_int(const ir_node *node) {
505 const ia32_attr_t *attr = get_ia32_attr_const(node);
506 return attr->am_offs;
510 * Sets the address mode offset from an int.
512 void set_ia32_am_offs_int(ir_node *node, int offset) {
513 ia32_attr_t *attr = get_ia32_attr(node);
514 attr->am_offs = offset;
517 void add_ia32_am_offs_int(ir_node *node, int offset) {
518 ia32_attr_t *attr = get_ia32_attr(node);
519 attr->am_offs += offset;
523 * Returns the symconst entity associated to address mode.
525 ir_entity *get_ia32_am_sc(const ir_node *node) {
526 const ia32_attr_t *attr = get_ia32_attr_const(node);
531 * Sets the symconst entity associated to address mode.
533 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
534 ia32_attr_t *attr = get_ia32_attr(node);
535 attr->am_sc = entity;
539 * Sets the sign bit for address mode symconst.
541 void set_ia32_am_sc_sign(ir_node *node) {
542 ia32_attr_t *attr = get_ia32_attr(node);
543 attr->data.am_sc_sign = 1;
547 * Clears the sign bit for address mode symconst.
549 void clear_ia32_am_sc_sign(ir_node *node) {
550 ia32_attr_t *attr = get_ia32_attr(node);
551 attr->data.am_sc_sign = 0;
555 * Returns the sign bit for address mode symconst.
557 int is_ia32_am_sc_sign(const ir_node *node) {
558 const ia32_attr_t *attr = get_ia32_attr_const(node);
559 return attr->data.am_sc_sign;
563 * Gets the addr mode const.
565 int get_ia32_am_scale(const ir_node *node) {
566 const ia32_attr_t *attr = get_ia32_attr_const(node);
567 return attr->data.am_scale;
571 * Sets the index register scale for address mode.
573 void set_ia32_am_scale(ir_node *node, int scale) {
574 ia32_attr_t *attr = get_ia32_attr(node);
575 assert(0 <= scale && scale < 4 && "AM scale out of range");
576 attr->data.am_scale = scale;
579 void ia32_copy_am_attrs(ir_node *to, const ir_node *from)
581 set_ia32_ls_mode(to, get_ia32_ls_mode(from));
582 set_ia32_am_scale(to, get_ia32_am_scale(from));
583 set_ia32_am_sc(to, get_ia32_am_sc(from));
584 if(is_ia32_am_sc_sign(from))
585 set_ia32_am_sc_sign(to);
586 add_ia32_am_offs_int(to, get_ia32_am_offs_int(from));
587 set_ia32_frame_ent(to, get_ia32_frame_ent(from));
588 if (is_ia32_use_frame(from))
589 set_ia32_use_frame(to);
593 * Sets the uses_frame flag.
595 void set_ia32_use_frame(ir_node *node) {
596 ia32_attr_t *attr = get_ia32_attr(node);
597 attr->data.use_frame = 1;
601 * Clears the uses_frame flag.
603 void clear_ia32_use_frame(ir_node *node) {
604 ia32_attr_t *attr = get_ia32_attr(node);
605 attr->data.use_frame = 0;
609 * Gets the uses_frame flag.
611 int is_ia32_use_frame(const ir_node *node) {
612 const ia32_attr_t *attr = get_ia32_attr_const(node);
613 return attr->data.use_frame;
617 * Sets node to commutative.
619 void set_ia32_commutative(ir_node *node) {
620 ia32_attr_t *attr = get_ia32_attr(node);
621 attr->data.is_commutative = 1;
625 * Sets node to non-commutative.
627 void clear_ia32_commutative(ir_node *node) {
628 ia32_attr_t *attr = get_ia32_attr(node);
629 attr->data.is_commutative = 0;
633 * Checks if node is commutative.
635 int is_ia32_commutative(const ir_node *node) {
636 const ia32_attr_t *attr = get_ia32_attr_const(node);
637 return attr->data.is_commutative;
640 void set_ia32_need_stackent(ir_node *node) {
641 ia32_attr_t *attr = get_ia32_attr(node);
642 attr->data.need_stackent = 1;
645 void clear_ia32_need_stackent(ir_node *node) {
646 ia32_attr_t *attr = get_ia32_attr(node);
647 attr->data.need_stackent = 0;
650 int is_ia32_need_stackent(const ir_node *node) {
651 const ia32_attr_t *attr = get_ia32_attr_const(node);
652 return attr->data.need_stackent;
655 void set_ia32_is_reload(ir_node *node) {
656 ia32_attr_t *attr = get_ia32_attr(node);
657 attr->data.is_reload = 1;
660 int is_ia32_is_reload(const ir_node *node) {
661 const ia32_attr_t *attr = get_ia32_attr_const(node);
662 return attr->data.is_reload;
665 void set_ia32_is_spill(ir_node *node) {
666 ia32_attr_t *attr = get_ia32_attr(node);
667 attr->data.is_spill = 1;
670 int is_ia32_is_spill(const ir_node *node) {
671 const ia32_attr_t *attr = get_ia32_attr_const(node);
672 return attr->data.is_spill;
675 void set_ia32_is_remat(ir_node *node) {
676 ia32_attr_t *attr = get_ia32_attr(node);
677 attr->data.is_remat = 1;
680 int is_ia32_is_remat(const ir_node *node) {
681 const ia32_attr_t *attr = get_ia32_attr_const(node);
682 return attr->data.is_remat;
686 * Gets the mode of the stored/loaded value (only set for Store/Load)
688 ir_mode *get_ia32_ls_mode(const ir_node *node) {
689 const ia32_attr_t *attr = get_ia32_attr_const(node);
690 return attr->ls_mode;
694 * Sets the mode of the stored/loaded value (only set for Store/Load)
696 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
697 ia32_attr_t *attr = get_ia32_attr(node);
698 attr->ls_mode = mode;
702 * Gets the frame entity assigned to this node.
704 ir_entity *get_ia32_frame_ent(const ir_node *node) {
705 const ia32_attr_t *attr = get_ia32_attr_const(node);
706 return attr->frame_ent;
710 * Sets the frame entity for this node.
712 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
713 ia32_attr_t *attr = get_ia32_attr(node);
714 attr->frame_ent = ent;
716 set_ia32_use_frame(node);
718 clear_ia32_use_frame(node);
723 * Gets the instruction latency.
725 unsigned get_ia32_latency(const ir_node *node) {
726 const ir_op *op = get_irn_op(node);
727 const ia32_op_attr_t *op_attr = (ia32_op_attr_t*) get_op_attr(op);
728 return op_attr->latency;
732 * Returns the argument register requirements of an ia32 node.
734 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
735 const ia32_attr_t *attr = get_ia32_attr_const(node);
740 * Sets the argument register requirements of an ia32 node.
742 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
743 ia32_attr_t *attr = get_ia32_attr(node);
748 * Returns the result register requirements of an ia32 node.
750 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
751 const ia32_attr_t *attr = get_ia32_attr_const(node);
752 return attr->out_req;
756 * Sets the result register requirements of an ia32 node.
758 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
759 ia32_attr_t *attr = get_ia32_attr(node);
760 attr->out_req = reqs;
764 * Returns the argument register requirement at position pos of an ia32 node.
766 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
767 const ia32_attr_t *attr = get_ia32_attr_const(node);
768 if(attr->in_req == NULL)
769 return arch_no_register_req;
771 return attr->in_req[pos];
775 * Returns the result register requirement at position pos of an ia32 node.
777 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
778 const ia32_attr_t *attr = get_ia32_attr_const(node);
779 if(attr->out_req == NULL)
780 return arch_no_register_req;
782 return attr->out_req[pos];
786 * Sets the OUT register requirements at position pos.
788 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
789 ia32_attr_t *attr = get_ia32_attr(node);
790 attr->out_req[pos] = req;
794 * Sets the IN register requirements at position pos.
796 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
797 ia32_attr_t *attr = get_ia32_attr(node);
798 attr->in_req[pos] = req;
802 * Returns the register flag of an ia32 node.
804 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
805 const ia32_attr_t *attr = get_ia32_attr_const(node);
806 return attr->data.flags;
810 * Sets the register flag of an ia32 node.
812 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
813 ia32_attr_t *attr = get_ia32_attr(node);
814 attr->data.flags = flags;
817 void add_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
818 ia32_attr_t *attr = get_ia32_attr(node);
819 attr->data.flags |= flags;
823 * Returns the result register slots of an ia32 node.
825 const arch_register_t **get_ia32_slots(const ir_node *node) {
826 const ia32_attr_t *attr = get_ia32_attr_const(node);
831 * Returns the number of results.
833 int get_ia32_n_res(const ir_node *node) {
834 const ia32_attr_t *attr = get_ia32_attr_const(node);
835 return ARR_LEN(attr->slots);
839 * Returns the condition code of a node.
841 long get_ia32_condcode(const ir_node *node)
843 const ia32_condcode_attr_t *attr = get_ia32_condcode_attr_const(node);
844 return attr->pn_code;
848 * Sets the condition code of a node
850 void set_ia32_condcode(ir_node *node, long code)
852 ia32_condcode_attr_t *attr = get_ia32_condcode_attr(node);
853 attr->pn_code = code;
857 * Returns the condition code of a node.
859 unsigned get_ia32_copyb_size(const ir_node *node)
861 const ia32_copyb_attr_t *attr = get_ia32_copyb_attr_const(node);
866 * Sets the flags for the n'th out.
868 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
869 ia32_attr_t *attr = get_ia32_attr(node);
870 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
871 attr->out_flags[pos] = flags;
875 * Gets the flags for the n'th out.
877 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
878 const ia32_attr_t *attr = get_ia32_attr_const(node);
879 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
880 return attr->out_flags[pos];
884 * Get the list of available execution units.
886 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
887 const ia32_attr_t *attr = get_ia32_attr_const(node);
888 return attr->exec_units;
892 * Get the exception label attribute.
894 unsigned get_ia32_exc_label(const ir_node *node) {
895 const ia32_attr_t *attr = get_ia32_attr_const(node);
896 return attr->data.has_except_label;
900 * Set the exception label attribute.
902 void set_ia32_exc_label(ir_node *node, unsigned flag) {
903 ia32_attr_t *attr = get_ia32_attr(node);
904 attr->data.has_except_label = flag;
908 * Return the exception label id.
910 ir_label_t get_ia32_exc_label_id(const ir_node *node) {
911 const ia32_attr_t *attr = get_ia32_attr_const(node);
913 assert(attr->data.has_except_label);
914 return attr->exc_label;
918 * Assign the exception label id.
920 void set_ia32_exc_label_id(ir_node *node, ir_label_t id) {
921 ia32_attr_t *attr = get_ia32_attr(node);
923 assert(attr->data.has_except_label);
924 attr->exc_label = id;
930 * Returns the name of the original ir node.
932 const char *get_ia32_orig_node(const ir_node *node) {
933 const ia32_attr_t *attr = get_ia32_attr_const(node);
934 return attr->orig_node;
938 * Sets the name of the original ir node.
940 void set_ia32_orig_node(ir_node *node, const char *name) {
941 ia32_attr_t *attr = get_ia32_attr(node);
942 attr->orig_node = name;
947 /******************************************************************************************************
949 * (_) | | | | | | / _| | | (_)
950 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
951 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
952 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
953 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
956 ******************************************************************************************************/
959 * Returns whether or not the node is an AddrModeS node.
961 int is_ia32_AddrModeS(const ir_node *node) {
962 const ia32_attr_t *attr = get_ia32_attr_const(node);
963 return (attr->data.tp == ia32_AddrModeS);
967 * Returns whether or not the node is an AddrModeD node.
969 int is_ia32_AddrModeD(const ir_node *node) {
970 const ia32_attr_t *attr = get_ia32_attr_const(node);
971 return (attr->data.tp == ia32_AddrModeD);
975 * Checks if node is a Load or xLoad/vfLoad.
977 int is_ia32_Ld(const ir_node *node) {
978 int op = get_ia32_irn_opcode(node);
979 return op == iro_ia32_Load ||
980 op == iro_ia32_xLoad ||
981 op == iro_ia32_vfld ||
986 * Checks if node is a Store or xStore/vfStore.
988 int is_ia32_St(const ir_node *node) {
989 int op = get_ia32_irn_opcode(node);
990 return op == iro_ia32_Store ||
991 op == iro_ia32_Store8Bit ||
992 op == iro_ia32_xStore ||
993 op == iro_ia32_vfst ||
994 op == iro_ia32_fst ||
999 * Returns the name of the OUT register at position pos.
1001 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
1002 const ia32_attr_t *attr = get_ia32_attr_const(node);
1004 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1005 assert(attr->slots[pos] && "No register assigned");
1007 return arch_register_get_name(attr->slots[pos]);
1011 * Returns the index of the OUT register at position pos within its register class.
1013 int get_ia32_out_regnr(const ir_node *node, int pos) {
1014 const ia32_attr_t *attr = get_ia32_attr_const(node);
1016 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1017 assert(attr->slots[pos] && "No register assigned");
1019 return arch_register_get_index(attr->slots[pos]);
1022 void ia32_swap_left_right(ir_node *node)
1024 ia32_attr_t *attr = get_ia32_attr(node);
1025 ir_node *left = get_irn_n(node, n_ia32_binary_left);
1026 ir_node *right = get_irn_n(node, n_ia32_binary_right);
1028 assert(is_ia32_commutative(node));
1029 attr->data.ins_permuted = !attr->data.ins_permuted;
1030 set_irn_n(node, n_ia32_binary_left, right);
1031 set_irn_n(node, n_ia32_binary_right, left);
1035 * Returns the OUT register at position pos.
1037 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
1038 const ia32_attr_t *attr = get_ia32_attr_const(node);
1040 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1041 assert(attr->slots[pos] && "No register assigned");
1043 return attr->slots[pos];
1047 * Initializes the nodes attributes.
1049 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1050 const arch_register_req_t **in_reqs,
1051 const arch_register_req_t **out_reqs,
1052 const be_execution_unit_t ***execution_units,
1055 ir_graph *irg = get_irn_irg(node);
1056 struct obstack *obst = get_irg_obstack(irg);
1057 ia32_attr_t *attr = get_ia32_attr(node);
1059 set_ia32_flags(node, flags);
1060 set_ia32_in_req_all(node, in_reqs);
1061 set_ia32_out_req_all(node, out_reqs);
1063 attr->exec_units = execution_units;
1065 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1068 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1069 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1071 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
1072 /* void* cast to suppress an incorrect warning on MSVC */
1073 memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0]));
1077 init_ia32_x87_attributes(ir_node *res)
1080 ia32_attr_t *attr = get_ia32_attr(res);
1081 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1085 ia32_current_cg->do_x87_sim = 1;
1089 init_ia32_asm_attributes(ir_node *res)
1092 ia32_attr_t *attr = get_ia32_attr(res);
1093 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1100 init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
1101 int symconst_sign, long offset)
1103 ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
1106 attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
1108 attr->symconst = symconst;
1109 attr->sc_sign = symconst_sign;
1110 attr->offset = offset;
1114 init_ia32_copyb_attributes(ir_node *res, unsigned size) {
1115 ia32_copyb_attr_t *attr = get_irn_generic_attr(res);
1118 attr->attr.attr_type |= IA32_ATTR_ia32_copyb_attr_t;
1124 init_ia32_condcode_attributes(ir_node *res, long pnc) {
1125 ia32_condcode_attr_t *attr = get_irn_generic_attr(res);
1128 attr->attr.attr_type |= IA32_ATTR_ia32_condcode_attr_t;
1130 attr->pn_code = pnc;
1133 ir_node *get_ia32_result_proj(const ir_node *node)
1135 const ir_edge_t *edge;
1137 foreach_out_edge(node, edge) {
1138 ir_node *proj = get_edge_src_irn(edge);
1139 if(get_Proj_proj(proj) == 0) {
1146 /***************************************************************************************
1149 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1150 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1151 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1152 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1154 ***************************************************************************************/
1156 /* default compare operation to compare attributes */
1157 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1158 if (a->data.tp != b->data.tp)
1161 if (a->data.am_scale != b->data.am_scale
1162 || a->data.am_sc_sign != b->data.am_sc_sign
1163 || a->am_offs != b->am_offs
1164 || a->am_sc != b->am_sc
1165 || a->ls_mode != b->ls_mode)
1168 /* nodes with not yet assigned entities shouldn't be CSEd (important for
1169 * unsigned int -> double conversions */
1170 if(a->data.use_frame && a->frame_ent == NULL)
1172 if(b->data.use_frame && b->frame_ent == NULL)
1175 if (a->data.use_frame != b->data.use_frame
1176 || a->frame_ent != b->frame_ent)
1179 if (a->data.tp != b->data.tp)
1182 if (a->data.has_except_label != b->data.has_except_label)
1185 if (a->data.ins_permuted != b->data.ins_permuted
1186 || a->data.cmp_unsigned != b->data.cmp_unsigned)
1192 /** Compare nodes attributes for all "normal" nodes. */
1194 int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
1196 const ia32_attr_t* attr_a = get_ia32_attr_const(a);
1197 const ia32_attr_t* attr_b = get_ia32_attr_const(b);
1199 return ia32_compare_attr(attr_a, attr_b);
1202 /** Compare node attributes for nodes with condition code. */
1204 int ia32_compare_condcode_attr(ir_node *a, ir_node *b)
1206 const ia32_condcode_attr_t *attr_a;
1207 const ia32_condcode_attr_t *attr_b;
1209 if (ia32_compare_nodes_attr(a, b))
1212 attr_a = get_ia32_condcode_attr_const(a);
1213 attr_b = get_ia32_condcode_attr_const(b);
1215 if(attr_a->pn_code != attr_b->pn_code)
1221 /** Compare node attributes for CopyB nodes. */
1223 int ia32_compare_copyb_attr(ir_node *a, ir_node *b)
1225 const ia32_copyb_attr_t *attr_a;
1226 const ia32_copyb_attr_t *attr_b;
1228 if (ia32_compare_nodes_attr(a, b))
1231 attr_a = get_ia32_copyb_attr_const(a);
1232 attr_b = get_ia32_copyb_attr_const(b);
1234 if(attr_a->size != attr_b->size)
1241 /** Compare ASM node attributes. */
1243 int ia32_compare_asm_attr(ir_node *a, ir_node *b)
1245 const ia32_asm_attr_t *attr_a;
1246 const ia32_asm_attr_t *attr_b;
1248 if(ia32_compare_nodes_attr(a, b))
1251 attr_a = get_ia32_asm_attr_const(a);
1252 attr_b = get_ia32_asm_attr_const(b);
1254 if(attr_a->asm_text != attr_b->asm_text)
1261 * Hash function for Immediates
1263 static unsigned ia32_hash_Immediate(const ir_node *irn) {
1264 const ia32_immediate_attr_t *a = get_ia32_immediate_attr_const(irn);
1266 return HASH_PTR(a->symconst) + (a->sc_sign << 16) + a->offset;
1269 /** Compare node attributes for Immediates. */
1271 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
1273 const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
1274 const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
1276 if(attr_a->symconst != attr_b->symconst ||
1277 attr_a->sc_sign != attr_b->sc_sign ||
1278 attr_a->offset != attr_b->offset)
1284 /** Compare node attributes for x87 nodes. */
1286 int ia32_compare_x87_attr(ir_node *a, ir_node *b)
1288 return ia32_compare_nodes_attr(a, b);
1292 /* copies the ia32 attributes */
1293 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1295 ir_graph *irg = get_irn_irg(new_node);
1296 struct obstack *obst = get_irg_obstack(irg);
1297 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1298 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1300 /* copy the attributes */
1301 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1303 /* copy out flags */
1304 attr_new->out_flags =
1305 DUP_ARR_D(int, obst, attr_old->out_flags);
1306 /* copy register assignments */
1308 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
1311 /* Include the generated constructor functions */
1312 #include "gen_ia32_new_nodes.c.inl"