2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the corresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same[0]));
100 if (reqs[i]->other_same[1] != -1)
101 ir_fprintf(F, " or %+F", get_irn_n(n, reqs[i]->other_same[1]));
104 if (reqs[i]->type & arch_register_req_type_should_be_different) {
105 ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different));
114 fprintf(F, "%sreq = N/A\n", dir);
119 * Dumper interface for dumping ia32 nodes in vcg.
120 * @param n the node to dump
121 * @param F the output file
122 * @param reason indicates which kind of information should be dumped
123 * @return 0 on success or != 0 on failure
125 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
126 ir_mode *mode = NULL;
129 const arch_register_req_t **reqs;
130 const arch_register_t **slots;
133 case dump_node_opcode_txt:
134 fprintf(F, "%s", get_irn_opname(n));
136 if(is_ia32_Immediate(n) || is_ia32_Const(n)) {
137 const ia32_immediate_attr_t *attr
138 = get_ia32_immediate_attr_const(n);
142 if(attr->attr.data.am_sc_sign) {
145 fputs(get_entity_name(attr->symconst), F);
147 if(attr->offset != 0 || attr->symconst == NULL) {
148 if(attr->offset > 0 && attr->symconst != NULL) {
151 fprintf(F, "%ld", attr->offset);
156 const ia32_attr_t *attr = get_ia32_attr_const(n);
158 if(attr->am_sc != NULL || attr->am_offs != 0)
161 if(attr->am_sc != NULL) {
162 if(attr->data.am_sc_sign) {
165 fputs(get_entity_name(attr->am_sc), F);
167 if(attr->am_offs != 0) {
168 if(attr->am_offs > 0 && attr->am_sc != NULL) {
171 fprintf(F, "%d", attr->am_offs);
174 if(attr->am_sc != NULL || attr->am_offs != 0)
179 case dump_node_mode_txt:
180 if (is_ia32_Ld(n) || is_ia32_St(n)) {
181 mode = get_ia32_ls_mode(n);
182 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
186 case dump_node_nodeattr_txt:
187 if (! is_ia32_Lea(n)) {
188 if (is_ia32_AddrModeS(n)) {
189 fprintf(F, "[AM S] ");
190 } else if (is_ia32_AddrModeD(n)) {
191 fprintf(F, "[AM D] ");
197 case dump_node_info_txt:
198 n_res = get_ia32_n_res(n);
199 fprintf(F, "=== IA32 attr begin ===\n");
201 /* dump IN requirements */
202 if (get_irn_arity(n) > 0) {
203 reqs = get_ia32_in_req_all(n);
204 dump_reg_req(F, n, reqs, 0);
207 /* dump OUT requirements */
209 reqs = get_ia32_out_req_all(n);
210 dump_reg_req(F, n, reqs, 1);
213 /* dump assigned registers */
214 slots = get_ia32_slots(n);
215 if (slots && n_res > 0) {
216 for (i = 0; i < n_res; i++) {
217 const arch_register_t *reg;
221 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
228 switch (get_ia32_op_type(n)) {
230 fprintf(F, "Normal");
233 fprintf(F, "AM Dest (Load+Store)");
236 fprintf(F, "AM Source (Load)");
239 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
244 /* dump supported am */
245 fprintf(F, "AM support = ");
246 switch (get_ia32_am_support(n)) {
251 fprintf(F, "source only (Load)");
254 fprintf(F, "dest only (Load+Store)");
260 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
266 if(get_ia32_am_offs_int(n) != 0) {
267 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
270 /* dump AM symconst */
271 if(get_ia32_am_sc(n) != NULL) {
272 ir_entity *ent = get_ia32_am_sc(n);
273 ident *id = get_entity_ld_ident(ent);
274 fprintf(F, "AM symconst = %s\n", get_id_str(id));
278 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
281 if(is_ia32_SwitchJmp(n) || is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
282 fprintf(F, "pn_code = %ld\n", get_ia32_pncode(n));
284 fprintf(F, "pn_code = %ld (%s)\n", get_ia32_pncode(n),
285 get_pnc_string(get_ia32_pncode(n)));
289 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
292 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
295 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
298 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
301 fprintf(F, "latency = %d\n", get_ia32_latency(n));
304 fprintf(F, "flags =");
305 flags = get_ia32_flags(n);
306 if (flags == arch_irn_flags_none) {
310 if (flags & arch_irn_flags_dont_spill) {
311 fprintf(F, " unspillable");
313 if (flags & arch_irn_flags_rematerializable) {
314 fprintf(F, " remat");
316 if (flags & arch_irn_flags_ignore) {
317 fprintf(F, " ignore");
319 if (flags & arch_irn_flags_modify_sp) {
320 fprintf(F, " modify_sp");
323 fprintf(F, " (%d)\n", flags);
325 /* dump frame entity */
326 fprintf(F, "frame entity = ");
327 if (get_ia32_frame_ent(n)) {
328 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
336 fprintf(F, "ls_mode = ");
337 if (get_ia32_ls_mode(n)) {
338 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
346 /* dump original ir node name */
347 fprintf(F, "orig node = ");
348 if (get_ia32_orig_node(n)) {
349 fprintf(F, "%s", get_ia32_orig_node(n));
357 fprintf(F, "=== IA32 attr end ===\n");
358 /* end of: case dump_node_info_txt */
367 /***************************************************************************************************
369 * | | | | | | / / | | | | | | | |
370 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
371 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
372 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
373 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
376 ***************************************************************************************************/
378 ia32_attr_t *get_ia32_attr(ir_node *node) {
379 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
380 return (ia32_attr_t *)get_irn_generic_attr(node);
383 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
384 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
385 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
388 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
389 ia32_attr_t *attr = get_ia32_attr(node);
390 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
394 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
395 const ia32_attr_t *attr = get_ia32_attr_const(node);
396 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
400 const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
401 const ia32_attr_t *attr = get_ia32_attr_const(node);
402 const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
407 const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
409 const ia32_attr_t *attr = get_ia32_attr_const(node);
410 const ia32_immediate_attr_t *immediate_attr
411 = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
413 return immediate_attr;
417 * Gets the type of an ia32 node.
419 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
420 const ia32_attr_t *attr = get_ia32_attr_const(node);
421 return attr->data.tp;
425 * Sets the type of an ia32 node.
427 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
428 ia32_attr_t *attr = get_ia32_attr(node);
433 * Gets the supported address mode of an ia32 node
435 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
436 const ia32_attr_t *attr = get_ia32_attr_const(node);
437 return attr->data.am_support;
440 ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
441 const ia32_attr_t *attr = get_ia32_attr_const(node);
442 return attr->data.am_arity;
446 * Sets the supported address mode of an ia32 node
448 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
449 ia32_am_arity_t arity) {
450 ia32_attr_t *attr = get_ia32_attr(node);
451 attr->data.am_support = am_tp;
452 attr->data.am_arity = arity;
454 assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
455 (am_tp != ia32_am_None &&
456 ((arity == ia32_am_unary) || (arity == ia32_am_binary) || (arity == ia32_am_ternary))));
460 * Gets the address mode offset as int.
462 int get_ia32_am_offs_int(const ir_node *node) {
463 const ia32_attr_t *attr = get_ia32_attr_const(node);
464 return attr->am_offs;
468 * Sets the address mode offset from an int.
470 void set_ia32_am_offs_int(ir_node *node, int offset) {
471 ia32_attr_t *attr = get_ia32_attr(node);
472 attr->am_offs = offset;
475 void add_ia32_am_offs_int(ir_node *node, int offset) {
476 ia32_attr_t *attr = get_ia32_attr(node);
477 attr->am_offs += offset;
481 * Returns the symconst entity associated to address mode.
483 ir_entity *get_ia32_am_sc(const ir_node *node) {
484 const ia32_attr_t *attr = get_ia32_attr_const(node);
489 * Sets the symconst entity associated to address mode.
491 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
492 ia32_attr_t *attr = get_ia32_attr(node);
493 attr->am_sc = entity;
497 * Sets the sign bit for address mode symconst.
499 void set_ia32_am_sc_sign(ir_node *node) {
500 ia32_attr_t *attr = get_ia32_attr(node);
501 attr->data.am_sc_sign = 1;
505 * Clears the sign bit for address mode symconst.
507 void clear_ia32_am_sc_sign(ir_node *node) {
508 ia32_attr_t *attr = get_ia32_attr(node);
509 attr->data.am_sc_sign = 0;
513 * Returns the sign bit for address mode symconst.
515 int is_ia32_am_sc_sign(const ir_node *node) {
516 const ia32_attr_t *attr = get_ia32_attr_const(node);
517 return attr->data.am_sc_sign;
521 * Gets the addr mode const.
523 int get_ia32_am_scale(const ir_node *node) {
524 const ia32_attr_t *attr = get_ia32_attr_const(node);
525 return attr->data.am_scale;
529 * Sets the index register scale for address mode.
531 void set_ia32_am_scale(ir_node *node, int scale) {
532 ia32_attr_t *attr = get_ia32_attr(node);
533 attr->data.am_scale = scale;
536 void ia32_copy_am_attrs(ir_node *to, const ir_node *from)
538 set_ia32_ls_mode(to, get_ia32_ls_mode(from));
539 set_ia32_am_scale(to, get_ia32_am_scale(from));
540 set_ia32_am_sc(to, get_ia32_am_sc(from));
541 if(is_ia32_am_sc_sign(from))
542 set_ia32_am_sc_sign(to);
543 add_ia32_am_offs_int(to, get_ia32_am_offs_int(from));
544 set_ia32_frame_ent(to, get_ia32_frame_ent(from));
545 if (is_ia32_use_frame(from))
546 set_ia32_use_frame(to);
550 * Sets the uses_frame flag.
552 void set_ia32_use_frame(ir_node *node) {
553 ia32_attr_t *attr = get_ia32_attr(node);
554 attr->data.use_frame = 1;
558 * Clears the uses_frame flag.
560 void clear_ia32_use_frame(ir_node *node) {
561 ia32_attr_t *attr = get_ia32_attr(node);
562 attr->data.use_frame = 0;
566 * Gets the uses_frame flag.
568 int is_ia32_use_frame(const ir_node *node) {
569 const ia32_attr_t *attr = get_ia32_attr_const(node);
570 return attr->data.use_frame;
574 * Sets node to commutative.
576 void set_ia32_commutative(ir_node *node) {
577 ia32_attr_t *attr = get_ia32_attr(node);
578 attr->data.is_commutative = 1;
582 * Sets node to non-commutative.
584 void clear_ia32_commutative(ir_node *node) {
585 ia32_attr_t *attr = get_ia32_attr(node);
586 attr->data.is_commutative = 0;
590 * Checks if node is commutative.
592 int is_ia32_commutative(const ir_node *node) {
593 const ia32_attr_t *attr = get_ia32_attr_const(node);
594 return attr->data.is_commutative;
597 void set_ia32_need_stackent(ir_node *node) {
598 ia32_attr_t *attr = get_ia32_attr(node);
599 attr->data.need_stackent = 1;
602 void clear_ia32_need_stackent(ir_node *node) {
603 ia32_attr_t *attr = get_ia32_attr(node);
604 attr->data.need_stackent = 0;
607 int is_ia32_need_stackent(const ir_node *node) {
608 const ia32_attr_t *attr = get_ia32_attr_const(node);
609 return attr->data.need_stackent;
613 * Gets the mode of the stored/loaded value (only set for Store/Load)
615 ir_mode *get_ia32_ls_mode(const ir_node *node) {
616 const ia32_attr_t *attr = get_ia32_attr_const(node);
617 return attr->ls_mode;
621 * Sets the mode of the stored/loaded value (only set for Store/Load)
623 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
624 ia32_attr_t *attr = get_ia32_attr(node);
625 attr->ls_mode = mode;
629 * Gets the frame entity assigned to this node.
631 ir_entity *get_ia32_frame_ent(const ir_node *node) {
632 const ia32_attr_t *attr = get_ia32_attr_const(node);
633 return attr->frame_ent;
637 * Sets the frame entity for this node.
639 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
640 ia32_attr_t *attr = get_ia32_attr(node);
641 attr->frame_ent = ent;
643 set_ia32_use_frame(node);
645 clear_ia32_use_frame(node);
650 * Gets the instruction latency.
652 unsigned get_ia32_latency(const ir_node *node) {
653 const ia32_attr_t *attr = get_ia32_attr_const(node);
654 return attr->latency;
658 * Sets the instruction latency.
660 void set_ia32_latency(ir_node *node, unsigned latency) {
661 ia32_attr_t *attr = get_ia32_attr(node);
662 attr->latency = latency;
666 * Returns the argument register requirements of an ia32 node.
668 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
669 const ia32_attr_t *attr = get_ia32_attr_const(node);
674 * Sets the argument register requirements of an ia32 node.
676 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
677 ia32_attr_t *attr = get_ia32_attr(node);
682 * Returns the result register requirements of an ia32 node.
684 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
685 const ia32_attr_t *attr = get_ia32_attr_const(node);
686 return attr->out_req;
690 * Sets the result register requirements of an ia32 node.
692 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
693 ia32_attr_t *attr = get_ia32_attr(node);
694 attr->out_req = reqs;
698 * Returns the argument register requirement at position pos of an ia32 node.
700 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
701 const ia32_attr_t *attr = get_ia32_attr_const(node);
702 if(attr->in_req == NULL)
703 return arch_no_register_req;
705 return attr->in_req[pos];
709 * Returns the result register requirement at position pos of an ia32 node.
711 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
712 const ia32_attr_t *attr = get_ia32_attr_const(node);
713 if(attr->out_req == NULL)
714 return arch_no_register_req;
716 return attr->out_req[pos];
720 * Sets the OUT register requirements at position pos.
722 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
723 ia32_attr_t *attr = get_ia32_attr(node);
724 attr->out_req[pos] = req;
728 * Sets the IN register requirements at position pos.
730 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
731 ia32_attr_t *attr = get_ia32_attr(node);
732 attr->in_req[pos] = req;
736 * Returns the register flag of an ia32 node.
738 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
739 const ia32_attr_t *attr = get_ia32_attr_const(node);
740 return attr->data.flags;
744 * Sets the register flag of an ia32 node.
746 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
747 ia32_attr_t *attr = get_ia32_attr(node);
748 attr->data.flags = flags;
752 * Returns the result register slots of an ia32 node.
754 const arch_register_t **get_ia32_slots(const ir_node *node) {
755 const ia32_attr_t *attr = get_ia32_attr_const(node);
760 * Returns the number of results.
762 int get_ia32_n_res(const ir_node *node) {
763 const ia32_attr_t *attr = get_ia32_attr_const(node);
764 return ARR_LEN(attr->slots);
768 * Returns the projnum code.
770 long get_ia32_pncode(const ir_node *node)
772 const ia32_attr_t *attr = get_ia32_attr_const(node);
773 return attr->pn_code;
777 * Sets the projnum code
779 void set_ia32_pncode(ir_node *node, long code)
781 ia32_attr_t *attr = get_ia32_attr(node);
782 attr->pn_code = code;
786 * Sets the flags for the n'th out.
788 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
789 ia32_attr_t *attr = get_ia32_attr(node);
790 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
791 attr->out_flags[pos] = flags;
795 * Gets the flags for the n'th out.
797 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
798 const ia32_attr_t *attr = get_ia32_attr_const(node);
799 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
800 return attr->out_flags[pos];
804 * Get the list of available execution units.
806 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
807 const ia32_attr_t *attr = get_ia32_attr_const(node);
808 return attr->exec_units;
812 * Get the exception label attribute.
814 unsigned get_ia32_exc_label(const ir_node *node) {
815 const ia32_attr_t *attr = get_ia32_attr_const(node);
816 return attr->data.except_label;
820 * Set the exception label attribute.
822 void set_ia32_exc_label(ir_node *node, unsigned flag) {
823 ia32_attr_t *attr = get_ia32_attr(node);
824 attr->data.except_label = flag;
830 * Returns the name of the original ir node.
832 const char *get_ia32_orig_node(const ir_node *node) {
833 const ia32_attr_t *attr = get_ia32_attr_const(node);
834 return attr->orig_node;
838 * Sets the name of the original ir node.
840 void set_ia32_orig_node(ir_node *node, const char *name) {
841 ia32_attr_t *attr = get_ia32_attr(node);
842 attr->orig_node = name;
847 /******************************************************************************************************
849 * (_) | | | | | | / _| | | (_)
850 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
851 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
852 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
853 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
856 ******************************************************************************************************/
859 * Returns whether or not the node is an AddrModeS node.
861 int is_ia32_AddrModeS(const ir_node *node) {
862 const ia32_attr_t *attr = get_ia32_attr_const(node);
863 return (attr->data.tp == ia32_AddrModeS);
867 * Returns whether or not the node is an AddrModeD node.
869 int is_ia32_AddrModeD(const ir_node *node) {
870 const ia32_attr_t *attr = get_ia32_attr_const(node);
871 return (attr->data.tp == ia32_AddrModeD);
875 * Checks if node is a Load or xLoad/vfLoad.
877 int is_ia32_Ld(const ir_node *node) {
878 int op = get_ia32_irn_opcode(node);
879 return op == iro_ia32_Load ||
880 op == iro_ia32_xLoad ||
881 op == iro_ia32_vfld ||
886 * Checks if node is a Store or xStore/vfStore.
888 int is_ia32_St(const ir_node *node) {
889 int op = get_ia32_irn_opcode(node);
890 return op == iro_ia32_Store ||
891 op == iro_ia32_Store8Bit ||
892 op == iro_ia32_xStore ||
893 op == iro_ia32_vfst ||
894 op == iro_ia32_fst ||
899 * Returns the name of the OUT register at position pos.
901 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
902 const ia32_attr_t *attr = get_ia32_attr_const(node);
904 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
905 assert(attr->slots[pos] && "No register assigned");
907 return arch_register_get_name(attr->slots[pos]);
911 * Returns the index of the OUT register at position pos within its register class.
913 int get_ia32_out_regnr(const ir_node *node, int pos) {
914 const ia32_attr_t *attr = get_ia32_attr_const(node);
916 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
917 assert(attr->slots[pos] && "No register assigned");
919 return arch_register_get_index(attr->slots[pos]);
922 void ia32_swap_left_right(ir_node *node)
924 ia32_attr_t *attr = get_ia32_attr(node);
925 ir_node *left = get_irn_n(node, n_ia32_binary_left);
926 ir_node *right = get_irn_n(node, n_ia32_binary_right);
928 assert(is_ia32_commutative(node));
929 attr->data.ins_permuted = !attr->data.ins_permuted;
930 set_irn_n(node, n_ia32_binary_left, right);
931 set_irn_n(node, n_ia32_binary_right, left);
935 * Returns the OUT register at position pos.
937 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
938 const ia32_attr_t *attr = get_ia32_attr_const(node);
940 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
941 assert(attr->slots[pos] && "No register assigned");
943 return attr->slots[pos];
947 * Initializes the nodes attributes.
949 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
950 const arch_register_req_t **in_reqs,
951 const arch_register_req_t **out_reqs,
952 const be_execution_unit_t ***execution_units,
953 int n_res, unsigned latency)
955 ir_graph *irg = get_irn_irg(node);
956 struct obstack *obst = get_irg_obstack(irg);
957 ia32_attr_t *attr = get_ia32_attr(node);
959 set_ia32_flags(node, flags);
960 set_ia32_in_req_all(node, in_reqs);
961 set_ia32_out_req_all(node, out_reqs);
962 set_ia32_latency(node, latency);
964 attr->exec_units = execution_units;
966 attr->attr_type |= IA32_ATTR_ia32_attr_t;
969 attr->out_flags = NEW_ARR_D(int, obst, n_res);
970 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
972 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
973 /* void* cast to suppress an incorrect warning on MSVC */
974 memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0]));
978 init_ia32_x87_attributes(ir_node *res)
981 ia32_attr_t *attr = get_ia32_attr(res);
982 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
986 ia32_current_cg->do_x87_sim = 1;
990 init_ia32_asm_attributes(ir_node *res)
993 ia32_attr_t *attr = get_ia32_attr(res);
994 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1001 init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
1002 int symconst_sign, long offset)
1004 ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
1007 attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
1009 attr->symconst = symconst;
1010 attr->attr.data.am_sc_sign = symconst_sign;
1011 attr->offset = offset;
1014 ir_node *get_ia32_result_proj(const ir_node *node)
1016 const ir_edge_t *edge;
1018 foreach_out_edge(node, edge) {
1019 ir_node *proj = get_edge_src_irn(edge);
1020 if(get_Proj_proj(proj) == 0) {
1027 /***************************************************************************************
1030 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1031 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1032 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1033 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1035 ***************************************************************************************/
1037 /* default compare operation to compare attributes */
1038 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1039 if (a->data.tp != b->data.tp)
1042 if (a->data.am_scale != b->data.am_scale
1043 || a->data.am_sc_sign != b->data.am_sc_sign
1044 || a->am_offs != b->am_offs
1045 || a->am_sc != b->am_sc
1046 || a->ls_mode != b->ls_mode)
1049 /* nodes with not yet assigned entities shouldn't be CSEd (important for
1050 * unsigned int -> double conversions */
1051 if(a->data.use_frame && a->frame_ent == NULL)
1053 if(b->data.use_frame && b->frame_ent == NULL)
1056 if (a->data.use_frame != b->data.use_frame
1057 || a->frame_ent != b->frame_ent)
1060 if(a->pn_code != b->pn_code)
1063 if (a->data.tp != b->data.tp)
1066 if (a->data.except_label != b->data.except_label)
1069 if (a->data.ins_permuted != b->data.ins_permuted
1070 || a->data.cmp_unsigned != b->data.cmp_unsigned)
1077 int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
1079 const ia32_attr_t* attr_a = get_ia32_attr_const(a);
1080 const ia32_attr_t* attr_b = get_ia32_attr_const(b);
1082 return ia32_compare_attr(attr_a, attr_b);
1086 int ia32_compare_x87_attr(ir_node *a, ir_node *b)
1088 return ia32_compare_nodes_attr(a, b);
1092 int ia32_compare_asm_attr(ir_node *a, ir_node *b)
1094 const ia32_asm_attr_t *attr_a;
1095 const ia32_asm_attr_t *attr_b;
1097 if(ia32_compare_nodes_attr(a, b))
1100 attr_a = get_ia32_asm_attr_const(a);
1101 attr_b = get_ia32_asm_attr_const(b);
1103 if(attr_a->asm_text != attr_b->asm_text)
1110 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
1112 const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
1113 const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
1115 if(attr_a->symconst != attr_b->symconst ||
1116 attr_a->attr.data.am_sc_sign != attr_b->attr.data.am_sc_sign ||
1117 attr_a->offset != attr_b->offset)
1123 /* copies the ia32 attributes */
1124 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1126 ir_graph *irg = get_irn_irg(new_node);
1127 struct obstack *obst = get_irg_obstack(irg);
1128 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1129 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1131 /* copy the attributes */
1132 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1134 /* copy out flags */
1135 attr_new->out_flags =
1136 DUP_ARR_D(int, obst, attr_old->out_flags);
1137 /* copy register assignments */
1139 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
1142 /* Include the generated constructor functions */
1143 #include "gen_ia32_new_nodes.c.inl"