2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the coresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same));
102 if (reqs[i]->type & arch_register_req_type_should_be_different) {
103 ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different));
112 fprintf(F, "%sreq = N/A\n", dir);
117 * Dumper interface for dumping ia32 nodes in vcg.
118 * @param n the node to dump
119 * @param F the output file
120 * @param reason indicates which kind of information should be dumped
121 * @return 0 on success or != 0 on failure
123 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
124 ir_mode *mode = NULL;
127 const arch_register_req_t **reqs;
128 const arch_register_t **slots;
131 case dump_node_opcode_txt:
132 fprintf(F, "%s", get_irn_opname(n));
134 if(is_ia32_Immediate(n) || is_ia32_Const(n)) {
135 const ia32_immediate_attr_t *attr
136 = get_ia32_immediate_attr_const(n);
140 if(attr->attr.data.am_sc_sign) {
143 fputs(get_entity_name(attr->symconst), F);
145 if(attr->offset != 0 || attr->symconst == NULL) {
146 if(attr->offset > 0 && attr->symconst != NULL) {
149 fprintf(F, "%ld", attr->offset);
154 const ia32_attr_t *attr = get_ia32_attr_const(n);
156 if(attr->am_sc != NULL || attr->am_offs != 0)
159 if(attr->am_sc != NULL) {
160 if(attr->data.am_sc_sign) {
163 fputs(get_entity_name(attr->am_sc), F);
165 if(attr->am_offs != 0) {
166 if(attr->am_offs > 0 && attr->am_sc != NULL) {
169 fprintf(F, "%d", attr->am_offs);
172 if(attr->am_sc != NULL || attr->am_offs != 0)
177 case dump_node_mode_txt:
178 if (is_ia32_Ld(n) || is_ia32_St(n)) {
179 mode = get_ia32_ls_mode(n);
180 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
184 case dump_node_nodeattr_txt:
185 if (! is_ia32_Lea(n)) {
186 if (is_ia32_AddrModeS(n)) {
187 fprintf(F, "[AM S] ");
188 } else if (is_ia32_AddrModeD(n)) {
189 fprintf(F, "[AM D] ");
195 case dump_node_info_txt:
196 n_res = get_ia32_n_res(n);
197 fprintf(F, "=== IA32 attr begin ===\n");
199 /* dump IN requirements */
200 if (get_irn_arity(n) > 0) {
201 reqs = get_ia32_in_req_all(n);
202 dump_reg_req(F, n, reqs, 0);
205 /* dump OUT requirements */
207 reqs = get_ia32_out_req_all(n);
208 dump_reg_req(F, n, reqs, 1);
211 /* dump assigned registers */
212 slots = get_ia32_slots(n);
213 if (slots && n_res > 0) {
214 for (i = 0; i < n_res; i++) {
215 const arch_register_t *reg;
219 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
226 switch (get_ia32_op_type(n)) {
228 fprintf(F, "Normal");
231 fprintf(F, "AM Dest (Load+Store)");
234 fprintf(F, "AM Source (Load)");
237 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
242 /* dump supported am */
243 fprintf(F, "AM support = ");
244 switch (get_ia32_am_support(n)) {
249 fprintf(F, "source only (Load)");
252 fprintf(F, "dest only (Load+Store)");
258 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
264 if(get_ia32_am_offs_int(n) != 0) {
265 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
268 /* dump AM symconst */
269 if(get_ia32_am_sc(n) != NULL) {
270 ir_entity *ent = get_ia32_am_sc(n);
271 ident *id = get_entity_ld_ident(ent);
272 fprintf(F, "AM symconst = %s\n", get_id_str(id));
276 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
279 if(is_ia32_SwitchJmp(n)) {
280 fprintf(F, "pn_code = %ld\n", get_ia32_pncode(n));
282 if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) {
283 long pnc = get_ia32_pncode(n);
284 fprintf(F, "pn_code = %ld (%s, unsigned)\n",
285 pnc, get_pnc_string(pnc & ~ia32_pn_Cmp_Unsigned));
287 fprintf(F, "pn_code = %ld (%s)\n", get_ia32_pncode(n),
288 get_pnc_string(get_ia32_pncode(n)));
293 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
296 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
299 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
302 fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
305 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
308 fprintf(F, "latency = %d\n", get_ia32_latency(n));
311 fprintf(F, "flags =");
312 flags = get_ia32_flags(n);
313 if (flags == arch_irn_flags_none) {
317 if (flags & arch_irn_flags_dont_spill) {
318 fprintf(F, " unspillable");
320 if (flags & arch_irn_flags_rematerializable) {
321 fprintf(F, " remat");
323 if (flags & arch_irn_flags_ignore) {
324 fprintf(F, " ignore");
326 if (flags & arch_irn_flags_modify_sp) {
327 fprintf(F, " modify_sp");
330 fprintf(F, " (%d)\n", flags);
332 /* dump frame entity */
333 fprintf(F, "frame entity = ");
334 if (get_ia32_frame_ent(n)) {
335 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
343 fprintf(F, "ls_mode = ");
344 if (get_ia32_ls_mode(n)) {
345 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
353 /* dump original ir node name */
354 fprintf(F, "orig node = ");
355 if (get_ia32_orig_node(n)) {
356 fprintf(F, "%s", get_ia32_orig_node(n));
364 fprintf(F, "=== IA32 attr end ===\n");
365 /* end of: case dump_node_info_txt */
374 /***************************************************************************************************
376 * | | | | | | / / | | | | | | | |
377 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
378 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
379 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
380 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
383 ***************************************************************************************************/
385 ia32_attr_t *get_ia32_attr(ir_node *node) {
386 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
387 return (ia32_attr_t *)get_irn_generic_attr(node);
390 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
391 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
392 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
395 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
396 ia32_attr_t *attr = get_ia32_attr(node);
397 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
401 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
402 const ia32_attr_t *attr = get_ia32_attr_const(node);
403 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
407 const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
408 const ia32_attr_t *attr = get_ia32_attr_const(node);
409 const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
414 const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
416 const ia32_attr_t *attr = get_ia32_attr_const(node);
417 const ia32_immediate_attr_t *immediate_attr
418 = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
420 return immediate_attr;
424 * Gets the type of an ia32 node.
426 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
427 const ia32_attr_t *attr = get_ia32_attr_const(node);
428 return attr->data.tp;
432 * Sets the type of an ia32 node.
434 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
435 ia32_attr_t *attr = get_ia32_attr(node);
440 * Gets the supported address mode of an ia32 node
442 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
443 const ia32_attr_t *attr = get_ia32_attr_const(node);
444 return attr->data.am_support;
447 ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
448 const ia32_attr_t *attr = get_ia32_attr_const(node);
449 return attr->data.am_arity;
453 * Sets the supported address mode of an ia32 node
455 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
456 ia32_am_arity_t arity) {
457 ia32_attr_t *attr = get_ia32_attr(node);
458 attr->data.am_support = am_tp;
459 attr->data.am_arity = arity;
461 assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
462 (am_tp != ia32_am_None &&
463 ((arity == ia32_am_unary) || (arity == ia32_am_binary) || (arity == ia32_am_ternary))));
467 * Gets the address mode offset as int.
469 int get_ia32_am_offs_int(const ir_node *node) {
470 const ia32_attr_t *attr = get_ia32_attr_const(node);
471 return attr->am_offs;
475 * Sets the address mode offset from an int.
477 void set_ia32_am_offs_int(ir_node *node, int offset) {
478 ia32_attr_t *attr = get_ia32_attr(node);
479 attr->am_offs = offset;
482 void add_ia32_am_offs_int(ir_node *node, int offset) {
483 ia32_attr_t *attr = get_ia32_attr(node);
484 attr->am_offs += offset;
488 * Returns the symconst entity associated to address mode.
490 ir_entity *get_ia32_am_sc(const ir_node *node) {
491 const ia32_attr_t *attr = get_ia32_attr_const(node);
496 * Sets the symconst entity associated to address mode.
498 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
499 ia32_attr_t *attr = get_ia32_attr(node);
500 attr->am_sc = entity;
504 * Sets the sign bit for address mode symconst.
506 void set_ia32_am_sc_sign(ir_node *node) {
507 ia32_attr_t *attr = get_ia32_attr(node);
508 attr->data.am_sc_sign = 1;
512 * Clears the sign bit for address mode symconst.
514 void clear_ia32_am_sc_sign(ir_node *node) {
515 ia32_attr_t *attr = get_ia32_attr(node);
516 attr->data.am_sc_sign = 0;
520 * Returns the sign bit for address mode symconst.
522 int is_ia32_am_sc_sign(const ir_node *node) {
523 const ia32_attr_t *attr = get_ia32_attr_const(node);
524 return attr->data.am_sc_sign;
528 * Gets the addr mode const.
530 int get_ia32_am_scale(const ir_node *node) {
531 const ia32_attr_t *attr = get_ia32_attr_const(node);
532 return attr->data.am_scale;
536 * Sets the index register scale for address mode.
538 void set_ia32_am_scale(ir_node *node, int scale) {
539 ia32_attr_t *attr = get_ia32_attr(node);
540 attr->data.am_scale = scale;
544 * Sets the uses_frame flag.
546 void set_ia32_use_frame(ir_node *node) {
547 ia32_attr_t *attr = get_ia32_attr(node);
548 attr->data.use_frame = 1;
552 * Clears the uses_frame flag.
554 void clear_ia32_use_frame(ir_node *node) {
555 ia32_attr_t *attr = get_ia32_attr(node);
556 attr->data.use_frame = 0;
560 * Gets the uses_frame flag.
562 int is_ia32_use_frame(const ir_node *node) {
563 const ia32_attr_t *attr = get_ia32_attr_const(node);
564 return attr->data.use_frame;
568 * Sets node to commutative.
570 void set_ia32_commutative(ir_node *node) {
571 ia32_attr_t *attr = get_ia32_attr(node);
572 attr->data.is_commutative = 1;
576 * Sets node to non-commutative.
578 void clear_ia32_commutative(ir_node *node) {
579 ia32_attr_t *attr = get_ia32_attr(node);
580 attr->data.is_commutative = 0;
584 * Checks if node is commutative.
586 int is_ia32_commutative(const ir_node *node) {
587 const ia32_attr_t *attr = get_ia32_attr_const(node);
588 return attr->data.is_commutative;
594 void set_ia32_got_lea(ir_node *node) {
595 ia32_attr_t *attr = get_ia32_attr(node);
596 attr->data.got_lea = 1;
600 * Clears node got_lea.
602 void clear_ia32_got_lea(ir_node *node) {
603 ia32_attr_t *attr = get_ia32_attr(node);
604 attr->data.got_lea = 0;
608 * Checks if node got lea.
610 int is_ia32_got_lea(const ir_node *node) {
611 const ia32_attr_t *attr = get_ia32_attr_const(node);
612 return attr->data.got_lea;
615 void set_ia32_need_stackent(ir_node *node) {
616 ia32_attr_t *attr = get_ia32_attr(node);
617 attr->data.need_stackent = 1;
620 void clear_ia32_need_stackent(ir_node *node) {
621 ia32_attr_t *attr = get_ia32_attr(node);
622 attr->data.need_stackent = 0;
625 int is_ia32_need_stackent(const ir_node *node) {
626 const ia32_attr_t *attr = get_ia32_attr_const(node);
627 return attr->data.need_stackent;
631 * Gets the mode of the stored/loaded value (only set for Store/Load)
633 ir_mode *get_ia32_ls_mode(const ir_node *node) {
634 const ia32_attr_t *attr = get_ia32_attr_const(node);
635 return attr->ls_mode;
639 * Sets the mode of the stored/loaded value (only set for Store/Load)
641 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
642 ia32_attr_t *attr = get_ia32_attr(node);
643 attr->ls_mode = mode;
647 * Gets the frame entity assigned to this node.
649 ir_entity *get_ia32_frame_ent(const ir_node *node) {
650 const ia32_attr_t *attr = get_ia32_attr_const(node);
651 return attr->frame_ent;
655 * Sets the frame entity for this node.
657 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
658 ia32_attr_t *attr = get_ia32_attr(node);
659 attr->frame_ent = ent;
661 set_ia32_use_frame(node);
663 clear_ia32_use_frame(node);
668 * Gets the instruction latency.
670 unsigned get_ia32_latency(const ir_node *node) {
671 const ia32_attr_t *attr = get_ia32_attr_const(node);
672 return attr->latency;
676 * Sets the instruction latency.
678 void set_ia32_latency(ir_node *node, unsigned latency) {
679 ia32_attr_t *attr = get_ia32_attr(node);
680 attr->latency = latency;
684 * Returns the argument register requirements of an ia32 node.
686 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
687 const ia32_attr_t *attr = get_ia32_attr_const(node);
692 * Sets the argument register requirements of an ia32 node.
694 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
695 ia32_attr_t *attr = get_ia32_attr(node);
700 * Returns the result register requirements of an ia32 node.
702 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
703 const ia32_attr_t *attr = get_ia32_attr_const(node);
704 return attr->out_req;
708 * Sets the result register requirements of an ia32 node.
710 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
711 ia32_attr_t *attr = get_ia32_attr(node);
712 attr->out_req = reqs;
716 * Returns the argument register requirement at position pos of an ia32 node.
718 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
719 const ia32_attr_t *attr = get_ia32_attr_const(node);
720 if(attr->in_req == NULL)
721 return arch_no_register_req;
723 return attr->in_req[pos];
727 * Returns the result register requirement at position pos of an ia32 node.
729 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
730 const ia32_attr_t *attr = get_ia32_attr_const(node);
731 if(attr->out_req == NULL)
732 return arch_no_register_req;
734 return attr->out_req[pos];
738 * Sets the OUT register requirements at position pos.
740 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
741 ia32_attr_t *attr = get_ia32_attr(node);
742 attr->out_req[pos] = req;
746 * Sets the IN register requirements at position pos.
748 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
749 ia32_attr_t *attr = get_ia32_attr(node);
750 attr->in_req[pos] = req;
754 * Returns the register flag of an ia32 node.
756 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
757 const ia32_attr_t *attr = get_ia32_attr_const(node);
758 return attr->data.flags;
762 * Sets the register flag of an ia32 node.
764 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
765 ia32_attr_t *attr = get_ia32_attr(node);
766 attr->data.flags = flags;
770 * Returns the result register slots of an ia32 node.
772 const arch_register_t **get_ia32_slots(const ir_node *node) {
773 const ia32_attr_t *attr = get_ia32_attr_const(node);
778 * Returns the number of results.
780 int get_ia32_n_res(const ir_node *node) {
781 const ia32_attr_t *attr = get_ia32_attr_const(node);
782 return ARR_LEN(attr->slots);
786 * Returns the flavour of an ia32 node,
788 ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
789 const ia32_attr_t *attr = get_ia32_attr_const(node);
790 return attr->data.op_flav;
794 * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
796 void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) {
797 ia32_attr_t *attr = get_ia32_attr(node);
798 attr->data.op_flav = op_flav;
802 * Returns the projnum code.
804 long get_ia32_pncode(const ir_node *node)
806 const ia32_attr_t *attr = get_ia32_attr_const(node);
807 return attr->pn_code;
811 * Sets the projnum code
813 void set_ia32_pncode(ir_node *node, long code)
815 ia32_attr_t *attr = get_ia32_attr(node);
816 attr->pn_code = code;
820 * Sets the flags for the n'th out.
822 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
823 ia32_attr_t *attr = get_ia32_attr(node);
824 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
825 attr->out_flags[pos] = flags;
829 * Gets the flags for the n'th out.
831 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
832 const ia32_attr_t *attr = get_ia32_attr_const(node);
833 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
834 return attr->out_flags[pos];
838 * Get the list of available execution units.
840 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
841 const ia32_attr_t *attr = get_ia32_attr_const(node);
842 return attr->exec_units;
846 * Get the exception label attribute.
848 unsigned get_ia32_exc_label(const ir_node *node) {
849 const ia32_attr_t *attr = get_ia32_attr_const(node);
850 return attr->data.except_label;
854 * Set the exception label attribute.
856 void set_ia32_exc_label(ir_node *node, unsigned flag) {
857 ia32_attr_t *attr = get_ia32_attr(node);
858 attr->data.except_label = flag;
864 * Returns the name of the original ir node.
866 const char *get_ia32_orig_node(const ir_node *node) {
867 const ia32_attr_t *attr = get_ia32_attr_const(node);
868 return attr->orig_node;
872 * Sets the name of the original ir node.
874 void set_ia32_orig_node(ir_node *node, const char *name) {
875 ia32_attr_t *attr = get_ia32_attr(node);
876 attr->orig_node = name;
881 /******************************************************************************************************
883 * (_) | | | | | | / _| | | (_)
884 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
885 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
886 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
887 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
890 ******************************************************************************************************/
893 * Sets the AddrMode(S|D) attribute
895 void set_ia32_AddrMode(ir_node *node, char direction) {
896 ia32_attr_t *attr = get_ia32_attr(node);
900 attr->data.tp = ia32_AddrModeD;
903 attr->data.tp = ia32_AddrModeS;
906 assert(0 && "wrong AM type");
911 * Returns whether or not the node is an AddrModeS node.
913 int is_ia32_AddrModeS(const ir_node *node) {
914 const ia32_attr_t *attr = get_ia32_attr_const(node);
915 return (attr->data.tp == ia32_AddrModeS);
919 * Returns whether or not the node is an AddrModeD node.
921 int is_ia32_AddrModeD(const ir_node *node) {
922 const ia32_attr_t *attr = get_ia32_attr_const(node);
923 return (attr->data.tp == ia32_AddrModeD);
927 * Checks if node is a Load or xLoad/vfLoad.
929 int is_ia32_Ld(const ir_node *node) {
930 int op = get_ia32_irn_opcode(node);
931 return op == iro_ia32_Load ||
932 op == iro_ia32_xLoad ||
933 op == iro_ia32_vfld ||
938 * Checks if node is a Store or xStore/vfStore.
940 int is_ia32_St(const ir_node *node) {
941 int op = get_ia32_irn_opcode(node);
942 return op == iro_ia32_Store ||
943 op == iro_ia32_Store8Bit ||
944 op == iro_ia32_xStore ||
945 op == iro_ia32_vfst ||
946 op == iro_ia32_fst ||
951 * Returns the name of the OUT register at position pos.
953 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
954 const ia32_attr_t *attr = get_ia32_attr_const(node);
956 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
957 assert(attr->slots[pos] && "No register assigned");
959 return arch_register_get_name(attr->slots[pos]);
963 * Returns the index of the OUT register at position pos within its register class.
965 int get_ia32_out_regnr(const ir_node *node, int pos) {
966 const ia32_attr_t *attr = get_ia32_attr_const(node);
968 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
969 assert(attr->slots[pos] && "No register assigned");
971 return arch_register_get_index(attr->slots[pos]);
974 void ia32_swap_left_right(ir_node *node)
976 ir_node *left = get_irn_n(node, 2);
977 ir_node *right = get_irn_n(node, 3);
978 assert(is_ia32_commutative(node));
979 set_irn_n(node, 2, right);
980 set_irn_n(node, 3, left);
981 set_ia32_pncode(node, get_inversed_pnc(get_ia32_pncode(node)));
985 * Returns the OUT register at position pos.
987 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
988 const ia32_attr_t *attr = get_ia32_attr_const(node);
990 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
991 assert(attr->slots[pos] && "No register assigned");
993 return attr->slots[pos];
997 * Initializes the nodes attributes.
999 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1000 const arch_register_req_t **in_reqs,
1001 const arch_register_req_t **out_reqs,
1002 const be_execution_unit_t ***execution_units,
1003 int n_res, unsigned latency)
1005 ir_graph *irg = get_irn_irg(node);
1006 struct obstack *obst = get_irg_obstack(irg);
1007 ia32_attr_t *attr = get_ia32_attr(node);
1008 arch_register_t **slots;
1010 set_ia32_flags(node, flags);
1011 set_ia32_in_req_all(node, in_reqs);
1012 set_ia32_out_req_all(node, out_reqs);
1013 set_ia32_latency(node, latency);
1015 attr->exec_units = execution_units;
1017 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1020 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1021 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1023 attr->slots = slots = NEW_ARR_D(arch_register_t*, obst, n_res);
1024 memset(slots, 0, n_res * sizeof(slots[0]));
1028 init_ia32_x87_attributes(ir_node *res)
1031 ia32_attr_t *attr = get_ia32_attr(res);
1032 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1034 ia32_current_cg->do_x87_sim = 1;
1038 init_ia32_asm_attributes(ir_node *res)
1041 ia32_attr_t *attr = get_ia32_attr(res);
1042 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1047 init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
1048 int symconst_sign, long offset)
1050 ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
1053 attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
1055 attr->symconst = symconst;
1056 attr->attr.data.am_sc_sign = symconst_sign;
1057 attr->offset = offset;
1060 ir_node *get_ia32_result_proj(const ir_node *node)
1062 const ir_edge_t *edge;
1064 foreach_out_edge(node, edge) {
1065 ir_node *proj = get_edge_src_irn(edge);
1066 if(get_Proj_proj(proj) == 0) {
1073 /***************************************************************************************
1076 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1077 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1078 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1079 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1081 ***************************************************************************************/
1083 /* default compare operation to compare attributes */
1084 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1085 if (a->data.tp != b->data.tp)
1088 if (a->data.am_scale != b->data.am_scale
1089 || a->data.am_sc_sign != b->data.am_sc_sign
1090 || a->am_offs != b->am_offs
1091 || a->am_sc != b->am_sc
1092 || a->ls_mode != b->ls_mode)
1095 /* nodes with not yet assigned entities shouldn't be CSEd (important for
1096 * unsigned int -> double conversions */
1097 if(a->data.use_frame && a->frame_ent == NULL)
1099 if(b->data.use_frame && b->frame_ent == NULL)
1102 if (a->data.use_frame != b->data.use_frame
1103 || a->frame_ent != b->frame_ent)
1106 if(a->pn_code != b->pn_code)
1109 if (a->data.tp != b->data.tp
1110 || a->data.op_flav != b->data.op_flav)
1113 if (a->data.except_label != b->data.except_label)
1120 int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
1122 const ia32_attr_t* attr_a = get_ia32_attr_const(a);
1123 const ia32_attr_t* attr_b = get_ia32_attr_const(b);
1125 return ia32_compare_attr(attr_a, attr_b);
1129 int ia32_compare_x87_attr(ir_node *a, ir_node *b)
1131 return ia32_compare_nodes_attr(a, b);
1135 int ia32_compare_asm_attr(ir_node *a, ir_node *b)
1137 const ia32_asm_attr_t *attr_a;
1138 const ia32_asm_attr_t *attr_b;
1140 if(ia32_compare_nodes_attr(a, b))
1143 attr_a = get_ia32_asm_attr_const(a);
1144 attr_b = get_ia32_asm_attr_const(b);
1146 if(attr_a->asm_text != attr_b->asm_text)
1153 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
1155 const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
1156 const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
1158 if(attr_a->symconst != attr_b->symconst ||
1159 attr_a->attr.data.am_sc_sign != attr_b->attr.data.am_sc_sign ||
1160 attr_a->offset != attr_b->offset)
1166 /* copies the ia32 attributes */
1167 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1169 ir_graph *irg = get_irn_irg(new_node);
1170 struct obstack *obst = get_irg_obstack(irg);
1171 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1172 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1174 /* copy the attributes */
1175 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1177 /* copy out flags */
1178 attr_new->out_flags =
1179 DUP_ARR_D(int, obst, attr_old->out_flags);
1180 /* copy register assignments */
1182 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
1185 /* Include the generated constructor functions */
1186 #include "gen_ia32_new_nodes.c.inl"