2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the coresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same));
102 if (reqs[i]->type & arch_register_req_type_should_be_different) {
103 ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different));
112 fprintf(F, "%sreq = N/A\n", dir);
117 * Dumper interface for dumping ia32 nodes in vcg.
118 * @param n the node to dump
119 * @param F the output file
120 * @param reason indicates which kind of information should be dumped
121 * @return 0 on success or != 0 on failure
123 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
124 ir_mode *mode = NULL;
126 int i, n_res, am_flav, flags;
127 const arch_register_req_t **reqs;
128 const arch_register_t **slots;
131 case dump_node_opcode_txt:
132 fprintf(F, "%s", get_irn_opname(n));
135 case dump_node_mode_txt:
136 mode = get_irn_mode(n);
138 if (is_ia32_Ld(n) || is_ia32_St(n)) {
139 mode = get_ia32_ls_mode(n);
142 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
145 case dump_node_nodeattr_txt:
146 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
147 if(is_ia32_ImmSymConst(n)) {
148 ir_entity *ent = get_ia32_Immop_symconst(n);
149 ident *id = get_entity_ld_ident(ent);
150 fprintf(F, "[SymC %s]", get_id_str(id));
153 tarval *tv = get_ia32_Immop_tarval(n);
155 tarval_snprintf(buf, sizeof(buf), tv);
156 fprintf(F, "[%s]", buf);
160 if (! is_ia32_Lea(n)) {
161 if (is_ia32_AddrModeS(n)) {
162 fprintf(F, "[AM S] ");
164 else if (is_ia32_AddrModeD(n)) {
165 fprintf(F, "[AM D] ");
171 case dump_node_info_txt:
172 n_res = get_ia32_n_res(n);
173 fprintf(F, "=== IA32 attr begin ===\n");
175 /* dump IN requirements */
176 if (get_irn_arity(n) > 0) {
177 reqs = get_ia32_in_req_all(n);
178 dump_reg_req(F, n, reqs, 0);
181 /* dump OUT requirements */
183 reqs = get_ia32_out_req_all(n);
184 dump_reg_req(F, n, reqs, 1);
187 /* dump assigned registers */
188 slots = get_ia32_slots(n);
189 if (slots && n_res > 0) {
190 for (i = 0; i < n_res; i++) {
191 const arch_register_t *reg;
195 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
202 switch (get_ia32_op_type(n)) {
204 fprintf(F, "Normal");
207 fprintf(F, "AM Dest (Load+Store)");
210 fprintf(F, "AM Source (Load)");
213 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
218 /* dump immop type */
219 fprintf(F, "immediate = ");
220 switch (get_ia32_immop_type(n)) {
227 case ia32_ImmSymConst:
228 fprintf(F, "SymConst");
231 fprintf(F, "unknown (%d)", get_ia32_immop_type(n));
236 /* dump supported am */
237 fprintf(F, "AM support = ");
238 switch (get_ia32_am_support(n)) {
243 fprintf(F, "source only (Load)");
246 fprintf(F, "dest only (Load+Store)");
252 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
257 /* dump am flavour */
258 fprintf(F, "AM flavour =");
259 am_flav = get_ia32_am_flavour(n);
260 if (am_flav == ia32_am_N) {
264 if (am_flav & ia32_O) {
267 if (am_flav & ia32_B) {
270 if (am_flav & ia32_I) {
273 if (am_flav & ia32_S) {
277 fprintf(F, " (%d)\n", am_flav);
280 if(get_ia32_am_offs_int(n) != 0) {
281 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
284 /* dump AM symconst */
285 if(get_ia32_am_sc(n) != NULL) {
286 ir_entity *ent = get_ia32_am_sc(n);
287 ident *id = get_entity_ld_ident(ent);
288 fprintf(F, "AM symconst = %s\n", get_id_str(id));
292 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
295 if(is_ia32_SwitchJmp(n)) {
296 fprintf(F, "pn_code = %d\n", get_ia32_pncode(n));
298 if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) {
299 int pnc = get_ia32_pncode(n);
300 fprintf(F, "pn_code = %d (%s, unsigned)\n",
301 pnc, get_pnc_string(pnc & ~ia32_pn_Cmp_Unsigned));
303 fprintf(F, "pn_code = %d (%s)\n", get_ia32_pncode(n),
304 get_pnc_string(get_ia32_pncode(n)));
309 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
312 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
315 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
318 fprintf(F, "emit cl instead of ecx = %d\n", is_ia32_emit_cl(n));
321 fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
324 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
327 fprintf(F, "latency = %d\n", get_ia32_latency(n));
330 fprintf(F, "flags =");
331 flags = get_ia32_flags(n);
332 if (flags == arch_irn_flags_none) {
336 if (flags & arch_irn_flags_dont_spill) {
337 fprintf(F, " unspillable");
339 if (flags & arch_irn_flags_rematerializable) {
340 fprintf(F, " remat");
342 if (flags & arch_irn_flags_ignore) {
343 fprintf(F, " ignore");
345 if (flags & arch_irn_flags_modify_sp) {
346 fprintf(F, " modify_sp");
349 fprintf(F, " (%d)\n", flags);
351 /* dump frame entity */
352 fprintf(F, "frame entity = ");
353 if (get_ia32_frame_ent(n)) {
354 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
362 fprintf(F, "ls_mode = ");
363 if (get_ia32_ls_mode(n)) {
364 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
372 /* dump original ir node name */
373 fprintf(F, "orig node = ");
374 if (get_ia32_orig_node(n)) {
375 fprintf(F, "%s", get_ia32_orig_node(n));
383 fprintf(F, "=== IA32 attr end ===\n");
384 /* end of: case dump_node_info_txt */
393 /***************************************************************************************************
395 * | | | | | | / / | | | | | | | |
396 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
397 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
398 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
399 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
402 ***************************************************************************************************/
404 ia32_attr_t *get_ia32_attr(ir_node *node) {
405 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
406 return (ia32_attr_t *)get_irn_generic_attr(node);
409 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
410 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
411 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
414 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
415 ia32_attr_t *attr = get_ia32_attr(node);
416 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
420 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
421 const ia32_attr_t *attr = get_ia32_attr_const(node);
422 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
427 * Gets the type of an ia32 node.
429 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
430 const ia32_attr_t *attr = get_ia32_attr_const(node);
431 return attr->data.tp;
435 * Sets the type of an ia32 node.
437 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
438 ia32_attr_t *attr = get_ia32_attr(node);
443 * Gets the immediate op type of an ia32 node.
445 ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
446 const ia32_attr_t *attr = get_ia32_attr_const(node);
447 return attr->data.imm_tp;
451 * Gets the supported address mode of an ia32 node
453 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
454 const ia32_attr_t *attr = get_ia32_attr_const(node);
455 return attr->data.am_support;
459 * Sets the supported address mode of an ia32 node
461 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) {
462 ia32_attr_t *attr = get_ia32_attr(node);
463 attr->data.am_support = am_tp;
467 * Gets the address mode flavour of an ia32 node
469 ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) {
470 const ia32_attr_t *attr = get_ia32_attr_const(node);
471 return attr->data.am_flavour;
475 * Sets the address mode flavour of an ia32 node
477 void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) {
478 ia32_attr_t *attr = get_ia32_attr(node);
479 attr->data.am_flavour = am_flavour;
483 * Gets the address mode offset as int.
485 int get_ia32_am_offs_int(const ir_node *node) {
486 const ia32_attr_t *attr = get_ia32_attr_const(node);
487 return attr->am_offs;
491 * Sets the address mode offset from an int.
493 void set_ia32_am_offs_int(ir_node *node, int offset) {
494 ia32_attr_t *attr = get_ia32_attr(node);
495 attr->am_offs = offset;
498 void add_ia32_am_offs_int(ir_node *node, int offset) {
499 ia32_attr_t *attr = get_ia32_attr(node);
500 attr->am_offs += offset;
504 * Returns the symconst entity associated to address mode.
506 ir_entity *get_ia32_am_sc(const ir_node *node) {
507 const ia32_attr_t *attr = get_ia32_attr_const(node);
512 * Sets the symconst entity associated to address mode.
514 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
515 ia32_attr_t *attr = get_ia32_attr(node);
516 attr->am_sc = entity;
520 * Sets the sign bit for address mode symconst.
522 void set_ia32_am_sc_sign(ir_node *node) {
523 ia32_attr_t *attr = get_ia32_attr(node);
524 attr->data.am_sc_sign = 1;
528 * Clears the sign bit for address mode symconst.
530 void clear_ia32_am_sc_sign(ir_node *node) {
531 ia32_attr_t *attr = get_ia32_attr(node);
532 attr->data.am_sc_sign = 0;
536 * Returns the sign bit for address mode symconst.
538 int is_ia32_am_sc_sign(const ir_node *node) {
539 const ia32_attr_t *attr = get_ia32_attr_const(node);
540 return attr->data.am_sc_sign;
544 * Gets the addr mode const.
546 int get_ia32_am_scale(const ir_node *node) {
547 const ia32_attr_t *attr = get_ia32_attr_const(node);
548 return attr->data.am_scale;
552 * Sets the index register scale for address mode.
554 void set_ia32_am_scale(ir_node *node, int scale) {
555 ia32_attr_t *attr = get_ia32_attr(node);
556 attr->data.am_scale = scale;
560 * Return the tarval of an immediate operation or NULL in case of SymConst
562 tarval *get_ia32_Immop_tarval(const ir_node *node) {
563 const ia32_attr_t *attr = get_ia32_attr_const(node);
564 assert(attr->data.imm_tp == ia32_ImmConst);
565 return attr->cnst_val.tv;
569 * Sets the attributes of an immediate operation to the specified tarval
571 void set_ia32_Immop_tarval(ir_node *node, tarval *tv) {
572 ia32_attr_t *attr = get_ia32_attr(node);
573 attr->data.imm_tp = ia32_ImmConst;
574 attr->cnst_val.tv = tv;
577 void set_ia32_Immop_symconst(ir_node *node, ir_entity *entity) {
578 ia32_attr_t *attr = get_ia32_attr(node);
579 attr->data.imm_tp = ia32_ImmSymConst;
580 attr->cnst_val.sc = entity;
583 ir_entity *get_ia32_Immop_symconst(const ir_node *node) {
584 const ia32_attr_t *attr = get_ia32_attr_const(node);
585 assert(attr->data.imm_tp == ia32_ImmSymConst);
586 return attr->cnst_val.sc;
590 * Sets the uses_frame flag.
592 void set_ia32_use_frame(ir_node *node) {
593 ia32_attr_t *attr = get_ia32_attr(node);
594 attr->data.use_frame = 1;
598 * Clears the uses_frame flag.
600 void clear_ia32_use_frame(ir_node *node) {
601 ia32_attr_t *attr = get_ia32_attr(node);
602 attr->data.use_frame = 0;
606 * Gets the uses_frame flag.
608 int is_ia32_use_frame(const ir_node *node) {
609 const ia32_attr_t *attr = get_ia32_attr_const(node);
610 return attr->data.use_frame;
614 * Sets node to commutative.
616 void set_ia32_commutative(ir_node *node) {
617 ia32_attr_t *attr = get_ia32_attr(node);
618 attr->data.is_commutative = 1;
622 * Sets node to non-commutative.
624 void clear_ia32_commutative(ir_node *node) {
625 ia32_attr_t *attr = get_ia32_attr(node);
626 attr->data.is_commutative = 0;
630 * Checks if node is commutative.
632 int is_ia32_commutative(const ir_node *node) {
633 const ia32_attr_t *attr = get_ia32_attr_const(node);
634 return attr->data.is_commutative;
640 void set_ia32_emit_cl(ir_node *node) {
641 ia32_attr_t *attr = get_ia32_attr(node);
642 attr->data.emit_cl = 1;
646 * Clears node emit_cl.
648 void clear_ia32_emit_cl(ir_node *node) {
649 ia32_attr_t *attr = get_ia32_attr(node);
650 attr->data.emit_cl = 0;
654 * Checks if node needs %cl.
656 int is_ia32_emit_cl(const ir_node *node) {
657 const ia32_attr_t *attr = get_ia32_attr_const(node);
658 return attr->data.emit_cl;
664 void set_ia32_got_lea(ir_node *node) {
665 ia32_attr_t *attr = get_ia32_attr(node);
666 attr->data.got_lea = 1;
670 * Clears node got_lea.
672 void clear_ia32_got_lea(ir_node *node) {
673 ia32_attr_t *attr = get_ia32_attr(node);
674 attr->data.got_lea = 0;
678 * Checks if node got lea.
680 int is_ia32_got_lea(const ir_node *node) {
681 const ia32_attr_t *attr = get_ia32_attr_const(node);
682 return attr->data.got_lea;
685 void set_ia32_need_stackent(ir_node *node) {
686 ia32_attr_t *attr = get_ia32_attr(node);
687 attr->data.need_stackent = 1;
690 void clear_ia32_need_stackent(ir_node *node) {
691 ia32_attr_t *attr = get_ia32_attr(node);
692 attr->data.need_stackent = 0;
695 int is_ia32_need_stackent(const ir_node *node) {
696 const ia32_attr_t *attr = get_ia32_attr_const(node);
697 return attr->data.need_stackent;
701 * Gets the mode of the stored/loaded value (only set for Store/Load)
703 ir_mode *get_ia32_ls_mode(const ir_node *node) {
704 const ia32_attr_t *attr = get_ia32_attr_const(node);
705 return attr->ls_mode;
709 * Sets the mode of the stored/loaded value (only set for Store/Load)
711 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
712 ia32_attr_t *attr = get_ia32_attr(node);
713 attr->ls_mode = mode;
717 * Gets the frame entity assigned to this node.
719 ir_entity *get_ia32_frame_ent(const ir_node *node) {
720 const ia32_attr_t *attr = get_ia32_attr_const(node);
721 return attr->frame_ent;
725 * Sets the frame entity for this node.
727 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
728 ia32_attr_t *attr = get_ia32_attr(node);
729 attr->frame_ent = ent;
731 set_ia32_use_frame(node);
733 clear_ia32_use_frame(node);
738 * Gets the instruction latency.
740 unsigned get_ia32_latency(const ir_node *node) {
741 const ia32_attr_t *attr = get_ia32_attr_const(node);
742 return attr->latency;
746 * Sets the instruction latency.
748 void set_ia32_latency(ir_node *node, unsigned latency) {
749 ia32_attr_t *attr = get_ia32_attr(node);
750 attr->latency = latency;
754 * Returns the argument register requirements of an ia32 node.
756 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
757 const ia32_attr_t *attr = get_ia32_attr_const(node);
762 * Sets the argument register requirements of an ia32 node.
764 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
765 ia32_attr_t *attr = get_ia32_attr(node);
770 * Returns the result register requirements of an ia32 node.
772 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
773 const ia32_attr_t *attr = get_ia32_attr_const(node);
774 return attr->out_req;
778 * Sets the result register requirements of an ia32 node.
780 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
781 ia32_attr_t *attr = get_ia32_attr(node);
782 attr->out_req = reqs;
786 * Returns the argument register requirement at position pos of an ia32 node.
788 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
789 const ia32_attr_t *attr = get_ia32_attr_const(node);
790 if(attr->in_req == NULL)
791 return arch_no_register_req;
793 return attr->in_req[pos];
797 * Returns the result register requirement at position pos of an ia32 node.
799 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
800 const ia32_attr_t *attr = get_ia32_attr_const(node);
801 if(attr->out_req == NULL)
802 return arch_no_register_req;
804 return attr->out_req[pos];
808 * Sets the OUT register requirements at position pos.
810 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
811 ia32_attr_t *attr = get_ia32_attr(node);
812 attr->out_req[pos] = req;
816 * Sets the IN register requirements at position pos.
818 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
819 ia32_attr_t *attr = get_ia32_attr(node);
820 attr->in_req[pos] = req;
824 * Returns the register flag of an ia32 node.
826 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
827 const ia32_attr_t *attr = get_ia32_attr_const(node);
828 return attr->data.flags;
832 * Sets the register flag of an ia32 node.
834 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
835 ia32_attr_t *attr = get_ia32_attr(node);
836 attr->data.flags = flags;
840 * Returns the result register slots of an ia32 node.
842 const arch_register_t **get_ia32_slots(const ir_node *node) {
843 const ia32_attr_t *attr = get_ia32_attr_const(node);
848 * Returns the number of results.
850 int get_ia32_n_res(const ir_node *node) {
851 const ia32_attr_t *attr = get_ia32_attr_const(node);
852 return ARR_LEN(attr->slots);
856 * Returns the flavour of an ia32 node,
858 ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
859 const ia32_attr_t *attr = get_ia32_attr_const(node);
860 return attr->data.op_flav;
864 * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
866 void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) {
867 ia32_attr_t *attr = get_ia32_attr(node);
868 attr->data.op_flav = op_flav;
872 * Returns the projnum code.
874 pn_Cmp get_ia32_pncode(const ir_node *node) {
875 const ia32_attr_t *attr = get_ia32_attr_const(node);
876 return attr->pn_code;
880 * Sets the projnum code
882 void set_ia32_pncode(ir_node *node, pn_Cmp code) {
883 ia32_attr_t *attr = get_ia32_attr(node);
884 attr->pn_code = code;
888 * Sets the flags for the n'th out.
890 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
891 ia32_attr_t *attr = get_ia32_attr(node);
892 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
893 attr->out_flags[pos] = flags;
897 * Gets the flags for the n'th out.
899 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
900 const ia32_attr_t *attr = get_ia32_attr_const(node);
901 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
902 return attr->out_flags[pos];
906 * Get the list of available execution units.
908 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
909 const ia32_attr_t *attr = get_ia32_attr_const(node);
910 return attr->exec_units;
914 * Get the exception label attribute.
916 unsigned get_ia32_exc_label(const ir_node *node) {
917 const ia32_attr_t *attr = get_ia32_attr_const(node);
918 return attr->data.except_label;
922 * Set the exception label attribute.
924 void set_ia32_exc_label(ir_node *node, unsigned flag) {
925 ia32_attr_t *attr = get_ia32_attr(node);
926 attr->data.except_label = flag;
932 * Returns the name of the original ir node.
934 const char *get_ia32_orig_node(const ir_node *node) {
935 const ia32_attr_t *attr = get_ia32_attr_const(node);
936 return attr->orig_node;
940 * Sets the name of the original ir node.
942 void set_ia32_orig_node(ir_node *node, const char *name) {
943 ia32_attr_t *attr = get_ia32_attr(node);
944 attr->orig_node = name;
949 /******************************************************************************************************
951 * (_) | | | | | | / _| | | (_)
952 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
953 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
954 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
955 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
958 ******************************************************************************************************/
961 * Copy the attributes from an ia32_Const to an Immop (Add_i, Sub_i, ...) node
963 void copy_ia32_Immop_attr(ir_node *node, ir_node *from) {
964 ia32_immop_type_t immop_type = get_ia32_immop_type(from);
966 if(immop_type == ia32_ImmConst) {
967 set_ia32_Immop_tarval(node, get_ia32_Immop_tarval(from));
968 } else if(immop_type == ia32_ImmSymConst) {
969 set_ia32_Immop_symconst(node, get_ia32_Immop_symconst(from));
971 ia32_attr_t *attr = get_ia32_attr(node);
972 assert(immop_type == ia32_ImmNone);
973 attr->data.imm_tp = ia32_ImmNone;
978 * Copy the attributes from a Firm Const/SymConst to an ia32_Const
980 void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) {
981 assert(is_ia32_Cnst(ia32_cnst) && "Need ia32_Const to set Const attr");
983 switch (get_irn_opcode(cnst)) {
985 set_ia32_Const_tarval(ia32_cnst, get_Const_tarval(cnst));
988 assert(get_SymConst_kind(cnst) == symconst_addr_ent);
989 set_ia32_Immop_symconst(ia32_cnst, get_SymConst_entity(cnst));
992 assert(0 && "Unknown Const NYI");
995 assert(0 && "Cannot create ia32_Const for this opcode");
999 void set_ia32_Const_tarval(ir_node *ia32_cnst, tarval *tv) {
1001 if(mode_is_reference(get_tarval_mode(tv))) {
1002 if(tarval_is_null(tv)) {
1003 tv = get_tarval_null(mode_Iu);
1007 if(!tarval_is_long(tv))
1008 panic("Can't convert reference tarval to mode_Iu at %+F", ia32_cnst);
1009 val = get_tarval_long(tv);
1010 tv = new_tarval_from_long(val, mode_Iu);
1013 tv = tarval_convert_to(tv, mode_Iu);
1016 tv = tarval_convert_to(tv, mode_Iu);
1019 assert(tv != get_tarval_bad() && tv != get_tarval_undefined()
1021 set_ia32_Immop_tarval(ia32_cnst, tv);
1026 * Sets the AddrMode(S|D) attribute
1028 void set_ia32_AddrMode(ir_node *node, char direction) {
1029 ia32_attr_t *attr = get_ia32_attr(node);
1031 switch (direction) {
1033 attr->data.tp = ia32_AddrModeD;
1036 attr->data.tp = ia32_AddrModeS;
1039 assert(0 && "wrong AM type");
1044 * Returns whether or not the node is an immediate operation with Const.
1046 int is_ia32_ImmConst(const ir_node *node) {
1047 const ia32_attr_t *attr = get_ia32_attr_const(node);
1048 return (attr->data.imm_tp == ia32_ImmConst);
1052 * Returns whether or not the node is an immediate operation with SymConst.
1054 int is_ia32_ImmSymConst(const ir_node *node) {
1055 const ia32_attr_t *attr = get_ia32_attr_const(node);
1056 return (attr->data.imm_tp == ia32_ImmSymConst);
1060 * Returns whether or not the node is an AddrModeS node.
1062 int is_ia32_AddrModeS(const ir_node *node) {
1063 const ia32_attr_t *attr = get_ia32_attr_const(node);
1064 return (attr->data.tp == ia32_AddrModeS);
1068 * Returns whether or not the node is an AddrModeD node.
1070 int is_ia32_AddrModeD(const ir_node *node) {
1071 const ia32_attr_t *attr = get_ia32_attr_const(node);
1072 return (attr->data.tp == ia32_AddrModeD);
1076 * Checks if node is a Load or xLoad/vfLoad.
1078 int is_ia32_Ld(const ir_node *node) {
1079 int op = get_ia32_irn_opcode(node);
1080 return op == iro_ia32_Load ||
1081 op == iro_ia32_xLoad ||
1082 op == iro_ia32_vfld ||
1087 * Checks if node is a Store or xStore/vfStore.
1089 int is_ia32_St(const ir_node *node) {
1090 int op = get_ia32_irn_opcode(node);
1091 return op == iro_ia32_Store ||
1092 op == iro_ia32_Store8Bit ||
1093 op == iro_ia32_xStore ||
1094 op == iro_ia32_vfst ||
1095 op == iro_ia32_fst ||
1096 op == iro_ia32_fstp;
1100 * Checks if node is a Const or xConst/vfConst.
1102 int is_ia32_Cnst(const ir_node *node) {
1103 int op = get_ia32_irn_opcode(node);
1104 return op == iro_ia32_Const || op == iro_ia32_xConst || op == iro_ia32_vfConst;
1108 * Returns the name of the OUT register at position pos.
1110 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
1111 const ia32_attr_t *attr = get_ia32_attr_const(node);
1113 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1114 assert(attr->slots[pos] && "No register assigned");
1116 return arch_register_get_name(attr->slots[pos]);
1120 * Returns the index of the OUT register at position pos within its register class.
1122 int get_ia32_out_regnr(const ir_node *node, int pos) {
1123 const ia32_attr_t *attr = get_ia32_attr_const(node);
1125 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1126 assert(attr->slots[pos] && "No register assigned");
1128 return arch_register_get_index(attr->slots[pos]);
1132 * Returns the OUT register at position pos.
1134 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
1135 const ia32_attr_t *attr = get_ia32_attr_const(node);
1137 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1138 assert(attr->slots[pos] && "No register assigned");
1140 return attr->slots[pos];
1144 * Initializes the nodes attributes.
1146 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1147 const arch_register_req_t **in_reqs,
1148 const arch_register_req_t **out_reqs,
1149 const be_execution_unit_t ***execution_units,
1150 int n_res, unsigned latency)
1152 ir_graph *irg = get_irn_irg(node);
1153 struct obstack *obst = get_irg_obstack(irg);
1154 ia32_attr_t *attr = get_ia32_attr(node);
1156 set_ia32_flags(node, flags);
1157 set_ia32_in_req_all(node, in_reqs);
1158 set_ia32_out_req_all(node, out_reqs);
1159 set_ia32_latency(node, latency);
1161 attr->exec_units = execution_units;
1163 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1166 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1167 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1169 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
1170 memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
1174 init_ia32_x87_attributes(ir_node *res)
1177 ia32_attr_t *attr = get_ia32_attr(res);
1178 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1183 init_ia32_asm_attributes(ir_node *res)
1186 ia32_attr_t *attr = get_ia32_attr(res);
1187 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1191 ir_node *get_ia32_result_proj(const ir_node *node)
1193 const ir_edge_t *edge;
1195 foreach_out_edge(node, edge) {
1196 ir_node *proj = get_edge_src_irn(edge);
1197 if(get_Proj_proj(proj) == 0) {
1204 /***************************************************************************************
1207 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1208 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1209 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1210 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1212 ***************************************************************************************/
1214 /* default compare operation to compare attributes */
1215 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1216 if (a->data.tp != b->data.tp
1217 || a->data.imm_tp != b->data.imm_tp)
1220 if (a->data.imm_tp == ia32_ImmConst
1221 && a->cnst_val.tv != b->cnst_val.tv)
1224 if (a->data.imm_tp == ia32_ImmSymConst
1225 && a->cnst_val.sc != b->cnst_val.sc)
1228 if (a->data.am_flavour != b->data.am_flavour
1229 || a->data.am_scale != b->data.am_scale
1230 || a->data.am_sc_sign != b->data.am_sc_sign
1231 || a->am_offs != b->am_offs
1232 || a->am_sc != b->am_sc
1233 || a->ls_mode != b->ls_mode)
1236 if (a->data.use_frame != b->data.use_frame
1237 || a->data.use_frame != b->data.use_frame
1238 || a->frame_ent != b->frame_ent)
1241 if(a->pn_code != b->pn_code)
1244 if (a->data.tp != b->data.tp
1245 || a->data.op_flav != b->data.op_flav)
1248 if (a->data.except_label != b->data.except_label)
1254 /* copies the ia32 attributes */
1255 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1257 ir_graph *irg = get_irn_irg(new_node);
1258 struct obstack *obst = get_irg_obstack(irg);
1259 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1260 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1262 /* copy the attributes */
1263 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1265 /* copy out flags */
1266 attr_new->out_flags =
1267 DUP_ARR_D(int, obst, attr_old->out_flags);
1268 /* copy register assignments */
1270 DUP_ARR_D(const arch_register_t*, obst, attr_old->slots);
1273 /* Include the generated constructor functions */
1274 #include "gen_ia32_new_nodes.c.inl"
1277 * Registers the ia32_copy_attr function for all ia32 opcodes.
1279 void ia32_register_copy_attr_func(void) {
1282 for (i = get_irp_n_opcodes() - 1; i >= 0; --i) {
1283 ir_op *op = get_irp_opcode(i);
1285 op->ops.copy_attr = ia32_copy_attr;