2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the corresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 unsigned other = reqs[i]->other_same;
102 ir_fprintf(F, " same as");
103 for (i = 0; 1U << i <= other; ++i) {
104 if (other & (1U << i)) {
105 ir_fprintf(F, " %+F", get_irn_n(n, i));
110 if (reqs[i]->type & arch_register_req_type_must_be_different) {
111 unsigned other = reqs[i]->other_different;
114 ir_fprintf(F, " different from");
115 for (i = 0; 1U << i <= other; ++i) {
116 if (other & (1U << i)) {
117 ir_fprintf(F, " %+F", get_irn_n(n, i));
128 fprintf(F, "%sreq = N/A\n", dir);
133 * Dumper interface for dumping ia32 nodes in vcg.
134 * @param n the node to dump
135 * @param F the output file
136 * @param reason indicates which kind of information should be dumped
137 * @return 0 on success or != 0 on failure
139 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
140 ir_mode *mode = NULL;
143 const arch_register_req_t **reqs;
144 const arch_register_t **slots;
147 case dump_node_opcode_txt:
148 fprintf(F, "%s", get_irn_opname(n));
150 if(is_ia32_Immediate(n) || is_ia32_Const(n)) {
151 const ia32_immediate_attr_t *attr
152 = get_ia32_immediate_attr_const(n);
159 fputs(get_entity_name(attr->symconst), F);
161 if(attr->offset != 0 || attr->symconst == NULL) {
162 if(attr->offset > 0 && attr->symconst != NULL) {
165 fprintf(F, "%ld", attr->offset);
169 const ia32_attr_t *attr = get_ia32_attr_const(n);
171 if(attr->am_sc != NULL || attr->am_offs != 0)
174 if(attr->am_sc != NULL) {
175 if(attr->data.am_sc_sign) {
178 fputs(get_entity_name(attr->am_sc), F);
180 if(attr->am_offs != 0) {
181 if(attr->am_offs > 0 && attr->am_sc != NULL) {
184 fprintf(F, "%d", attr->am_offs);
187 if(attr->am_sc != NULL || attr->am_offs != 0)
192 case dump_node_mode_txt:
193 if (is_ia32_Ld(n) || is_ia32_St(n)) {
194 mode = get_ia32_ls_mode(n);
195 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
199 case dump_node_nodeattr_txt:
200 if (! is_ia32_Lea(n)) {
201 if (is_ia32_AddrModeS(n)) {
202 fprintf(F, "[AM S] ");
203 } else if (is_ia32_AddrModeD(n)) {
204 fprintf(F, "[AM D] ");
210 case dump_node_info_txt:
211 n_res = get_ia32_n_res(n);
212 fprintf(F, "=== IA32 attr begin ===\n");
214 /* dump IN requirements */
215 if (get_irn_arity(n) > 0) {
216 reqs = get_ia32_in_req_all(n);
217 dump_reg_req(F, n, reqs, 0);
220 /* dump OUT requirements */
222 reqs = get_ia32_out_req_all(n);
223 dump_reg_req(F, n, reqs, 1);
226 /* dump assigned registers */
227 slots = get_ia32_slots(n);
228 if (slots && n_res > 0) {
229 for (i = 0; i < n_res; i++) {
230 const arch_register_t *reg;
234 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
241 switch (get_ia32_op_type(n)) {
243 fprintf(F, "Normal");
246 fprintf(F, "AM Dest (Load+Store)");
249 fprintf(F, "AM Source (Load)");
252 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
257 /* dump supported am */
258 fprintf(F, "AM support = ");
259 switch (get_ia32_am_support(n)) {
260 case ia32_am_none: fputs("none\n", F); break;
261 case ia32_am_unary: fputs("source (unary)\n", F); break;
262 case ia32_am_binary: fputs("source (binary)\n", F); break;
265 fprintf(F, "unknown (%d)\n", get_ia32_am_support(n));
270 if(get_ia32_am_offs_int(n) != 0) {
271 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
274 /* dump AM symconst */
275 if(get_ia32_am_sc(n) != NULL) {
276 ir_entity *ent = get_ia32_am_sc(n);
277 ident *id = get_entity_ld_ident(ent);
278 fprintf(F, "AM symconst = %s\n", get_id_str(id));
282 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
285 if (is_ia32_SwitchJmp(n)) {
286 fprintf(F, "pn_code = %ld\n", get_ia32_condcode(n));
287 } else if (is_ia32_CMov(n) || is_ia32_Set(n) || is_ia32_Jcc(n)) {
288 ia32_attr_t *attr = get_ia32_attr(n);
289 long pnc = get_ia32_condcode(n);
290 fprintf(F, "pn_code = 0x%lX (%s)\n", pnc, get_pnc_string(pnc & pn_Cmp_True));
291 fprintf(F, "ins_permuted = %u \n", attr->data.ins_permuted);
292 fprintf(F, "cmp_unsigned = %u \n", attr->data.cmp_unsigned);
294 else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
295 fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
298 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
299 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
300 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
301 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
302 fprintf(F, "is reload = %d\n", is_ia32_is_reload(n));
303 fprintf(F, "latency = %d\n", get_ia32_latency(n));
306 fprintf(F, "flags =");
307 flags = get_ia32_flags(n);
308 if (flags == arch_irn_flags_none) {
312 if (flags & arch_irn_flags_dont_spill) {
313 fprintf(F, " unspillable");
315 if (flags & arch_irn_flags_rematerializable) {
316 fprintf(F, " remat");
318 if (flags & arch_irn_flags_ignore) {
319 fprintf(F, " ignore");
321 if (flags & arch_irn_flags_modify_sp) {
322 fprintf(F, " modify_sp");
324 if (flags & arch_irn_flags_modify_flags) {
325 fprintf(F, " modify_flags");
328 fprintf(F, " (%d)\n", flags);
330 /* dump frame entity */
331 fprintf(F, "frame entity = ");
332 if (get_ia32_frame_ent(n)) {
333 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
341 fprintf(F, "ls_mode = ");
342 if (get_ia32_ls_mode(n)) {
343 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
351 /* dump original ir node name */
352 fprintf(F, "orig node = ");
353 if (get_ia32_orig_node(n)) {
354 fprintf(F, "%s", get_ia32_orig_node(n));
362 fprintf(F, "=== IA32 attr end ===\n");
363 /* end of: case dump_node_info_txt */
372 /***************************************************************************************************
374 * | | | | | | / / | | | | | | | |
375 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
376 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
377 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
378 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
381 ***************************************************************************************************/
383 ia32_attr_t *get_ia32_attr(ir_node *node) {
384 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
385 return (ia32_attr_t *)get_irn_generic_attr(node);
388 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
389 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
390 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
393 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
394 ia32_attr_t *attr = get_ia32_attr(node);
395 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
399 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
400 const ia32_attr_t *attr = get_ia32_attr_const(node);
401 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
405 const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
406 const ia32_attr_t *attr = get_ia32_attr_const(node);
407 const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
412 ia32_immediate_attr_t *get_ia32_immediate_attr(ir_node *node) {
413 ia32_attr_t *attr = get_ia32_attr(node);
414 ia32_immediate_attr_t *imm_attr = CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
419 const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
421 const ia32_attr_t *attr = get_ia32_attr_const(node);
422 const ia32_immediate_attr_t *imm_attr = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
427 ia32_condcode_attr_t *get_ia32_condcode_attr(ir_node *node) {
428 ia32_attr_t *attr = get_ia32_attr(node);
429 ia32_condcode_attr_t *cc_attr = CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
434 const ia32_condcode_attr_t *get_ia32_condcode_attr_const(const ir_node *node) {
435 const ia32_attr_t *attr = get_ia32_attr_const(node);
436 const ia32_condcode_attr_t *cc_attr = CONST_CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
441 ia32_copyb_attr_t *get_ia32_copyb_attr(ir_node *node) {
442 ia32_attr_t *attr = get_ia32_attr(node);
443 ia32_copyb_attr_t *copyb_attr = CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
448 const ia32_copyb_attr_t *get_ia32_copyb_attr_const(const ir_node *node) {
449 const ia32_attr_t *attr = get_ia32_attr_const(node);
450 const ia32_copyb_attr_t *copyb_attr = CONST_CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
456 * Gets the type of an ia32 node.
458 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
459 const ia32_attr_t *attr = get_ia32_attr_const(node);
460 return attr->data.tp;
464 * Sets the type of an ia32 node.
466 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
467 ia32_attr_t *attr = get_ia32_attr(node);
471 ia32_am_type_t get_ia32_am_support(const ir_node *node)
473 const ia32_attr_t *attr = get_ia32_attr_const(node);
474 return attr->data.am_arity;
478 * Sets the supported address mode of an ia32 node
480 void set_ia32_am_support(ir_node *node, ia32_am_type_t arity)
482 ia32_attr_t *attr = get_ia32_attr(node);
483 attr->data.am_arity = arity;
487 * Gets the address mode offset as int.
489 int get_ia32_am_offs_int(const ir_node *node) {
490 const ia32_attr_t *attr = get_ia32_attr_const(node);
491 return attr->am_offs;
495 * Sets the address mode offset from an int.
497 void set_ia32_am_offs_int(ir_node *node, int offset) {
498 ia32_attr_t *attr = get_ia32_attr(node);
499 attr->am_offs = offset;
502 void add_ia32_am_offs_int(ir_node *node, int offset) {
503 ia32_attr_t *attr = get_ia32_attr(node);
504 attr->am_offs += offset;
508 * Returns the symconst entity associated to address mode.
510 ir_entity *get_ia32_am_sc(const ir_node *node) {
511 const ia32_attr_t *attr = get_ia32_attr_const(node);
516 * Sets the symconst entity associated to address mode.
518 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
519 ia32_attr_t *attr = get_ia32_attr(node);
520 attr->am_sc = entity;
524 * Sets the sign bit for address mode symconst.
526 void set_ia32_am_sc_sign(ir_node *node) {
527 ia32_attr_t *attr = get_ia32_attr(node);
528 attr->data.am_sc_sign = 1;
532 * Clears the sign bit for address mode symconst.
534 void clear_ia32_am_sc_sign(ir_node *node) {
535 ia32_attr_t *attr = get_ia32_attr(node);
536 attr->data.am_sc_sign = 0;
540 * Returns the sign bit for address mode symconst.
542 int is_ia32_am_sc_sign(const ir_node *node) {
543 const ia32_attr_t *attr = get_ia32_attr_const(node);
544 return attr->data.am_sc_sign;
548 * Gets the addr mode const.
550 int get_ia32_am_scale(const ir_node *node) {
551 const ia32_attr_t *attr = get_ia32_attr_const(node);
552 return attr->data.am_scale;
556 * Sets the index register scale for address mode.
558 void set_ia32_am_scale(ir_node *node, int scale) {
559 ia32_attr_t *attr = get_ia32_attr(node);
560 assert(0 <= scale && scale < 4 && "AM scale out of range");
561 attr->data.am_scale = scale;
564 void ia32_copy_am_attrs(ir_node *to, const ir_node *from)
566 set_ia32_ls_mode(to, get_ia32_ls_mode(from));
567 set_ia32_am_scale(to, get_ia32_am_scale(from));
568 set_ia32_am_sc(to, get_ia32_am_sc(from));
569 if(is_ia32_am_sc_sign(from))
570 set_ia32_am_sc_sign(to);
571 add_ia32_am_offs_int(to, get_ia32_am_offs_int(from));
572 set_ia32_frame_ent(to, get_ia32_frame_ent(from));
573 if (is_ia32_use_frame(from))
574 set_ia32_use_frame(to);
578 * Sets the uses_frame flag.
580 void set_ia32_use_frame(ir_node *node) {
581 ia32_attr_t *attr = get_ia32_attr(node);
582 attr->data.use_frame = 1;
586 * Clears the uses_frame flag.
588 void clear_ia32_use_frame(ir_node *node) {
589 ia32_attr_t *attr = get_ia32_attr(node);
590 attr->data.use_frame = 0;
594 * Gets the uses_frame flag.
596 int is_ia32_use_frame(const ir_node *node) {
597 const ia32_attr_t *attr = get_ia32_attr_const(node);
598 return attr->data.use_frame;
602 * Sets node to commutative.
604 void set_ia32_commutative(ir_node *node) {
605 ia32_attr_t *attr = get_ia32_attr(node);
606 attr->data.is_commutative = 1;
610 * Sets node to non-commutative.
612 void clear_ia32_commutative(ir_node *node) {
613 ia32_attr_t *attr = get_ia32_attr(node);
614 attr->data.is_commutative = 0;
618 * Checks if node is commutative.
620 int is_ia32_commutative(const ir_node *node) {
621 const ia32_attr_t *attr = get_ia32_attr_const(node);
622 return attr->data.is_commutative;
625 void set_ia32_need_stackent(ir_node *node) {
626 ia32_attr_t *attr = get_ia32_attr(node);
627 attr->data.need_stackent = 1;
630 void clear_ia32_need_stackent(ir_node *node) {
631 ia32_attr_t *attr = get_ia32_attr(node);
632 attr->data.need_stackent = 0;
635 int is_ia32_need_stackent(const ir_node *node) {
636 const ia32_attr_t *attr = get_ia32_attr_const(node);
637 return attr->data.need_stackent;
640 void set_ia32_is_reload(ir_node *node) {
641 ia32_attr_t *attr = get_ia32_attr(node);
642 attr->data.is_reload = 1;
645 int is_ia32_is_reload(const ir_node *node) {
646 const ia32_attr_t *attr = get_ia32_attr_const(node);
647 return attr->data.is_reload;
650 void set_ia32_is_spill(ir_node *node) {
651 ia32_attr_t *attr = get_ia32_attr(node);
652 attr->data.is_spill = 1;
655 int is_ia32_is_spill(const ir_node *node) {
656 const ia32_attr_t *attr = get_ia32_attr_const(node);
657 return attr->data.is_spill;
660 void set_ia32_is_remat(ir_node *node) {
661 ia32_attr_t *attr = get_ia32_attr(node);
662 attr->data.is_remat = 1;
665 int is_ia32_is_remat(const ir_node *node) {
666 const ia32_attr_t *attr = get_ia32_attr_const(node);
667 return attr->data.is_remat;
671 * Gets the mode of the stored/loaded value (only set for Store/Load)
673 ir_mode *get_ia32_ls_mode(const ir_node *node) {
674 const ia32_attr_t *attr = get_ia32_attr_const(node);
675 return attr->ls_mode;
679 * Sets the mode of the stored/loaded value (only set for Store/Load)
681 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
682 ia32_attr_t *attr = get_ia32_attr(node);
683 attr->ls_mode = mode;
687 * Gets the frame entity assigned to this node.
689 ir_entity *get_ia32_frame_ent(const ir_node *node) {
690 const ia32_attr_t *attr = get_ia32_attr_const(node);
691 return attr->frame_ent;
695 * Sets the frame entity for this node.
697 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
698 ia32_attr_t *attr = get_ia32_attr(node);
699 attr->frame_ent = ent;
701 set_ia32_use_frame(node);
703 clear_ia32_use_frame(node);
708 * Gets the instruction latency.
710 unsigned get_ia32_latency(const ir_node *node) {
711 const ir_op *op = get_irn_op(node);
712 const ia32_op_attr_t *op_attr = (ia32_op_attr_t*) get_op_attr(op);
713 return op_attr->latency;
717 * Returns the argument register requirements of an ia32 node.
719 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
720 const ia32_attr_t *attr = get_ia32_attr_const(node);
725 * Sets the argument register requirements of an ia32 node.
727 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
728 ia32_attr_t *attr = get_ia32_attr(node);
733 * Returns the result register requirements of an ia32 node.
735 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
736 const ia32_attr_t *attr = get_ia32_attr_const(node);
737 return attr->out_req;
741 * Sets the result register requirements of an ia32 node.
743 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
744 ia32_attr_t *attr = get_ia32_attr(node);
745 attr->out_req = reqs;
749 * Returns the argument register requirement at position pos of an ia32 node.
751 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
752 const ia32_attr_t *attr = get_ia32_attr_const(node);
753 if(attr->in_req == NULL)
754 return arch_no_register_req;
756 return attr->in_req[pos];
760 * Returns the result register requirement at position pos of an ia32 node.
762 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
763 const ia32_attr_t *attr = get_ia32_attr_const(node);
764 if(attr->out_req == NULL)
765 return arch_no_register_req;
767 return attr->out_req[pos];
771 * Sets the OUT register requirements at position pos.
773 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
774 ia32_attr_t *attr = get_ia32_attr(node);
775 attr->out_req[pos] = req;
779 * Sets the IN register requirements at position pos.
781 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
782 ia32_attr_t *attr = get_ia32_attr(node);
783 attr->in_req[pos] = req;
787 * Returns the register flag of an ia32 node.
789 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
790 const ia32_attr_t *attr = get_ia32_attr_const(node);
791 return attr->data.flags;
795 * Sets the register flag of an ia32 node.
797 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
798 ia32_attr_t *attr = get_ia32_attr(node);
799 attr->data.flags = flags;
802 void add_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
803 ia32_attr_t *attr = get_ia32_attr(node);
804 attr->data.flags |= flags;
808 * Returns the result register slots of an ia32 node.
810 const arch_register_t **get_ia32_slots(const ir_node *node) {
811 const ia32_attr_t *attr = get_ia32_attr_const(node);
816 * Returns the number of results.
818 int get_ia32_n_res(const ir_node *node) {
819 const ia32_attr_t *attr = get_ia32_attr_const(node);
820 return ARR_LEN(attr->slots);
824 * Returns the condition code of a node.
826 long get_ia32_condcode(const ir_node *node)
828 const ia32_condcode_attr_t *attr = get_ia32_condcode_attr_const(node);
829 return attr->pn_code;
833 * Sets the condition code of a node
835 void set_ia32_condcode(ir_node *node, long code)
837 ia32_condcode_attr_t *attr = get_ia32_condcode_attr(node);
838 attr->pn_code = code;
842 * Returns the condition code of a node.
844 unsigned get_ia32_copyb_size(const ir_node *node)
846 const ia32_copyb_attr_t *attr = get_ia32_copyb_attr_const(node);
851 * Sets the flags for the n'th out.
853 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
854 ia32_attr_t *attr = get_ia32_attr(node);
855 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
856 attr->out_flags[pos] = flags;
860 * Gets the flags for the n'th out.
862 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
863 const ia32_attr_t *attr = get_ia32_attr_const(node);
864 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
865 return attr->out_flags[pos];
869 * Get the list of available execution units.
871 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
872 const ia32_attr_t *attr = get_ia32_attr_const(node);
873 return attr->exec_units;
877 * Get the exception label attribute.
879 unsigned get_ia32_exc_label(const ir_node *node) {
880 const ia32_attr_t *attr = get_ia32_attr_const(node);
881 return attr->data.has_except_label;
885 * Set the exception label attribute.
887 void set_ia32_exc_label(ir_node *node, unsigned flag) {
888 ia32_attr_t *attr = get_ia32_attr(node);
889 attr->data.has_except_label = flag;
893 * Return the exception label id.
895 ir_label_t get_ia32_exc_label_id(const ir_node *node) {
896 const ia32_attr_t *attr = get_ia32_attr_const(node);
898 assert(attr->data.has_except_label);
899 return attr->exc_label;
903 * Assign the exception label id.
905 void set_ia32_exc_label_id(ir_node *node, ir_label_t id) {
906 ia32_attr_t *attr = get_ia32_attr(node);
908 assert(attr->data.has_except_label);
909 attr->exc_label = id;
915 * Returns the name of the original ir node.
917 const char *get_ia32_orig_node(const ir_node *node) {
918 const ia32_attr_t *attr = get_ia32_attr_const(node);
919 return attr->orig_node;
923 * Sets the name of the original ir node.
925 void set_ia32_orig_node(ir_node *node, const char *name) {
926 ia32_attr_t *attr = get_ia32_attr(node);
927 attr->orig_node = name;
932 /******************************************************************************************************
934 * (_) | | | | | | / _| | | (_)
935 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
936 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
937 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
938 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
941 ******************************************************************************************************/
944 * Returns whether or not the node is an AddrModeS node.
946 int is_ia32_AddrModeS(const ir_node *node) {
947 const ia32_attr_t *attr = get_ia32_attr_const(node);
948 return (attr->data.tp == ia32_AddrModeS);
952 * Returns whether or not the node is an AddrModeD node.
954 int is_ia32_AddrModeD(const ir_node *node) {
955 const ia32_attr_t *attr = get_ia32_attr_const(node);
956 return (attr->data.tp == ia32_AddrModeD);
960 * Checks if node is a Load or xLoad/vfLoad.
962 int is_ia32_Ld(const ir_node *node) {
963 int op = get_ia32_irn_opcode(node);
964 return op == iro_ia32_Load ||
965 op == iro_ia32_xLoad ||
966 op == iro_ia32_vfld ||
971 * Checks if node is a Store or xStore/vfStore.
973 int is_ia32_St(const ir_node *node) {
974 int op = get_ia32_irn_opcode(node);
975 return op == iro_ia32_Store ||
976 op == iro_ia32_Store8Bit ||
977 op == iro_ia32_xStore ||
978 op == iro_ia32_vfst ||
979 op == iro_ia32_fst ||
984 * Returns the name of the OUT register at position pos.
986 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
987 const ia32_attr_t *attr = get_ia32_attr_const(node);
989 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
990 assert(attr->slots[pos] && "No register assigned");
992 return arch_register_get_name(attr->slots[pos]);
996 * Returns the index of the OUT register at position pos within its register class.
998 int get_ia32_out_regnr(const ir_node *node, int pos) {
999 const ia32_attr_t *attr = get_ia32_attr_const(node);
1001 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1002 assert(attr->slots[pos] && "No register assigned");
1004 return arch_register_get_index(attr->slots[pos]);
1007 void ia32_swap_left_right(ir_node *node)
1009 ia32_attr_t *attr = get_ia32_attr(node);
1010 ir_node *left = get_irn_n(node, n_ia32_binary_left);
1011 ir_node *right = get_irn_n(node, n_ia32_binary_right);
1013 assert(is_ia32_commutative(node));
1014 attr->data.ins_permuted = !attr->data.ins_permuted;
1015 set_irn_n(node, n_ia32_binary_left, right);
1016 set_irn_n(node, n_ia32_binary_right, left);
1020 * Returns the OUT register at position pos.
1022 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
1023 const ia32_attr_t *attr = get_ia32_attr_const(node);
1025 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1026 assert(attr->slots[pos] && "No register assigned");
1028 return attr->slots[pos];
1032 * Initializes the nodes attributes.
1034 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1035 const arch_register_req_t **in_reqs,
1036 const arch_register_req_t **out_reqs,
1037 const be_execution_unit_t ***execution_units,
1040 ir_graph *irg = get_irn_irg(node);
1041 struct obstack *obst = get_irg_obstack(irg);
1042 ia32_attr_t *attr = get_ia32_attr(node);
1044 set_ia32_flags(node, flags);
1045 set_ia32_in_req_all(node, in_reqs);
1046 set_ia32_out_req_all(node, out_reqs);
1048 attr->exec_units = execution_units;
1050 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1053 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1054 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1056 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
1057 /* void* cast to suppress an incorrect warning on MSVC */
1058 memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0]));
1062 init_ia32_x87_attributes(ir_node *res)
1065 ia32_attr_t *attr = get_ia32_attr(res);
1066 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1070 ia32_current_cg->do_x87_sim = 1;
1074 init_ia32_asm_attributes(ir_node *res)
1077 ia32_attr_t *attr = get_ia32_attr(res);
1078 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1085 init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
1086 int symconst_sign, long offset)
1088 ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
1091 attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
1093 attr->symconst = symconst;
1094 attr->sc_sign = symconst_sign;
1095 attr->offset = offset;
1099 init_ia32_copyb_attributes(ir_node *res, unsigned size) {
1100 ia32_copyb_attr_t *attr = get_irn_generic_attr(res);
1103 attr->attr.attr_type |= IA32_ATTR_ia32_copyb_attr_t;
1109 init_ia32_condcode_attributes(ir_node *res, long pnc) {
1110 ia32_condcode_attr_t *attr = get_irn_generic_attr(res);
1113 attr->attr.attr_type |= IA32_ATTR_ia32_condcode_attr_t;
1115 attr->pn_code = pnc;
1118 ir_node *get_ia32_result_proj(const ir_node *node)
1120 const ir_edge_t *edge;
1122 foreach_out_edge(node, edge) {
1123 ir_node *proj = get_edge_src_irn(edge);
1124 if(get_Proj_proj(proj) == 0) {
1131 /***************************************************************************************
1134 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1135 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1136 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1137 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1139 ***************************************************************************************/
1141 /* default compare operation to compare attributes */
1142 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1143 if (a->data.tp != b->data.tp)
1146 if (a->data.am_scale != b->data.am_scale
1147 || a->data.am_sc_sign != b->data.am_sc_sign
1148 || a->am_offs != b->am_offs
1149 || a->am_sc != b->am_sc
1150 || a->ls_mode != b->ls_mode)
1153 /* nodes with not yet assigned entities shouldn't be CSEd (important for
1154 * unsigned int -> double conversions */
1155 if(a->data.use_frame && a->frame_ent == NULL)
1157 if(b->data.use_frame && b->frame_ent == NULL)
1160 if (a->data.use_frame != b->data.use_frame
1161 || a->frame_ent != b->frame_ent)
1164 if (a->data.tp != b->data.tp)
1167 if (a->data.has_except_label != b->data.has_except_label)
1170 if (a->data.ins_permuted != b->data.ins_permuted
1171 || a->data.cmp_unsigned != b->data.cmp_unsigned)
1177 /** Compare nodes attributes for all "normal" nodes. */
1179 int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
1181 const ia32_attr_t* attr_a = get_ia32_attr_const(a);
1182 const ia32_attr_t* attr_b = get_ia32_attr_const(b);
1184 return ia32_compare_attr(attr_a, attr_b);
1187 /** Compare node attributes for nodes with condition code. */
1189 int ia32_compare_condcode_attr(ir_node *a, ir_node *b)
1191 const ia32_condcode_attr_t *attr_a;
1192 const ia32_condcode_attr_t *attr_b;
1194 if (ia32_compare_nodes_attr(a, b))
1197 attr_a = get_ia32_condcode_attr_const(a);
1198 attr_b = get_ia32_condcode_attr_const(b);
1200 if(attr_a->pn_code != attr_b->pn_code)
1206 /** Compare node attributes for CopyB nodes. */
1208 int ia32_compare_copyb_attr(ir_node *a, ir_node *b)
1210 const ia32_copyb_attr_t *attr_a;
1211 const ia32_copyb_attr_t *attr_b;
1213 if (ia32_compare_nodes_attr(a, b))
1216 attr_a = get_ia32_copyb_attr_const(a);
1217 attr_b = get_ia32_copyb_attr_const(b);
1219 if(attr_a->size != attr_b->size)
1226 /** Compare ASM node attributes. */
1228 int ia32_compare_asm_attr(ir_node *a, ir_node *b)
1230 const ia32_asm_attr_t *attr_a;
1231 const ia32_asm_attr_t *attr_b;
1233 if(ia32_compare_nodes_attr(a, b))
1236 attr_a = get_ia32_asm_attr_const(a);
1237 attr_b = get_ia32_asm_attr_const(b);
1239 if(attr_a->asm_text != attr_b->asm_text)
1246 * Hash function for Immediates
1248 static unsigned ia32_hash_Immediate(const ir_node *irn) {
1249 const ia32_immediate_attr_t *a = get_ia32_immediate_attr_const(irn);
1251 return HASH_PTR(a->symconst) + (a->sc_sign << 16) + a->offset;
1254 /** Compare node attributes for Immediates. */
1256 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
1258 const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
1259 const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
1261 if(attr_a->symconst != attr_b->symconst ||
1262 attr_a->sc_sign != attr_b->sc_sign ||
1263 attr_a->offset != attr_b->offset)
1269 /** Compare node attributes for x87 nodes. */
1271 int ia32_compare_x87_attr(ir_node *a, ir_node *b)
1273 return ia32_compare_nodes_attr(a, b);
1277 /* copies the ia32 attributes */
1278 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1280 ir_graph *irg = get_irn_irg(new_node);
1281 struct obstack *obst = get_irg_obstack(irg);
1282 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1283 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1285 /* copy the attributes */
1286 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1288 /* copy out flags */
1289 attr_new->out_flags =
1290 DUP_ARR_D(int, obst, attr_old->out_flags);
1291 /* copy register assignments */
1293 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
1296 /* Include the generated constructor functions */
1297 #include "gen_ia32_new_nodes.c.inl"