2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the corresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 unsigned other = reqs[i]->other_same;
102 ir_fprintf(F, " same as");
103 for (i = 0; 1U << i <= other; ++i) {
104 if (other & (1U << i)) {
105 ir_fprintf(F, " %+F", get_irn_n(n, i));
110 if (reqs[i]->type & arch_register_req_type_should_be_different) {
111 unsigned other = reqs[i]->other_different;
114 ir_fprintf(F, " different from");
115 for (i = 0; 1U << i <= other; ++i) {
116 if (other & (1U << i)) {
117 ir_fprintf(F, " %+F", get_irn_n(n, i));
128 fprintf(F, "%sreq = N/A\n", dir);
133 * Dumper interface for dumping ia32 nodes in vcg.
134 * @param n the node to dump
135 * @param F the output file
136 * @param reason indicates which kind of information should be dumped
137 * @return 0 on success or != 0 on failure
139 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
140 ir_mode *mode = NULL;
143 const arch_register_req_t **reqs;
144 const arch_register_t **slots;
147 case dump_node_opcode_txt:
148 fprintf(F, "%s", get_irn_opname(n));
150 if(is_ia32_Immediate(n) || is_ia32_Const(n)) {
151 const ia32_immediate_attr_t *attr
152 = get_ia32_immediate_attr_const(n);
159 fputs(get_entity_name(attr->symconst), F);
161 if(attr->offset != 0 || attr->symconst == NULL) {
162 if(attr->offset > 0 && attr->symconst != NULL) {
165 fprintf(F, "%ld", attr->offset);
169 const ia32_attr_t *attr = get_ia32_attr_const(n);
171 if(attr->am_sc != NULL || attr->am_offs != 0)
174 if(attr->am_sc != NULL) {
175 if(attr->data.am_sc_sign) {
178 fputs(get_entity_name(attr->am_sc), F);
180 if(attr->am_offs != 0) {
181 if(attr->am_offs > 0 && attr->am_sc != NULL) {
184 fprintf(F, "%d", attr->am_offs);
187 if(attr->am_sc != NULL || attr->am_offs != 0)
192 case dump_node_mode_txt:
193 if (is_ia32_Ld(n) || is_ia32_St(n)) {
194 mode = get_ia32_ls_mode(n);
195 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
199 case dump_node_nodeattr_txt:
200 if (! is_ia32_Lea(n)) {
201 if (is_ia32_AddrModeS(n)) {
202 fprintf(F, "[AM S] ");
203 } else if (is_ia32_AddrModeD(n)) {
204 fprintf(F, "[AM D] ");
210 case dump_node_info_txt:
211 n_res = get_ia32_n_res(n);
212 fprintf(F, "=== IA32 attr begin ===\n");
214 /* dump IN requirements */
215 if (get_irn_arity(n) > 0) {
216 reqs = get_ia32_in_req_all(n);
217 dump_reg_req(F, n, reqs, 0);
220 /* dump OUT requirements */
222 reqs = get_ia32_out_req_all(n);
223 dump_reg_req(F, n, reqs, 1);
226 /* dump assigned registers */
227 slots = get_ia32_slots(n);
228 if (slots && n_res > 0) {
229 for (i = 0; i < n_res; i++) {
230 const arch_register_t *reg;
234 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
241 switch (get_ia32_op_type(n)) {
243 fprintf(F, "Normal");
246 fprintf(F, "AM Dest (Load+Store)");
249 fprintf(F, "AM Source (Load)");
252 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
257 /* dump supported am */
258 fprintf(F, "AM support = ");
259 switch (get_ia32_am_support(n)) {
264 fprintf(F, "source only (Load)");
267 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
273 if(get_ia32_am_offs_int(n) != 0) {
274 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
277 /* dump AM symconst */
278 if(get_ia32_am_sc(n) != NULL) {
279 ir_entity *ent = get_ia32_am_sc(n);
280 ident *id = get_entity_ld_ident(ent);
281 fprintf(F, "AM symconst = %s\n", get_id_str(id));
285 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
288 if (is_ia32_SwitchJmp(n)) {
289 fprintf(F, "pn_code = %ld\n", get_ia32_condcode(n));
290 } else if (is_ia32_CMov(n) || is_ia32_Set(n) || is_ia32_Jcc(n)) {
291 long pnc = get_ia32_condcode(n);
292 fprintf(F, "pn_code = 0x%lX (%s)\n", pnc, get_pnc_string(pnc & pn_Cmp_True));
294 else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
295 fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
299 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
302 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
305 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
308 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
311 fprintf(F, "latency = %d\n", get_ia32_latency(n));
314 fprintf(F, "flags =");
315 flags = get_ia32_flags(n);
316 if (flags == arch_irn_flags_none) {
320 if (flags & arch_irn_flags_dont_spill) {
321 fprintf(F, " unspillable");
323 if (flags & arch_irn_flags_rematerializable) {
324 fprintf(F, " remat");
326 if (flags & arch_irn_flags_ignore) {
327 fprintf(F, " ignore");
329 if (flags & arch_irn_flags_modify_sp) {
330 fprintf(F, " modify_sp");
332 if (flags & arch_irn_flags_modify_flags) {
333 fprintf(F, " modify_flags");
336 fprintf(F, " (%d)\n", flags);
338 /* dump frame entity */
339 fprintf(F, "frame entity = ");
340 if (get_ia32_frame_ent(n)) {
341 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
349 fprintf(F, "ls_mode = ");
350 if (get_ia32_ls_mode(n)) {
351 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
359 /* dump original ir node name */
360 fprintf(F, "orig node = ");
361 if (get_ia32_orig_node(n)) {
362 fprintf(F, "%s", get_ia32_orig_node(n));
370 fprintf(F, "=== IA32 attr end ===\n");
371 /* end of: case dump_node_info_txt */
380 /***************************************************************************************************
382 * | | | | | | / / | | | | | | | |
383 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
384 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
385 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
386 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
389 ***************************************************************************************************/
391 ia32_attr_t *get_ia32_attr(ir_node *node) {
392 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
393 return (ia32_attr_t *)get_irn_generic_attr(node);
396 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
397 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
398 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
401 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
402 ia32_attr_t *attr = get_ia32_attr(node);
403 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
407 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
408 const ia32_attr_t *attr = get_ia32_attr_const(node);
409 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
413 const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
414 const ia32_attr_t *attr = get_ia32_attr_const(node);
415 const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
420 ia32_immediate_attr_t *get_ia32_immediate_attr(ir_node *node) {
421 ia32_attr_t *attr = get_ia32_attr(node);
422 ia32_immediate_attr_t *imm_attr = CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
427 const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
429 const ia32_attr_t *attr = get_ia32_attr_const(node);
430 const ia32_immediate_attr_t *imm_attr = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
435 ia32_condcode_attr_t *get_ia32_condcode_attr(ir_node *node) {
436 ia32_attr_t *attr = get_ia32_attr(node);
437 ia32_condcode_attr_t *cc_attr = CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
442 const ia32_condcode_attr_t *get_ia32_condcode_attr_const(const ir_node *node) {
443 const ia32_attr_t *attr = get_ia32_attr_const(node);
444 const ia32_condcode_attr_t *cc_attr = CONST_CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
449 ia32_copyb_attr_t *get_ia32_copyb_attr(ir_node *node) {
450 ia32_attr_t *attr = get_ia32_attr(node);
451 ia32_copyb_attr_t *copyb_attr = CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
456 const ia32_copyb_attr_t *get_ia32_copyb_attr_const(const ir_node *node) {
457 const ia32_attr_t *attr = get_ia32_attr_const(node);
458 const ia32_copyb_attr_t *copyb_attr = CONST_CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
464 * Gets the type of an ia32 node.
466 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
467 const ia32_attr_t *attr = get_ia32_attr_const(node);
468 return attr->data.tp;
472 * Sets the type of an ia32 node.
474 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
475 ia32_attr_t *attr = get_ia32_attr(node);
480 * Gets the supported address mode of an ia32 node
482 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
483 const ia32_attr_t *attr = get_ia32_attr_const(node);
484 return attr->data.am_support;
487 ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
488 const ia32_attr_t *attr = get_ia32_attr_const(node);
489 return attr->data.am_arity;
493 * Sets the supported address mode of an ia32 node
495 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
496 ia32_am_arity_t arity) {
497 ia32_attr_t *attr = get_ia32_attr(node);
498 attr->data.am_support = am_tp;
499 attr->data.am_arity = arity;
501 assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
502 (am_tp != ia32_am_None &&
503 ((arity == ia32_am_unary) || (arity == ia32_am_binary) || (arity == ia32_am_ternary))));
507 * Gets the address mode offset as int.
509 int get_ia32_am_offs_int(const ir_node *node) {
510 const ia32_attr_t *attr = get_ia32_attr_const(node);
511 return attr->am_offs;
515 * Sets the address mode offset from an int.
517 void set_ia32_am_offs_int(ir_node *node, int offset) {
518 ia32_attr_t *attr = get_ia32_attr(node);
519 attr->am_offs = offset;
522 void add_ia32_am_offs_int(ir_node *node, int offset) {
523 ia32_attr_t *attr = get_ia32_attr(node);
524 attr->am_offs += offset;
528 * Returns the symconst entity associated to address mode.
530 ir_entity *get_ia32_am_sc(const ir_node *node) {
531 const ia32_attr_t *attr = get_ia32_attr_const(node);
536 * Sets the symconst entity associated to address mode.
538 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
539 ia32_attr_t *attr = get_ia32_attr(node);
540 attr->am_sc = entity;
544 * Sets the sign bit for address mode symconst.
546 void set_ia32_am_sc_sign(ir_node *node) {
547 ia32_attr_t *attr = get_ia32_attr(node);
548 attr->data.am_sc_sign = 1;
552 * Clears the sign bit for address mode symconst.
554 void clear_ia32_am_sc_sign(ir_node *node) {
555 ia32_attr_t *attr = get_ia32_attr(node);
556 attr->data.am_sc_sign = 0;
560 * Returns the sign bit for address mode symconst.
562 int is_ia32_am_sc_sign(const ir_node *node) {
563 const ia32_attr_t *attr = get_ia32_attr_const(node);
564 return attr->data.am_sc_sign;
568 * Gets the addr mode const.
570 int get_ia32_am_scale(const ir_node *node) {
571 const ia32_attr_t *attr = get_ia32_attr_const(node);
572 return attr->data.am_scale;
576 * Sets the index register scale for address mode.
578 void set_ia32_am_scale(ir_node *node, int scale) {
579 ia32_attr_t *attr = get_ia32_attr(node);
580 attr->data.am_scale = scale;
583 void ia32_copy_am_attrs(ir_node *to, const ir_node *from)
585 set_ia32_ls_mode(to, get_ia32_ls_mode(from));
586 set_ia32_am_scale(to, get_ia32_am_scale(from));
587 set_ia32_am_sc(to, get_ia32_am_sc(from));
588 if(is_ia32_am_sc_sign(from))
589 set_ia32_am_sc_sign(to);
590 add_ia32_am_offs_int(to, get_ia32_am_offs_int(from));
591 set_ia32_frame_ent(to, get_ia32_frame_ent(from));
592 if (is_ia32_use_frame(from))
593 set_ia32_use_frame(to);
597 * Sets the uses_frame flag.
599 void set_ia32_use_frame(ir_node *node) {
600 ia32_attr_t *attr = get_ia32_attr(node);
601 attr->data.use_frame = 1;
605 * Clears the uses_frame flag.
607 void clear_ia32_use_frame(ir_node *node) {
608 ia32_attr_t *attr = get_ia32_attr(node);
609 attr->data.use_frame = 0;
613 * Gets the uses_frame flag.
615 int is_ia32_use_frame(const ir_node *node) {
616 const ia32_attr_t *attr = get_ia32_attr_const(node);
617 return attr->data.use_frame;
621 * Sets node to commutative.
623 void set_ia32_commutative(ir_node *node) {
624 ia32_attr_t *attr = get_ia32_attr(node);
625 attr->data.is_commutative = 1;
629 * Sets node to non-commutative.
631 void clear_ia32_commutative(ir_node *node) {
632 ia32_attr_t *attr = get_ia32_attr(node);
633 attr->data.is_commutative = 0;
637 * Checks if node is commutative.
639 int is_ia32_commutative(const ir_node *node) {
640 const ia32_attr_t *attr = get_ia32_attr_const(node);
641 return attr->data.is_commutative;
644 void set_ia32_need_stackent(ir_node *node) {
645 ia32_attr_t *attr = get_ia32_attr(node);
646 attr->data.need_stackent = 1;
649 void clear_ia32_need_stackent(ir_node *node) {
650 ia32_attr_t *attr = get_ia32_attr(node);
651 attr->data.need_stackent = 0;
654 int is_ia32_need_stackent(const ir_node *node) {
655 const ia32_attr_t *attr = get_ia32_attr_const(node);
656 return attr->data.need_stackent;
660 * Gets the mode of the stored/loaded value (only set for Store/Load)
662 ir_mode *get_ia32_ls_mode(const ir_node *node) {
663 const ia32_attr_t *attr = get_ia32_attr_const(node);
664 return attr->ls_mode;
668 * Sets the mode of the stored/loaded value (only set for Store/Load)
670 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
671 ia32_attr_t *attr = get_ia32_attr(node);
672 attr->ls_mode = mode;
676 * Gets the frame entity assigned to this node.
678 ir_entity *get_ia32_frame_ent(const ir_node *node) {
679 const ia32_attr_t *attr = get_ia32_attr_const(node);
680 return attr->frame_ent;
684 * Sets the frame entity for this node.
686 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
687 ia32_attr_t *attr = get_ia32_attr(node);
688 attr->frame_ent = ent;
690 set_ia32_use_frame(node);
692 clear_ia32_use_frame(node);
697 * Gets the instruction latency.
699 unsigned get_ia32_latency(const ir_node *node) {
700 const ir_op *op = get_irn_op(node);
701 const ia32_op_attr_t *op_attr = (ia32_op_attr_t*) get_op_attr(op);
702 return op_attr->latency;
706 * Returns the argument register requirements of an ia32 node.
708 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
709 const ia32_attr_t *attr = get_ia32_attr_const(node);
714 * Sets the argument register requirements of an ia32 node.
716 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
717 ia32_attr_t *attr = get_ia32_attr(node);
722 * Returns the result register requirements of an ia32 node.
724 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
725 const ia32_attr_t *attr = get_ia32_attr_const(node);
726 return attr->out_req;
730 * Sets the result register requirements of an ia32 node.
732 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
733 ia32_attr_t *attr = get_ia32_attr(node);
734 attr->out_req = reqs;
738 * Returns the argument register requirement at position pos of an ia32 node.
740 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
741 const ia32_attr_t *attr = get_ia32_attr_const(node);
742 if(attr->in_req == NULL)
743 return arch_no_register_req;
745 return attr->in_req[pos];
749 * Returns the result register requirement at position pos of an ia32 node.
751 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
752 const ia32_attr_t *attr = get_ia32_attr_const(node);
753 if(attr->out_req == NULL)
754 return arch_no_register_req;
756 return attr->out_req[pos];
760 * Sets the OUT register requirements at position pos.
762 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
763 ia32_attr_t *attr = get_ia32_attr(node);
764 attr->out_req[pos] = req;
768 * Sets the IN register requirements at position pos.
770 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
771 ia32_attr_t *attr = get_ia32_attr(node);
772 attr->in_req[pos] = req;
776 * Returns the register flag of an ia32 node.
778 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
779 const ia32_attr_t *attr = get_ia32_attr_const(node);
780 return attr->data.flags;
784 * Sets the register flag of an ia32 node.
786 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
787 ia32_attr_t *attr = get_ia32_attr(node);
788 attr->data.flags = flags;
791 void add_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
792 ia32_attr_t *attr = get_ia32_attr(node);
793 attr->data.flags |= flags;
797 * Returns the result register slots of an ia32 node.
799 const arch_register_t **get_ia32_slots(const ir_node *node) {
800 const ia32_attr_t *attr = get_ia32_attr_const(node);
805 * Returns the number of results.
807 int get_ia32_n_res(const ir_node *node) {
808 const ia32_attr_t *attr = get_ia32_attr_const(node);
809 return ARR_LEN(attr->slots);
813 * Returns the condition code of a node.
815 long get_ia32_condcode(const ir_node *node)
817 const ia32_condcode_attr_t *attr = get_ia32_condcode_attr_const(node);
818 return attr->pn_code;
822 * Sets the condition code of a node
824 void set_ia32_condcode(ir_node *node, long code)
826 ia32_condcode_attr_t *attr = get_ia32_condcode_attr(node);
827 attr->pn_code = code;
831 * Returns the condition code of a node.
833 unsigned get_ia32_copyb_size(const ir_node *node)
835 const ia32_copyb_attr_t *attr = get_ia32_copyb_attr_const(node);
840 * Sets the flags for the n'th out.
842 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
843 ia32_attr_t *attr = get_ia32_attr(node);
844 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
845 attr->out_flags[pos] = flags;
849 * Gets the flags for the n'th out.
851 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
852 const ia32_attr_t *attr = get_ia32_attr_const(node);
853 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
854 return attr->out_flags[pos];
858 * Get the list of available execution units.
860 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
861 const ia32_attr_t *attr = get_ia32_attr_const(node);
862 return attr->exec_units;
866 * Get the exception label attribute.
868 unsigned get_ia32_exc_label(const ir_node *node) {
869 const ia32_attr_t *attr = get_ia32_attr_const(node);
870 return attr->data.has_except_label;
874 * Set the exception label attribute.
876 void set_ia32_exc_label(ir_node *node, unsigned flag) {
877 ia32_attr_t *attr = get_ia32_attr(node);
878 attr->data.has_except_label = flag;
882 * Return the exception label id.
884 ir_label_t get_ia32_exc_label_id(const ir_node *node) {
885 const ia32_attr_t *attr = get_ia32_attr_const(node);
887 assert(attr->data.has_except_label);
888 return attr->exc_label;
892 * Assign the exception label id.
894 void set_ia32_exc_label_id(ir_node *node, ir_label_t id) {
895 ia32_attr_t *attr = get_ia32_attr(node);
897 assert(attr->data.has_except_label);
898 attr->exc_label = id;
904 * Returns the name of the original ir node.
906 const char *get_ia32_orig_node(const ir_node *node) {
907 const ia32_attr_t *attr = get_ia32_attr_const(node);
908 return attr->orig_node;
912 * Sets the name of the original ir node.
914 void set_ia32_orig_node(ir_node *node, const char *name) {
915 ia32_attr_t *attr = get_ia32_attr(node);
916 attr->orig_node = name;
921 /******************************************************************************************************
923 * (_) | | | | | | / _| | | (_)
924 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
925 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
926 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
927 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
930 ******************************************************************************************************/
933 * Returns whether or not the node is an AddrModeS node.
935 int is_ia32_AddrModeS(const ir_node *node) {
936 const ia32_attr_t *attr = get_ia32_attr_const(node);
937 return (attr->data.tp == ia32_AddrModeS);
941 * Returns whether or not the node is an AddrModeD node.
943 int is_ia32_AddrModeD(const ir_node *node) {
944 const ia32_attr_t *attr = get_ia32_attr_const(node);
945 return (attr->data.tp == ia32_AddrModeD);
949 * Checks if node is a Load or xLoad/vfLoad.
951 int is_ia32_Ld(const ir_node *node) {
952 int op = get_ia32_irn_opcode(node);
953 return op == iro_ia32_Load ||
954 op == iro_ia32_xLoad ||
955 op == iro_ia32_vfld ||
960 * Checks if node is a Store or xStore/vfStore.
962 int is_ia32_St(const ir_node *node) {
963 int op = get_ia32_irn_opcode(node);
964 return op == iro_ia32_Store ||
965 op == iro_ia32_Store8Bit ||
966 op == iro_ia32_xStore ||
967 op == iro_ia32_vfst ||
968 op == iro_ia32_fst ||
973 * Returns the name of the OUT register at position pos.
975 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
976 const ia32_attr_t *attr = get_ia32_attr_const(node);
978 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
979 assert(attr->slots[pos] && "No register assigned");
981 return arch_register_get_name(attr->slots[pos]);
985 * Returns the index of the OUT register at position pos within its register class.
987 int get_ia32_out_regnr(const ir_node *node, int pos) {
988 const ia32_attr_t *attr = get_ia32_attr_const(node);
990 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
991 assert(attr->slots[pos] && "No register assigned");
993 return arch_register_get_index(attr->slots[pos]);
996 void ia32_swap_left_right(ir_node *node)
998 ia32_attr_t *attr = get_ia32_attr(node);
999 ir_node *left = get_irn_n(node, n_ia32_binary_left);
1000 ir_node *right = get_irn_n(node, n_ia32_binary_right);
1002 assert(is_ia32_commutative(node));
1003 attr->data.ins_permuted = !attr->data.ins_permuted;
1004 set_irn_n(node, n_ia32_binary_left, right);
1005 set_irn_n(node, n_ia32_binary_right, left);
1009 * Returns the OUT register at position pos.
1011 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
1012 const ia32_attr_t *attr = get_ia32_attr_const(node);
1014 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1015 assert(attr->slots[pos] && "No register assigned");
1017 return attr->slots[pos];
1021 * Initializes the nodes attributes.
1023 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1024 const arch_register_req_t **in_reqs,
1025 const arch_register_req_t **out_reqs,
1026 const be_execution_unit_t ***execution_units,
1029 ir_graph *irg = get_irn_irg(node);
1030 struct obstack *obst = get_irg_obstack(irg);
1031 ia32_attr_t *attr = get_ia32_attr(node);
1033 set_ia32_flags(node, flags);
1034 set_ia32_in_req_all(node, in_reqs);
1035 set_ia32_out_req_all(node, out_reqs);
1037 attr->exec_units = execution_units;
1039 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1042 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1043 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1045 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
1046 /* void* cast to suppress an incorrect warning on MSVC */
1047 memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0]));
1051 init_ia32_x87_attributes(ir_node *res)
1054 ia32_attr_t *attr = get_ia32_attr(res);
1055 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1059 ia32_current_cg->do_x87_sim = 1;
1063 init_ia32_asm_attributes(ir_node *res)
1066 ia32_attr_t *attr = get_ia32_attr(res);
1067 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1074 init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
1075 int symconst_sign, long offset)
1077 ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
1080 attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
1082 attr->symconst = symconst;
1083 attr->sc_sign = symconst_sign;
1084 attr->offset = offset;
1088 init_ia32_copyb_attributes(ir_node *res, unsigned size) {
1089 ia32_copyb_attr_t *attr = get_irn_generic_attr(res);
1092 attr->attr.attr_type |= IA32_ATTR_ia32_copyb_attr_t;
1098 init_ia32_condcode_attributes(ir_node *res, long pnc) {
1099 ia32_condcode_attr_t *attr = get_irn_generic_attr(res);
1102 attr->attr.attr_type |= IA32_ATTR_ia32_condcode_attr_t;
1104 attr->pn_code = pnc;
1107 ir_node *get_ia32_result_proj(const ir_node *node)
1109 const ir_edge_t *edge;
1111 foreach_out_edge(node, edge) {
1112 ir_node *proj = get_edge_src_irn(edge);
1113 if(get_Proj_proj(proj) == 0) {
1120 /***************************************************************************************
1123 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1124 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1125 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1126 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1128 ***************************************************************************************/
1130 /* default compare operation to compare attributes */
1131 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1132 if (a->data.tp != b->data.tp)
1135 if (a->data.am_scale != b->data.am_scale
1136 || a->data.am_sc_sign != b->data.am_sc_sign
1137 || a->am_offs != b->am_offs
1138 || a->am_sc != b->am_sc
1139 || a->ls_mode != b->ls_mode)
1142 /* nodes with not yet assigned entities shouldn't be CSEd (important for
1143 * unsigned int -> double conversions */
1144 if(a->data.use_frame && a->frame_ent == NULL)
1146 if(b->data.use_frame && b->frame_ent == NULL)
1149 if (a->data.use_frame != b->data.use_frame
1150 || a->frame_ent != b->frame_ent)
1153 if (a->data.tp != b->data.tp)
1156 if (a->data.has_except_label != b->data.has_except_label)
1159 if (a->data.ins_permuted != b->data.ins_permuted
1160 || a->data.cmp_unsigned != b->data.cmp_unsigned)
1166 /** Compare nodes attributes for all "normal" nodes. */
1168 int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
1170 const ia32_attr_t* attr_a = get_ia32_attr_const(a);
1171 const ia32_attr_t* attr_b = get_ia32_attr_const(b);
1173 return ia32_compare_attr(attr_a, attr_b);
1176 /** Compare node attributes for nodes with condition code. */
1178 int ia32_compare_condcode_attr(ir_node *a, ir_node *b)
1180 const ia32_condcode_attr_t *attr_a;
1181 const ia32_condcode_attr_t *attr_b;
1183 if (ia32_compare_nodes_attr(a, b))
1186 attr_a = get_ia32_condcode_attr_const(a);
1187 attr_b = get_ia32_condcode_attr_const(b);
1189 if(attr_a->pn_code != attr_b->pn_code)
1195 /** Compare node attributes for CopyB nodes. */
1197 int ia32_compare_copyb_attr(ir_node *a, ir_node *b)
1199 const ia32_copyb_attr_t *attr_a;
1200 const ia32_copyb_attr_t *attr_b;
1202 if (ia32_compare_nodes_attr(a, b))
1205 attr_a = get_ia32_copyb_attr_const(a);
1206 attr_b = get_ia32_copyb_attr_const(b);
1208 if(attr_a->size != attr_b->size)
1215 /** Compare ASM node attributes. */
1217 int ia32_compare_asm_attr(ir_node *a, ir_node *b)
1219 const ia32_asm_attr_t *attr_a;
1220 const ia32_asm_attr_t *attr_b;
1222 if(ia32_compare_nodes_attr(a, b))
1225 attr_a = get_ia32_asm_attr_const(a);
1226 attr_b = get_ia32_asm_attr_const(b);
1228 if(attr_a->asm_text != attr_b->asm_text)
1235 * Hash function for Immediates
1237 static unsigned ia32_hash_Immediate(const ir_node *irn) {
1238 const ia32_immediate_attr_t *a = get_ia32_immediate_attr_const(irn);
1240 return HASH_PTR(a->symconst) + (a->sc_sign << 16) + a->offset;
1243 /** Compare node attributes for Immediates. */
1245 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
1247 const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
1248 const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
1250 if(attr_a->symconst != attr_b->symconst ||
1251 attr_a->sc_sign != attr_b->sc_sign ||
1252 attr_a->offset != attr_b->offset)
1258 /** Compare node attributes for x87 nodes. */
1260 int ia32_compare_x87_attr(ir_node *a, ir_node *b)
1262 return ia32_compare_nodes_attr(a, b);
1266 /* copies the ia32 attributes */
1267 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1269 ir_graph *irg = get_irn_irg(new_node);
1270 struct obstack *obst = get_irg_obstack(irg);
1271 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1272 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1274 /* copy the attributes */
1275 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1277 /* copy out flags */
1278 attr_new->out_flags =
1279 DUP_ARR_D(int, obst, attr_old->out_flags);
1280 /* copy register assignments */
1282 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
1285 /* Include the generated constructor functions */
1286 #include "gen_ia32_new_nodes.c.inl"