2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * This file implements the creation of the achitecture specific firm opcodes
22 * and the coresponding node constructors for the ia32 assembler irg.
23 * @author Christian Wuerdig
33 #include "irgraph_t.h"
39 #include "firm_common_t.h"
44 #include "raw_bitset.h"
47 #include "../bearch_t.h"
49 #include "bearch_ia32_t.h"
50 #include "ia32_nodes_attr.h"
51 #include "ia32_new_nodes.h"
52 #include "gen_ia32_regalloc_if.h"
53 #include "gen_ia32_machine.h"
56 * returns true if a node has x87 registers
58 int ia32_has_x87_register(const ir_node *n) {
59 assert(is_ia32_irn(n) && "Need ia32 node.");
60 return is_irn_machine_user(n, 0);
63 /***********************************************************************************
66 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
67 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
68 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
69 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
72 ***********************************************************************************/
75 * Dumps the register requirements for either in or out.
77 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
79 char *dir = inout ? "out" : "in";
80 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
84 memset(buf, 0, sizeof(buf));
87 for (i = 0; i < max; i++) {
88 fprintf(F, "%sreq #%d =", dir, i);
90 if (reqs[i]->type == arch_register_req_type_none) {
94 if (reqs[i]->type & arch_register_req_type_normal) {
95 fprintf(F, " %s", reqs[i]->cls->name);
98 if (reqs[i]->type & arch_register_req_type_limited) {
100 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
103 if (reqs[i]->type & arch_register_req_type_should_be_same) {
104 ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same));
107 if (reqs[i]->type & arch_register_req_type_should_be_different) {
108 ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different));
117 fprintf(F, "%sreq = N/A\n", dir);
122 * Dumper interface for dumping ia32 nodes in vcg.
123 * @param n the node to dump
124 * @param F the output file
125 * @param reason indicates which kind of information should be dumped
126 * @return 0 on success or != 0 on failure
128 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
129 ir_mode *mode = NULL;
131 int i, n_res, am_flav, flags;
132 const arch_register_req_t **reqs;
133 const arch_register_t **slots;
136 case dump_node_opcode_txt:
137 fprintf(F, "%s", get_irn_opname(n));
140 case dump_node_mode_txt:
141 mode = get_irn_mode(n);
143 if (is_ia32_Ld(n) || is_ia32_St(n)) {
144 mode = get_ia32_ls_mode(n);
147 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
150 case dump_node_nodeattr_txt:
151 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
152 if(is_ia32_ImmSymConst(n)) {
153 ir_entity *ent = get_ia32_Immop_symconst(n);
154 ident *id = get_entity_ld_ident(ent);
155 fprintf(F, "[SymC %s]", get_id_str(id));
158 tarval *tv = get_ia32_Immop_tarval(n);
160 tarval_snprintf(buf, sizeof(buf), tv);
161 fprintf(F, "[%s]", buf);
165 if (! is_ia32_Lea(n)) {
166 if (is_ia32_AddrModeS(n)) {
167 fprintf(F, "[AM S] ");
169 else if (is_ia32_AddrModeD(n)) {
170 fprintf(F, "[AM D] ");
176 case dump_node_info_txt:
177 n_res = get_ia32_n_res(n);
178 fprintf(F, "=== IA32 attr begin ===\n");
180 /* dump IN requirements */
181 if (get_irn_arity(n) > 0) {
182 reqs = get_ia32_in_req_all(n);
183 dump_reg_req(F, n, reqs, 0);
186 /* dump OUT requirements */
188 reqs = get_ia32_out_req_all(n);
189 dump_reg_req(F, n, reqs, 1);
192 /* dump assigned registers */
193 slots = get_ia32_slots(n);
194 if (slots && n_res > 0) {
195 for (i = 0; i < n_res; i++) {
196 const arch_register_t *reg;
198 /* retrieve "real" x87 register */
199 if (ia32_has_x87_register(n))
200 reg = get_ia32_attr(n)->x87[i + 2];
204 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
211 switch (get_ia32_op_type(n)) {
213 fprintf(F, "Normal");
216 fprintf(F, "AM Dest (Load+Store)");
219 fprintf(F, "AM Source (Load)");
222 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
227 /* dump immop type */
228 fprintf(F, "immediate = ");
229 switch (get_ia32_immop_type(n)) {
236 case ia32_ImmSymConst:
237 fprintf(F, "SymConst");
240 fprintf(F, "unknown (%d)", get_ia32_immop_type(n));
245 /* dump supported am */
246 fprintf(F, "AM support = ");
247 switch (get_ia32_am_support(n)) {
252 fprintf(F, "source only (Load)");
255 fprintf(F, "dest only (Load+Store)");
261 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
266 /* dump am flavour */
267 fprintf(F, "AM flavour =");
268 am_flav = get_ia32_am_flavour(n);
269 if (am_flav == ia32_am_N) {
273 if (am_flav & ia32_O) {
276 if (am_flav & ia32_B) {
279 if (am_flav & ia32_I) {
282 if (am_flav & ia32_S) {
286 fprintf(F, " (%d)\n", am_flav);
289 if(get_ia32_am_offs_int(n) != 0) {
290 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
293 /* dump AM symconst */
294 if(get_ia32_am_sc(n) != NULL) {
295 ir_entity *ent = get_ia32_am_sc(n);
296 ident *id = get_entity_ld_ident(ent);
297 fprintf(F, "AM symconst = %s\n", get_id_str(id));
301 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
304 if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) {
305 fprintf(F, "pn_code = %d (%s, unsigned)\n", get_ia32_pncode(n),
306 get_pnc_string(get_ia32_pncode(n) & ~ia32_pn_Cmp_Unsigned));
308 fprintf(F, "pn_code = %d (%s)\n", get_ia32_pncode(n),
309 get_pnc_string(get_ia32_pncode(n)));
313 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
316 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
319 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
322 fprintf(F, "emit cl instead of ecx = %d\n", is_ia32_emit_cl(n));
325 fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
328 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
331 fprintf(F, "latency = %d\n", get_ia32_latency(n));
334 fprintf(F, "flags =");
335 flags = get_ia32_flags(n);
336 if (flags == arch_irn_flags_none) {
340 if (flags & arch_irn_flags_dont_spill) {
341 fprintf(F, " unspillable");
343 if (flags & arch_irn_flags_rematerializable) {
344 fprintf(F, " remat");
346 if (flags & arch_irn_flags_ignore) {
347 fprintf(F, " ignore");
349 if (flags & arch_irn_flags_modify_sp) {
350 fprintf(F, " modify_sp");
353 fprintf(F, " (%d)\n", flags);
355 /* dump frame entity */
356 fprintf(F, "frame entity = ");
357 if (get_ia32_frame_ent(n)) {
358 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
366 fprintf(F, "ls_mode = ");
367 if (get_ia32_ls_mode(n)) {
368 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
376 /* dump original ir node name */
377 fprintf(F, "orig node = ");
378 if (get_ia32_orig_node(n)) {
379 fprintf(F, "%s", get_ia32_orig_node(n));
387 fprintf(F, "=== IA32 attr end ===\n");
388 /* end of: case dump_node_info_txt */
397 /***************************************************************************************************
399 * | | | | | | / / | | | | | | | |
400 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
401 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
402 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
403 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
406 ***************************************************************************************************/
409 * Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast.
410 * Firm was made by people hating const :-(
412 ia32_attr_t *get_ia32_attr(const ir_node *node) {
413 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
414 return (ia32_attr_t *)get_irn_generic_attr((ir_node *)node);
418 * Gets the type of an ia32 node.
420 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
421 ia32_attr_t *attr = get_ia32_attr(node);
422 return attr->data.tp;
426 * Sets the type of an ia32 node.
428 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
429 ia32_attr_t *attr = get_ia32_attr(node);
434 * Gets the immediate op type of an ia32 node.
436 ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
437 ia32_attr_t *attr = get_ia32_attr(node);
438 return attr->data.imm_tp;
442 * Gets the supported addrmode of an ia32 node
444 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
445 ia32_attr_t *attr = get_ia32_attr(node);
446 return attr->data.am_support;
450 * Sets the supported addrmode of an ia32 node
452 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) {
453 ia32_attr_t *attr = get_ia32_attr(node);
454 attr->data.am_support = am_tp;
458 * Gets the addrmode flavour of an ia32 node
460 ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) {
461 ia32_attr_t *attr = get_ia32_attr(node);
462 return attr->data.am_flavour;
466 * Sets the addrmode flavour of an ia32 node
468 void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) {
469 ia32_attr_t *attr = get_ia32_attr(node);
470 attr->data.am_flavour = am_flavour;
474 * Gets the addressmode offset as int.
476 int get_ia32_am_offs_int(const ir_node *node) {
477 ia32_attr_t *attr = get_ia32_attr(node);
478 return attr->am_offs;
482 * Sets the addressmode offset from an int.
484 void set_ia32_am_offs_int(ir_node *node, int offset) {
485 ia32_attr_t *attr = get_ia32_attr(node);
486 attr->am_offs = offset;
489 void add_ia32_am_offs_int(ir_node *node, int offset) {
490 ia32_attr_t *attr = get_ia32_attr(node);
491 attr->am_offs += offset;
495 * Returns the symconst entity associated to addrmode.
497 ir_entity *get_ia32_am_sc(const ir_node *node) {
498 ia32_attr_t *attr = get_ia32_attr(node);
503 * Sets the symconst entity associated to addrmode.
505 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
506 ia32_attr_t *attr = get_ia32_attr(node);
507 attr->am_sc = entity;
511 * Sets the sign bit for address mode symconst.
513 void set_ia32_am_sc_sign(ir_node *node) {
514 ia32_attr_t *attr = get_ia32_attr(node);
515 attr->data.am_sc_sign = 1;
519 * Clears the sign bit for address mode symconst.
521 void clear_ia32_am_sc_sign(ir_node *node) {
522 ia32_attr_t *attr = get_ia32_attr(node);
523 attr->data.am_sc_sign = 0;
527 * Returns the sign bit for address mode symconst.
529 int is_ia32_am_sc_sign(const ir_node *node) {
530 ia32_attr_t *attr = get_ia32_attr(node);
531 return attr->data.am_sc_sign;
535 * Gets the addr mode const.
537 int get_ia32_am_scale(const ir_node *node) {
538 ia32_attr_t *attr = get_ia32_attr(node);
539 return attr->data.am_scale;
543 * Sets the index register scale for addrmode.
545 void set_ia32_am_scale(ir_node *node, int scale) {
546 ia32_attr_t *attr = get_ia32_attr(node);
547 attr->data.am_scale = scale;
551 * Return the tarval of an immediate operation or NULL in case of SymConst
553 tarval *get_ia32_Immop_tarval(const ir_node *node) {
554 ia32_attr_t *attr = get_ia32_attr(node);
555 assert(attr->data.imm_tp == ia32_ImmConst);
556 return attr->cnst_val.tv;
560 * Sets the attributes of an immediate operation to the specified tarval
562 void set_ia32_Immop_tarval(ir_node *node, tarval *tv) {
563 ia32_attr_t *attr = get_ia32_attr(node);
564 attr->data.imm_tp = ia32_ImmConst;
565 attr->cnst_val.tv = tv;
568 void set_ia32_Immop_symconst(ir_node *node, ir_entity *entity) {
569 ia32_attr_t *attr = get_ia32_attr(node);
570 attr->data.imm_tp = ia32_ImmSymConst;
571 attr->cnst_val.sc = entity;
574 ir_entity *get_ia32_Immop_symconst(const ir_node *node) {
575 ia32_attr_t *attr = get_ia32_attr(node);
576 assert(attr->data.imm_tp == ia32_ImmSymConst);
577 return attr->cnst_val.sc;
581 * Sets the uses_frame flag.
583 void set_ia32_use_frame(ir_node *node) {
584 ia32_attr_t *attr = get_ia32_attr(node);
585 attr->data.use_frame = 1;
589 * Clears the uses_frame flag.
591 void clear_ia32_use_frame(ir_node *node) {
592 ia32_attr_t *attr = get_ia32_attr(node);
593 attr->data.use_frame = 0;
597 * Gets the uses_frame flag.
599 int is_ia32_use_frame(const ir_node *node) {
600 ia32_attr_t *attr = get_ia32_attr(node);
601 return attr->data.use_frame;
605 * Sets node to commutative.
607 void set_ia32_commutative(ir_node *node) {
608 ia32_attr_t *attr = get_ia32_attr(node);
609 attr->data.is_commutative = 1;
613 * Sets node to non-commutative.
615 void clear_ia32_commutative(ir_node *node) {
616 ia32_attr_t *attr = get_ia32_attr(node);
617 attr->data.is_commutative = 0;
621 * Checks if node is commutative.
623 int is_ia32_commutative(const ir_node *node) {
624 ia32_attr_t *attr = get_ia32_attr(node);
625 return attr->data.is_commutative;
631 void set_ia32_emit_cl(ir_node *node) {
632 ia32_attr_t *attr = get_ia32_attr(node);
633 attr->data.emit_cl = 1;
637 * Clears node emit_cl.
639 void clear_ia32_emit_cl(ir_node *node) {
640 ia32_attr_t *attr = get_ia32_attr(node);
641 attr->data.emit_cl = 0;
645 * Checks if node needs %cl.
647 int is_ia32_emit_cl(const ir_node *node) {
648 ia32_attr_t *attr = get_ia32_attr(node);
649 return attr->data.emit_cl;
655 void set_ia32_got_lea(ir_node *node) {
656 ia32_attr_t *attr = get_ia32_attr(node);
657 attr->data.got_lea = 1;
661 * Clears node got_lea.
663 void clear_ia32_got_lea(ir_node *node) {
664 ia32_attr_t *attr = get_ia32_attr(node);
665 attr->data.got_lea = 0;
669 * Checks if node got lea.
671 int is_ia32_got_lea(const ir_node *node) {
672 ia32_attr_t *attr = get_ia32_attr(node);
673 return attr->data.got_lea;
676 void set_ia32_need_stackent(ir_node *node) {
677 ia32_attr_t *attr = get_ia32_attr(node);
678 attr->data.need_stackent = 1;
681 void clear_ia32_need_stackent(ir_node *node) {
682 ia32_attr_t *attr = get_ia32_attr(node);
683 attr->data.need_stackent = 0;
686 int is_ia32_need_stackent(const ir_node *node) {
687 ia32_attr_t *attr = get_ia32_attr(node);
688 return attr->data.need_stackent;
692 * Gets the mode of the stored/loaded value (only set for Store/Load)
694 ir_mode *get_ia32_ls_mode(const ir_node *node) {
695 ia32_attr_t *attr = get_ia32_attr(node);
696 return attr->ls_mode;
700 * Sets the mode of the stored/loaded value (only set for Store/Load)
702 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
703 ia32_attr_t *attr = get_ia32_attr(node);
704 attr->ls_mode = mode;
708 * Gets the frame entity assigned to this node.
710 ir_entity *get_ia32_frame_ent(const ir_node *node) {
711 ia32_attr_t *attr = get_ia32_attr(node);
712 return attr->frame_ent;
716 * Sets the frame entity for this node.
718 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
719 ia32_attr_t *attr = get_ia32_attr(node);
720 attr->frame_ent = ent;
722 set_ia32_use_frame(node);
724 clear_ia32_use_frame(node);
729 * Gets the instruction latency.
731 unsigned get_ia32_latency(const ir_node *node) {
732 ia32_attr_t *attr = get_ia32_attr(node);
733 return attr->latency;
737 * Sets the instruction latency.
739 void set_ia32_latency(ir_node *node, unsigned latency) {
740 ia32_attr_t *attr = get_ia32_attr(node);
741 attr->latency = latency;
745 * Returns the argument register requirements of an ia32 node.
747 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
748 ia32_attr_t *attr = get_ia32_attr(node);
753 * Sets the argument register requirements of an ia32 node.
755 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
756 ia32_attr_t *attr = get_ia32_attr(node);
761 * Returns the result register requirements of an ia32 node.
763 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
764 ia32_attr_t *attr = get_ia32_attr(node);
765 return attr->out_req;
769 * Sets the result register requirements of an ia32 node.
771 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
772 ia32_attr_t *attr = get_ia32_attr(node);
773 attr->out_req = reqs;
777 * Returns the argument register requirement at position pos of an ia32 node.
779 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
780 ia32_attr_t *attr = get_ia32_attr(node);
781 if(attr->in_req == NULL)
782 return arch_no_register_req;
784 return attr->in_req[pos];
788 * Returns the result register requirement at position pos of an ia32 node.
790 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
791 ia32_attr_t *attr = get_ia32_attr(node);
792 if(attr->out_req == NULL)
793 return arch_no_register_req;
795 return attr->out_req[pos];
799 * Sets the OUT register requirements at position pos.
801 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
802 ia32_attr_t *attr = get_ia32_attr(node);
803 attr->out_req[pos] = req;
807 * Sets the IN register requirements at position pos.
809 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
810 ia32_attr_t *attr = get_ia32_attr(node);
811 attr->in_req[pos] = req;
815 * Returns the register flag of an ia32 node.
817 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
818 ia32_attr_t *attr = get_ia32_attr(node);
819 return attr->data.flags;
823 * Sets the register flag of an ia32 node.
825 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
826 ia32_attr_t *attr = get_ia32_attr(node);
827 attr->data.flags = flags;
831 * Returns the result register slots of an ia32 node.
833 const arch_register_t **get_ia32_slots(const ir_node *node) {
834 ia32_attr_t *attr = get_ia32_attr(node);
839 * Sets the number of results.
841 void set_ia32_n_res(ir_node *node, int n_res) {
842 ia32_attr_t *attr = get_ia32_attr(node);
843 attr->data.n_res = n_res;
847 * Returns the number of results.
849 int get_ia32_n_res(const ir_node *node) {
850 ia32_attr_t *attr = get_ia32_attr(node);
851 return attr->data.n_res;
855 * Returns the flavour of an ia32 node,
857 ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
858 ia32_attr_t *attr = get_ia32_attr(node);
859 return attr->data.op_flav;
863 * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
865 void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) {
866 ia32_attr_t *attr = get_ia32_attr(node);
867 attr->data.op_flav = op_flav;
871 * Returns the projnum code.
873 pn_Cmp get_ia32_pncode(const ir_node *node) {
874 ia32_attr_t *attr = get_ia32_attr(node);
875 return attr->pn_code;
879 * Sets the projnum code
881 void set_ia32_pncode(ir_node *node, pn_Cmp code) {
882 ia32_attr_t *attr = get_ia32_attr(node);
883 attr->pn_code = code;
887 * Sets the flags for the n'th out.
889 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
890 ia32_attr_t *attr = get_ia32_attr(node);
891 assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
892 attr->out_flags[pos] = flags;
896 * Gets the flags for the n'th out.
898 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
899 ia32_attr_t *attr = get_ia32_attr(node);
900 return pos < (int)attr->data.n_res ? attr->out_flags[pos] : arch_irn_flags_none;
904 * Get the list of available execution units.
906 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
907 ia32_attr_t *attr = get_ia32_attr(node);
908 return attr->exec_units;
914 * Returns the name of the original ir node.
916 const char *get_ia32_orig_node(const ir_node *node) {
917 ia32_attr_t *attr = get_ia32_attr(node);
918 return attr->orig_node;
922 * Sets the name of the original ir node.
924 void set_ia32_orig_node(ir_node *node, const char *name) {
925 ia32_attr_t *attr = get_ia32_attr(node);
926 attr->orig_node = name;
931 /******************************************************************************************************
933 * (_) | | | | | | / _| | | (_)
934 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
935 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
936 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
937 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
940 ******************************************************************************************************/
943 * Copy the attributes from an ia32_Const to an Immop (Add_i, Sub_i, ...) node
945 void copy_ia32_Immop_attr(ir_node *node, ir_node *from) {
946 ia32_immop_type_t immop_type = get_ia32_immop_type(from);
948 if(immop_type == ia32_ImmConst) {
949 set_ia32_Immop_tarval(node, get_ia32_Immop_tarval(from));
950 } else if(immop_type == ia32_ImmSymConst) {
951 set_ia32_Immop_symconst(node, get_ia32_Immop_symconst(from));
953 ia32_attr_t *attr = get_ia32_attr(node);
954 assert(immop_type == ia32_ImmNone);
955 attr->data.imm_tp = ia32_ImmNone;
960 * Copy the attributes from a Firm Const/SymConst to an ia32_Const
962 void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) {
963 assert(is_ia32_Cnst(ia32_cnst) && "Need ia32_Const to set Const attr");
965 switch (get_irn_opcode(cnst)) {
967 set_ia32_Const_tarval(ia32_cnst, get_Const_tarval(cnst));
970 assert(get_SymConst_kind(cnst) == symconst_addr_ent);
971 set_ia32_Immop_symconst(ia32_cnst, get_SymConst_entity(cnst));
974 assert(0 && "Unknown Const NYI");
977 assert(0 && "Cannot create ia32_Const for this opcode");
981 void set_ia32_Const_tarval(ir_node *ia32_cnst, tarval *tv) {
982 if(mode_is_reference(get_tarval_mode(tv))) {
983 if(tarval_is_null(tv)) {
984 tv = get_tarval_null(mode_Iu);
986 panic("Can't convert reference tarval to mode_Iu at %+F", ia32_cnst);
989 tv = tarval_convert_to(tv, mode_Iu);
992 assert(tv != get_tarval_bad() && tv != get_tarval_undefined()
994 set_ia32_Immop_tarval(ia32_cnst, tv);
999 * Sets the AddrMode(S|D) attribute
1001 void set_ia32_AddrMode(ir_node *node, char direction) {
1002 ia32_attr_t *attr = get_ia32_attr(node);
1004 switch (direction) {
1006 attr->data.tp = ia32_AddrModeD;
1009 attr->data.tp = ia32_AddrModeS;
1012 assert(0 && "wrong AM type");
1017 * Returns whether or not the node is an immediate operation with Const.
1019 int is_ia32_ImmConst(const ir_node *node) {
1020 ia32_attr_t *attr = get_ia32_attr(node);
1021 return (attr->data.imm_tp == ia32_ImmConst);
1025 * Returns whether or not the node is an immediate operation with SymConst.
1027 int is_ia32_ImmSymConst(const ir_node *node) {
1028 ia32_attr_t *attr = get_ia32_attr(node);
1029 return (attr->data.imm_tp == ia32_ImmSymConst);
1033 * Returns whether or not the node is an AddrModeS node.
1035 int is_ia32_AddrModeS(const ir_node *node) {
1036 ia32_attr_t *attr = get_ia32_attr(node);
1037 return (attr->data.tp == ia32_AddrModeS);
1041 * Returns whether or not the node is an AddrModeD node.
1043 int is_ia32_AddrModeD(const ir_node *node) {
1044 ia32_attr_t *attr = get_ia32_attr(node);
1045 return (attr->data.tp == ia32_AddrModeD);
1049 * Checks if node is a Load or xLoad/vfLoad.
1051 int is_ia32_Ld(const ir_node *node) {
1052 int op = get_ia32_irn_opcode(node);
1053 return op == iro_ia32_Load || op == iro_ia32_xLoad || op == iro_ia32_vfld || op == iro_ia32_fld;
1057 * Checks if node is a Store or xStore/vfStore.
1059 int is_ia32_St(const ir_node *node) {
1060 int op = get_ia32_irn_opcode(node);
1061 return op == iro_ia32_Store || op == iro_ia32_xStore || op == iro_ia32_vfst || op == iro_ia32_fst || op == iro_ia32_fstp;
1065 * Checks if node is a Const or xConst/vfConst.
1067 int is_ia32_Cnst(const ir_node *node) {
1068 int op = get_ia32_irn_opcode(node);
1069 return op == iro_ia32_Const || op == iro_ia32_xConst || op == iro_ia32_vfConst;
1073 * Returns the name of the OUT register at position pos.
1075 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
1076 ia32_attr_t *attr = get_ia32_attr(node);
1078 assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
1079 assert(attr->slots[pos] && "No register assigned");
1081 return arch_register_get_name(attr->slots[pos]);
1085 * Returns the index of the OUT register at position pos within its register class.
1087 int get_ia32_out_regnr(const ir_node *node, int pos) {
1088 ia32_attr_t *attr = get_ia32_attr(node);
1090 assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
1091 assert(attr->slots[pos] && "No register assigned");
1093 return arch_register_get_index(attr->slots[pos]);
1097 * Returns the OUT register at position pos.
1099 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
1100 ia32_attr_t *attr = get_ia32_attr(node);
1102 assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
1103 assert(attr->slots[pos] && "No register assigned");
1105 return attr->slots[pos];
1109 * Initializes the nodes attributes.
1111 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1112 const arch_register_req_t **in_reqs,
1113 const arch_register_req_t **out_reqs,
1114 const be_execution_unit_t ***execution_units,
1115 int n_res, unsigned latency)
1117 ia32_attr_t *attr = get_ia32_attr(node);
1119 set_ia32_flags(node, flags);
1120 set_ia32_in_req_all(node, in_reqs);
1121 set_ia32_out_req_all(node, out_reqs);
1122 set_ia32_latency(node, latency);
1123 set_ia32_n_res(node, n_res);
1125 attr->exec_units = execution_units;
1127 attr->out_flags = NEW_ARR_D(int, get_irg_obstack(get_irn_irg(node)), n_res);
1128 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1130 memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
1133 ir_node *get_ia32_result_proj(const ir_node *node)
1135 const ir_edge_t *edge;
1137 foreach_out_edge(node, edge) {
1138 ir_node *proj = get_edge_src_irn(edge);
1139 if(get_Proj_proj(proj) == 0) {
1146 /***************************************************************************************
1149 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1150 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1151 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1152 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1154 ***************************************************************************************/
1156 /* default compare operation to compare attributes */
1157 int ia32_compare_attr(ia32_attr_t *a, ia32_attr_t *b) {
1158 if (a->data.tp != b->data.tp
1159 || a->data.imm_tp != b->data.imm_tp)
1162 if (a->data.imm_tp == ia32_ImmConst
1163 && a->cnst_val.tv != b->cnst_val.tv)
1166 if (a->data.imm_tp == ia32_ImmSymConst
1167 && a->cnst_val.sc != b->cnst_val.sc)
1170 if (a->data.am_flavour != b->data.am_flavour
1171 || a->data.am_scale != b->data.am_scale
1172 || a->data.offs_sign != b->data.offs_sign
1173 || a->data.am_sc_sign != b->data.am_sc_sign
1174 || a->am_offs != b->am_offs
1175 || a->am_sc != b->am_sc
1176 || a->ls_mode != b->ls_mode)
1179 if (a->data.use_frame != b->data.use_frame
1180 || a->data.use_frame != b->data.use_frame
1181 || a->frame_ent != b->frame_ent)
1184 if(a->pn_code != b->pn_code)
1187 if (a->data.tp != b->data.tp
1188 || a->data.op_flav != b->data.op_flav)
1194 /* copies the ia32 attributes */
1195 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) {
1196 ia32_attr_t *attr_old = get_ia32_attr(old_node);
1197 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1199 /* copy the attributes */
1200 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1202 /* copy out flags */
1203 attr_new->out_flags =
1204 DUP_ARR_D(int, get_irg_obstack(get_irn_irg(new_node)), attr_old->out_flags);
1208 * Registers the ia32_copy_attr function for all ia32 opcodes.
1210 void ia32_register_copy_attr_func(void) {
1211 unsigned i, f = get_ia32_opcode_first(), l = get_ia32_opcode_last();
1213 for (i = f; i < l; i++) {
1214 ir_op *op = get_irp_opcode(i);
1215 op->ops.copy_attr = ia32_copy_attr;
1219 /* Include the generated constructor functions */
1220 #include "gen_ia32_new_nodes.c.inl"