2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the coresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same));
102 if (reqs[i]->type & arch_register_req_type_should_be_different) {
103 ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different));
112 fprintf(F, "%sreq = N/A\n", dir);
117 * Dumper interface for dumping ia32 nodes in vcg.
118 * @param n the node to dump
119 * @param F the output file
120 * @param reason indicates which kind of information should be dumped
121 * @return 0 on success or != 0 on failure
123 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
124 ir_mode *mode = NULL;
126 int i, n_res, am_flav, flags;
127 const ia32_attr_t *attr = get_ia32_attr_const(n);
128 const arch_register_req_t **reqs;
129 const arch_register_t **slots;
132 case dump_node_opcode_txt:
133 fprintf(F, "%s", get_irn_opname(n));
136 case dump_node_mode_txt:
137 mode = get_irn_mode(n);
139 if (is_ia32_Ld(n) || is_ia32_St(n)) {
140 mode = get_ia32_ls_mode(n);
143 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
146 case dump_node_nodeattr_txt:
147 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
148 if(is_ia32_ImmSymConst(n)) {
149 ir_entity *ent = get_ia32_Immop_symconst(n);
150 ident *id = get_entity_ld_ident(ent);
151 fprintf(F, "[SymC %s]", get_id_str(id));
154 tarval *tv = get_ia32_Immop_tarval(n);
156 tarval_snprintf(buf, sizeof(buf), tv);
157 fprintf(F, "[%s]", buf);
161 if (! is_ia32_Lea(n)) {
162 if (is_ia32_AddrModeS(n)) {
163 fprintf(F, "[AM S] ");
165 else if (is_ia32_AddrModeD(n)) {
166 fprintf(F, "[AM D] ");
172 case dump_node_info_txt:
173 n_res = get_ia32_n_res(n);
174 fprintf(F, "=== IA32 attr begin ===\n");
176 /* dump IN requirements */
177 if (get_irn_arity(n) > 0) {
178 reqs = get_ia32_in_req_all(n);
179 dump_reg_req(F, n, reqs, 0);
182 /* dump OUT requirements */
184 reqs = get_ia32_out_req_all(n);
185 dump_reg_req(F, n, reqs, 1);
188 /* dump assigned registers */
189 slots = get_ia32_slots(n);
190 if (slots && n_res > 0) {
191 for (i = 0; i < n_res; i++) {
192 const arch_register_t *reg;
196 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
203 switch (get_ia32_op_type(n)) {
205 fprintf(F, "Normal");
208 fprintf(F, "AM Dest (Load+Store)");
211 fprintf(F, "AM Source (Load)");
214 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
219 /* dump immop type */
220 fprintf(F, "immediate = ");
221 switch (get_ia32_immop_type(n)) {
228 case ia32_ImmSymConst:
229 fprintf(F, "SymConst");
232 fprintf(F, "Asm '%s'\n",
233 get_id_str(attr->cnst_val.asm_text));
236 fprintf(F, "unknown (%d)", get_ia32_immop_type(n));
241 /* dump supported am */
242 fprintf(F, "AM support = ");
243 switch (get_ia32_am_support(n)) {
248 fprintf(F, "source only (Load)");
251 fprintf(F, "dest only (Load+Store)");
257 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
262 /* dump am flavour */
263 fprintf(F, "AM flavour =");
264 am_flav = get_ia32_am_flavour(n);
265 if (am_flav == ia32_am_N) {
269 if (am_flav & ia32_O) {
272 if (am_flav & ia32_B) {
275 if (am_flav & ia32_I) {
278 if (am_flav & ia32_S) {
282 fprintf(F, " (%d)\n", am_flav);
285 if(get_ia32_am_offs_int(n) != 0) {
286 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
289 /* dump AM symconst */
290 if(get_ia32_am_sc(n) != NULL) {
291 ir_entity *ent = get_ia32_am_sc(n);
292 ident *id = get_entity_ld_ident(ent);
293 fprintf(F, "AM symconst = %s\n", get_id_str(id));
297 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
300 if(is_ia32_SwitchJmp(n)) {
301 fprintf(F, "pn_code = %d\n", get_ia32_pncode(n));
303 if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) {
304 int pnc = get_ia32_pncode(n);
305 fprintf(F, "pn_code = %d (%s, unsigned)\n",
306 pnc, get_pnc_string(pnc & ~ia32_pn_Cmp_Unsigned));
308 fprintf(F, "pn_code = %d (%s)\n", get_ia32_pncode(n),
309 get_pnc_string(get_ia32_pncode(n)));
314 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
317 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
320 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
323 fprintf(F, "emit cl instead of ecx = %d\n", is_ia32_emit_cl(n));
326 fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
329 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
332 fprintf(F, "latency = %d\n", get_ia32_latency(n));
335 fprintf(F, "flags =");
336 flags = get_ia32_flags(n);
337 if (flags == arch_irn_flags_none) {
341 if (flags & arch_irn_flags_dont_spill) {
342 fprintf(F, " unspillable");
344 if (flags & arch_irn_flags_rematerializable) {
345 fprintf(F, " remat");
347 if (flags & arch_irn_flags_ignore) {
348 fprintf(F, " ignore");
350 if (flags & arch_irn_flags_modify_sp) {
351 fprintf(F, " modify_sp");
354 fprintf(F, " (%d)\n", flags);
356 /* dump frame entity */
357 fprintf(F, "frame entity = ");
358 if (get_ia32_frame_ent(n)) {
359 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
367 fprintf(F, "ls_mode = ");
368 if (get_ia32_ls_mode(n)) {
369 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
377 /* dump original ir node name */
378 fprintf(F, "orig node = ");
379 if (get_ia32_orig_node(n)) {
380 fprintf(F, "%s", get_ia32_orig_node(n));
388 fprintf(F, "=== IA32 attr end ===\n");
389 /* end of: case dump_node_info_txt */
398 /***************************************************************************************************
400 * | | | | | | / / | | | | | | | |
401 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
402 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
403 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
404 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
407 ***************************************************************************************************/
409 ia32_attr_t *get_ia32_attr(ir_node *node) {
410 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
411 return (ia32_attr_t *)get_irn_generic_attr(node);
414 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
415 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
416 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
419 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
420 ia32_attr_t *attr = get_ia32_attr(node);
421 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
425 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
426 const ia32_attr_t *attr = get_ia32_attr_const(node);
427 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
432 * Gets the type of an ia32 node.
434 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
435 const ia32_attr_t *attr = get_ia32_attr_const(node);
436 return attr->data.tp;
440 * Sets the type of an ia32 node.
442 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
443 ia32_attr_t *attr = get_ia32_attr(node);
448 * Gets the immediate op type of an ia32 node.
450 ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
451 const ia32_attr_t *attr = get_ia32_attr_const(node);
452 return attr->data.imm_tp;
456 * Gets the supported address mode of an ia32 node
458 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
459 const ia32_attr_t *attr = get_ia32_attr_const(node);
460 return attr->data.am_support;
464 * Sets the supported address mode of an ia32 node
466 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) {
467 ia32_attr_t *attr = get_ia32_attr(node);
468 attr->data.am_support = am_tp;
472 * Gets the address mode flavour of an ia32 node
474 ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) {
475 const ia32_attr_t *attr = get_ia32_attr_const(node);
476 return attr->data.am_flavour;
480 * Sets the address mode flavour of an ia32 node
482 void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) {
483 ia32_attr_t *attr = get_ia32_attr(node);
484 attr->data.am_flavour = am_flavour;
488 * Gets the address mode offset as int.
490 int get_ia32_am_offs_int(const ir_node *node) {
491 const ia32_attr_t *attr = get_ia32_attr_const(node);
492 return attr->am_offs;
496 * Sets the address mode offset from an int.
498 void set_ia32_am_offs_int(ir_node *node, int offset) {
499 ia32_attr_t *attr = get_ia32_attr(node);
500 attr->am_offs = offset;
503 void add_ia32_am_offs_int(ir_node *node, int offset) {
504 ia32_attr_t *attr = get_ia32_attr(node);
505 attr->am_offs += offset;
509 * Returns the symconst entity associated to address mode.
511 ir_entity *get_ia32_am_sc(const ir_node *node) {
512 const ia32_attr_t *attr = get_ia32_attr_const(node);
517 * Sets the symconst entity associated to address mode.
519 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
520 ia32_attr_t *attr = get_ia32_attr(node);
521 attr->am_sc = entity;
525 * Sets the sign bit for address mode symconst.
527 void set_ia32_am_sc_sign(ir_node *node) {
528 ia32_attr_t *attr = get_ia32_attr(node);
529 attr->data.am_sc_sign = 1;
533 * Clears the sign bit for address mode symconst.
535 void clear_ia32_am_sc_sign(ir_node *node) {
536 ia32_attr_t *attr = get_ia32_attr(node);
537 attr->data.am_sc_sign = 0;
541 * Returns the sign bit for address mode symconst.
543 int is_ia32_am_sc_sign(const ir_node *node) {
544 const ia32_attr_t *attr = get_ia32_attr_const(node);
545 return attr->data.am_sc_sign;
549 * Gets the addr mode const.
551 int get_ia32_am_scale(const ir_node *node) {
552 const ia32_attr_t *attr = get_ia32_attr_const(node);
553 return attr->data.am_scale;
557 * Sets the index register scale for address mode.
559 void set_ia32_am_scale(ir_node *node, int scale) {
560 ia32_attr_t *attr = get_ia32_attr(node);
561 attr->data.am_scale = scale;
565 * Return the tarval of an immediate operation or NULL in case of SymConst
567 tarval *get_ia32_Immop_tarval(const ir_node *node) {
568 const ia32_attr_t *attr = get_ia32_attr_const(node);
569 assert(attr->data.imm_tp == ia32_ImmConst);
570 return attr->cnst_val.tv;
574 * Sets the attributes of an immediate operation to the specified tarval
576 void set_ia32_Immop_tarval(ir_node *node, tarval *tv) {
577 ia32_attr_t *attr = get_ia32_attr(node);
578 attr->data.imm_tp = ia32_ImmConst;
579 attr->cnst_val.tv = tv;
582 void set_ia32_Immop_symconst(ir_node *node, ir_entity *entity) {
583 ia32_attr_t *attr = get_ia32_attr(node);
584 attr->data.imm_tp = ia32_ImmSymConst;
585 attr->cnst_val.sc = entity;
588 ir_entity *get_ia32_Immop_symconst(const ir_node *node) {
589 const ia32_attr_t *attr = get_ia32_attr_const(node);
590 assert(attr->data.imm_tp == ia32_ImmSymConst);
591 return attr->cnst_val.sc;
595 * Sets the uses_frame flag.
597 void set_ia32_use_frame(ir_node *node) {
598 ia32_attr_t *attr = get_ia32_attr(node);
599 attr->data.use_frame = 1;
603 * Clears the uses_frame flag.
605 void clear_ia32_use_frame(ir_node *node) {
606 ia32_attr_t *attr = get_ia32_attr(node);
607 attr->data.use_frame = 0;
611 * Gets the uses_frame flag.
613 int is_ia32_use_frame(const ir_node *node) {
614 const ia32_attr_t *attr = get_ia32_attr_const(node);
615 return attr->data.use_frame;
619 * Sets node to commutative.
621 void set_ia32_commutative(ir_node *node) {
622 ia32_attr_t *attr = get_ia32_attr(node);
623 attr->data.is_commutative = 1;
627 * Sets node to non-commutative.
629 void clear_ia32_commutative(ir_node *node) {
630 ia32_attr_t *attr = get_ia32_attr(node);
631 attr->data.is_commutative = 0;
635 * Checks if node is commutative.
637 int is_ia32_commutative(const ir_node *node) {
638 const ia32_attr_t *attr = get_ia32_attr_const(node);
639 return attr->data.is_commutative;
645 void set_ia32_emit_cl(ir_node *node) {
646 ia32_attr_t *attr = get_ia32_attr(node);
647 attr->data.emit_cl = 1;
651 * Clears node emit_cl.
653 void clear_ia32_emit_cl(ir_node *node) {
654 ia32_attr_t *attr = get_ia32_attr(node);
655 attr->data.emit_cl = 0;
659 * Checks if node needs %cl.
661 int is_ia32_emit_cl(const ir_node *node) {
662 const ia32_attr_t *attr = get_ia32_attr_const(node);
663 return attr->data.emit_cl;
669 void set_ia32_got_lea(ir_node *node) {
670 ia32_attr_t *attr = get_ia32_attr(node);
671 attr->data.got_lea = 1;
675 * Clears node got_lea.
677 void clear_ia32_got_lea(ir_node *node) {
678 ia32_attr_t *attr = get_ia32_attr(node);
679 attr->data.got_lea = 0;
683 * Checks if node got lea.
685 int is_ia32_got_lea(const ir_node *node) {
686 const ia32_attr_t *attr = get_ia32_attr_const(node);
687 return attr->data.got_lea;
690 void set_ia32_need_stackent(ir_node *node) {
691 ia32_attr_t *attr = get_ia32_attr(node);
692 attr->data.need_stackent = 1;
695 void clear_ia32_need_stackent(ir_node *node) {
696 ia32_attr_t *attr = get_ia32_attr(node);
697 attr->data.need_stackent = 0;
700 int is_ia32_need_stackent(const ir_node *node) {
701 const ia32_attr_t *attr = get_ia32_attr_const(node);
702 return attr->data.need_stackent;
706 * Gets the mode of the stored/loaded value (only set for Store/Load)
708 ir_mode *get_ia32_ls_mode(const ir_node *node) {
709 const ia32_attr_t *attr = get_ia32_attr_const(node);
710 return attr->ls_mode;
714 * Sets the mode of the stored/loaded value (only set for Store/Load)
716 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
717 ia32_attr_t *attr = get_ia32_attr(node);
718 attr->ls_mode = mode;
722 * Gets the frame entity assigned to this node.
724 ir_entity *get_ia32_frame_ent(const ir_node *node) {
725 const ia32_attr_t *attr = get_ia32_attr_const(node);
726 return attr->frame_ent;
730 * Sets the frame entity for this node.
732 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
733 ia32_attr_t *attr = get_ia32_attr(node);
734 attr->frame_ent = ent;
736 set_ia32_use_frame(node);
738 clear_ia32_use_frame(node);
743 * Gets the instruction latency.
745 unsigned get_ia32_latency(const ir_node *node) {
746 const ia32_attr_t *attr = get_ia32_attr_const(node);
747 return attr->latency;
751 * Sets the instruction latency.
753 void set_ia32_latency(ir_node *node, unsigned latency) {
754 ia32_attr_t *attr = get_ia32_attr(node);
755 attr->latency = latency;
759 * Returns the argument register requirements of an ia32 node.
761 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
762 const ia32_attr_t *attr = get_ia32_attr_const(node);
767 * Sets the argument register requirements of an ia32 node.
769 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
770 ia32_attr_t *attr = get_ia32_attr(node);
775 * Returns the result register requirements of an ia32 node.
777 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
778 const ia32_attr_t *attr = get_ia32_attr_const(node);
779 return attr->out_req;
783 * Sets the result register requirements of an ia32 node.
785 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
786 ia32_attr_t *attr = get_ia32_attr(node);
787 attr->out_req = reqs;
791 * Returns the argument register requirement at position pos of an ia32 node.
793 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
794 const ia32_attr_t *attr = get_ia32_attr_const(node);
795 if(attr->in_req == NULL)
796 return arch_no_register_req;
798 return attr->in_req[pos];
802 * Returns the result register requirement at position pos of an ia32 node.
804 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
805 const ia32_attr_t *attr = get_ia32_attr_const(node);
806 if(attr->out_req == NULL)
807 return arch_no_register_req;
809 return attr->out_req[pos];
813 * Sets the OUT register requirements at position pos.
815 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
816 ia32_attr_t *attr = get_ia32_attr(node);
817 attr->out_req[pos] = req;
821 * Sets the IN register requirements at position pos.
823 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
824 ia32_attr_t *attr = get_ia32_attr(node);
825 attr->in_req[pos] = req;
829 * Returns the register flag of an ia32 node.
831 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
832 const ia32_attr_t *attr = get_ia32_attr_const(node);
833 return attr->data.flags;
837 * Sets the register flag of an ia32 node.
839 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
840 ia32_attr_t *attr = get_ia32_attr(node);
841 attr->data.flags = flags;
845 * Returns the result register slots of an ia32 node.
847 const arch_register_t **get_ia32_slots(const ir_node *node) {
848 const ia32_attr_t *attr = get_ia32_attr_const(node);
853 * Returns the number of results.
855 int get_ia32_n_res(const ir_node *node) {
856 const ia32_attr_t *attr = get_ia32_attr_const(node);
857 return ARR_LEN(attr->slots);
861 * Returns the flavour of an ia32 node,
863 ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
864 const ia32_attr_t *attr = get_ia32_attr_const(node);
865 return attr->data.op_flav;
869 * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
871 void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) {
872 ia32_attr_t *attr = get_ia32_attr(node);
873 attr->data.op_flav = op_flav;
877 * Returns the projnum code.
879 pn_Cmp get_ia32_pncode(const ir_node *node) {
880 const ia32_attr_t *attr = get_ia32_attr_const(node);
881 return attr->pn_code;
885 * Sets the projnum code
887 void set_ia32_pncode(ir_node *node, pn_Cmp code) {
888 ia32_attr_t *attr = get_ia32_attr(node);
889 attr->pn_code = code;
893 * Sets the flags for the n'th out.
895 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
896 ia32_attr_t *attr = get_ia32_attr(node);
897 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
898 attr->out_flags[pos] = flags;
902 * Gets the flags for the n'th out.
904 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
905 const ia32_attr_t *attr = get_ia32_attr_const(node);
906 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
907 return attr->out_flags[pos];
911 * Get the list of available execution units.
913 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
914 const ia32_attr_t *attr = get_ia32_attr_const(node);
915 return attr->exec_units;
919 * Get the exception label attribute.
921 unsigned get_ia32_exc_label(const ir_node *node) {
922 const ia32_attr_t *attr = get_ia32_attr_const(node);
923 return attr->data.except_label;
927 * Set the exception label attribute.
929 void set_ia32_exc_label(ir_node *node, unsigned flag) {
930 ia32_attr_t *attr = get_ia32_attr(node);
931 attr->data.except_label = flag;
937 * Returns the name of the original ir node.
939 const char *get_ia32_orig_node(const ir_node *node) {
940 const ia32_attr_t *attr = get_ia32_attr_const(node);
941 return attr->orig_node;
945 * Sets the name of the original ir node.
947 void set_ia32_orig_node(ir_node *node, const char *name) {
948 ia32_attr_t *attr = get_ia32_attr(node);
949 attr->orig_node = name;
954 /******************************************************************************************************
956 * (_) | | | | | | / _| | | (_)
957 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
958 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
959 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
960 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
963 ******************************************************************************************************/
966 * Copy the attributes from an ia32_Const to an Immop (Add_i, Sub_i, ...) node
968 void copy_ia32_Immop_attr(ir_node *node, ir_node *from) {
969 ia32_immop_type_t immop_type = get_ia32_immop_type(from);
971 if(immop_type == ia32_ImmConst) {
972 set_ia32_Immop_tarval(node, get_ia32_Immop_tarval(from));
973 } else if(immop_type == ia32_ImmSymConst) {
974 set_ia32_Immop_symconst(node, get_ia32_Immop_symconst(from));
976 ia32_attr_t *attr = get_ia32_attr(node);
977 assert(immop_type == ia32_ImmNone);
978 attr->data.imm_tp = ia32_ImmNone;
983 * Copy the attributes from a Firm Const/SymConst to an ia32_Const
985 void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) {
986 assert(is_ia32_Cnst(ia32_cnst) && "Need ia32_Const to set Const attr");
988 switch (get_irn_opcode(cnst)) {
990 set_ia32_Const_tarval(ia32_cnst, get_Const_tarval(cnst));
993 assert(get_SymConst_kind(cnst) == symconst_addr_ent);
994 set_ia32_Immop_symconst(ia32_cnst, get_SymConst_entity(cnst));
997 assert(0 && "Unknown Const NYI");
1000 assert(0 && "Cannot create ia32_Const for this opcode");
1004 void set_ia32_Const_tarval(ir_node *ia32_cnst, tarval *tv) {
1006 if(mode_is_reference(get_tarval_mode(tv))) {
1007 if(tarval_is_null(tv)) {
1008 tv = get_tarval_null(mode_Iu);
1012 if(!tarval_is_long(tv))
1013 panic("Can't convert reference tarval to mode_Iu at %+F", ia32_cnst);
1014 val = get_tarval_long(tv);
1015 tv = new_tarval_from_long(val, mode_Iu);
1018 tv = tarval_convert_to(tv, mode_Iu);
1021 tv = tarval_convert_to(tv, mode_Iu);
1024 assert(tv != get_tarval_bad() && tv != get_tarval_undefined()
1026 set_ia32_Immop_tarval(ia32_cnst, tv);
1031 * Sets the AddrMode(S|D) attribute
1033 void set_ia32_AddrMode(ir_node *node, char direction) {
1034 ia32_attr_t *attr = get_ia32_attr(node);
1036 switch (direction) {
1038 attr->data.tp = ia32_AddrModeD;
1041 attr->data.tp = ia32_AddrModeS;
1044 assert(0 && "wrong AM type");
1049 * Returns whether or not the node is an immediate operation with Const.
1051 int is_ia32_ImmConst(const ir_node *node) {
1052 const ia32_attr_t *attr = get_ia32_attr_const(node);
1053 return (attr->data.imm_tp == ia32_ImmConst);
1057 * Returns whether or not the node is an immediate operation with SymConst.
1059 int is_ia32_ImmSymConst(const ir_node *node) {
1060 const ia32_attr_t *attr = get_ia32_attr_const(node);
1061 return (attr->data.imm_tp == ia32_ImmSymConst);
1065 * Returns whether or not the node is an AddrModeS node.
1067 int is_ia32_AddrModeS(const ir_node *node) {
1068 const ia32_attr_t *attr = get_ia32_attr_const(node);
1069 return (attr->data.tp == ia32_AddrModeS);
1073 * Returns whether or not the node is an AddrModeD node.
1075 int is_ia32_AddrModeD(const ir_node *node) {
1076 const ia32_attr_t *attr = get_ia32_attr_const(node);
1077 return (attr->data.tp == ia32_AddrModeD);
1081 * Checks if node is a Load or xLoad/vfLoad.
1083 int is_ia32_Ld(const ir_node *node) {
1084 int op = get_ia32_irn_opcode(node);
1085 return op == iro_ia32_Load ||
1086 op == iro_ia32_xLoad ||
1087 op == iro_ia32_vfld ||
1092 * Checks if node is a Store or xStore/vfStore.
1094 int is_ia32_St(const ir_node *node) {
1095 int op = get_ia32_irn_opcode(node);
1096 return op == iro_ia32_Store ||
1097 op == iro_ia32_Store8Bit ||
1098 op == iro_ia32_xStore ||
1099 op == iro_ia32_vfst ||
1100 op == iro_ia32_fst ||
1101 op == iro_ia32_fstp;
1105 * Checks if node is a Const or xConst/vfConst.
1107 int is_ia32_Cnst(const ir_node *node) {
1108 int op = get_ia32_irn_opcode(node);
1109 return op == iro_ia32_Const || op == iro_ia32_xConst || op == iro_ia32_vfConst;
1113 * Returns the name of the OUT register at position pos.
1115 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
1116 const ia32_attr_t *attr = get_ia32_attr_const(node);
1118 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1119 assert(attr->slots[pos] && "No register assigned");
1121 return arch_register_get_name(attr->slots[pos]);
1125 * Returns the index of the OUT register at position pos within its register class.
1127 int get_ia32_out_regnr(const ir_node *node, int pos) {
1128 const ia32_attr_t *attr = get_ia32_attr_const(node);
1130 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1131 assert(attr->slots[pos] && "No register assigned");
1133 return arch_register_get_index(attr->slots[pos]);
1137 * Returns the OUT register at position pos.
1139 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
1140 const ia32_attr_t *attr = get_ia32_attr_const(node);
1142 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1143 assert(attr->slots[pos] && "No register assigned");
1145 return attr->slots[pos];
1149 * Initializes the nodes attributes.
1151 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1152 const arch_register_req_t **in_reqs,
1153 const arch_register_req_t **out_reqs,
1154 const be_execution_unit_t ***execution_units,
1155 int n_res, unsigned latency)
1157 ir_graph *irg = get_irn_irg(node);
1158 struct obstack *obst = get_irg_obstack(irg);
1159 ia32_attr_t *attr = get_ia32_attr(node);
1161 set_ia32_flags(node, flags);
1162 set_ia32_in_req_all(node, in_reqs);
1163 set_ia32_out_req_all(node, out_reqs);
1164 set_ia32_latency(node, latency);
1166 attr->exec_units = execution_units;
1168 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1171 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1172 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1174 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
1175 memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
1179 init_ia32_x87_attributes(ir_node *res)
1182 ia32_attr_t *attr = get_ia32_attr(res);
1183 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1187 ir_node *get_ia32_result_proj(const ir_node *node)
1189 const ir_edge_t *edge;
1191 foreach_out_edge(node, edge) {
1192 ir_node *proj = get_edge_src_irn(edge);
1193 if(get_Proj_proj(proj) == 0) {
1200 /***************************************************************************************
1203 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1204 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1205 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1206 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1208 ***************************************************************************************/
1210 /* default compare operation to compare attributes */
1211 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1212 if (a->data.tp != b->data.tp
1213 || a->data.imm_tp != b->data.imm_tp)
1216 if (a->data.imm_tp == ia32_ImmConst
1217 && a->cnst_val.tv != b->cnst_val.tv)
1220 if (a->data.imm_tp == ia32_ImmSymConst
1221 && a->cnst_val.sc != b->cnst_val.sc)
1223 if(a->data.imm_tp == ia32_ImmAsm
1224 && a->cnst_val.asm_text != b->cnst_val.asm_text)
1227 if (a->data.am_flavour != b->data.am_flavour
1228 || a->data.am_scale != b->data.am_scale
1229 || a->data.am_sc_sign != b->data.am_sc_sign
1230 || a->am_offs != b->am_offs
1231 || a->am_sc != b->am_sc
1232 || a->ls_mode != b->ls_mode)
1235 if (a->data.use_frame != b->data.use_frame
1236 || a->data.use_frame != b->data.use_frame
1237 || a->frame_ent != b->frame_ent)
1240 if(a->pn_code != b->pn_code)
1243 if (a->data.tp != b->data.tp
1244 || a->data.op_flav != b->data.op_flav)
1247 if (a->data.except_label != b->data.except_label)
1253 /* copies the ia32 attributes */
1254 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1256 ir_graph *irg = get_irn_irg(new_node);
1257 struct obstack *obst = get_irg_obstack(irg);
1258 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1259 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1261 /* copy the attributes */
1262 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1264 /* copy out flags */
1265 attr_new->out_flags =
1266 DUP_ARR_D(int, obst, attr_old->out_flags);
1267 /* copy register assignments */
1269 DUP_ARR_D(const arch_register_t*, obst, attr_old->slots);
1272 /* Include the generated constructor functions */
1273 #include "gen_ia32_new_nodes.c.inl"
1276 * Registers the ia32_copy_attr function for all ia32 opcodes.
1278 void ia32_register_copy_attr_func(void) {
1281 for (i = get_irp_n_opcodes() - 1; i >= 0; --i) {
1282 ir_op *op = get_irp_opcode(i);
1284 op->ops.copy_attr = ia32_copy_attr;