2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the corresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 unsigned other = reqs[i]->other_same;
102 ir_fprintf(F, " same as");
103 for (i = 0; 1U << i <= other; ++i) {
104 if (other & (1U << i)) {
105 ir_fprintf(F, " %+F", get_irn_n(n, i));
110 if (reqs[i]->type & arch_register_req_type_must_be_different) {
111 unsigned other = reqs[i]->other_different;
114 ir_fprintf(F, " different from");
115 for (i = 0; 1U << i <= other; ++i) {
116 if (other & (1U << i)) {
117 ir_fprintf(F, " %+F", get_irn_n(n, i));
128 fprintf(F, "%sreq = N/A\n", dir);
133 * Dumper interface for dumping ia32 nodes in vcg.
134 * @param n the node to dump
135 * @param F the output file
136 * @param reason indicates which kind of information should be dumped
137 * @return 0 on success or != 0 on failure
139 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
140 ir_mode *mode = NULL;
143 const arch_register_req_t **reqs;
144 const arch_register_t **slots;
147 case dump_node_opcode_txt:
148 fprintf(F, "%s", get_irn_opname(n));
150 if(is_ia32_Immediate(n) || is_ia32_Const(n)) {
151 const ia32_immediate_attr_t *attr
152 = get_ia32_immediate_attr_const(n);
159 fputs(get_entity_name(attr->symconst), F);
161 if(attr->offset != 0 || attr->symconst == NULL) {
162 if(attr->offset > 0 && attr->symconst != NULL) {
165 fprintf(F, "%ld", attr->offset);
169 const ia32_attr_t *attr = get_ia32_attr_const(n);
171 if(attr->am_sc != NULL || attr->am_offs != 0)
174 if(attr->am_sc != NULL) {
175 if(attr->data.am_sc_sign) {
178 fputs(get_entity_name(attr->am_sc), F);
180 if(attr->am_offs != 0) {
181 if(attr->am_offs > 0 && attr->am_sc != NULL) {
184 fprintf(F, "%d", attr->am_offs);
187 if(attr->am_sc != NULL || attr->am_offs != 0)
192 case dump_node_mode_txt:
193 if (is_ia32_Ld(n) || is_ia32_St(n)) {
194 mode = get_ia32_ls_mode(n);
195 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
199 case dump_node_nodeattr_txt:
200 if (! is_ia32_Lea(n)) {
201 if (is_ia32_AddrModeS(n)) {
202 fprintf(F, "[AM S] ");
203 } else if (is_ia32_AddrModeD(n)) {
204 fprintf(F, "[AM D] ");
210 case dump_node_info_txt:
211 n_res = get_ia32_n_res(n);
212 fprintf(F, "=== IA32 attr begin ===\n");
214 /* dump IN requirements */
215 if (get_irn_arity(n) > 0) {
216 reqs = get_ia32_in_req_all(n);
217 dump_reg_req(F, n, reqs, 0);
220 /* dump OUT requirements */
222 reqs = get_ia32_out_req_all(n);
223 dump_reg_req(F, n, reqs, 1);
226 /* dump assigned registers */
227 slots = get_ia32_slots(n);
228 if (slots && n_res > 0) {
229 for (i = 0; i < n_res; i++) {
230 const arch_register_t *reg;
234 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
241 switch (get_ia32_op_type(n)) {
243 fprintf(F, "Normal");
246 fprintf(F, "AM Dest (Load+Store)");
249 fprintf(F, "AM Source (Load)");
252 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
257 /* dump supported am */
258 fprintf(F, "AM support = ");
259 switch (get_ia32_am_support(n)) {
264 fprintf(F, "source only (Load)");
267 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
273 if(get_ia32_am_offs_int(n) != 0) {
274 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
277 /* dump AM symconst */
278 if(get_ia32_am_sc(n) != NULL) {
279 ir_entity *ent = get_ia32_am_sc(n);
280 ident *id = get_entity_ld_ident(ent);
281 fprintf(F, "AM symconst = %s\n", get_id_str(id));
285 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
288 if (is_ia32_SwitchJmp(n)) {
289 fprintf(F, "pn_code = %ld\n", get_ia32_condcode(n));
290 } else if (is_ia32_CMov(n) || is_ia32_Set(n) || is_ia32_Jcc(n)) {
291 ia32_attr_t *attr = get_ia32_attr(n);
292 long pnc = get_ia32_condcode(n);
293 fprintf(F, "pn_code = 0x%lX (%s)\n", pnc, get_pnc_string(pnc & pn_Cmp_True));
294 fprintf(F, "ins_permuted = %u \n", attr->data.ins_permuted);
295 fprintf(F, "cmp_unsigned = %u \n", attr->data.cmp_unsigned);
297 else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
298 fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
302 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
305 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
308 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
311 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
314 fprintf(F, "is reload = %d\n", is_ia32_is_reload(n));
317 fprintf(F, "latency = %d\n", get_ia32_latency(n));
320 fprintf(F, "flags =");
321 flags = get_ia32_flags(n);
322 if (flags == arch_irn_flags_none) {
326 if (flags & arch_irn_flags_dont_spill) {
327 fprintf(F, " unspillable");
329 if (flags & arch_irn_flags_rematerializable) {
330 fprintf(F, " remat");
332 if (flags & arch_irn_flags_ignore) {
333 fprintf(F, " ignore");
335 if (flags & arch_irn_flags_modify_sp) {
336 fprintf(F, " modify_sp");
338 if (flags & arch_irn_flags_modify_flags) {
339 fprintf(F, " modify_flags");
342 fprintf(F, " (%d)\n", flags);
344 /* dump frame entity */
345 fprintf(F, "frame entity = ");
346 if (get_ia32_frame_ent(n)) {
347 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
355 fprintf(F, "ls_mode = ");
356 if (get_ia32_ls_mode(n)) {
357 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
365 /* dump original ir node name */
366 fprintf(F, "orig node = ");
367 if (get_ia32_orig_node(n)) {
368 fprintf(F, "%s", get_ia32_orig_node(n));
376 fprintf(F, "=== IA32 attr end ===\n");
377 /* end of: case dump_node_info_txt */
386 /***************************************************************************************************
388 * | | | | | | / / | | | | | | | |
389 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
390 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
391 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
392 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
395 ***************************************************************************************************/
397 ia32_attr_t *get_ia32_attr(ir_node *node) {
398 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
399 return (ia32_attr_t *)get_irn_generic_attr(node);
402 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
403 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
404 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
407 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
408 ia32_attr_t *attr = get_ia32_attr(node);
409 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
413 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
414 const ia32_attr_t *attr = get_ia32_attr_const(node);
415 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
419 const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
420 const ia32_attr_t *attr = get_ia32_attr_const(node);
421 const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
426 ia32_immediate_attr_t *get_ia32_immediate_attr(ir_node *node) {
427 ia32_attr_t *attr = get_ia32_attr(node);
428 ia32_immediate_attr_t *imm_attr = CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
433 const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
435 const ia32_attr_t *attr = get_ia32_attr_const(node);
436 const ia32_immediate_attr_t *imm_attr = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
441 ia32_condcode_attr_t *get_ia32_condcode_attr(ir_node *node) {
442 ia32_attr_t *attr = get_ia32_attr(node);
443 ia32_condcode_attr_t *cc_attr = CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
448 const ia32_condcode_attr_t *get_ia32_condcode_attr_const(const ir_node *node) {
449 const ia32_attr_t *attr = get_ia32_attr_const(node);
450 const ia32_condcode_attr_t *cc_attr = CONST_CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
455 ia32_copyb_attr_t *get_ia32_copyb_attr(ir_node *node) {
456 ia32_attr_t *attr = get_ia32_attr(node);
457 ia32_copyb_attr_t *copyb_attr = CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
462 const ia32_copyb_attr_t *get_ia32_copyb_attr_const(const ir_node *node) {
463 const ia32_attr_t *attr = get_ia32_attr_const(node);
464 const ia32_copyb_attr_t *copyb_attr = CONST_CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
470 * Gets the type of an ia32 node.
472 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
473 const ia32_attr_t *attr = get_ia32_attr_const(node);
474 return attr->data.tp;
478 * Sets the type of an ia32 node.
480 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
481 ia32_attr_t *attr = get_ia32_attr(node);
486 * Gets the supported address mode of an ia32 node
488 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
489 const ia32_attr_t *attr = get_ia32_attr_const(node);
490 return attr->data.am_support;
493 ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
494 const ia32_attr_t *attr = get_ia32_attr_const(node);
495 return attr->data.am_arity;
499 * Sets the supported address mode of an ia32 node
501 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
502 ia32_am_arity_t arity) {
503 ia32_attr_t *attr = get_ia32_attr(node);
504 attr->data.am_support = am_tp;
505 attr->data.am_arity = arity;
507 assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
508 (am_tp != ia32_am_None &&
509 ((arity == ia32_am_unary) || (arity == ia32_am_binary) || (arity == ia32_am_ternary))));
513 * Gets the address mode offset as int.
515 int get_ia32_am_offs_int(const ir_node *node) {
516 const ia32_attr_t *attr = get_ia32_attr_const(node);
517 return attr->am_offs;
521 * Sets the address mode offset from an int.
523 void set_ia32_am_offs_int(ir_node *node, int offset) {
524 ia32_attr_t *attr = get_ia32_attr(node);
525 attr->am_offs = offset;
528 void add_ia32_am_offs_int(ir_node *node, int offset) {
529 ia32_attr_t *attr = get_ia32_attr(node);
530 attr->am_offs += offset;
534 * Returns the symconst entity associated to address mode.
536 ir_entity *get_ia32_am_sc(const ir_node *node) {
537 const ia32_attr_t *attr = get_ia32_attr_const(node);
542 * Sets the symconst entity associated to address mode.
544 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
545 ia32_attr_t *attr = get_ia32_attr(node);
546 attr->am_sc = entity;
550 * Sets the sign bit for address mode symconst.
552 void set_ia32_am_sc_sign(ir_node *node) {
553 ia32_attr_t *attr = get_ia32_attr(node);
554 attr->data.am_sc_sign = 1;
558 * Clears the sign bit for address mode symconst.
560 void clear_ia32_am_sc_sign(ir_node *node) {
561 ia32_attr_t *attr = get_ia32_attr(node);
562 attr->data.am_sc_sign = 0;
566 * Returns the sign bit for address mode symconst.
568 int is_ia32_am_sc_sign(const ir_node *node) {
569 const ia32_attr_t *attr = get_ia32_attr_const(node);
570 return attr->data.am_sc_sign;
574 * Gets the addr mode const.
576 int get_ia32_am_scale(const ir_node *node) {
577 const ia32_attr_t *attr = get_ia32_attr_const(node);
578 return attr->data.am_scale;
582 * Sets the index register scale for address mode.
584 void set_ia32_am_scale(ir_node *node, int scale) {
585 ia32_attr_t *attr = get_ia32_attr(node);
586 assert(0 <= scale && scale < 4 && "AM scale out of range");
587 attr->data.am_scale = scale;
590 void ia32_copy_am_attrs(ir_node *to, const ir_node *from)
592 set_ia32_ls_mode(to, get_ia32_ls_mode(from));
593 set_ia32_am_scale(to, get_ia32_am_scale(from));
594 set_ia32_am_sc(to, get_ia32_am_sc(from));
595 if(is_ia32_am_sc_sign(from))
596 set_ia32_am_sc_sign(to);
597 add_ia32_am_offs_int(to, get_ia32_am_offs_int(from));
598 set_ia32_frame_ent(to, get_ia32_frame_ent(from));
599 if (is_ia32_use_frame(from))
600 set_ia32_use_frame(to);
604 * Sets the uses_frame flag.
606 void set_ia32_use_frame(ir_node *node) {
607 ia32_attr_t *attr = get_ia32_attr(node);
608 attr->data.use_frame = 1;
612 * Clears the uses_frame flag.
614 void clear_ia32_use_frame(ir_node *node) {
615 ia32_attr_t *attr = get_ia32_attr(node);
616 attr->data.use_frame = 0;
620 * Gets the uses_frame flag.
622 int is_ia32_use_frame(const ir_node *node) {
623 const ia32_attr_t *attr = get_ia32_attr_const(node);
624 return attr->data.use_frame;
628 * Sets node to commutative.
630 void set_ia32_commutative(ir_node *node) {
631 ia32_attr_t *attr = get_ia32_attr(node);
632 attr->data.is_commutative = 1;
636 * Sets node to non-commutative.
638 void clear_ia32_commutative(ir_node *node) {
639 ia32_attr_t *attr = get_ia32_attr(node);
640 attr->data.is_commutative = 0;
644 * Checks if node is commutative.
646 int is_ia32_commutative(const ir_node *node) {
647 const ia32_attr_t *attr = get_ia32_attr_const(node);
648 return attr->data.is_commutative;
651 void set_ia32_need_stackent(ir_node *node) {
652 ia32_attr_t *attr = get_ia32_attr(node);
653 attr->data.need_stackent = 1;
656 void clear_ia32_need_stackent(ir_node *node) {
657 ia32_attr_t *attr = get_ia32_attr(node);
658 attr->data.need_stackent = 0;
661 int is_ia32_need_stackent(const ir_node *node) {
662 const ia32_attr_t *attr = get_ia32_attr_const(node);
663 return attr->data.need_stackent;
666 void set_ia32_is_reload(ir_node *node) {
667 ia32_attr_t *attr = get_ia32_attr(node);
668 attr->data.is_reload = 1;
671 int is_ia32_is_reload(const ir_node *node) {
672 const ia32_attr_t *attr = get_ia32_attr_const(node);
673 return attr->data.is_reload;
677 * Gets the mode of the stored/loaded value (only set for Store/Load)
679 ir_mode *get_ia32_ls_mode(const ir_node *node) {
680 const ia32_attr_t *attr = get_ia32_attr_const(node);
681 return attr->ls_mode;
685 * Sets the mode of the stored/loaded value (only set for Store/Load)
687 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
688 ia32_attr_t *attr = get_ia32_attr(node);
689 attr->ls_mode = mode;
693 * Gets the frame entity assigned to this node.
695 ir_entity *get_ia32_frame_ent(const ir_node *node) {
696 const ia32_attr_t *attr = get_ia32_attr_const(node);
697 return attr->frame_ent;
701 * Sets the frame entity for this node.
703 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
704 ia32_attr_t *attr = get_ia32_attr(node);
705 attr->frame_ent = ent;
707 set_ia32_use_frame(node);
709 clear_ia32_use_frame(node);
714 * Gets the instruction latency.
716 unsigned get_ia32_latency(const ir_node *node) {
717 const ir_op *op = get_irn_op(node);
718 const ia32_op_attr_t *op_attr = (ia32_op_attr_t*) get_op_attr(op);
719 return op_attr->latency;
723 * Returns the argument register requirements of an ia32 node.
725 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
726 const ia32_attr_t *attr = get_ia32_attr_const(node);
731 * Sets the argument register requirements of an ia32 node.
733 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
734 ia32_attr_t *attr = get_ia32_attr(node);
739 * Returns the result register requirements of an ia32 node.
741 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
742 const ia32_attr_t *attr = get_ia32_attr_const(node);
743 return attr->out_req;
747 * Sets the result register requirements of an ia32 node.
749 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
750 ia32_attr_t *attr = get_ia32_attr(node);
751 attr->out_req = reqs;
755 * Returns the argument register requirement at position pos of an ia32 node.
757 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
758 const ia32_attr_t *attr = get_ia32_attr_const(node);
759 if(attr->in_req == NULL)
760 return arch_no_register_req;
762 return attr->in_req[pos];
766 * Returns the result register requirement at position pos of an ia32 node.
768 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
769 const ia32_attr_t *attr = get_ia32_attr_const(node);
770 if(attr->out_req == NULL)
771 return arch_no_register_req;
773 return attr->out_req[pos];
777 * Sets the OUT register requirements at position pos.
779 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
780 ia32_attr_t *attr = get_ia32_attr(node);
781 attr->out_req[pos] = req;
785 * Sets the IN register requirements at position pos.
787 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
788 ia32_attr_t *attr = get_ia32_attr(node);
789 attr->in_req[pos] = req;
793 * Returns the register flag of an ia32 node.
795 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
796 const ia32_attr_t *attr = get_ia32_attr_const(node);
797 return attr->data.flags;
801 * Sets the register flag of an ia32 node.
803 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
804 ia32_attr_t *attr = get_ia32_attr(node);
805 attr->data.flags = flags;
808 void add_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
809 ia32_attr_t *attr = get_ia32_attr(node);
810 attr->data.flags |= flags;
814 * Returns the result register slots of an ia32 node.
816 const arch_register_t **get_ia32_slots(const ir_node *node) {
817 const ia32_attr_t *attr = get_ia32_attr_const(node);
822 * Returns the number of results.
824 int get_ia32_n_res(const ir_node *node) {
825 const ia32_attr_t *attr = get_ia32_attr_const(node);
826 return ARR_LEN(attr->slots);
830 * Returns the condition code of a node.
832 long get_ia32_condcode(const ir_node *node)
834 const ia32_condcode_attr_t *attr = get_ia32_condcode_attr_const(node);
835 return attr->pn_code;
839 * Sets the condition code of a node
841 void set_ia32_condcode(ir_node *node, long code)
843 ia32_condcode_attr_t *attr = get_ia32_condcode_attr(node);
844 attr->pn_code = code;
848 * Returns the condition code of a node.
850 unsigned get_ia32_copyb_size(const ir_node *node)
852 const ia32_copyb_attr_t *attr = get_ia32_copyb_attr_const(node);
857 * Sets the flags for the n'th out.
859 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
860 ia32_attr_t *attr = get_ia32_attr(node);
861 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
862 attr->out_flags[pos] = flags;
866 * Gets the flags for the n'th out.
868 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
869 const ia32_attr_t *attr = get_ia32_attr_const(node);
870 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
871 return attr->out_flags[pos];
875 * Get the list of available execution units.
877 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
878 const ia32_attr_t *attr = get_ia32_attr_const(node);
879 return attr->exec_units;
883 * Get the exception label attribute.
885 unsigned get_ia32_exc_label(const ir_node *node) {
886 const ia32_attr_t *attr = get_ia32_attr_const(node);
887 return attr->data.has_except_label;
891 * Set the exception label attribute.
893 void set_ia32_exc_label(ir_node *node, unsigned flag) {
894 ia32_attr_t *attr = get_ia32_attr(node);
895 attr->data.has_except_label = flag;
899 * Return the exception label id.
901 ir_label_t get_ia32_exc_label_id(const ir_node *node) {
902 const ia32_attr_t *attr = get_ia32_attr_const(node);
904 assert(attr->data.has_except_label);
905 return attr->exc_label;
909 * Assign the exception label id.
911 void set_ia32_exc_label_id(ir_node *node, ir_label_t id) {
912 ia32_attr_t *attr = get_ia32_attr(node);
914 assert(attr->data.has_except_label);
915 attr->exc_label = id;
921 * Returns the name of the original ir node.
923 const char *get_ia32_orig_node(const ir_node *node) {
924 const ia32_attr_t *attr = get_ia32_attr_const(node);
925 return attr->orig_node;
929 * Sets the name of the original ir node.
931 void set_ia32_orig_node(ir_node *node, const char *name) {
932 ia32_attr_t *attr = get_ia32_attr(node);
933 attr->orig_node = name;
938 /******************************************************************************************************
940 * (_) | | | | | | / _| | | (_)
941 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
942 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
943 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
944 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
947 ******************************************************************************************************/
950 * Returns whether or not the node is an AddrModeS node.
952 int is_ia32_AddrModeS(const ir_node *node) {
953 const ia32_attr_t *attr = get_ia32_attr_const(node);
954 return (attr->data.tp == ia32_AddrModeS);
958 * Returns whether or not the node is an AddrModeD node.
960 int is_ia32_AddrModeD(const ir_node *node) {
961 const ia32_attr_t *attr = get_ia32_attr_const(node);
962 return (attr->data.tp == ia32_AddrModeD);
966 * Checks if node is a Load or xLoad/vfLoad.
968 int is_ia32_Ld(const ir_node *node) {
969 int op = get_ia32_irn_opcode(node);
970 return op == iro_ia32_Load ||
971 op == iro_ia32_xLoad ||
972 op == iro_ia32_vfld ||
977 * Checks if node is a Store or xStore/vfStore.
979 int is_ia32_St(const ir_node *node) {
980 int op = get_ia32_irn_opcode(node);
981 return op == iro_ia32_Store ||
982 op == iro_ia32_Store8Bit ||
983 op == iro_ia32_xStore ||
984 op == iro_ia32_vfst ||
985 op == iro_ia32_fst ||
990 * Returns the name of the OUT register at position pos.
992 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
993 const ia32_attr_t *attr = get_ia32_attr_const(node);
995 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
996 assert(attr->slots[pos] && "No register assigned");
998 return arch_register_get_name(attr->slots[pos]);
1002 * Returns the index of the OUT register at position pos within its register class.
1004 int get_ia32_out_regnr(const ir_node *node, int pos) {
1005 const ia32_attr_t *attr = get_ia32_attr_const(node);
1007 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1008 assert(attr->slots[pos] && "No register assigned");
1010 return arch_register_get_index(attr->slots[pos]);
1013 void ia32_swap_left_right(ir_node *node)
1015 ia32_attr_t *attr = get_ia32_attr(node);
1016 ir_node *left = get_irn_n(node, n_ia32_binary_left);
1017 ir_node *right = get_irn_n(node, n_ia32_binary_right);
1019 assert(is_ia32_commutative(node));
1020 attr->data.ins_permuted = !attr->data.ins_permuted;
1021 set_irn_n(node, n_ia32_binary_left, right);
1022 set_irn_n(node, n_ia32_binary_right, left);
1026 * Returns the OUT register at position pos.
1028 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
1029 const ia32_attr_t *attr = get_ia32_attr_const(node);
1031 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
1032 assert(attr->slots[pos] && "No register assigned");
1034 return attr->slots[pos];
1038 * Initializes the nodes attributes.
1040 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1041 const arch_register_req_t **in_reqs,
1042 const arch_register_req_t **out_reqs,
1043 const be_execution_unit_t ***execution_units,
1046 ir_graph *irg = get_irn_irg(node);
1047 struct obstack *obst = get_irg_obstack(irg);
1048 ia32_attr_t *attr = get_ia32_attr(node);
1050 set_ia32_flags(node, flags);
1051 set_ia32_in_req_all(node, in_reqs);
1052 set_ia32_out_req_all(node, out_reqs);
1054 attr->exec_units = execution_units;
1056 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1059 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1060 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1062 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
1063 /* void* cast to suppress an incorrect warning on MSVC */
1064 memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0]));
1068 init_ia32_x87_attributes(ir_node *res)
1071 ia32_attr_t *attr = get_ia32_attr(res);
1072 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1076 ia32_current_cg->do_x87_sim = 1;
1080 init_ia32_asm_attributes(ir_node *res)
1083 ia32_attr_t *attr = get_ia32_attr(res);
1084 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1091 init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
1092 int symconst_sign, long offset)
1094 ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
1097 attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
1099 attr->symconst = symconst;
1100 attr->sc_sign = symconst_sign;
1101 attr->offset = offset;
1105 init_ia32_copyb_attributes(ir_node *res, unsigned size) {
1106 ia32_copyb_attr_t *attr = get_irn_generic_attr(res);
1109 attr->attr.attr_type |= IA32_ATTR_ia32_copyb_attr_t;
1115 init_ia32_condcode_attributes(ir_node *res, long pnc) {
1116 ia32_condcode_attr_t *attr = get_irn_generic_attr(res);
1119 attr->attr.attr_type |= IA32_ATTR_ia32_condcode_attr_t;
1121 attr->pn_code = pnc;
1124 ir_node *get_ia32_result_proj(const ir_node *node)
1126 const ir_edge_t *edge;
1128 foreach_out_edge(node, edge) {
1129 ir_node *proj = get_edge_src_irn(edge);
1130 if(get_Proj_proj(proj) == 0) {
1137 /***************************************************************************************
1140 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1141 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1142 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1143 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1145 ***************************************************************************************/
1147 /* default compare operation to compare attributes */
1148 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1149 if (a->data.tp != b->data.tp)
1152 if (a->data.am_scale != b->data.am_scale
1153 || a->data.am_sc_sign != b->data.am_sc_sign
1154 || a->am_offs != b->am_offs
1155 || a->am_sc != b->am_sc
1156 || a->ls_mode != b->ls_mode)
1159 /* nodes with not yet assigned entities shouldn't be CSEd (important for
1160 * unsigned int -> double conversions */
1161 if(a->data.use_frame && a->frame_ent == NULL)
1163 if(b->data.use_frame && b->frame_ent == NULL)
1166 if (a->data.use_frame != b->data.use_frame
1167 || a->frame_ent != b->frame_ent)
1170 if (a->data.tp != b->data.tp)
1173 if (a->data.has_except_label != b->data.has_except_label)
1176 if (a->data.ins_permuted != b->data.ins_permuted
1177 || a->data.cmp_unsigned != b->data.cmp_unsigned)
1183 /** Compare nodes attributes for all "normal" nodes. */
1185 int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
1187 const ia32_attr_t* attr_a = get_ia32_attr_const(a);
1188 const ia32_attr_t* attr_b = get_ia32_attr_const(b);
1190 return ia32_compare_attr(attr_a, attr_b);
1193 /** Compare node attributes for nodes with condition code. */
1195 int ia32_compare_condcode_attr(ir_node *a, ir_node *b)
1197 const ia32_condcode_attr_t *attr_a;
1198 const ia32_condcode_attr_t *attr_b;
1200 if (ia32_compare_nodes_attr(a, b))
1203 attr_a = get_ia32_condcode_attr_const(a);
1204 attr_b = get_ia32_condcode_attr_const(b);
1206 if(attr_a->pn_code != attr_b->pn_code)
1212 /** Compare node attributes for CopyB nodes. */
1214 int ia32_compare_copyb_attr(ir_node *a, ir_node *b)
1216 const ia32_copyb_attr_t *attr_a;
1217 const ia32_copyb_attr_t *attr_b;
1219 if (ia32_compare_nodes_attr(a, b))
1222 attr_a = get_ia32_copyb_attr_const(a);
1223 attr_b = get_ia32_copyb_attr_const(b);
1225 if(attr_a->size != attr_b->size)
1232 /** Compare ASM node attributes. */
1234 int ia32_compare_asm_attr(ir_node *a, ir_node *b)
1236 const ia32_asm_attr_t *attr_a;
1237 const ia32_asm_attr_t *attr_b;
1239 if(ia32_compare_nodes_attr(a, b))
1242 attr_a = get_ia32_asm_attr_const(a);
1243 attr_b = get_ia32_asm_attr_const(b);
1245 if(attr_a->asm_text != attr_b->asm_text)
1252 * Hash function for Immediates
1254 static unsigned ia32_hash_Immediate(const ir_node *irn) {
1255 const ia32_immediate_attr_t *a = get_ia32_immediate_attr_const(irn);
1257 return HASH_PTR(a->symconst) + (a->sc_sign << 16) + a->offset;
1260 /** Compare node attributes for Immediates. */
1262 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
1264 const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
1265 const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
1267 if(attr_a->symconst != attr_b->symconst ||
1268 attr_a->sc_sign != attr_b->sc_sign ||
1269 attr_a->offset != attr_b->offset)
1275 /** Compare node attributes for x87 nodes. */
1277 int ia32_compare_x87_attr(ir_node *a, ir_node *b)
1279 return ia32_compare_nodes_attr(a, b);
1283 /* copies the ia32 attributes */
1284 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1286 ir_graph *irg = get_irn_irg(new_node);
1287 struct obstack *obst = get_irg_obstack(irg);
1288 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1289 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1291 /* copy the attributes */
1292 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1294 /* copy out flags */
1295 attr_new->out_flags =
1296 DUP_ARR_D(int, obst, attr_old->out_flags);
1297 /* copy register assignments */
1299 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
1302 /* Include the generated constructor functions */
1303 #include "gen_ia32_new_nodes.c.inl"