2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the coresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
59 * returns true if a node has x87 registers
61 int ia32_has_x87_register(const ir_node *n) {
62 assert(is_ia32_irn(n) && "Need ia32 node.");
63 return is_irn_machine_user(n, 0);
66 /***********************************************************************************
69 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
70 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
71 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
72 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
75 ***********************************************************************************/
78 * Dumps the register requirements for either in or out.
80 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
82 char *dir = inout ? "out" : "in";
83 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
87 memset(buf, 0, sizeof(buf));
90 for (i = 0; i < max; i++) {
91 fprintf(F, "%sreq #%d =", dir, i);
93 if (reqs[i]->type == arch_register_req_type_none) {
97 if (reqs[i]->type & arch_register_req_type_normal) {
98 fprintf(F, " %s", reqs[i]->cls->name);
101 if (reqs[i]->type & arch_register_req_type_limited) {
103 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
106 if (reqs[i]->type & arch_register_req_type_should_be_same) {
107 ir_fprintf(F, " same as %+F", get_irn_n(n, reqs[i]->other_same));
110 if (reqs[i]->type & arch_register_req_type_should_be_different) {
111 ir_fprintf(F, " different from %+F", get_irn_n(n, reqs[i]->other_different));
120 fprintf(F, "%sreq = N/A\n", dir);
125 * Dumper interface for dumping ia32 nodes in vcg.
126 * @param n the node to dump
127 * @param F the output file
128 * @param reason indicates which kind of information should be dumped
129 * @return 0 on success or != 0 on failure
131 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
132 ir_mode *mode = NULL;
134 int i, n_res, am_flav, flags;
135 const arch_register_req_t **reqs;
136 const arch_register_t **slots;
139 case dump_node_opcode_txt:
140 fprintf(F, "%s", get_irn_opname(n));
143 case dump_node_mode_txt:
144 mode = get_irn_mode(n);
146 if (is_ia32_Ld(n) || is_ia32_St(n)) {
147 mode = get_ia32_ls_mode(n);
150 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
153 case dump_node_nodeattr_txt:
154 if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
155 if(is_ia32_ImmSymConst(n)) {
156 ir_entity *ent = get_ia32_Immop_symconst(n);
157 ident *id = get_entity_ld_ident(ent);
158 fprintf(F, "[SymC %s]", get_id_str(id));
161 tarval *tv = get_ia32_Immop_tarval(n);
163 tarval_snprintf(buf, sizeof(buf), tv);
164 fprintf(F, "[%s]", buf);
168 if (! is_ia32_Lea(n)) {
169 if (is_ia32_AddrModeS(n)) {
170 fprintf(F, "[AM S] ");
172 else if (is_ia32_AddrModeD(n)) {
173 fprintf(F, "[AM D] ");
179 case dump_node_info_txt:
180 n_res = get_ia32_n_res(n);
181 fprintf(F, "=== IA32 attr begin ===\n");
183 /* dump IN requirements */
184 if (get_irn_arity(n) > 0) {
185 reqs = get_ia32_in_req_all(n);
186 dump_reg_req(F, n, reqs, 0);
189 /* dump OUT requirements */
191 reqs = get_ia32_out_req_all(n);
192 dump_reg_req(F, n, reqs, 1);
195 /* dump assigned registers */
196 slots = get_ia32_slots(n);
197 if (slots && n_res > 0) {
198 for (i = 0; i < n_res; i++) {
199 const arch_register_t *reg;
201 /* retrieve "real" x87 register */
202 if (ia32_has_x87_register(n))
203 reg = get_ia32_attr(n)->x87[i + 2];
207 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
214 switch (get_ia32_op_type(n)) {
216 fprintf(F, "Normal");
219 fprintf(F, "AM Dest (Load+Store)");
222 fprintf(F, "AM Source (Load)");
225 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
230 /* dump immop type */
231 fprintf(F, "immediate = ");
232 switch (get_ia32_immop_type(n)) {
239 case ia32_ImmSymConst:
240 fprintf(F, "SymConst");
243 fprintf(F, "unknown (%d)", get_ia32_immop_type(n));
248 /* dump supported am */
249 fprintf(F, "AM support = ");
250 switch (get_ia32_am_support(n)) {
255 fprintf(F, "source only (Load)");
258 fprintf(F, "dest only (Load+Store)");
264 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
269 /* dump am flavour */
270 fprintf(F, "AM flavour =");
271 am_flav = get_ia32_am_flavour(n);
272 if (am_flav == ia32_am_N) {
276 if (am_flav & ia32_O) {
279 if (am_flav & ia32_B) {
282 if (am_flav & ia32_I) {
285 if (am_flav & ia32_S) {
289 fprintf(F, " (%d)\n", am_flav);
292 if(get_ia32_am_offs_int(n) != 0) {
293 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
296 /* dump AM symconst */
297 if(get_ia32_am_sc(n) != NULL) {
298 ir_entity *ent = get_ia32_am_sc(n);
299 ident *id = get_entity_ld_ident(ent);
300 fprintf(F, "AM symconst = %s\n", get_id_str(id));
304 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
307 if(get_ia32_pncode(n) & ia32_pn_Cmp_Unsigned) {
308 fprintf(F, "pn_code = %d (%s, unsigned)\n", get_ia32_pncode(n),
309 get_pnc_string(get_ia32_pncode(n) & ~ia32_pn_Cmp_Unsigned));
311 fprintf(F, "pn_code = %d (%s)\n", get_ia32_pncode(n),
312 get_pnc_string(get_ia32_pncode(n)));
316 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
319 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
322 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
325 fprintf(F, "emit cl instead of ecx = %d\n", is_ia32_emit_cl(n));
328 fprintf(F, "got loea = %d\n", is_ia32_got_lea(n));
331 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
334 fprintf(F, "latency = %d\n", get_ia32_latency(n));
337 fprintf(F, "flags =");
338 flags = get_ia32_flags(n);
339 if (flags == arch_irn_flags_none) {
343 if (flags & arch_irn_flags_dont_spill) {
344 fprintf(F, " unspillable");
346 if (flags & arch_irn_flags_rematerializable) {
347 fprintf(F, " remat");
349 if (flags & arch_irn_flags_ignore) {
350 fprintf(F, " ignore");
352 if (flags & arch_irn_flags_modify_sp) {
353 fprintf(F, " modify_sp");
356 fprintf(F, " (%d)\n", flags);
358 /* dump frame entity */
359 fprintf(F, "frame entity = ");
360 if (get_ia32_frame_ent(n)) {
361 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
369 fprintf(F, "ls_mode = ");
370 if (get_ia32_ls_mode(n)) {
371 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
379 /* dump original ir node name */
380 fprintf(F, "orig node = ");
381 if (get_ia32_orig_node(n)) {
382 fprintf(F, "%s", get_ia32_orig_node(n));
390 fprintf(F, "=== IA32 attr end ===\n");
391 /* end of: case dump_node_info_txt */
400 /***************************************************************************************************
402 * | | | | | | / / | | | | | | | |
403 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
404 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
405 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
406 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
409 ***************************************************************************************************/
412 * Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast.
413 * Firm was made by people hating const :-(
415 ia32_attr_t *get_ia32_attr(const ir_node *node) {
416 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
417 return (ia32_attr_t *)get_irn_generic_attr((ir_node *)node);
421 * Gets the type of an ia32 node.
423 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
424 ia32_attr_t *attr = get_ia32_attr(node);
425 return attr->data.tp;
429 * Sets the type of an ia32 node.
431 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
432 ia32_attr_t *attr = get_ia32_attr(node);
437 * Gets the immediate op type of an ia32 node.
439 ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
440 ia32_attr_t *attr = get_ia32_attr(node);
441 return attr->data.imm_tp;
445 * Gets the supported addrmode of an ia32 node
447 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
448 ia32_attr_t *attr = get_ia32_attr(node);
449 return attr->data.am_support;
453 * Sets the supported addrmode of an ia32 node
455 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) {
456 ia32_attr_t *attr = get_ia32_attr(node);
457 attr->data.am_support = am_tp;
461 * Gets the addrmode flavour of an ia32 node
463 ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) {
464 ia32_attr_t *attr = get_ia32_attr(node);
465 return attr->data.am_flavour;
469 * Sets the addrmode flavour of an ia32 node
471 void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) {
472 ia32_attr_t *attr = get_ia32_attr(node);
473 attr->data.am_flavour = am_flavour;
477 * Gets the addressmode offset as int.
479 int get_ia32_am_offs_int(const ir_node *node) {
480 ia32_attr_t *attr = get_ia32_attr(node);
481 return attr->am_offs;
485 * Sets the addressmode offset from an int.
487 void set_ia32_am_offs_int(ir_node *node, int offset) {
488 ia32_attr_t *attr = get_ia32_attr(node);
489 attr->am_offs = offset;
492 void add_ia32_am_offs_int(ir_node *node, int offset) {
493 ia32_attr_t *attr = get_ia32_attr(node);
494 attr->am_offs += offset;
498 * Returns the symconst entity associated to addrmode.
500 ir_entity *get_ia32_am_sc(const ir_node *node) {
501 ia32_attr_t *attr = get_ia32_attr(node);
506 * Sets the symconst entity associated to addrmode.
508 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
509 ia32_attr_t *attr = get_ia32_attr(node);
510 attr->am_sc = entity;
514 * Sets the sign bit for address mode symconst.
516 void set_ia32_am_sc_sign(ir_node *node) {
517 ia32_attr_t *attr = get_ia32_attr(node);
518 attr->data.am_sc_sign = 1;
522 * Clears the sign bit for address mode symconst.
524 void clear_ia32_am_sc_sign(ir_node *node) {
525 ia32_attr_t *attr = get_ia32_attr(node);
526 attr->data.am_sc_sign = 0;
530 * Returns the sign bit for address mode symconst.
532 int is_ia32_am_sc_sign(const ir_node *node) {
533 ia32_attr_t *attr = get_ia32_attr(node);
534 return attr->data.am_sc_sign;
538 * Gets the addr mode const.
540 int get_ia32_am_scale(const ir_node *node) {
541 ia32_attr_t *attr = get_ia32_attr(node);
542 return attr->data.am_scale;
546 * Sets the index register scale for addrmode.
548 void set_ia32_am_scale(ir_node *node, int scale) {
549 ia32_attr_t *attr = get_ia32_attr(node);
550 attr->data.am_scale = scale;
554 * Return the tarval of an immediate operation or NULL in case of SymConst
556 tarval *get_ia32_Immop_tarval(const ir_node *node) {
557 ia32_attr_t *attr = get_ia32_attr(node);
558 assert(attr->data.imm_tp == ia32_ImmConst);
559 return attr->cnst_val.tv;
563 * Sets the attributes of an immediate operation to the specified tarval
565 void set_ia32_Immop_tarval(ir_node *node, tarval *tv) {
566 ia32_attr_t *attr = get_ia32_attr(node);
567 attr->data.imm_tp = ia32_ImmConst;
568 attr->cnst_val.tv = tv;
571 void set_ia32_Immop_symconst(ir_node *node, ir_entity *entity) {
572 ia32_attr_t *attr = get_ia32_attr(node);
573 attr->data.imm_tp = ia32_ImmSymConst;
574 attr->cnst_val.sc = entity;
577 ir_entity *get_ia32_Immop_symconst(const ir_node *node) {
578 ia32_attr_t *attr = get_ia32_attr(node);
579 assert(attr->data.imm_tp == ia32_ImmSymConst);
580 return attr->cnst_val.sc;
584 * Sets the uses_frame flag.
586 void set_ia32_use_frame(ir_node *node) {
587 ia32_attr_t *attr = get_ia32_attr(node);
588 attr->data.use_frame = 1;
592 * Clears the uses_frame flag.
594 void clear_ia32_use_frame(ir_node *node) {
595 ia32_attr_t *attr = get_ia32_attr(node);
596 attr->data.use_frame = 0;
600 * Gets the uses_frame flag.
602 int is_ia32_use_frame(const ir_node *node) {
603 ia32_attr_t *attr = get_ia32_attr(node);
604 return attr->data.use_frame;
608 * Sets node to commutative.
610 void set_ia32_commutative(ir_node *node) {
611 ia32_attr_t *attr = get_ia32_attr(node);
612 attr->data.is_commutative = 1;
616 * Sets node to non-commutative.
618 void clear_ia32_commutative(ir_node *node) {
619 ia32_attr_t *attr = get_ia32_attr(node);
620 attr->data.is_commutative = 0;
624 * Checks if node is commutative.
626 int is_ia32_commutative(const ir_node *node) {
627 ia32_attr_t *attr = get_ia32_attr(node);
628 return attr->data.is_commutative;
634 void set_ia32_emit_cl(ir_node *node) {
635 ia32_attr_t *attr = get_ia32_attr(node);
636 attr->data.emit_cl = 1;
640 * Clears node emit_cl.
642 void clear_ia32_emit_cl(ir_node *node) {
643 ia32_attr_t *attr = get_ia32_attr(node);
644 attr->data.emit_cl = 0;
648 * Checks if node needs %cl.
650 int is_ia32_emit_cl(const ir_node *node) {
651 ia32_attr_t *attr = get_ia32_attr(node);
652 return attr->data.emit_cl;
658 void set_ia32_got_lea(ir_node *node) {
659 ia32_attr_t *attr = get_ia32_attr(node);
660 attr->data.got_lea = 1;
664 * Clears node got_lea.
666 void clear_ia32_got_lea(ir_node *node) {
667 ia32_attr_t *attr = get_ia32_attr(node);
668 attr->data.got_lea = 0;
672 * Checks if node got lea.
674 int is_ia32_got_lea(const ir_node *node) {
675 ia32_attr_t *attr = get_ia32_attr(node);
676 return attr->data.got_lea;
679 void set_ia32_need_stackent(ir_node *node) {
680 ia32_attr_t *attr = get_ia32_attr(node);
681 attr->data.need_stackent = 1;
684 void clear_ia32_need_stackent(ir_node *node) {
685 ia32_attr_t *attr = get_ia32_attr(node);
686 attr->data.need_stackent = 0;
689 int is_ia32_need_stackent(const ir_node *node) {
690 ia32_attr_t *attr = get_ia32_attr(node);
691 return attr->data.need_stackent;
695 * Gets the mode of the stored/loaded value (only set for Store/Load)
697 ir_mode *get_ia32_ls_mode(const ir_node *node) {
698 ia32_attr_t *attr = get_ia32_attr(node);
699 return attr->ls_mode;
703 * Sets the mode of the stored/loaded value (only set for Store/Load)
705 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
706 ia32_attr_t *attr = get_ia32_attr(node);
707 attr->ls_mode = mode;
711 * Gets the frame entity assigned to this node.
713 ir_entity *get_ia32_frame_ent(const ir_node *node) {
714 ia32_attr_t *attr = get_ia32_attr(node);
715 return attr->frame_ent;
719 * Sets the frame entity for this node.
721 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
722 ia32_attr_t *attr = get_ia32_attr(node);
723 attr->frame_ent = ent;
725 set_ia32_use_frame(node);
727 clear_ia32_use_frame(node);
732 * Gets the instruction latency.
734 unsigned get_ia32_latency(const ir_node *node) {
735 ia32_attr_t *attr = get_ia32_attr(node);
736 return attr->latency;
740 * Sets the instruction latency.
742 void set_ia32_latency(ir_node *node, unsigned latency) {
743 ia32_attr_t *attr = get_ia32_attr(node);
744 attr->latency = latency;
748 * Returns the argument register requirements of an ia32 node.
750 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
751 ia32_attr_t *attr = get_ia32_attr(node);
756 * Sets the argument register requirements of an ia32 node.
758 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
759 ia32_attr_t *attr = get_ia32_attr(node);
764 * Returns the result register requirements of an ia32 node.
766 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
767 ia32_attr_t *attr = get_ia32_attr(node);
768 return attr->out_req;
772 * Sets the result register requirements of an ia32 node.
774 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
775 ia32_attr_t *attr = get_ia32_attr(node);
776 attr->out_req = reqs;
780 * Returns the argument register requirement at position pos of an ia32 node.
782 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
783 ia32_attr_t *attr = get_ia32_attr(node);
784 if(attr->in_req == NULL)
785 return arch_no_register_req;
787 return attr->in_req[pos];
791 * Returns the result register requirement at position pos of an ia32 node.
793 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
794 ia32_attr_t *attr = get_ia32_attr(node);
795 if(attr->out_req == NULL)
796 return arch_no_register_req;
798 return attr->out_req[pos];
802 * Sets the OUT register requirements at position pos.
804 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
805 ia32_attr_t *attr = get_ia32_attr(node);
806 attr->out_req[pos] = req;
810 * Sets the IN register requirements at position pos.
812 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
813 ia32_attr_t *attr = get_ia32_attr(node);
814 attr->in_req[pos] = req;
818 * Returns the register flag of an ia32 node.
820 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
821 ia32_attr_t *attr = get_ia32_attr(node);
822 return attr->data.flags;
826 * Sets the register flag of an ia32 node.
828 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
829 ia32_attr_t *attr = get_ia32_attr(node);
830 attr->data.flags = flags;
834 * Returns the result register slots of an ia32 node.
836 const arch_register_t **get_ia32_slots(const ir_node *node) {
837 ia32_attr_t *attr = get_ia32_attr(node);
842 * Sets the number of results.
844 void set_ia32_n_res(ir_node *node, int n_res) {
845 ia32_attr_t *attr = get_ia32_attr(node);
846 attr->data.n_res = n_res;
850 * Returns the number of results.
852 int get_ia32_n_res(const ir_node *node) {
853 ia32_attr_t *attr = get_ia32_attr(node);
854 return attr->data.n_res;
858 * Returns the flavour of an ia32 node,
860 ia32_op_flavour_t get_ia32_flavour(const ir_node *node) {
861 ia32_attr_t *attr = get_ia32_attr(node);
862 return attr->data.op_flav;
866 * Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
868 void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) {
869 ia32_attr_t *attr = get_ia32_attr(node);
870 attr->data.op_flav = op_flav;
874 * Returns the projnum code.
876 pn_Cmp get_ia32_pncode(const ir_node *node) {
877 ia32_attr_t *attr = get_ia32_attr(node);
878 return attr->pn_code;
882 * Sets the projnum code
884 void set_ia32_pncode(ir_node *node, pn_Cmp code) {
885 ia32_attr_t *attr = get_ia32_attr(node);
886 attr->pn_code = code;
890 * Sets the flags for the n'th out.
892 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
893 ia32_attr_t *attr = get_ia32_attr(node);
894 assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
895 attr->out_flags[pos] = flags;
899 * Gets the flags for the n'th out.
901 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
902 ia32_attr_t *attr = get_ia32_attr(node);
903 return pos < (int)attr->data.n_res ? attr->out_flags[pos] : arch_irn_flags_none;
907 * Get the list of available execution units.
909 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
910 ia32_attr_t *attr = get_ia32_attr(node);
911 return attr->exec_units;
917 * Returns the name of the original ir node.
919 const char *get_ia32_orig_node(const ir_node *node) {
920 ia32_attr_t *attr = get_ia32_attr(node);
921 return attr->orig_node;
925 * Sets the name of the original ir node.
927 void set_ia32_orig_node(ir_node *node, const char *name) {
928 ia32_attr_t *attr = get_ia32_attr(node);
929 attr->orig_node = name;
934 /******************************************************************************************************
936 * (_) | | | | | | / _| | | (_)
937 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
938 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
939 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
940 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
943 ******************************************************************************************************/
946 * Copy the attributes from an ia32_Const to an Immop (Add_i, Sub_i, ...) node
948 void copy_ia32_Immop_attr(ir_node *node, ir_node *from) {
949 ia32_immop_type_t immop_type = get_ia32_immop_type(from);
951 if(immop_type == ia32_ImmConst) {
952 set_ia32_Immop_tarval(node, get_ia32_Immop_tarval(from));
953 } else if(immop_type == ia32_ImmSymConst) {
954 set_ia32_Immop_symconst(node, get_ia32_Immop_symconst(from));
956 ia32_attr_t *attr = get_ia32_attr(node);
957 assert(immop_type == ia32_ImmNone);
958 attr->data.imm_tp = ia32_ImmNone;
963 * Copy the attributes from a Firm Const/SymConst to an ia32_Const
965 void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst) {
966 assert(is_ia32_Cnst(ia32_cnst) && "Need ia32_Const to set Const attr");
968 switch (get_irn_opcode(cnst)) {
970 set_ia32_Const_tarval(ia32_cnst, get_Const_tarval(cnst));
973 assert(get_SymConst_kind(cnst) == symconst_addr_ent);
974 set_ia32_Immop_symconst(ia32_cnst, get_SymConst_entity(cnst));
977 assert(0 && "Unknown Const NYI");
980 assert(0 && "Cannot create ia32_Const for this opcode");
984 void set_ia32_Const_tarval(ir_node *ia32_cnst, tarval *tv) {
985 if(mode_is_reference(get_tarval_mode(tv))) {
986 if(tarval_is_null(tv)) {
987 tv = get_tarval_null(mode_Iu);
989 panic("Can't convert reference tarval to mode_Iu at %+F", ia32_cnst);
992 tv = tarval_convert_to(tv, mode_Iu);
995 assert(tv != get_tarval_bad() && tv != get_tarval_undefined()
997 set_ia32_Immop_tarval(ia32_cnst, tv);
1002 * Sets the AddrMode(S|D) attribute
1004 void set_ia32_AddrMode(ir_node *node, char direction) {
1005 ia32_attr_t *attr = get_ia32_attr(node);
1007 switch (direction) {
1009 attr->data.tp = ia32_AddrModeD;
1012 attr->data.tp = ia32_AddrModeS;
1015 assert(0 && "wrong AM type");
1020 * Returns whether or not the node is an immediate operation with Const.
1022 int is_ia32_ImmConst(const ir_node *node) {
1023 ia32_attr_t *attr = get_ia32_attr(node);
1024 return (attr->data.imm_tp == ia32_ImmConst);
1028 * Returns whether or not the node is an immediate operation with SymConst.
1030 int is_ia32_ImmSymConst(const ir_node *node) {
1031 ia32_attr_t *attr = get_ia32_attr(node);
1032 return (attr->data.imm_tp == ia32_ImmSymConst);
1036 * Returns whether or not the node is an AddrModeS node.
1038 int is_ia32_AddrModeS(const ir_node *node) {
1039 ia32_attr_t *attr = get_ia32_attr(node);
1040 return (attr->data.tp == ia32_AddrModeS);
1044 * Returns whether or not the node is an AddrModeD node.
1046 int is_ia32_AddrModeD(const ir_node *node) {
1047 ia32_attr_t *attr = get_ia32_attr(node);
1048 return (attr->data.tp == ia32_AddrModeD);
1052 * Checks if node is a Load or xLoad/vfLoad.
1054 int is_ia32_Ld(const ir_node *node) {
1055 int op = get_ia32_irn_opcode(node);
1056 return op == iro_ia32_Load || op == iro_ia32_xLoad || op == iro_ia32_vfld || op == iro_ia32_fld;
1060 * Checks if node is a Store or xStore/vfStore.
1062 int is_ia32_St(const ir_node *node) {
1063 int op = get_ia32_irn_opcode(node);
1064 return op == iro_ia32_Store || op == iro_ia32_xStore || op == iro_ia32_vfst || op == iro_ia32_fst || op == iro_ia32_fstp;
1068 * Checks if node is a Const or xConst/vfConst.
1070 int is_ia32_Cnst(const ir_node *node) {
1071 int op = get_ia32_irn_opcode(node);
1072 return op == iro_ia32_Const || op == iro_ia32_xConst || op == iro_ia32_vfConst;
1076 * Returns the name of the OUT register at position pos.
1078 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
1079 ia32_attr_t *attr = get_ia32_attr(node);
1081 assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
1082 assert(attr->slots[pos] && "No register assigned");
1084 return arch_register_get_name(attr->slots[pos]);
1088 * Returns the index of the OUT register at position pos within its register class.
1090 int get_ia32_out_regnr(const ir_node *node, int pos) {
1091 ia32_attr_t *attr = get_ia32_attr(node);
1093 assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
1094 assert(attr->slots[pos] && "No register assigned");
1096 return arch_register_get_index(attr->slots[pos]);
1100 * Returns the OUT register at position pos.
1102 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
1103 ia32_attr_t *attr = get_ia32_attr(node);
1105 assert(pos < (int) attr->data.n_res && "Invalid OUT position.");
1106 assert(attr->slots[pos] && "No register assigned");
1108 return attr->slots[pos];
1112 * Initializes the nodes attributes.
1114 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1115 const arch_register_req_t **in_reqs,
1116 const arch_register_req_t **out_reqs,
1117 const be_execution_unit_t ***execution_units,
1118 int n_res, unsigned latency)
1120 ia32_attr_t *attr = get_ia32_attr(node);
1122 set_ia32_flags(node, flags);
1123 set_ia32_in_req_all(node, in_reqs);
1124 set_ia32_out_req_all(node, out_reqs);
1125 set_ia32_latency(node, latency);
1126 set_ia32_n_res(node, n_res);
1128 attr->exec_units = execution_units;
1130 attr->out_flags = NEW_ARR_D(int, get_irg_obstack(get_irn_irg(node)), n_res);
1131 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1133 memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
1136 ir_node *get_ia32_result_proj(const ir_node *node)
1138 const ir_edge_t *edge;
1140 foreach_out_edge(node, edge) {
1141 ir_node *proj = get_edge_src_irn(edge);
1142 if(get_Proj_proj(proj) == 0) {
1149 /***************************************************************************************
1152 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1153 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1154 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1155 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1157 ***************************************************************************************/
1159 /* default compare operation to compare attributes */
1160 int ia32_compare_attr(ia32_attr_t *a, ia32_attr_t *b) {
1161 if (a->data.tp != b->data.tp
1162 || a->data.imm_tp != b->data.imm_tp)
1165 if (a->data.imm_tp == ia32_ImmConst
1166 && a->cnst_val.tv != b->cnst_val.tv)
1169 if (a->data.imm_tp == ia32_ImmSymConst
1170 && a->cnst_val.sc != b->cnst_val.sc)
1173 if (a->data.am_flavour != b->data.am_flavour
1174 || a->data.am_scale != b->data.am_scale
1175 || a->data.offs_sign != b->data.offs_sign
1176 || a->data.am_sc_sign != b->data.am_sc_sign
1177 || a->am_offs != b->am_offs
1178 || a->am_sc != b->am_sc
1179 || a->ls_mode != b->ls_mode)
1182 if (a->data.use_frame != b->data.use_frame
1183 || a->data.use_frame != b->data.use_frame
1184 || a->frame_ent != b->frame_ent)
1187 if(a->pn_code != b->pn_code)
1190 if (a->data.tp != b->data.tp
1191 || a->data.op_flav != b->data.op_flav)
1197 /* copies the ia32 attributes */
1198 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) {
1199 ia32_attr_t *attr_old = get_ia32_attr(old_node);
1200 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1202 /* copy the attributes */
1203 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1205 /* copy out flags */
1206 attr_new->out_flags =
1207 DUP_ARR_D(int, get_irg_obstack(get_irn_irg(new_node)), attr_old->out_flags);
1211 * Registers the ia32_copy_attr function for all ia32 opcodes.
1213 void ia32_register_copy_attr_func(void) {
1214 unsigned i, f = get_ia32_opcode_first(), l = get_ia32_opcode_last();
1216 for (i = f; i < l; i++) {
1217 ir_op *op = get_irp_opcode(i);
1218 op->ops.copy_attr = ia32_copy_attr;
1222 /* Include the generated constructor functions */
1223 #include "gen_ia32_new_nodes.c.inl"