2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Handling of ia32 specific firm opcodes.
23 * @author Christian Wuerdig
26 * This file implements the creation of the achitecture specific firm opcodes
27 * and the corresponding node constructors for the ia32 assembler irg.
36 #include "irgraph_t.h"
42 #include "firm_common_t.h"
47 #include "raw_bitset.h"
50 #include "../bearch_t.h"
52 #include "bearch_ia32_t.h"
53 #include "ia32_nodes_attr.h"
54 #include "ia32_new_nodes.h"
55 #include "gen_ia32_regalloc_if.h"
56 #include "gen_ia32_machine.h"
58 /***********************************************************************************
61 * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
62 * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
63 * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
64 * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
67 ***********************************************************************************/
70 * Dumps the register requirements for either in or out.
72 static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
74 char *dir = inout ? "out" : "in";
75 int max = inout ? get_ia32_n_res(n) : get_irn_arity(n);
79 memset(buf, 0, sizeof(buf));
82 for (i = 0; i < max; i++) {
83 fprintf(F, "%sreq #%d =", dir, i);
85 if (reqs[i]->type == arch_register_req_type_none) {
89 if (reqs[i]->type & arch_register_req_type_normal) {
90 fprintf(F, " %s", reqs[i]->cls->name);
93 if (reqs[i]->type & arch_register_req_type_limited) {
95 arch_register_req_format(buf, sizeof(buf), reqs[i], n));
98 if (reqs[i]->type & arch_register_req_type_should_be_same) {
99 unsigned other = reqs[i]->other_same;
102 ir_fprintf(F, " same as");
103 for (i = 0; 1U << i <= other; ++i) {
104 if (other & (1U << i)) {
105 ir_fprintf(F, " %+F", get_irn_n(n, i));
110 if (reqs[i]->type & arch_register_req_type_should_be_different) {
111 unsigned other = reqs[i]->other_different;
114 ir_fprintf(F, " different from");
115 for (i = 0; 1U << i <= other; ++i) {
116 if (other & (1U << i)) {
117 ir_fprintf(F, " %+F", get_irn_n(n, i));
128 fprintf(F, "%sreq = N/A\n", dir);
133 * Dumper interface for dumping ia32 nodes in vcg.
134 * @param n the node to dump
135 * @param F the output file
136 * @param reason indicates which kind of information should be dumped
137 * @return 0 on success or != 0 on failure
139 static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
140 ir_mode *mode = NULL;
143 const arch_register_req_t **reqs;
144 const arch_register_t **slots;
147 case dump_node_opcode_txt:
148 fprintf(F, "%s", get_irn_opname(n));
150 if(is_ia32_Immediate(n) || is_ia32_Const(n)) {
151 const ia32_immediate_attr_t *attr
152 = get_ia32_immediate_attr_const(n);
159 fputs(get_entity_name(attr->symconst), F);
161 if(attr->offset != 0 || attr->symconst == NULL) {
162 if(attr->offset > 0 && attr->symconst != NULL) {
165 fprintf(F, "%ld", attr->offset);
169 const ia32_attr_t *attr = get_ia32_attr_const(n);
171 if(attr->am_sc != NULL || attr->am_offs != 0)
174 if(attr->am_sc != NULL) {
175 if(attr->data.am_sc_sign) {
178 fputs(get_entity_name(attr->am_sc), F);
180 if(attr->am_offs != 0) {
181 if(attr->am_offs > 0 && attr->am_sc != NULL) {
184 fprintf(F, "%d", attr->am_offs);
187 if(attr->am_sc != NULL || attr->am_offs != 0)
192 case dump_node_mode_txt:
193 if (is_ia32_Ld(n) || is_ia32_St(n)) {
194 mode = get_ia32_ls_mode(n);
195 fprintf(F, "[%s]", mode ? get_mode_name(mode) : "?NOMODE?");
199 case dump_node_nodeattr_txt:
200 if (! is_ia32_Lea(n)) {
201 if (is_ia32_AddrModeS(n)) {
202 fprintf(F, "[AM S] ");
203 } else if (is_ia32_AddrModeD(n)) {
204 fprintf(F, "[AM D] ");
210 case dump_node_info_txt:
211 n_res = get_ia32_n_res(n);
212 fprintf(F, "=== IA32 attr begin ===\n");
214 /* dump IN requirements */
215 if (get_irn_arity(n) > 0) {
216 reqs = get_ia32_in_req_all(n);
217 dump_reg_req(F, n, reqs, 0);
220 /* dump OUT requirements */
222 reqs = get_ia32_out_req_all(n);
223 dump_reg_req(F, n, reqs, 1);
226 /* dump assigned registers */
227 slots = get_ia32_slots(n);
228 if (slots && n_res > 0) {
229 for (i = 0; i < n_res; i++) {
230 const arch_register_t *reg;
234 fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
241 switch (get_ia32_op_type(n)) {
243 fprintf(F, "Normal");
246 fprintf(F, "AM Dest (Load+Store)");
249 fprintf(F, "AM Source (Load)");
252 fprintf(F, "unknown (%d)", get_ia32_op_type(n));
257 /* dump supported am */
258 fprintf(F, "AM support = ");
259 switch (get_ia32_am_support(n)) {
264 fprintf(F, "source only (Load)");
267 fprintf(F, "dest only (Load+Store)");
273 fprintf(F, "unknown (%d)", get_ia32_am_support(n));
279 if(get_ia32_am_offs_int(n) != 0) {
280 fprintf(F, "AM offset = %d\n", get_ia32_am_offs_int(n));
283 /* dump AM symconst */
284 if(get_ia32_am_sc(n) != NULL) {
285 ir_entity *ent = get_ia32_am_sc(n);
286 ident *id = get_entity_ld_ident(ent);
287 fprintf(F, "AM symconst = %s\n", get_id_str(id));
291 fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
294 if (is_ia32_SwitchJmp(n)) {
295 fprintf(F, "pn_code = %ld\n", get_ia32_condcode(n));
296 } else if (is_ia32_CMov(n) || is_ia32_Set(n) || is_ia32_Jcc(n)) {
297 long pnc = get_ia32_condcode(n);
298 fprintf(F, "pn_code = %ld (%s)\n", pnc, get_pnc_string(pnc));
300 else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
301 fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
305 fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
308 fprintf(F, "use_frame = %d\n", is_ia32_use_frame(n));
311 fprintf(F, "commutative = %d\n", is_ia32_commutative(n));
314 fprintf(F, "need stackent = %d\n", is_ia32_need_stackent(n));
317 fprintf(F, "latency = %d\n", get_ia32_latency(n));
320 fprintf(F, "flags =");
321 flags = get_ia32_flags(n);
322 if (flags == arch_irn_flags_none) {
326 if (flags & arch_irn_flags_dont_spill) {
327 fprintf(F, " unspillable");
329 if (flags & arch_irn_flags_rematerializable) {
330 fprintf(F, " remat");
332 if (flags & arch_irn_flags_ignore) {
333 fprintf(F, " ignore");
335 if (flags & arch_irn_flags_modify_sp) {
336 fprintf(F, " modify_sp");
339 fprintf(F, " (%d)\n", flags);
341 /* dump frame entity */
342 fprintf(F, "frame entity = ");
343 if (get_ia32_frame_ent(n)) {
344 ir_fprintf(F, "%+F", get_ia32_frame_ent(n));
352 fprintf(F, "ls_mode = ");
353 if (get_ia32_ls_mode(n)) {
354 ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
362 /* dump original ir node name */
363 fprintf(F, "orig node = ");
364 if (get_ia32_orig_node(n)) {
365 fprintf(F, "%s", get_ia32_orig_node(n));
373 fprintf(F, "=== IA32 attr end ===\n");
374 /* end of: case dump_node_info_txt */
383 /***************************************************************************************************
385 * | | | | | | / / | | | | | | | |
386 * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
387 * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
388 * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
389 * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
392 ***************************************************************************************************/
394 ia32_attr_t *get_ia32_attr(ir_node *node) {
395 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
396 return (ia32_attr_t *)get_irn_generic_attr(node);
399 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
400 assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
401 return (const ia32_attr_t*) get_irn_generic_attr_const(node);
404 ia32_x87_attr_t *get_ia32_x87_attr(ir_node *node) {
405 ia32_attr_t *attr = get_ia32_attr(node);
406 ia32_x87_attr_t *x87_attr = CAST_IA32_ATTR(ia32_x87_attr_t, attr);
410 const ia32_x87_attr_t *get_ia32_x87_attr_const(const ir_node *node) {
411 const ia32_attr_t *attr = get_ia32_attr_const(node);
412 const ia32_x87_attr_t *x87_attr = CONST_CAST_IA32_ATTR(ia32_x87_attr_t, attr);
416 const ia32_asm_attr_t *get_ia32_asm_attr_const(const ir_node *node) {
417 const ia32_attr_t *attr = get_ia32_attr_const(node);
418 const ia32_asm_attr_t *asm_attr = CONST_CAST_IA32_ATTR(ia32_asm_attr_t, attr);
423 const ia32_immediate_attr_t *get_ia32_immediate_attr_const(const ir_node *node)
425 const ia32_attr_t *attr = get_ia32_attr_const(node);
426 const ia32_immediate_attr_t *imm_attr = CONST_CAST_IA32_ATTR(ia32_immediate_attr_t, attr);
431 ia32_condcode_attr_t *get_ia32_condcode_attr(ir_node *node) {
432 ia32_attr_t *attr = get_ia32_attr(node);
433 ia32_condcode_attr_t *cc_attr = CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
438 const ia32_condcode_attr_t *get_ia32_condcode_attr_const(const ir_node *node) {
439 const ia32_attr_t *attr = get_ia32_attr_const(node);
440 const ia32_condcode_attr_t *cc_attr = CONST_CAST_IA32_ATTR(ia32_condcode_attr_t, attr);
445 ia32_copyb_attr_t *get_ia32_copyb_attr(ir_node *node) {
446 ia32_attr_t *attr = get_ia32_attr(node);
447 ia32_copyb_attr_t *copyb_attr = CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
452 const ia32_copyb_attr_t *get_ia32_copyb_attr_const(const ir_node *node) {
453 const ia32_attr_t *attr = get_ia32_attr_const(node);
454 const ia32_copyb_attr_t *copyb_attr = CONST_CAST_IA32_ATTR(ia32_copyb_attr_t, attr);
460 * Gets the type of an ia32 node.
462 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
463 const ia32_attr_t *attr = get_ia32_attr_const(node);
464 return attr->data.tp;
468 * Sets the type of an ia32 node.
470 void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
471 ia32_attr_t *attr = get_ia32_attr(node);
476 * Gets the supported address mode of an ia32 node
478 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
479 const ia32_attr_t *attr = get_ia32_attr_const(node);
480 return attr->data.am_support;
483 ia32_am_arity_t get_ia32_am_arity(const ir_node *node) {
484 const ia32_attr_t *attr = get_ia32_attr_const(node);
485 return attr->data.am_arity;
489 * Sets the supported address mode of an ia32 node
491 void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp,
492 ia32_am_arity_t arity) {
493 ia32_attr_t *attr = get_ia32_attr(node);
494 attr->data.am_support = am_tp;
495 attr->data.am_arity = arity;
497 assert((am_tp == ia32_am_None && arity == ia32_am_arity_none) ||
498 (am_tp != ia32_am_None &&
499 ((arity == ia32_am_unary) || (arity == ia32_am_binary) || (arity == ia32_am_ternary))));
503 * Gets the address mode offset as int.
505 int get_ia32_am_offs_int(const ir_node *node) {
506 const ia32_attr_t *attr = get_ia32_attr_const(node);
507 return attr->am_offs;
511 * Sets the address mode offset from an int.
513 void set_ia32_am_offs_int(ir_node *node, int offset) {
514 ia32_attr_t *attr = get_ia32_attr(node);
515 attr->am_offs = offset;
518 void add_ia32_am_offs_int(ir_node *node, int offset) {
519 ia32_attr_t *attr = get_ia32_attr(node);
520 attr->am_offs += offset;
524 * Returns the symconst entity associated to address mode.
526 ir_entity *get_ia32_am_sc(const ir_node *node) {
527 const ia32_attr_t *attr = get_ia32_attr_const(node);
532 * Sets the symconst entity associated to address mode.
534 void set_ia32_am_sc(ir_node *node, ir_entity *entity) {
535 ia32_attr_t *attr = get_ia32_attr(node);
536 attr->am_sc = entity;
540 * Sets the sign bit for address mode symconst.
542 void set_ia32_am_sc_sign(ir_node *node) {
543 ia32_attr_t *attr = get_ia32_attr(node);
544 attr->data.am_sc_sign = 1;
548 * Clears the sign bit for address mode symconst.
550 void clear_ia32_am_sc_sign(ir_node *node) {
551 ia32_attr_t *attr = get_ia32_attr(node);
552 attr->data.am_sc_sign = 0;
556 * Returns the sign bit for address mode symconst.
558 int is_ia32_am_sc_sign(const ir_node *node) {
559 const ia32_attr_t *attr = get_ia32_attr_const(node);
560 return attr->data.am_sc_sign;
564 * Gets the addr mode const.
566 int get_ia32_am_scale(const ir_node *node) {
567 const ia32_attr_t *attr = get_ia32_attr_const(node);
568 return attr->data.am_scale;
572 * Sets the index register scale for address mode.
574 void set_ia32_am_scale(ir_node *node, int scale) {
575 ia32_attr_t *attr = get_ia32_attr(node);
576 attr->data.am_scale = scale;
579 void ia32_copy_am_attrs(ir_node *to, const ir_node *from)
581 set_ia32_ls_mode(to, get_ia32_ls_mode(from));
582 set_ia32_am_scale(to, get_ia32_am_scale(from));
583 set_ia32_am_sc(to, get_ia32_am_sc(from));
584 if(is_ia32_am_sc_sign(from))
585 set_ia32_am_sc_sign(to);
586 add_ia32_am_offs_int(to, get_ia32_am_offs_int(from));
587 set_ia32_frame_ent(to, get_ia32_frame_ent(from));
588 if (is_ia32_use_frame(from))
589 set_ia32_use_frame(to);
593 * Sets the uses_frame flag.
595 void set_ia32_use_frame(ir_node *node) {
596 ia32_attr_t *attr = get_ia32_attr(node);
597 attr->data.use_frame = 1;
601 * Clears the uses_frame flag.
603 void clear_ia32_use_frame(ir_node *node) {
604 ia32_attr_t *attr = get_ia32_attr(node);
605 attr->data.use_frame = 0;
609 * Gets the uses_frame flag.
611 int is_ia32_use_frame(const ir_node *node) {
612 const ia32_attr_t *attr = get_ia32_attr_const(node);
613 return attr->data.use_frame;
617 * Sets node to commutative.
619 void set_ia32_commutative(ir_node *node) {
620 ia32_attr_t *attr = get_ia32_attr(node);
621 attr->data.is_commutative = 1;
625 * Sets node to non-commutative.
627 void clear_ia32_commutative(ir_node *node) {
628 ia32_attr_t *attr = get_ia32_attr(node);
629 attr->data.is_commutative = 0;
633 * Checks if node is commutative.
635 int is_ia32_commutative(const ir_node *node) {
636 const ia32_attr_t *attr = get_ia32_attr_const(node);
637 return attr->data.is_commutative;
640 void set_ia32_need_stackent(ir_node *node) {
641 ia32_attr_t *attr = get_ia32_attr(node);
642 attr->data.need_stackent = 1;
645 void clear_ia32_need_stackent(ir_node *node) {
646 ia32_attr_t *attr = get_ia32_attr(node);
647 attr->data.need_stackent = 0;
650 int is_ia32_need_stackent(const ir_node *node) {
651 const ia32_attr_t *attr = get_ia32_attr_const(node);
652 return attr->data.need_stackent;
656 * Gets the mode of the stored/loaded value (only set for Store/Load)
658 ir_mode *get_ia32_ls_mode(const ir_node *node) {
659 const ia32_attr_t *attr = get_ia32_attr_const(node);
660 return attr->ls_mode;
664 * Sets the mode of the stored/loaded value (only set for Store/Load)
666 void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
667 ia32_attr_t *attr = get_ia32_attr(node);
668 attr->ls_mode = mode;
672 * Gets the frame entity assigned to this node.
674 ir_entity *get_ia32_frame_ent(const ir_node *node) {
675 const ia32_attr_t *attr = get_ia32_attr_const(node);
676 return attr->frame_ent;
680 * Sets the frame entity for this node.
682 void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
683 ia32_attr_t *attr = get_ia32_attr(node);
684 attr->frame_ent = ent;
686 set_ia32_use_frame(node);
688 clear_ia32_use_frame(node);
693 * Gets the instruction latency.
695 unsigned get_ia32_latency(const ir_node *node) {
696 const ir_op *op = get_irn_op(node);
697 const ia32_op_attr_t *op_attr = (ia32_op_attr_t*) get_op_attr(op);
698 return op_attr->latency;
702 * Returns the argument register requirements of an ia32 node.
704 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
705 const ia32_attr_t *attr = get_ia32_attr_const(node);
710 * Sets the argument register requirements of an ia32 node.
712 void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
713 ia32_attr_t *attr = get_ia32_attr(node);
718 * Returns the result register requirements of an ia32 node.
720 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
721 const ia32_attr_t *attr = get_ia32_attr_const(node);
722 return attr->out_req;
726 * Sets the result register requirements of an ia32 node.
728 void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
729 ia32_attr_t *attr = get_ia32_attr(node);
730 attr->out_req = reqs;
734 * Returns the argument register requirement at position pos of an ia32 node.
736 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
737 const ia32_attr_t *attr = get_ia32_attr_const(node);
738 if(attr->in_req == NULL)
739 return arch_no_register_req;
741 return attr->in_req[pos];
745 * Returns the result register requirement at position pos of an ia32 node.
747 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
748 const ia32_attr_t *attr = get_ia32_attr_const(node);
749 if(attr->out_req == NULL)
750 return arch_no_register_req;
752 return attr->out_req[pos];
756 * Sets the OUT register requirements at position pos.
758 void set_ia32_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
759 ia32_attr_t *attr = get_ia32_attr(node);
760 attr->out_req[pos] = req;
764 * Sets the IN register requirements at position pos.
766 void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
767 ia32_attr_t *attr = get_ia32_attr(node);
768 attr->in_req[pos] = req;
772 * Returns the register flag of an ia32 node.
774 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
775 const ia32_attr_t *attr = get_ia32_attr_const(node);
776 return attr->data.flags;
780 * Sets the register flag of an ia32 node.
782 void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
783 ia32_attr_t *attr = get_ia32_attr(node);
784 attr->data.flags = flags;
787 void add_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
788 ia32_attr_t *attr = get_ia32_attr(node);
789 attr->data.flags |= flags;
793 * Returns the result register slots of an ia32 node.
795 const arch_register_t **get_ia32_slots(const ir_node *node) {
796 const ia32_attr_t *attr = get_ia32_attr_const(node);
801 * Returns the number of results.
803 int get_ia32_n_res(const ir_node *node) {
804 const ia32_attr_t *attr = get_ia32_attr_const(node);
805 return ARR_LEN(attr->slots);
809 * Returns the condition code of a node.
811 long get_ia32_condcode(const ir_node *node)
813 const ia32_condcode_attr_t *attr = get_ia32_condcode_attr_const(node);
814 return attr->pn_code;
818 * Sets the condition code of a node
820 void set_ia32_condcode(ir_node *node, long code)
822 ia32_condcode_attr_t *attr = get_ia32_condcode_attr(node);
823 attr->pn_code = code;
827 * Returns the condition code of a node.
829 unsigned get_ia32_copyb_size(const ir_node *node)
831 const ia32_copyb_attr_t *attr = get_ia32_copyb_attr_const(node);
836 * Sets the flags for the n'th out.
838 void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
839 ia32_attr_t *attr = get_ia32_attr(node);
840 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
841 attr->out_flags[pos] = flags;
845 * Gets the flags for the n'th out.
847 arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) {
848 const ia32_attr_t *attr = get_ia32_attr_const(node);
849 assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
850 return attr->out_flags[pos];
854 * Get the list of available execution units.
856 const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) {
857 const ia32_attr_t *attr = get_ia32_attr_const(node);
858 return attr->exec_units;
862 * Get the exception label attribute.
864 unsigned get_ia32_exc_label(const ir_node *node) {
865 const ia32_attr_t *attr = get_ia32_attr_const(node);
866 return attr->data.except_label;
870 * Set the exception label attribute.
872 void set_ia32_exc_label(ir_node *node, unsigned flag) {
873 ia32_attr_t *attr = get_ia32_attr(node);
874 attr->data.except_label = flag;
880 * Returns the name of the original ir node.
882 const char *get_ia32_orig_node(const ir_node *node) {
883 const ia32_attr_t *attr = get_ia32_attr_const(node);
884 return attr->orig_node;
888 * Sets the name of the original ir node.
890 void set_ia32_orig_node(ir_node *node, const char *name) {
891 ia32_attr_t *attr = get_ia32_attr(node);
892 attr->orig_node = name;
897 /******************************************************************************************************
899 * (_) | | | | | | / _| | | (_)
900 * ___ _ __ ___ ___ _ __ _| | __ _| |_| |_ _ __ | |_ _ _ _ __ ___| |_ _ ___ _ __ ___
901 * / __| '_ \ / _ \/ __| |/ _` | | / _` | __| __| '__| | _| | | | '_ \ / __| __| |/ _ \| '_ \ / __|
902 * \__ \ |_) | __/ (__| | (_| | | | (_| | |_| |_| | | | | |_| | | | | (__| |_| | (_) | | | | \__ \
903 * |___/ .__/ \___|\___|_|\__,_|_| \__,_|\__|\__|_| |_| \__,_|_| |_|\___|\__|_|\___/|_| |_| |___/
906 ******************************************************************************************************/
909 * Returns whether or not the node is an AddrModeS node.
911 int is_ia32_AddrModeS(const ir_node *node) {
912 const ia32_attr_t *attr = get_ia32_attr_const(node);
913 return (attr->data.tp == ia32_AddrModeS);
917 * Returns whether or not the node is an AddrModeD node.
919 int is_ia32_AddrModeD(const ir_node *node) {
920 const ia32_attr_t *attr = get_ia32_attr_const(node);
921 return (attr->data.tp == ia32_AddrModeD);
925 * Checks if node is a Load or xLoad/vfLoad.
927 int is_ia32_Ld(const ir_node *node) {
928 int op = get_ia32_irn_opcode(node);
929 return op == iro_ia32_Load ||
930 op == iro_ia32_xLoad ||
931 op == iro_ia32_vfld ||
936 * Checks if node is a Store or xStore/vfStore.
938 int is_ia32_St(const ir_node *node) {
939 int op = get_ia32_irn_opcode(node);
940 return op == iro_ia32_Store ||
941 op == iro_ia32_Store8Bit ||
942 op == iro_ia32_xStore ||
943 op == iro_ia32_vfst ||
944 op == iro_ia32_fst ||
949 * Returns the name of the OUT register at position pos.
951 const char *get_ia32_out_reg_name(const ir_node *node, int pos) {
952 const ia32_attr_t *attr = get_ia32_attr_const(node);
954 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
955 assert(attr->slots[pos] && "No register assigned");
957 return arch_register_get_name(attr->slots[pos]);
961 * Returns the index of the OUT register at position pos within its register class.
963 int get_ia32_out_regnr(const ir_node *node, int pos) {
964 const ia32_attr_t *attr = get_ia32_attr_const(node);
966 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
967 assert(attr->slots[pos] && "No register assigned");
969 return arch_register_get_index(attr->slots[pos]);
972 void ia32_swap_left_right(ir_node *node)
974 ia32_attr_t *attr = get_ia32_attr(node);
975 ir_node *left = get_irn_n(node, n_ia32_binary_left);
976 ir_node *right = get_irn_n(node, n_ia32_binary_right);
978 assert(is_ia32_commutative(node));
979 attr->data.ins_permuted = !attr->data.ins_permuted;
980 set_irn_n(node, n_ia32_binary_left, right);
981 set_irn_n(node, n_ia32_binary_right, left);
985 * Returns the OUT register at position pos.
987 const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) {
988 const ia32_attr_t *attr = get_ia32_attr_const(node);
990 assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
991 assert(attr->slots[pos] && "No register assigned");
993 return attr->slots[pos];
997 * Initializes the nodes attributes.
999 void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags,
1000 const arch_register_req_t **in_reqs,
1001 const arch_register_req_t **out_reqs,
1002 const be_execution_unit_t ***execution_units,
1005 ir_graph *irg = get_irn_irg(node);
1006 struct obstack *obst = get_irg_obstack(irg);
1007 ia32_attr_t *attr = get_ia32_attr(node);
1009 set_ia32_flags(node, flags);
1010 set_ia32_in_req_all(node, in_reqs);
1011 set_ia32_out_req_all(node, out_reqs);
1013 attr->exec_units = execution_units;
1015 attr->attr_type |= IA32_ATTR_ia32_attr_t;
1018 attr->out_flags = NEW_ARR_D(int, obst, n_res);
1019 memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
1021 attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
1022 /* void* cast to suppress an incorrect warning on MSVC */
1023 memset((void*)attr->slots, 0, n_res * sizeof(attr->slots[0]));
1027 init_ia32_x87_attributes(ir_node *res)
1030 ia32_attr_t *attr = get_ia32_attr(res);
1031 attr->attr_type |= IA32_ATTR_ia32_x87_attr_t;
1035 ia32_current_cg->do_x87_sim = 1;
1039 init_ia32_asm_attributes(ir_node *res)
1042 ia32_attr_t *attr = get_ia32_attr(res);
1043 attr->attr_type |= IA32_ATTR_ia32_asm_attr_t;
1050 init_ia32_immediate_attributes(ir_node *res, ir_entity *symconst,
1051 int symconst_sign, long offset)
1053 ia32_immediate_attr_t *attr = get_irn_generic_attr(res);
1056 attr->attr.attr_type |= IA32_ATTR_ia32_immediate_attr_t;
1058 attr->symconst = symconst;
1059 attr->sc_sign = symconst_sign;
1060 attr->offset = offset;
1064 init_ia32_copyb_attributes(ir_node *res, unsigned size) {
1065 ia32_copyb_attr_t *attr = get_irn_generic_attr(res);
1068 attr->attr.attr_type |= IA32_ATTR_ia32_copyb_attr_t;
1074 init_ia32_condcode_attributes(ir_node *res, long pnc) {
1075 ia32_condcode_attr_t *attr = get_irn_generic_attr(res);
1078 attr->attr.attr_type |= IA32_ATTR_ia32_condcode_attr_t;
1080 attr->pn_code = pnc;
1083 ir_node *get_ia32_result_proj(const ir_node *node)
1085 const ir_edge_t *edge;
1087 foreach_out_edge(node, edge) {
1088 ir_node *proj = get_edge_src_irn(edge);
1089 if(get_Proj_proj(proj) == 0) {
1096 /***************************************************************************************
1099 * _ __ ___ __| | ___ ___ ___ _ __ ___| |_ _ __ _ _ ___| |_ ___ _ __ ___
1100 * | '_ \ / _ \ / _` |/ _ \ / __/ _ \| '_ \/ __| __| '__| | | |/ __| __/ _ \| '__/ __|
1101 * | | | | (_) | (_| | __/ | (_| (_) | | | \__ \ |_| | | |_| | (__| || (_) | | \__ \
1102 * |_| |_|\___/ \__,_|\___| \___\___/|_| |_|___/\__|_| \__,_|\___|\__\___/|_| |___/
1104 ***************************************************************************************/
1106 /* default compare operation to compare attributes */
1107 int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) {
1108 if (a->data.tp != b->data.tp)
1111 if (a->data.am_scale != b->data.am_scale
1112 || a->data.am_sc_sign != b->data.am_sc_sign
1113 || a->am_offs != b->am_offs
1114 || a->am_sc != b->am_sc
1115 || a->ls_mode != b->ls_mode)
1118 /* nodes with not yet assigned entities shouldn't be CSEd (important for
1119 * unsigned int -> double conversions */
1120 if(a->data.use_frame && a->frame_ent == NULL)
1122 if(b->data.use_frame && b->frame_ent == NULL)
1125 if (a->data.use_frame != b->data.use_frame
1126 || a->frame_ent != b->frame_ent)
1129 if (a->data.tp != b->data.tp)
1132 if (a->data.except_label != b->data.except_label)
1135 if (a->data.ins_permuted != b->data.ins_permuted
1136 || a->data.cmp_unsigned != b->data.cmp_unsigned)
1142 /** Compare nodes attributes for all "normal" nodes. */
1144 int ia32_compare_nodes_attr(ir_node *a, ir_node *b)
1146 const ia32_attr_t* attr_a = get_ia32_attr_const(a);
1147 const ia32_attr_t* attr_b = get_ia32_attr_const(b);
1149 return ia32_compare_attr(attr_a, attr_b);
1152 /** Compare node attributes for nodes with condition code. */
1154 int ia32_compare_condcode_attr(ir_node *a, ir_node *b)
1156 const ia32_condcode_attr_t *attr_a;
1157 const ia32_condcode_attr_t *attr_b;
1159 if (ia32_compare_nodes_attr(a, b))
1162 attr_a = get_ia32_condcode_attr_const(a);
1163 attr_b = get_ia32_condcode_attr_const(b);
1165 if(attr_a->pn_code != attr_b->pn_code)
1171 /** Compare node attributes for CopyB nodes. */
1173 int ia32_compare_copyb_attr(ir_node *a, ir_node *b)
1175 const ia32_copyb_attr_t *attr_a;
1176 const ia32_copyb_attr_t *attr_b;
1178 if (ia32_compare_nodes_attr(a, b))
1181 attr_a = get_ia32_copyb_attr_const(a);
1182 attr_b = get_ia32_copyb_attr_const(b);
1184 if(attr_a->size != attr_b->size)
1191 /** Compare ASM node attributes. */
1193 int ia32_compare_asm_attr(ir_node *a, ir_node *b)
1195 const ia32_asm_attr_t *attr_a;
1196 const ia32_asm_attr_t *attr_b;
1198 if(ia32_compare_nodes_attr(a, b))
1201 attr_a = get_ia32_asm_attr_const(a);
1202 attr_b = get_ia32_asm_attr_const(b);
1204 if(attr_a->asm_text != attr_b->asm_text)
1210 /** Compare node attributes for Immediates. */
1212 int ia32_compare_immediate_attr(ir_node *a, ir_node *b)
1214 const ia32_immediate_attr_t *attr_a = get_ia32_immediate_attr_const(a);
1215 const ia32_immediate_attr_t *attr_b = get_ia32_immediate_attr_const(b);
1217 if(attr_a->symconst != attr_b->symconst ||
1218 attr_a->sc_sign != attr_b->sc_sign ||
1219 attr_a->offset != attr_b->offset)
1225 /** Compare node attributes for x87 nodes. */
1227 int ia32_compare_x87_attr(ir_node *a, ir_node *b)
1229 return ia32_compare_nodes_attr(a, b);
1233 /* copies the ia32 attributes */
1234 static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node)
1236 ir_graph *irg = get_irn_irg(new_node);
1237 struct obstack *obst = get_irg_obstack(irg);
1238 const ia32_attr_t *attr_old = get_ia32_attr_const(old_node);
1239 ia32_attr_t *attr_new = get_ia32_attr(new_node);
1241 /* copy the attributes */
1242 memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
1244 /* copy out flags */
1245 attr_new->out_flags =
1246 DUP_ARR_D(int, obst, attr_old->out_flags);
1247 /* copy register assignments */
1249 DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
1252 /* Include the generated constructor functions */
1253 #include "gen_ia32_new_nodes.c.inl"