2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Register param constraints and some other register handling tools.
23 * @author Christian Wuerdig
34 #include "ia32_map_regs.h"
35 #include "ia32_new_nodes.h"
36 #include "gen_ia32_regalloc_if.h"
37 #include "bearch_ia32_t.h"
38 #include "../benodesets.h"
40 static int maxnum_gpreg_args = 3; /* maximum number of int arguments passed in registers; default 3 */
41 static int maxnum_sse_args = 5; /* maximum number of float arguments passed in registers; default 5 */
43 /* this is the order of the assigned registers usesd for parameter passing */
45 const arch_register_t *gpreg_param_reg_std[] = {
46 &ia32_gp_regs[REG_EAX],
47 &ia32_gp_regs[REG_EDX],
48 &ia32_gp_regs[REG_ECX],
49 &ia32_gp_regs[REG_EBX],
50 &ia32_gp_regs[REG_EDI],
51 &ia32_gp_regs[REG_ESI]
54 const arch_register_t *gpreg_param_reg_this[] = {
55 &ia32_gp_regs[REG_ECX],
56 &ia32_gp_regs[REG_EAX],
57 &ia32_gp_regs[REG_EDX],
58 &ia32_gp_regs[REG_EBX],
59 &ia32_gp_regs[REG_EDI],
60 &ia32_gp_regs[REG_ESI]
63 const arch_register_t *fpreg_sse_param_reg_std[] = {
64 &ia32_xmm_regs[REG_XMM0],
65 &ia32_xmm_regs[REG_XMM1],
66 &ia32_xmm_regs[REG_XMM2],
67 &ia32_xmm_regs[REG_XMM3],
68 &ia32_xmm_regs[REG_XMM4],
69 &ia32_xmm_regs[REG_XMM5],
70 &ia32_xmm_regs[REG_XMM6],
71 &ia32_xmm_regs[REG_XMM7]
74 const arch_register_t *fpreg_sse_param_reg_this[] = {
75 NULL, /* in case of a "this" pointer, the first parameter must not be a float */
76 &ia32_xmm_regs[REG_XMM0],
77 &ia32_xmm_regs[REG_XMM1],
78 &ia32_xmm_regs[REG_XMM2],
79 &ia32_xmm_regs[REG_XMM3],
80 &ia32_xmm_regs[REG_XMM4],
81 &ia32_xmm_regs[REG_XMM5],
82 &ia32_xmm_regs[REG_XMM6],
83 &ia32_xmm_regs[REG_XMM7]
88 /* Mapping to store registers in firm nodes */
90 struct ia32_irn_reg_assoc {
92 const arch_register_t *reg;
95 int ia32_cmp_irn_reg_assoc(const void *a, const void *b, size_t len) {
96 const struct ia32_irn_reg_assoc *x = a;
97 const struct ia32_irn_reg_assoc *y = b;
99 return x->irn != y->irn;
102 static struct ia32_irn_reg_assoc *get_irn_reg_assoc(const ir_node *irn, set *reg_set) {
103 struct ia32_irn_reg_assoc templ;
108 hash = nodeset_hash(irn);
110 return set_insert(reg_set, &templ, sizeof(templ), hash);
113 void ia32_set_firm_reg(ir_node *irn, const arch_register_t *reg, set *reg_set) {
114 struct ia32_irn_reg_assoc *assoc = get_irn_reg_assoc(irn, reg_set);
118 const arch_register_t *ia32_get_firm_reg(const ir_node *irn, set *reg_set) {
119 struct ia32_irn_reg_assoc *assoc = get_irn_reg_assoc(irn, reg_set);
123 void ia32_build_16bit_reg_map(pmap *reg_map) {
124 pmap_insert(reg_map, &ia32_gp_regs[REG_EAX], "ax");
125 pmap_insert(reg_map, &ia32_gp_regs[REG_EBX], "bx");
126 pmap_insert(reg_map, &ia32_gp_regs[REG_ECX], "cx");
127 pmap_insert(reg_map, &ia32_gp_regs[REG_EDX], "dx");
128 pmap_insert(reg_map, &ia32_gp_regs[REG_ESI], "si");
129 pmap_insert(reg_map, &ia32_gp_regs[REG_EDI], "di");
130 pmap_insert(reg_map, &ia32_gp_regs[REG_EBP], "bp");
131 pmap_insert(reg_map, &ia32_gp_regs[REG_ESP], "sp");
134 void ia32_build_8bit_reg_map(pmap *reg_map) {
135 pmap_insert(reg_map, &ia32_gp_regs[REG_EAX], "al");
136 pmap_insert(reg_map, &ia32_gp_regs[REG_EBX], "bl");
137 pmap_insert(reg_map, &ia32_gp_regs[REG_ECX], "cl");
138 pmap_insert(reg_map, &ia32_gp_regs[REG_EDX], "dl");
141 void ia32_build_8bit_reg_map_high(pmap *reg_map) {
142 pmap_insert(reg_map, &ia32_gp_regs[REG_EAX], "ah");
143 pmap_insert(reg_map, &ia32_gp_regs[REG_EBX], "bh");
144 pmap_insert(reg_map, &ia32_gp_regs[REG_ECX], "ch");
145 pmap_insert(reg_map, &ia32_gp_regs[REG_EDX], "dh");
148 const char *ia32_get_mapped_reg_name(pmap *reg_map, const arch_register_t *reg) {
149 pmap_entry *e = pmap_find(reg_map, (void *)reg);
151 //assert(e && "missing map init?");
153 printf("FIXME: ia32map_regs.c:122: returning fake register name for ia32 with 32 register\n");
161 * Check all parameters and determine the maximum number of parameters
162 * to pass in gp regs resp. in fp regs.
164 * @param n The number of parameters
165 * @param modes The list of the parameter modes
166 * @param n_int Holds the number of int parameters to be passed in regs after the call
167 * @param n_float Holds the number of float parameters to be passed in regs after the call
168 * @return The number of the last parameter to be passed in register
170 int ia32_get_n_regparam_class(ia32_code_gen_t *cg, int n, ir_mode **modes,
171 int *n_int, int *n_float)
177 max_fp_regs = maxnum_sse_args;
185 for (i = 0; i < n && !finished; i++) {
186 if (mode_is_int(modes[i]) || mode_is_reference(modes[i])) {
189 else if (mode_is_float(modes[i])) {
190 *n_float = *n_float + 1;
196 /* test for maximum */
197 if (*n_int == maxnum_gpreg_args || *n_float == max_fp_regs) {
207 * Returns the register for parameter nr.
209 * @param n The number of parameters
210 * @param modes The list of the parameter modes
211 * @param nr The number of the parameter to return the requirements for
212 * @param cc The calling convention
213 * @return The register
215 const arch_register_t *ia32_get_RegParam_reg(ia32_code_gen_t *cg, unsigned cc,
216 unsigned nr, ir_mode *mode)
218 if(mode_is_float(mode)) {
221 assert(nr < maxnum_sse_args);
222 if(cc & cc_this_call) {
223 return fpreg_sse_param_reg_this[nr];
225 return fpreg_sse_param_reg_std[nr];
228 assert(mode_is_int(mode) || mode_is_reference(mode));
230 if(cc & cc_this_call) {
231 assert(nr < maxnum_gpreg_args);
232 return gpreg_param_reg_this[nr];
234 return gpreg_param_reg_std[nr];